Commit 90d6a57a authored by hardy's avatar hardy

Merge remote-tracking branch 'origin/NR_UL_SCFDMA_100MHz' into integration_2021_wk08

parents 01141602 13086925
dev Fix_SA_SIB1 NRPRACH_highSpeed_saankhya NRUE_usedlschparallel NR_10MHz NR_DL_MIMO NR_FAPI_beamindex_SSB_RO NR_FDD_FIX NR_FR2_initsync_fixes NR_MAC_SSB NR_MAC_TCI_UCI_GlobalEdge NR_MCS_BLER NR_SA_F1AP_5GRECORDS NR_SA_F1AP_5GRECORDS_lts NR_SA_F1AP_RFSIMULATOR3 NR_SA_F1AP_RFSIMULATOR3_tmp NR_SA_F1AP_RFSIMULATOR_w5GCN NR_SA_w5GCN_new_gtpu NR_UE_CONFIG_REQ_FIXES NR_UE_SA NR_cleanup_PUCCH_resources NR_multiplexing_HARQ_CSI_PUCCH NR_scheduling_CSIRS NR_scheduling_request PBCHNRTCFIX RFquality Saankhya_NRPRACH_HighSpeed add-dmrs-test benetel_config_file_fix bugfix-free-ra-process bugfix-nr-t-reordering bugfix_gnb_rt_stats_html ci-new-docker-pipeline ci-reduce-nb-vms ci_benetel_test ci_phytest ci_quectel_support ci_test_nsa_fix_quectel_nic ci_test_ra_fr2 ci_vm_resource_fix detached-w16-test develop develop-CBRA-v3 develop-CCE develop-NR_SA_F1AP_5GRECORDS develop-NR_SA_F1AP_5GRECORDS-hs develop-NR_SA_F1AP_5GRECORDS-v3 develop-SA-CBRA develop-SA-CBRA-CUDU develop-SA-CBRA-Msg5 develop-SA-CBRA-lts develop-SA-CBRA-ulsch-lts develop-SA-RA disable_CSI_measrep docker-improvements-2021-april docker-no-cache-option episys-merge episys/nsa_baseline episys/nsa_development fft_bench_hotfix fix-nr-pdcp-timer fix-nr-rlc-range-nack fix-physim-deploy fix-quectel fix-realtime fix-x2-without-gnb fix_NR_DLUL_PF fix_NR_DLUL_PF_benchmark fix_coreset_dmrs_idx fix_nr_ulsim fix_rb_corruption fix_reestablishment fixgtpu git-dashboard gnb-freerun-txru gnb-n300-fixes gnb-realtime-hotfix gnb-realtime-quickfix gnb-threadpool hack-exit-gnb-when-no-enb-nsa integ-w13-test-rt-issue integration_2020_wk15 integration_2021_wk08 integration_2021_wk08_2 integration_2021_wk09 integration_2021_wk09_b integration_2021_wk10 integration_2021_wk10_b integration_2021_wk11 integration_2021_wk12 integration_2021_wk12_b integration_2021_wk13_a integration_2021_wk13_b integration_2021_wk13_b_fix_tdas integration_2021_wk13_b_fixed integration_2021_wk13_c integration_2021_wk14_a integration_2021_wk15_a integration_2021_wk16 integration_2021_wk17_a integration_2021_wk17_b integration_2021_wk18_a integration_2021_wk18_b integration_2021_wk19 integration_w5GC_CBRA_test migrate-cpp-check-container multiple_ssb_sib1_bugfix new-gtpu nfapi_nr_arch_mod nfapi_nr_develop_new nr-dl-mimo-2layer nr-dmrs-fixes nr-pdcp-improvements nr-pdcp-nia2-integrity nr-pdcp-srb-integrity nr-stats-print nrPBCHTCFix nrPbchTcFix nr_power_measurement_fixes nr_ue_pdcp_fix oairu physim-build-deploy physim-deploy-handle-error-cases prb_based_dl_channel_estimation ptrs_rrc_config recursive-cmake rh_ci_add_runtime_stats rh_ci_add_uldlharq_stats rh_ci_gsheet_rt_monitoring rh_ci_nsa2jenkins rh_ci_nsa_test_n310 rh_ci_phy_test_improve rh_ci_test_benetel rh_ci_test_nsa rh_ci_test_nsa_wk16 rh_ci_test_nsa_wk17_b rh_ci_test_nsa_wk17b rohan_ulsim2RxFix s1_subnormal sanitize-address sanitize-v1 sanitize-v1-tmp sim-channels small_nr_bugfixes t-gnb-tracer test-panos test_nsa_gtpu_fix test_rt-fix_phy-test ue-dci-false-detection ue-pdsch-pusch-parallel ue-race-fix usrp_stop_cleanly usrp_x400 wk11-with-phytest xw2 2021.wk14_a 2021.wk13_d 2021.wk13_c 2021.w18_b 2021.w18_a 2021.w17_b 2021.w16 2021.w15 2021.w14 2021.w13_a 2021.w12 2021.w11 2021.w10 2021.w09 2021.w08 benetel_gnb_rel_2.0 benetel_enb_rel_2.0
No related merge requests found
......@@ -1292,7 +1292,9 @@
(Test8: DMRS Type B, 3 DMRS, 2 PTRS, 3 Interpolated Symbols),
(Test9: SC-FDMA, 50 PRBs),
(Test10: SC-FDMA, 75 PRBs),
(Test11: SC-FDMA, 3 DMRS)</desc>
(Test11: SC-FDMA, 216 PRBs),
(Test12: SC-FDMA, 273 PRBs),
(Test13: SC-FDMA, 3 DMRS)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
......@@ -1307,10 +1309,13 @@
-n100 -s5 -T 2 1 2 -U 2 0 2
-n100 -s5 -T 2 2 2 -U 2 1 2
-n100 -s5 -a4 -b8 -T 2 1 2 -U 2 1 3
-n100 -s20 -Z
-n100 -s20 -Z -r75
-n100 -s20 -Z -U 2 0 2</main_exec_args>
<tags>nr_ulsim.test1 nr_ulsim.test2 nr_ulsim.test3 nr_ulsim.test4 nr_ulsim.test5 nr_ulsim.test6 nr_ulsim.test7 nr_ulsim.test8 nr_ulsim.test9 nr_ulsim.test10 nr_ulsim.test11</tags>
-n100 -s2 -Z
-n100 -s2 -Z -r75
-n100 -s2 -Z -r216 -R217
-n100 -s2 -Z -r270 -R273
-n100 -s2 -Z -U 2 0 2</main_exec_args>
<tags>nr_ulsim.test1 nr_ulsim.test2 nr_ulsim.test3 nr_ulsim.test4 nr_ulsim.test5 nr_ulsim.test6 nr_ulsim.test7 nr_ulsim.test8 nr_ulsim.test9 nr_ulsim.test10 nr_ulsim.test11 nr_ulsim.test12 nr_ulsim.test13</tags>
<search_expr_true>PUSCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
......
......@@ -325,10 +325,10 @@ void nr_ue_layer_mapping(NR_UE_ULSCH_t **ulsch_ue,
void nr_dft(int32_t *z, int32_t *d, uint32_t Msc_PUSCH)
{
#if defined(__x86_64__) || defined(__i386__)
__m128i dft_in128[1][1200], dft_out128[1][1200];
#if defined(__x86_64__) || +defined(__i386__)
__m128i dft_in128[1][3240], dft_out128[1][3240];
#elif defined(__arm__)
int16x8_t dft_in128[1][1200], dft_out128[1][1200];
int16x8_t dft_in128[1][3240], dft_out128[1][3240];
#endif
uint32_t *dft_in0 = (uint32_t*)dft_in128[0], *dft_out0 = (uint32_t*)dft_out128[0];
......@@ -340,9 +340,11 @@ void nr_dft(int32_t *z, int32_t *d, uint32_t Msc_PUSCH)
int16x8_t norm128;
#endif
if ((Msc_PUSCH % 1536) > 0) {
for (i = 0, ip = 0; i < Msc_PUSCH; i++, ip+=4) {
dft_in0[ip] = d[i];
}
}
switch (Msc_PUSCH) {
case 12:
......@@ -480,7 +482,7 @@ void nr_dft(int32_t *z, int32_t *d, uint32_t Msc_PUSCH)
break;
case 972:
dft(DFT_960,(int16_t*)dft_in0, (int16_t*)dft_out0, 1);
dft(DFT_972,(int16_t*)dft_in0, (int16_t*)dft_out0, 1);
break;
case 1080:
......@@ -494,11 +496,98 @@ void nr_dft(int32_t *z, int32_t *d, uint32_t Msc_PUSCH)
case 1200:
dft(DFT_1200,(int16_t*)dft_in0, (int16_t*)dft_out0, 1);
break;
case 1296:
dft(DFT_1296,(int16_t*)dft_in0, (int16_t*)dft_out0, 1);
break;
case 1440:
dft(DFT_1440,(int16_t*)dft_in0, (int16_t*)dft_out0, 1);
break;
case 1500:
dft(DFT_1500,(int16_t*)dft_in0, (int16_t*)dft_out0, 1);
break;
case 1536:
//dft(DFT_1536,(int16_t*)dft_in0, (int16_t*)dft_out0, 1);
dft(DFT_1536,(int16_t*)d, (int16_t*)z, 1);
break;
case 1620:
dft(DFT_1620,(int16_t*)dft_in0, (int16_t*)dft_out0, 1);
break;
case 1728:
dft(DFT_1728,(int16_t*)dft_in0, (int16_t*)dft_out0, 1);
break;
case 1800:
dft(DFT_1800,(int16_t*)dft_in0, (int16_t*)dft_out0, 1);
break;
case 1920:
dft(DFT_1920,(int16_t*)dft_in0, (int16_t*)dft_out0, 1);
break;
case 1944:
dft(DFT_1944,(int16_t*)dft_in0, (int16_t*)dft_out0, 1);
break;
case 2160:
dft(DFT_2160,(int16_t*)dft_in0, (int16_t*)dft_out0, 1);
break;
case 2304:
dft(DFT_2304,(int16_t*)dft_in0, (int16_t*)dft_out0, 1);
break;
case 2400:
dft(DFT_2400,(int16_t*)dft_in0, (int16_t*)dft_out0, 1);
break;
case 2592:
dft(DFT_2592,(int16_t*)dft_in0, (int16_t*)dft_out0, 1);
break;
case 2700:
dft(DFT_2700,(int16_t*)dft_in0, (int16_t*)dft_out0, 1);
break;
case 2880:
dft(DFT_2880,(int16_t*)dft_in0, (int16_t*)dft_out0, 1);
break;
case 2916:
dft(DFT_2916,(int16_t*)dft_in0, (int16_t*)dft_out0, 1);
break;
case 3000:
dft(DFT_3000,(int16_t*)dft_in0, (int16_t*)dft_out0, 1);
break;
case 3072:
//dft(DFT_3072,(int16_t*)dft_in0, (int16_t*)dft_out0, 1);
dft(DFT_3072,(int16_t*)d, (int16_t*)z, 1);
break;
case 3240:
dft(DFT_3240,(int16_t*)dft_in0, (int16_t*)dft_out0, 1);
break;
default:
// should not be reached
LOG_E( PHY, "Unsupported Msc_PUSCH value of %"PRIu16"\n", Msc_PUSCH );
return;
}
for (i = 0, ip = 0; i < Msc_PUSCH; i++, ip+=4) {
if ((Msc_PUSCH % 1536) > 0) {
for (i = 0, ip = 0; i < Msc_PUSCH; i++, ip+=4)
z[i] = dft_out0[ip];
}
}
......
......@@ -16,10 +16,10 @@ void nr_idft(int32_t *z, uint32_t Msc_PUSCH)
{
#if defined(__x86_64__) || defined(__i386__)
__m128i idft_in128[1][1200], idft_out128[1][1200];
__m128i idft_in128[1][3240], idft_out128[1][3240];
__m128i norm128;
#elif defined(__arm__)
int16x8_t idft_in128[1][1200], idft_out128[1][1200];
int16x8_t idft_in128[1][3240], idft_out128[1][3240];
int16x8_t norm128;
#endif
int16_t *idft_in0 = (int16_t*)idft_in128[0], *idft_out0 = (int16_t*)idft_out128[0];
......@@ -28,6 +28,7 @@ void nr_idft(int32_t *z, uint32_t Msc_PUSCH)
LOG_T(PHY,"Doing lte_idft for Msc_PUSCH %d\n",Msc_PUSCH);
if ((Msc_PUSCH % 1536) > 0) {
// conjugate input
for (i = 0; i < (Msc_PUSCH>>2); i++) {
#if defined(__x86_64__)||defined(__i386__)
......@@ -36,12 +37,10 @@ void nr_idft(int32_t *z, uint32_t Msc_PUSCH)
*&(((int16x8_t*)z)[i]) = vmulq_s16(*&(((int16x8_t*)z)[i]), *(int16x8_t*)&conjugate2[0]);
#endif
}
for (i=0,ip=0; i<Msc_PUSCH; i++, ip+=4) {
((int32_t*)idft_in0)[ip+0] = z[i];
for (i = 0, ip = 0; i < Msc_PUSCH; i++, ip+=4)
((uint32_t*)idft_in0)[ip+0] = z[i];
}
switch (Msc_PUSCH) {
case 12:
dft(DFT_12,(int16_t *)idft_in0, (int16_t *)idft_out0,0);
......@@ -194,17 +193,93 @@ void nr_idft(int32_t *z, uint32_t Msc_PUSCH)
dft(DFT_1200,idft_in0, idft_out0, 1);
break;
case 1296:
dft(DFT_1296,(int16_t*)idft_in0, (int16_t*)idft_out0, 1);
break;
case 1440:
dft(DFT_1440,(int16_t*)idft_in0, (int16_t*)idft_out0, 1);
break;
case 1500:
dft(DFT_1500,(int16_t*)idft_in0, (int16_t*)idft_out0, 1);
break;
case 1536:
//dft(DFT_1536,(int16_t*)idft_in0, (int16_t*)idft_out0, 1);
idft(IDFT_1536,(int16_t*)z, (int16_t*)z, 1);
break;
case 1620:
dft(DFT_1620,(int16_t*)idft_in0, (int16_t*)idft_out0, 1);
break;
case 1728:
dft(DFT_1728,(int16_t*)idft_in0, (int16_t*)idft_out0, 1);
break;
case 1800:
dft(DFT_1800,(int16_t*)idft_in0, (int16_t*)idft_out0, 1);
break;
case 1920:
dft(DFT_1920,(int16_t*)idft_in0, (int16_t*)idft_out0, 1);
break;
case 1944:
dft(DFT_1944,(int16_t*)idft_in0, (int16_t*)idft_out0, 1);
break;
case 2160:
dft(DFT_2160,(int16_t*)idft_in0, (int16_t*)idft_out0, 1);
break;
case 2304:
dft(DFT_2304,(int16_t*)idft_in0, (int16_t*)idft_out0, 1);
break;
case 2400:
dft(DFT_2400,(int16_t*)idft_in0, (int16_t*)idft_out0, 1);
break;
case 2592:
dft(DFT_2592,(int16_t*)idft_in0, (int16_t*)idft_out0, 1);
break;
case 2700:
dft(DFT_2700,(int16_t*)idft_in0, (int16_t*)idft_out0, 1);
break;
case 2880:
dft(DFT_2880,(int16_t*)idft_in0, (int16_t*)idft_out0, 1);
break;
case 2916:
dft(DFT_2916,(int16_t*)idft_in0, (int16_t*)idft_out0, 1);
break;
case 3000:
dft(DFT_3000,(int16_t*)idft_in0, (int16_t*)idft_out0, 1);
break;
case 3072:
//dft(DFT_3072,(int16_t*)idft_in0, (int16_t*)idft_out0, 1);
idft(IDFT_3072,(int16_t*)z, (int16_t*)z, 1);
break;
case 3240:
dft(DFT_3240,(int16_t*)idft_in0, (int16_t*)idft_out0, 1);
break;
default:
// should not be reached
LOG_E( PHY, "Unsupported Msc_PUSCH value of %"PRIu16"\n", Msc_PUSCH );
return;
}
for (i = 0, ip = 0; i < Msc_PUSCH; i++, ip+=4) {
z[i] = ((int32_t*)idft_out0)[ip];
}
if ((Msc_PUSCH % 1536) > 0) {
for (i = 0, ip = 0; i < Msc_PUSCH; i++, ip+=4)
z[i] = ((uint32_t*)idft_out0)[ip];
// conjugate output
for (i = 0; i < (Msc_PUSCH>>2); i++) {
......@@ -214,6 +289,7 @@ void nr_idft(int32_t *z, uint32_t Msc_PUSCH)
*&(((int16x8_t*)z)[i]) = vmulq_s16(*&(((int16x8_t*)z)[i]), *(int16x8_t*)&conjugate2[0]);
#endif
}
}
#if defined(__x86_64__) || defined(__i386__)
_mm_empty();
......@@ -222,6 +298,7 @@ void nr_idft(int32_t *z, uint32_t Msc_PUSCH)
}
void nr_ulsch_extract_rbs_single(int32_t **rxdataF,
NR_gNB_PUSCH *pusch_vars,
unsigned char symbol,
......
This diff is collapsed.
......@@ -226,9 +226,26 @@ void dft1024(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1080(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1152(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1200(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1296(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1440(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1500(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1536(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void dft1620(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1728(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1800(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1920(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft1944(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft2048(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft2160(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft2304(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft2400(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft2592(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft2700(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft2880(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft2916(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft3000(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft3072(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void dft3240(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft4096(int16_t *x,int16_t *y,uint8_t scale_flag);
void dft6144(int16_t *sigF,int16_t *sig,uint8_t scale_flag);
void dft8192(int16_t *x,int16_t *y,uint8_t scale_flag);
......@@ -283,9 +300,11 @@ typedef enum DFT_size_idx {
DFT_108, DFT_120, DFT_128, DFT_144, DFT_180, DFT_192, DFT_216, DFT_240,
DFT_256, DFT_288, DFT_300, DFT_324, DFT_360, DFT_384, DFT_432, DFT_480,
DFT_512, DFT_540, DFT_576, DFT_600, DFT_648, DFT_720, DFT_768, DFT_864,
DFT_900, DFT_960, DFT_972, DFT_1024, DFT_1080, DFT_1152, DFT_1200, DFT_1536,
DFT_2048, DFT_3072, DFT_4096, DFT_6144, DFT_8192, DFT_9216, DFT_12288, DFT_18432,
DFT_24576, DFT_36864, DFT_49152, DFT_73728, DFT_98304,
DFT_900, DFT_960, DFT_972, DFT_1024, DFT_1080, DFT_1152, DFT_1200, DFT_1296,
DFT_1440, DFT_1500, DFT_1536, DFT_1620, DFT_1728, DFT_1800, DFT_1920, DFT_1944,
DFT_2048, DFT_2160, DFT_2304, DFT_2400, DFT_2592, DFT_2700, DFT_2880, DFT_2916,
DFT_3000, DFT_3072, DFT_3240, DFT_4096, DFT_6144, DFT_8192, DFT_9216, DFT_12288,
DFT_18432, DFT_24576, DFT_36864, DFT_49152, DFT_73728, DFT_98304,
DFT_SIZE_IDXTABLESIZE
} dft_size_idx_t;
......@@ -295,9 +314,11 @@ adftfunc_t dft_ftab[]={
dft108, dft120, dft128, dft144, dft180, dft192, dft216, dft240,
dft256, dft288, dft300, dft324, dft360, dft384, dft432, dft480,
dft512, dft540, dft576, dft600, dft648, dft720, dft768, dft864,
dft900, dft960, dft972, dft1024, dft1080, dft1152, dft1200, dft1536,
dft2048, dft3072, dft4096, dft6144, dft8192, dft9216, dft12288, dft18432,
dft24576, dft36864, dft49152, dft73728, dft98304
dft900, dft960, dft972, dft1024, dft1080, dft1152, dft1200, dft1296,
dft1440, dft1500, dft1536, dft1620, dft1728, dft1800, dft1920, dft1944,
dft2048, dft2160, dft2304, dft2400, dft2592, dft2700, dft2880, dft2916,
dft3000, dft3072, dft3240, dft4096, dft6144, dft8192, dft9216, dft12288,
dft18432, dft24576, dft36864, dft49152, dft73728, dft98304
};
#endif
......
......@@ -163,6 +163,8 @@ void prepare_scc(NR_ServingCellConfigCommon_t *scc) {
// scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rsrp_ThresholdSSB_SUL = CALLOC(1,sizeof(NR_RSRP_Range_t));
scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing = CALLOC(1,sizeof(NR_SubcarrierSpacing_t));
scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder = CALLOC(1,sizeof(long));
// 0 - ENABLE, 1 - DISABLE, hence explicitly setting to DISABLED.
*scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder = NR_PUSCH_Config__transformPrecoder_disabled;
scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon = CALLOC(1,sizeof(NR_SetupRelease_PUSCH_ConfigCommon_t));
scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->present = NR_SetupRelease_PUSCH_ConfigCommon_PR_setup;
scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup = CALLOC(1,sizeof(struct NR_PUSCH_ConfigCommon));
......
......@@ -33,7 +33,7 @@ gNBs =
# downlinkConfigCommon
#frequencyInfoDL
# this is 3600 MHz + 84 PRBs@30kHz SCS (same as initial BWP)
absoluteFrequencySSB = 642364;
absoluteFrequencySSB = 642016;#642364;
dl_frequencyBand = 78;
# this is 3600 MHz
dl_absoluteFrequencyPointA = 640000;
......@@ -130,16 +130,21 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2;
initialULBWPk2_0 = 6; #2;
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 2;
initialULBWPk2_1 = 6; #2;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
......
......@@ -130,16 +130,21 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2;
initialULBWPk2_0 = 6;#2;
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 2;
initialULBWPk2_1 = 6;#2;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment