Commit ae884afe authored by Raymond Knopp's avatar Raymond Knopp

integration of LTE-M SIB1/SI interfaces and scheduling

parent d56525c8
...@@ -178,6 +178,7 @@ uint32_t generate_dummy_w_cc(uint32_t D, uint8_t *w); ...@@ -178,6 +178,7 @@ uint32_t generate_dummy_w_cc(uint32_t D, uint8_t *w);
\param Qm modulation order (2,4,6) \param Qm modulation order (2,4,6)
\param Nl number of layers (1,2) \param Nl number of layers (1,2)
\param r segment number \param r segment number
\param nb_rb Number of PRBs
\returns \f$E\f$, the number of coded bits per segment */ \returns \f$E\f$, the number of coded bits per segment */
...@@ -193,8 +194,7 @@ uint32_t lte_rate_matching_turbo(uint32_t RTC, ...@@ -193,8 +194,7 @@ uint32_t lte_rate_matching_turbo(uint32_t RTC,
uint8_t Qm, uint8_t Qm,
uint8_t Nl, uint8_t Nl,
uint8_t r, uint8_t r,
uint8_t nb_rb, uint8_t nb_rb);
uint8_t m);
/** /**
\brief This is the LTE rate matching algorithm for Convolutionally-coded channels (e.g. BCH,DCI,UCI). It is taken directly from 36-212 (Rel 8 8.6, 2009-03), pages 16-18 ) \brief This is the LTE rate matching algorithm for Convolutionally-coded channels (e.g. BCH,DCI,UCI). It is taken directly from 36-212 (Rel 8 8.6, 2009-03), pages 16-18 )
......
...@@ -463,8 +463,8 @@ uint32_t lte_rate_matching_turbo(uint32_t RTC, ...@@ -463,8 +463,8 @@ uint32_t lte_rate_matching_turbo(uint32_t RTC,
uint8_t Qm, uint8_t Qm,
uint8_t Nl, uint8_t Nl,
uint8_t r, uint8_t r,
uint8_t nb_rb, uint8_t nb_rb)
uint8_t m) // uint8_t m)
{ {
......
...@@ -1652,6 +1652,9 @@ int phy_init_lte_eNB(PHY_VARS_eNB *eNB, ...@@ -1652,6 +1652,9 @@ int phy_init_lte_eNB(PHY_VARS_eNB *eNB,
eNB->total_transmitted_bits = 0; eNB->total_transmitted_bits = 0;
eNB->total_system_throughput = 0; eNB->total_system_throughput = 0;
eNB->check_for_MUMIMO_transmissions=0; eNB->check_for_MUMIMO_transmissions=0;
while(eNB->configured == 0) usleep(10000);
LOG_I(PHY,"[eNB %"PRIu8"] Initializing DL_FRAME_PARMS : N_RB_DL %"PRIu8", PHICH Resource %d, PHICH Duration %d\n", LOG_I(PHY,"[eNB %"PRIu8"] Initializing DL_FRAME_PARMS : N_RB_DL %"PRIu8", PHICH Resource %d, PHICH Duration %d\n",
eNB->Mod_id, eNB->Mod_id,
fp->N_RB_DL,fp->phich_config_common.phich_resource, fp->N_RB_DL,fp->phich_config_common.phich_resource,
......
...@@ -29,11 +29,8 @@ ...@@ -29,11 +29,8 @@
* \note * \note
* \warning * \warning
*/ */
#ifndef USER_MODE
#include "PHY/types.h"
#else
#include <stdint.h> #include <stdint.h>
#endif
/// DCI Format Type 0 (5 MHz,TDD0, 27 bits) /// DCI Format Type 0 (5 MHz,TDD0, 27 bits)
struct DCI0_5MHz_TDD0 { struct DCI0_5MHz_TDD0 {
......
...@@ -163,6 +163,29 @@ int8_t delta_PUSCH_acc[4] = {-1,0,1,3}; ...@@ -163,6 +163,29 @@ int8_t delta_PUSCH_acc[4] = {-1,0,1,3};
int8_t *delta_PUCCH_lut = delta_PUSCH_acc; int8_t *delta_PUCCH_lut = delta_PUSCH_acc;
void conv_eMTC_rballoc(uint16_t resource_block_coding,
uint32_t N_RB_DL,
uint32_t *rb_alloc) {
int narrowband = resource_block_coding>>5;
int RIV = resource_block_coding&31;
int N_NB_DL = N_RB_DL/6;
int i0 = (N_RB_DL>>1) - (3*N_NB_DL);
int first_rb = (6*narrowband)+i0;
int alloc = localRIV2alloc_LUT6[RIV];
int ind = first_rb>>5;
int ind_mod = first_rb&31;
if (((N_RB_DL&1) > 0) && (narrowband>=(N_NB_DL>>1))) first_rb++;
rb_alloc[0] = 0;
rb_alloc[1] = 0;
rb_alloc[2] = 0;
rb_alloc[3] = 0;
rb_alloc[ind] = alloc<<ind_mod;
if (ind_mod > 26) rb_alloc[ind+1] = alloc>>(6-(ind_mod-26));
}
void conv_rballoc(uint8_t ra_header,uint32_t rb_alloc,uint32_t N_RB_DL,uint32_t *rb_alloc2) void conv_rballoc(uint8_t ra_header,uint32_t rb_alloc,uint32_t N_RB_DL,uint32_t *rb_alloc2)
{ {
...@@ -1033,6 +1056,7 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_ ...@@ -1033,6 +1056,7 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
dlsch0_harq->mcs = rel8->mcs_1; dlsch0_harq->mcs = rel8->mcs_1;
dlsch0_harq->Qm = 2;
dlsch0_harq->TBS = TBStable[I_mcs][NPRB-1]; dlsch0_harq->TBS = TBStable[I_mcs][NPRB-1];
dlsch0->harq_ids[subframe] = rel8->harq_process; dlsch0->harq_ids[subframe] = rel8->harq_process;
dlsch0->active = 1; dlsch0->active = 1;
...@@ -1195,6 +1219,7 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_ ...@@ -1195,6 +1219,7 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
// printf("Setting DLSCH process %d to ACTIVE\n",rel8->harq_process); // printf("Setting DLSCH process %d to ACTIVE\n",rel8->harq_process);
// MCS and TBS don't change across HARQ rounds // MCS and TBS don't change across HARQ rounds
dlsch0_harq->mcs = rel8->mcs_1; dlsch0_harq->mcs = rel8->mcs_1;
dlsch0_harq->Qm = get_Qm(rel8->mcs_1);
dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][NPRB-1]; dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][NPRB-1];
} }
...@@ -1379,6 +1404,8 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_ ...@@ -1379,6 +1404,8 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
dlsch0_harq->mcs = rel8->mcs_1; dlsch0_harq->mcs = rel8->mcs_1;
dlsch1_harq->mcs = rel8->mcs_2; dlsch1_harq->mcs = rel8->mcs_2;
dlsch0_harq->Qm = get_Qm(rel8->mcs_1);
dlsch1_harq->Qm = get_Qm(rel8->mcs_2);
dlsch0_harq->rvidx = rel8->redundancy_version_1; dlsch0_harq->rvidx = rel8->redundancy_version_1;
dlsch1_harq->rvidx = rel8->redundancy_version_2; dlsch1_harq->rvidx = rel8->redundancy_version_2;
...@@ -1681,6 +1708,8 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_ ...@@ -1681,6 +1708,8 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
dlsch1_harq = dlsch1->harq_processes[rel8->harq_process]; dlsch1_harq = dlsch1->harq_processes[rel8->harq_process];
dlsch0_harq->mcs = rel8->mcs_1; dlsch0_harq->mcs = rel8->mcs_1;
dlsch1_harq->mcs = rel8->mcs_2; dlsch1_harq->mcs = rel8->mcs_2;
dlsch0_harq->Qm = get_Qm(rel8->mcs_1);
dlsch1_harq->Qm = get_Qm(rel8->mcs_2);
dlsch0_harq->rvidx = rel8->redundancy_version_1; dlsch0_harq->rvidx = rel8->redundancy_version_1;
dlsch1_harq->rvidx = rel8->redundancy_version_2; dlsch1_harq->rvidx = rel8->redundancy_version_2;
dlsch0_harq->status = ACTIVE; dlsch0_harq->status = ACTIVE;
...@@ -1700,6 +1729,8 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_ ...@@ -1700,6 +1729,8 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
dlsch1_harq = dlsch1->harq_processes[rel8->harq_process]; dlsch1_harq = dlsch1->harq_processes[rel8->harq_process];
dlsch0_harq->mcs = rel8->mcs_1; dlsch0_harq->mcs = rel8->mcs_1;
dlsch1_harq->mcs = rel8->mcs_2; dlsch1_harq->mcs = rel8->mcs_2;
dlsch0_harq->Qm = get_Qm(rel8->mcs_1);
dlsch1_harq->Qm = get_Qm(rel8->mcs_2);
dlsch0_harq->rvidx = rel8->redundancy_version_1; dlsch0_harq->rvidx = rel8->redundancy_version_1;
dlsch1_harq->rvidx = rel8->redundancy_version_2; dlsch1_harq->rvidx = rel8->redundancy_version_2;
dlsch0_harq->status = ACTIVE; dlsch0_harq->status = ACTIVE;
...@@ -1711,6 +1742,7 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_ ...@@ -1711,6 +1742,7 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
dlsch0->active = 1; dlsch0->active = 1;
dlsch0_harq = dlsch0->harq_processes[rel8->harq_process]; dlsch0_harq = dlsch0->harq_processes[rel8->harq_process];
dlsch0_harq->mcs = rel8->mcs_1; dlsch0_harq->mcs = rel8->mcs_1;
dlsch0_harq->Qm = get_Qm(rel8->mcs_1);
dlsch0_harq->rvidx = rel8->redundancy_version_1; dlsch0_harq->rvidx = rel8->redundancy_version_1;
dlsch0_harq->status = ACTIVE; dlsch0_harq->status = ACTIVE;
dlsch0_harq->codeword = 0; dlsch0_harq->codeword = 0;
...@@ -1724,6 +1756,7 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_ ...@@ -1724,6 +1756,7 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
dlsch1->active = 1; dlsch1->active = 1;
dlsch1_harq = dlsch1->harq_processes[rel8->harq_process]; dlsch1_harq = dlsch1->harq_processes[rel8->harq_process];
dlsch1_harq->mcs = rel8->mcs_2; dlsch1_harq->mcs = rel8->mcs_2;
dlsch1_harq->Qm = get_Qm(rel8->mcs_2);
dlsch1_harq->rvidx = rel8->redundancy_version_2; dlsch1_harq->rvidx = rel8->redundancy_version_2;
dlsch1_harq->status = ACTIVE; dlsch1_harq->status = ACTIVE;
dlsch1_harq->codeword = 0; dlsch1_harq->codeword = 0;
...@@ -1947,6 +1980,246 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_ ...@@ -1947,6 +1980,246 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
} }
}
int fill_mdci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,mDCI_ALLOC_t *dci_alloc,nfapi_dl_config_mpdcch_pdu *pdu) {
LTE_DL_FRAME_PARMS *fp = &eNB->frame_parms;
uint8_t *dci_pdu = &dci_alloc->dci_pdu[0];
nfapi_dl_config_mpdcch_pdu_rel13_t *rel13 = &pdu->mpdcch_pdu_rel13;
int harq_pid;
LTE_eNB_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL;
int UE_id;
int subframe = proc->subframe_tx;
dci_alloc->firstCCE = rel13->ecce_index;
dci_alloc->L = rel13->aggregation_level;
dci_alloc->rnti = rel13->rnti;
dci_alloc->harq_pid = rel13->harq_process;
dci_alloc->narrowband = rel13->mpdcch_narrow_band;
dci_alloc->number_of_prb_pairs = rel13->number_of_prb_pairs;
dci_alloc->resource_block_assignment = rel13->resource_block_assignment;
dci_alloc->transmission_type = rel13->mpdcch_tansmission_type;
dci_alloc->start_symbol = rel13->start_symbol;
dci_alloc->ce_mode = rel13->ce_mode;
dci_alloc->dmrs_scrambling_init = rel13->drms_scrambling_init;
dci_alloc->initial_transmission_sf_io = rel13->initial_transmission_sf_io;
dci_alloc->ra_flag = 0;
if (rel13->rnti_type == 2 ) dci_alloc->ra_flag = 1;
UE_id = find_dlsch(rel13->rnti,eNB,SEARCH_EXIST_OR_FREE);
AssertFatal(UE_id!=-1,"no free or exiting dlsch_context\n");
AssertFatal(UE_id<NUMBER_OF_UE_MAX,"returned UE_id %d >= %d(NUMBER_OF_UE_MAX)\n",UE_id,NUMBER_OF_UE_MAX);
dlsch0 = eNB->dlsch[UE_id][0];
dlsch0_harq = dlsch0->harq_processes[rel13->harq_process];
AssertFatal(fp->frame_type==FDD,"TDD is not supported yet for eMTC\n");
AssertFatal(fp->N_RB_DL==25 || fp->N_RB_DL==50 ||fp->N_RB_DL==100,
"eMTC only with N_RB_DL = 25,50,100\n");
switch (rel13->dci_format) {
case 10: // Format 6-1A
dci_alloc->format = format6_1A;
dlsch0->active = 1;
switch (fp->N_RB_DL) {
case 25:
dci_alloc->dci_length = sizeof_DCI6_1A_5MHz_t;
((DCI6_1A_5MHz_t *)dci_pdu)->type = 1;
((DCI6_1A_5MHz_t *)dci_pdu)->hopping = rel13->frequency_hopping_enabled_flag;
((DCI6_1A_5MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding;
((DCI6_1A_5MHz_t *)dci_pdu)->mcs = rel13->mcs;
((DCI6_1A_5MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1);
((DCI6_1A_5MHz_t *)dci_pdu)->harq_pid = rel13->harq_process;
((DCI6_1A_5MHz_t *)dci_pdu)->ndi = rel13->new_data_indicator;
((DCI6_1A_5MHz_t *)dci_pdu)->rv = rel13->redundancy_version;
((DCI6_1A_5MHz_t *)dci_pdu)->TPC = rel13->tpc;
((DCI6_1A_5MHz_t *)dci_pdu)->srs_req = rel13->srs_request;
((DCI6_1A_5MHz_t *)dci_pdu)->harq_ack_off = rel13->harq_resource_offset;
((DCI6_1A_5MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1;
break;
case 50:
dci_alloc->dci_length = sizeof_DCI6_1A_10MHz_t;
((DCI6_1A_10MHz_t *)dci_pdu)->type = 1;
((DCI6_1A_10MHz_t *)dci_pdu)->hopping = rel13->frequency_hopping_enabled_flag;
((DCI6_1A_10MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding;
((DCI6_1A_10MHz_t *)dci_pdu)->mcs = rel13->mcs;
((DCI6_1A_10MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1);
((DCI6_1A_10MHz_t *)dci_pdu)->harq_pid = rel13->harq_process;
((DCI6_1A_10MHz_t *)dci_pdu)->ndi = rel13->new_data_indicator;
((DCI6_1A_10MHz_t *)dci_pdu)->rv = rel13->redundancy_version;
((DCI6_1A_10MHz_t *)dci_pdu)->TPC = rel13->tpc;
((DCI6_1A_10MHz_t *)dci_pdu)->srs_req = rel13->srs_request;
((DCI6_1A_10MHz_t *)dci_pdu)->harq_ack_off = rel13->harq_resource_offset;
((DCI6_1A_10MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1;
break;
case 100:
dci_alloc->dci_length = sizeof_DCI6_1A_20MHz_t;
((DCI6_1A_20MHz_t *)dci_pdu)->type = 1;
((DCI6_1A_20MHz_t *)dci_pdu)->hopping = rel13->frequency_hopping_enabled_flag;
((DCI6_1A_20MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding;
((DCI6_1A_20MHz_t *)dci_pdu)->mcs = rel13->mcs;
((DCI6_1A_20MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1);
((DCI6_1A_20MHz_t *)dci_pdu)->harq_pid = rel13->harq_process;
((DCI6_1A_20MHz_t *)dci_pdu)->ndi = rel13->new_data_indicator;
((DCI6_1A_20MHz_t *)dci_pdu)->rv = rel13->redundancy_version;
((DCI6_1A_20MHz_t *)dci_pdu)->TPC = rel13->tpc;
((DCI6_1A_20MHz_t *)dci_pdu)->srs_req = rel13->srs_request;
((DCI6_1A_20MHz_t *)dci_pdu)->harq_ack_off = rel13->harq_resource_offset;
((DCI6_1A_20MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1;
break;
}
break;
case 11: // Format 6-1B
dci_alloc->format = format6_1B;
dlsch0->active = 1;
switch (fp->N_RB_DL) {
case 25:
dci_alloc->dci_length = sizeof_DCI6_1B_5MHz_t;
((DCI6_1B_5MHz_t *)dci_pdu)->type = 1;
((DCI6_1B_5MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding;
((DCI6_1B_5MHz_t *)dci_pdu)->mcs = rel13->mcs;
((DCI6_1B_5MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1);
((DCI6_1B_5MHz_t *)dci_pdu)->harq_pid = rel13->harq_process;
((DCI6_1B_5MHz_t *)dci_pdu)->ndi = rel13->new_data_indicator;
((DCI6_1B_5MHz_t *)dci_pdu)->harq_ack_off = rel13->harq_resource_offset;
((DCI6_1B_5MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1;
break;
case 50:
dci_alloc->dci_length = sizeof_DCI6_1B_10MHz_t;
((DCI6_1B_10MHz_t *)dci_pdu)->type = 1;
((DCI6_1B_10MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding;
((DCI6_1B_10MHz_t *)dci_pdu)->mcs = rel13->mcs;
((DCI6_1B_10MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1);
((DCI6_1B_10MHz_t *)dci_pdu)->harq_pid = rel13->harq_process;
((DCI6_1B_10MHz_t *)dci_pdu)->ndi = rel13->new_data_indicator;
((DCI6_1B_10MHz_t *)dci_pdu)->harq_ack_off = rel13->harq_resource_offset;
((DCI6_1B_10MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1;
break;
case 100:
dci_alloc->dci_length = sizeof_DCI6_1B_20MHz_t;
((DCI6_1B_20MHz_t *)dci_pdu)->type = 1;
((DCI6_1B_20MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding;
((DCI6_1B_20MHz_t *)dci_pdu)->mcs = rel13->mcs;
((DCI6_1B_20MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1);
((DCI6_1B_20MHz_t *)dci_pdu)->harq_pid = rel13->harq_process;
((DCI6_1B_20MHz_t *)dci_pdu)->ndi = rel13->new_data_indicator;
((DCI6_1B_20MHz_t *)dci_pdu)->harq_ack_off = rel13->harq_resource_offset;
((DCI6_1B_20MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1;
break;
}
case 12: // Format 6-2
dci_alloc->format = format6_2;
dlsch0->active = 1;
switch (fp->N_RB_DL) {
case 25:
dci_alloc->dci_length = sizeof_DCI6_2_5MHz_t;
if (rel13->paging_direct_indication_differentiation_flag==0) {
((DCI6_2_di_5MHz_t *)dci_pdu)->type = 0;
((DCI6_2_di_5MHz_t *)dci_pdu)->di_info = rel13->direct_indication;
}
else {
((DCI6_2_paging_5MHz_t *)dci_pdu)->type = 1;
((DCI6_2_paging_5MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding;
((DCI6_2_paging_5MHz_t *)dci_pdu)->mcs = rel13->mcs;
((DCI6_2_paging_5MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1);
((DCI6_2_paging_5MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1;
}
break;
case 50:
dci_alloc->dci_length = sizeof_DCI6_2_10MHz_t;
if (rel13->paging_direct_indication_differentiation_flag==0) {
((DCI6_2_di_10MHz_t *)dci_pdu)->type = 0;
((DCI6_2_di_10MHz_t *)dci_pdu)->di_info = rel13->direct_indication;
}
else {
((DCI6_2_paging_10MHz_t *)dci_pdu)->type = 1;
((DCI6_2_paging_10MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding;
((DCI6_2_paging_10MHz_t *)dci_pdu)->mcs = rel13->mcs;
((DCI6_2_paging_10MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1);
((DCI6_2_paging_10MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1;
}
break;
case 100:
dci_alloc->dci_length = sizeof_DCI6_2_20MHz_t;
if (rel13->paging_direct_indication_differentiation_flag==0) {
((DCI6_2_di_20MHz_t *)dci_pdu)->type = 0;
((DCI6_2_di_20MHz_t *)dci_pdu)->di_info = rel13->direct_indication;
}
else {
((DCI6_2_paging_20MHz_t *)dci_pdu)->type = 1;
((DCI6_2_paging_20MHz_t *)dci_pdu)->rballoc = rel13->resource_block_coding;
((DCI6_2_paging_20MHz_t *)dci_pdu)->mcs = rel13->mcs;
((DCI6_2_paging_20MHz_t *)dci_pdu)->rep = (rel13->pdsch_reptition_levels-1);
((DCI6_2_paging_20MHz_t *)dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number-1;
}
break;
}
}
AssertFatal(rel13->harq_process<8,
"ERROR: Format 6_1A: harq_pid=%d >= 8\n", rel13->harq_process);
dlsch0_harq = dlsch0->harq_processes[rel13->harq_process];
dlsch0_harq->codeword=0;
// printf("DCI: Setting subframe_tx for subframe %d\n",subframe);
dlsch0->subframe_tx[subframe] = 1;
conv_eMTC_rballoc(rel13->resource_block_coding,
fp->N_RB_DL,
dlsch0_harq->rb_alloc);
dlsch0_harq->nb_rb = RIV2nb_rb_LUT6[rel13->resource_block_coding&31]; // this is the 6PRB RIV
dlsch0_harq->rvidx = rel13->redundancy_version;
dlsch0_harq->Nl = 1;
// dlsch[0]->layer_index = 0;
// if (beamforming_mode == 0)
dlsch0_harq->mimo_mode = (fp->nb_antenna_ports_eNB == 1) ? SISO : ALAMOUTI;
//else if (beamforming_mode == 7)
// dlsch0_harq->mimo_mode = TM7;
//else
//LOG_E(PHY,"Invalid beamforming mode %dL\n", beamforming_mode);
dlsch0_harq->dl_power_off = 1;
dlsch0->active = 1;
if (dlsch0_harq->round == 0) {
dlsch0_harq->status = ACTIVE;
// printf("Setting DLSCH process %d to ACTIVE\n",rel8->harq_process);
// MCS and TBS don't change across HARQ rounds
dlsch0_harq->mcs = rel13->mcs;
dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
}
dlsch0->harq_ids[subframe] = rel13->harq_process;
dlsch0->rnti = rel13->rnti;
} }
int fill_dci_and_ulsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,nfapi_hi_dci0_dci_pdu *pdu) { int fill_dci_and_ulsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,nfapi_hi_dci0_dci_pdu *pdu) {
...@@ -10076,6 +10349,7 @@ double sinr_eff_cqi_calc(PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe) ...@@ -10076,6 +10349,7 @@ double sinr_eff_cqi_calc(PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe)
// //
#ifdef DEBUG_DLSCH_TOOLS #ifdef DEBUG_DLSCH_TOOLS
main() main()
{ {
......
...@@ -34,6 +34,7 @@ ...@@ -34,6 +34,7 @@
#include "PHY/defs.h" #include "PHY/defs.h"
#include "PHY/impl_defs_lte.h" #include "PHY/impl_defs_lte.h"
#include "dci.h" #include "dci.h"
#include "mdci.h"
#include "uci.h" #include "uci.h"
#ifndef STANDALONE_COMPILE #ifndef STANDALONE_COMPILE
#include "UTIL/LISTS/list.h" #include "UTIL/LISTS/list.h"
...@@ -123,7 +124,9 @@ typedef struct { ...@@ -123,7 +124,9 @@ typedef struct {
uint32_t subframe; uint32_t subframe;
/// Index of current HARQ round for this DLSCH /// Index of current HARQ round for this DLSCH
uint8_t round; uint8_t round;
/// MCS format for this DLSCH /// Modulation order
uint8_t Qm;
/// MCS
uint8_t mcs; uint8_t mcs;
/// Redundancy-version of the current sub-frame /// Redundancy-version of the current sub-frame
uint8_t rvidx; uint8_t rvidx;
......
...@@ -280,7 +280,7 @@ int dlsch_encoding_2threads0(te_params *tep) { ...@@ -280,7 +280,7 @@ int dlsch_encoding_2threads0(te_params *tep) {
unsigned short nb_rb = dlsch->harq_processes[harq_pid]->nb_rb; unsigned short nb_rb = dlsch->harq_processes[harq_pid]->nb_rb;
unsigned int Kr=0,Kr_bytes,r,r_offset=0; unsigned int Kr=0,Kr_bytes,r,r_offset=0;
unsigned short m=dlsch->harq_processes[harq_pid]->mcs; // unsigned short m=dlsch->harq_processes[harq_pid]->mcs;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING_W, VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING_W, VCD_FUNCTION_IN);
...@@ -340,11 +340,11 @@ int dlsch_encoding_2threads0(te_params *tep) { ...@@ -340,11 +340,11 @@ int dlsch_encoding_2threads0(te_params *tep) {
dlsch->Mdlharq, dlsch->Mdlharq,
dlsch->Kmimo, dlsch->Kmimo,
dlsch->harq_processes[harq_pid]->rvidx, dlsch->harq_processes[harq_pid]->rvidx,
get_Qm(dlsch->harq_processes[harq_pid]->mcs), dlsch->harq_processes[harq_pid]->Qm,
dlsch->harq_processes[harq_pid]->Nl, dlsch->harq_processes[harq_pid]->Nl,
r, r,
nb_rb, nb_rb);
m); // r // m); // r
} }
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING_W, VCD_FUNCTION_OUT); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING_W, VCD_FUNCTION_OUT);
...@@ -400,12 +400,12 @@ int dlsch_encoding_2threads(PHY_VARS_eNB *eNB, ...@@ -400,12 +400,12 @@ int dlsch_encoding_2threads(PHY_VARS_eNB *eNB,
unsigned int A; unsigned int A;
unsigned char mod_order; unsigned char mod_order;
unsigned int Kr=0,Kr_bytes,r,r_offset=0; unsigned int Kr=0,Kr_bytes,r,r_offset=0;
unsigned short m=dlsch->harq_processes[harq_pid]->mcs; // unsigned short m=dlsch->harq_processes[harq_pid]->mcs;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING, VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING, VCD_FUNCTION_IN);
A = dlsch->harq_processes[harq_pid]->TBS; //6228 A = dlsch->harq_processes[harq_pid]->TBS; //6228
mod_order = get_Qm(dlsch->harq_processes[harq_pid]->mcs); mod_order = dlsch->harq_processes[harq_pid]->Qm;
G = get_G(frame_parms,nb_rb,dlsch->harq_processes[harq_pid]->rb_alloc,mod_order,dlsch->harq_processes[harq_pid]->Nl,num_pdcch_symbols,frame,subframe,dlsch->harq_processes[harq_pid]->mimo_mode==TM7?7:0); G = get_G(frame_parms,nb_rb,dlsch->harq_processes[harq_pid]->rb_alloc,mod_order,dlsch->harq_processes[harq_pid]->Nl,num_pdcch_symbols,frame,subframe,dlsch->harq_processes[harq_pid]->mimo_mode==TM7?7:0);
...@@ -524,7 +524,7 @@ int dlsch_encoding_2threads(PHY_VARS_eNB *eNB, ...@@ -524,7 +524,7 @@ int dlsch_encoding_2threads(PHY_VARS_eNB *eNB,
// get information for E for the segments that are handled by the worker thread // get information for E for the segments that are handled by the worker thread
if (r<(dlsch->harq_processes[harq_pid]->C>>1)) { if (r<(dlsch->harq_processes[harq_pid]->C>>1)) {
int Nl=dlsch->harq_processes[harq_pid]->Nl; int Nl=dlsch->harq_processes[harq_pid]->Nl;
int Qm=get_Qm(dlsch->harq_processes[harq_pid]->mcs); int Qm=dlsch->harq_processes[harq_pid]->Qm;
int C = dlsch->harq_processes[harq_pid]->C; int C = dlsch->harq_processes[harq_pid]->C;
int Gp = G/Nl/Qm; int Gp = G/Nl/Qm;
int GpmodC = Gp%C; int GpmodC = Gp%C;
...@@ -544,11 +544,11 @@ int dlsch_encoding_2threads(PHY_VARS_eNB *eNB, ...@@ -544,11 +544,11 @@ int dlsch_encoding_2threads(PHY_VARS_eNB *eNB,
dlsch->Mdlharq, dlsch->Mdlharq,
dlsch->Kmimo, dlsch->Kmimo,
dlsch->harq_processes[harq_pid]->rvidx, dlsch->harq_processes[harq_pid]->rvidx,
get_Qm(dlsch->harq_processes[harq_pid]->mcs), dlsch->harq_processes[harq_pid]->Qm,
dlsch->harq_processes[harq_pid]->Nl, dlsch->harq_processes[harq_pid]->Nl,
r, r,
nb_rb, nb_rb);
m); // r // m); // r
stop_meas(rm_stats); stop_meas(rm_stats);
} }
} }
...@@ -584,14 +584,14 @@ int dlsch_encoding(PHY_VARS_eNB *eNB, ...@@ -584,14 +584,14 @@ int dlsch_encoding(PHY_VARS_eNB *eNB,
unsigned int A; unsigned int A;
unsigned char mod_order; unsigned char mod_order;
unsigned int Kr=0,Kr_bytes,r,r_offset=0; unsigned int Kr=0,Kr_bytes,r,r_offset=0;
unsigned short m=dlsch->harq_processes[harq_pid]->mcs; // unsigned short m=dlsch->harq_processes[harq_pid]->mcs;
uint8_t beamforming_mode=0; uint8_t beamforming_mode=0;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING, VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING, VCD_FUNCTION_IN);
A = dlsch->harq_processes[harq_pid]->TBS; //6228 A = dlsch->harq_processes[harq_pid]->TBS; //6228
// printf("Encoder: A: %d\n",A); // printf("Encoder: A: %d\n",A);
mod_order = get_Qm(dlsch->harq_processes[harq_pid]->mcs); mod_order = dlsch->harq_processes[harq_pid]->Qm;
if(dlsch->harq_processes[harq_pid]->mimo_mode == TM7) if(dlsch->harq_processes[harq_pid]->mimo_mode == TM7)
beamforming_mode = 7; beamforming_mode = 7;
...@@ -720,11 +720,11 @@ int dlsch_encoding(PHY_VARS_eNB *eNB, ...@@ -720,11 +720,11 @@ int dlsch_encoding(PHY_VARS_eNB *eNB,
dlsch->Mdlharq, dlsch->Mdlharq,
dlsch->Kmimo, dlsch->Kmimo,
dlsch->harq_processes[harq_pid]->rvidx, dlsch->harq_processes[harq_pid]->rvidx,
get_Qm(dlsch->harq_processes[harq_pid]->mcs), dlsch->harq_processes[harq_pid]->Qm,
dlsch->harq_processes[harq_pid]->Nl, dlsch->harq_processes[harq_pid]->Nl,
r, r,
nb_rb, nb_rb);
m); // r // m); // r
stop_meas(rm_stats); stop_meas(rm_stats);
#ifdef DEBUG_DLSCH_CODING #ifdef DEBUG_DLSCH_CODING
...@@ -761,14 +761,14 @@ int dlsch_encoding_SIC(PHY_VARS_UE *ue, ...@@ -761,14 +761,14 @@ int dlsch_encoding_SIC(PHY_VARS_UE *ue,
unsigned int A; unsigned int A;
unsigned char mod_order; unsigned char mod_order;
unsigned int Kr=0,Kr_bytes,r,r_offset=0; unsigned int Kr=0,Kr_bytes,r,r_offset=0;
unsigned short m=dlsch->harq_processes[harq_pid]->mcs; // unsigned short m=dlsch->harq_processes[harq_pid]->mcs;
uint8_t beamforming_mode=0; uint8_t beamforming_mode=0;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING, VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING, VCD_FUNCTION_IN);
A = dlsch->harq_processes[harq_pid]->TBS; //6228 A = dlsch->harq_processes[harq_pid]->TBS; //6228
// printf("Encoder: A: %d\n",A); // printf("Encoder: A: %d\n",A);
mod_order = get_Qm(dlsch->harq_processes[harq_pid]->mcs); mod_order = dlsch->harq_processes[harq_pid]->Qm;
if(dlsch->harq_processes[harq_pid]->mimo_mode == TM7) if(dlsch->harq_processes[harq_pid]->mimo_mode == TM7)
beamforming_mode = 7; beamforming_mode = 7;
...@@ -897,11 +897,11 @@ int dlsch_encoding_SIC(PHY_VARS_UE *ue, ...@@ -897,11 +897,11 @@ int dlsch_encoding_SIC(PHY_VARS_UE *ue,
dlsch->Mdlharq, dlsch->Mdlharq,
dlsch->Kmimo, dlsch->Kmimo,
dlsch->harq_processes[harq_pid]->rvidx, dlsch->harq_processes[harq_pid]->rvidx,
get_Qm(dlsch->harq_processes[harq_pid]->mcs), dlsch->harq_processes[harq_pid]->Qm,
dlsch->harq_processes[harq_pid]->Nl, dlsch->harq_processes[harq_pid]->Nl,
r, r,
nb_rb, nb_rb);
m); // r // m); // r
stop_meas(rm_stats); stop_meas(rm_stats);
#ifdef DEBUG_DLSCH_CODING #ifdef DEBUG_DLSCH_CODING
......
...@@ -585,8 +585,8 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB, ...@@ -585,8 +585,8 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
int first_layer0 = -1; //= dlsch0_harq->first_layer; int first_layer0 = -1; //= dlsch0_harq->first_layer;
int Nlayers0 = -1; // = dlsch0_harq->Nlayers; int Nlayers0 = -1; // = dlsch0_harq->Nlayers;
uint8_t mod_order0=0; // = get_Qm(dlsch0_harq->mcs); uint8_t mod_order0=0;
uint8_t mod_order1=0; //=2; uint8_t mod_order1=0;
uint8_t precoder_index0,precoder_index1; uint8_t precoder_index0,precoder_index1;
uint8_t *x1=NULL; uint8_t *x1=NULL;
...@@ -640,12 +640,12 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB, ...@@ -640,12 +640,12 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
mimo_mode = dlsch0_harq->mimo_mode; mimo_mode = dlsch0_harq->mimo_mode;
first_layer0 = dlsch0_harq->first_layer; first_layer0 = dlsch0_harq->first_layer;
Nlayers0 = dlsch0_harq->Nlayers; Nlayers0 = dlsch0_harq->Nlayers;
mod_order0 = get_Qm(dlsch0_harq->mcs); mod_order0 = dlsch0_harq->Qm;
x1 = dlsch1_harq->e; x1 = dlsch1_harq->e;
// Fill these in later for TM8-10 // Fill these in later for TM8-10
// Nlayers1 = dlsch1_harq->Nlayers; // Nlayers1 = dlsch1_harq->Nlayers;
// first_layer1 = dlsch1_harq->first_layer; // first_layer1 = dlsch1_harq->first_layer;
mod_order1 = get_Qm(dlsch1_harq->mcs); mod_order1 = dlsch1_harq->Qm;
} else if ((dlsch0_harq != NULL) && (dlsch1_harq == NULL)){ //This is for SIS0 TM1, TM6, etc } else if ((dlsch0_harq != NULL) && (dlsch1_harq == NULL)){ //This is for SIS0 TM1, TM6, etc
...@@ -653,7 +653,7 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB, ...@@ -653,7 +653,7 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
mimo_mode = dlsch0_harq->mimo_mode; mimo_mode = dlsch0_harq->mimo_mode;
first_layer0 = dlsch0_harq->first_layer; first_layer0 = dlsch0_harq->first_layer;
Nlayers0 = dlsch0_harq->Nlayers; Nlayers0 = dlsch0_harq->Nlayers;
mod_order0 = get_Qm(dlsch0_harq->mcs); mod_order0 = dlsch0_harq->Qm;
} else if ((dlsch0_harq == NULL) && (dlsch1_harq != NULL)){ // This is for TM4 retransmission } else if ((dlsch0_harq == NULL) && (dlsch1_harq != NULL)){ // This is for TM4 retransmission
...@@ -661,7 +661,7 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB, ...@@ -661,7 +661,7 @@ int allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
mimo_mode = dlsch1_harq->mimo_mode; mimo_mode = dlsch1_harq->mimo_mode;
first_layer0 = dlsch1_harq->first_layer; first_layer0 = dlsch1_harq->first_layer;
Nlayers0 = dlsch1_harq->Nlayers; Nlayers0 = dlsch1_harq->Nlayers;
mod_order0 = get_Qm(dlsch1_harq->mcs); mod_order0 = dlsch1_harq->Qm;
} }
...@@ -2065,14 +2065,14 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB, ...@@ -2065,14 +2065,14 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
harq_pid = dlsch0->harq_ids[subframe_offset]; harq_pid = dlsch0->harq_ids[subframe_offset];
dlsch0_harq = dlsch0->harq_processes[harq_pid]; dlsch0_harq = dlsch0->harq_processes[harq_pid];
mimo_mode = dlsch0_harq->mimo_mode; mimo_mode = dlsch0_harq->mimo_mode;
mod_order0 = get_Qm(dlsch0_harq->mcs); mod_order0 = dlsch0_harq->Qm;
rb_alloc = dlsch0_harq->rb_alloc; rb_alloc = dlsch0_harq->rb_alloc;
#ifdef DEBUG_DLSCH_MODULATION #ifdef DEBUG_DLSCH_MODULATION
Nl0 = dlsch0_harq->Nl; Nl0 = dlsch0_harq->Nl;
#endif #endif
dlsch1_harq = dlsch1->harq_processes[harq_pid]; dlsch1_harq = dlsch1->harq_processes[harq_pid];
mod_order1 = get_Qm(dlsch1_harq->mcs); mod_order1 = dlsch1_harq->Qm;
#ifdef DEBUG_DLSCH_MODULATION #ifdef DEBUG_DLSCH_MODULATION
Nl1 = dlsch1_harq->Nl; Nl1 = dlsch1_harq->Nl;
#endif #endif
...@@ -2082,7 +2082,7 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB, ...@@ -2082,7 +2082,7 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
harq_pid = dlsch0->harq_ids[subframe_offset]; harq_pid = dlsch0->harq_ids[subframe_offset];
dlsch0_harq = dlsch0->harq_processes[harq_pid]; dlsch0_harq = dlsch0->harq_processes[harq_pid];
mimo_mode = dlsch0_harq->mimo_mode; mimo_mode = dlsch0_harq->mimo_mode;
mod_order0 = get_Qm(dlsch0_harq->mcs); mod_order0 = dlsch0_harq->Qm;
rb_alloc = dlsch0_harq->rb_alloc; rb_alloc = dlsch0_harq->rb_alloc;
#ifdef DEBUG_DLSCH_MODULATION #ifdef DEBUG_DLSCH_MODULATION
Nl0 = dlsch0_harq->Nl; Nl0 = dlsch0_harq->Nl;
...@@ -2099,7 +2099,7 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB, ...@@ -2099,7 +2099,7 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
harq_pid = dlsch1->harq_ids[subframe_offset]; harq_pid = dlsch1->harq_ids[subframe_offset];
dlsch1_harq = dlsch1->harq_processes[harq_pid]; dlsch1_harq = dlsch1->harq_processes[harq_pid];
mimo_mode = dlsch1_harq->mimo_mode; mimo_mode = dlsch1_harq->mimo_mode;
mod_order0 = get_Qm(dlsch1_harq->mcs); mod_order0 = dlsch1_harq->Qm;
rb_alloc = dlsch1_harq->rb_alloc; rb_alloc = dlsch1_harq->rb_alloc;
#ifdef DEBUG_DLSCH_MODULATION #ifdef DEBUG_DLSCH_MODULATION
Nl0 = dlsch1_harq->Nl; Nl0 = dlsch1_harq->Nl;
...@@ -2460,7 +2460,7 @@ int dlsch_modulation_SIC(int32_t **sic_buffer, ...@@ -2460,7 +2460,7 @@ int dlsch_modulation_SIC(int32_t **sic_buffer,
uint8_t harq_pid = -1;//dlsch0->current_harq_pid; uint8_t harq_pid = -1;//dlsch0->current_harq_pid;
LTE_DL_eNB_HARQ_t *dlsch0_harq = dlsch0->harq_processes[harq_pid]; LTE_DL_eNB_HARQ_t *dlsch0_harq = dlsch0->harq_processes[harq_pid];
uint32_t i,jj,re_allocated=0; uint32_t i,jj,re_allocated=0;
uint8_t mod_order0 = get_Qm(dlsch0_harq->mcs); uint8_t mod_order0 = dlsch0_harq->Qm;
uint8_t *x0 = dlsch0_harq->e; uint8_t *x0 = dlsch0_harq->e;
uint8_t qam64_table_offset_re = 0; uint8_t qam64_table_offset_re = 0;
uint8_t qam64_table_offset_im = 0; uint8_t qam64_table_offset_im = 0;
...@@ -2599,7 +2599,7 @@ int mch_modulation(int32_t **txdataF, ...@@ -2599,7 +2599,7 @@ int mch_modulation(int32_t **txdataF,
uint32_t i,jj,re_allocated,symbol_offset; uint32_t i,jj,re_allocated,symbol_offset;
uint16_t l,rb,re_offset; uint16_t l,rb,re_offset;
uint8_t skip_dc=0; uint8_t skip_dc=0;
uint8_t mod_order = get_Qm(dlsch->harq_processes[0]->mcs); uint8_t mod_order = dlsch->harq_processes[0]->Qm;
int16_t qam16_table_a[4],qam64_table_a[8];//,qam16_table_b[4],qam64_table_b[8]; int16_t qam16_table_a[4],qam64_table_a[8];//,qam16_table_b[4],qam64_table_b[8];
int16_t *qam_table_s; int16_t *qam_table_s;
......
...@@ -568,8 +568,8 @@ uint32_t ulsch_encoding(uint8_t *a, ...@@ -568,8 +568,8 @@ uint32_t ulsch_encoding(uint8_t *a,
get_Qm_ul(ulsch->harq_processes[harq_pid]->mcs), get_Qm_ul(ulsch->harq_processes[harq_pid]->mcs),
1, 1,
r, r,
ulsch->harq_processes[harq_pid]->nb_rb, ulsch->harq_processes[harq_pid]->nb_rb);
ulsch->harq_processes[harq_pid]->mcs); // r //ulsch->harq_processes[harq_pid]->mcs); // r
stop_meas(rm_stats); stop_meas(rm_stats);
#ifdef DEBUG_ULSCH_CODING #ifdef DEBUG_ULSCH_CODING
......
...@@ -833,6 +833,8 @@ typedef struct PHY_VARS_eNB_s { ...@@ -833,6 +833,8 @@ typedef struct PHY_VARS_eNB_s {
nfapi_crc_indication_pdu_t crc_pdu_list[NFAPI_CRC_IND_MAX_PDU]; nfapi_crc_indication_pdu_t crc_pdu_list[NFAPI_CRC_IND_MAX_PDU];
Sched_Rsp_t Sched_INFO; Sched_Rsp_t Sched_INFO;
LTE_eNB_PDCCH pdcch_vars[2]; LTE_eNB_PDCCH pdcch_vars[2];
LTE_eNB_EPDCCH epdcch_vars[2];
LTE_eNB_MPDCCH mpdcch_vars[2];
LTE_eNB_COMMON common_vars; LTE_eNB_COMMON common_vars;
LTE_eNB_SRS srs_vars[NUMBER_OF_UE_MAX]; LTE_eNB_SRS srs_vars[NUMBER_OF_UE_MAX];
LTE_eNB_PBCH pbch; LTE_eNB_PBCH pbch;
......
...@@ -638,6 +638,10 @@ typedef struct { ...@@ -638,6 +638,10 @@ typedef struct {
/// - first index: tx antenna [0..nb_antennas_tx[ /// - first index: tx antenna [0..nb_antennas_tx[
/// - second index: sample [0..] /// - second index: sample [0..]
int32_t **txdataF_BF; int32_t **txdataF_BF;
/// \brief holds the transmit data before beamforming for epdcch/mpdcch
/// - first index : tx antenna [0..nb_epdcch_antenna_ports[
/// - second index: sampl [0..]
int32_t **txdataF_epdcch;
/// \brief Holds the receive data in the frequency domain. /// \brief Holds the receive data in the frequency domain.
/// - first index: rx antenna [0..nb_antennas_rx[ /// - first index: rx antenna [0..nb_antennas_rx[
/// - second index: ? [0..2*ofdm_symbol_size*frame_parms->symbols_per_tti[ /// - second index: ? [0..2*ofdm_symbol_size*frame_parms->symbols_per_tti[
...@@ -674,7 +678,13 @@ typedef enum {format0, ...@@ -674,7 +678,13 @@ typedef enum {format0,
format2D, format2D,
format3, format3,
format3A, format3A,
format4 format4,
format5,
format6_0A,
format6_0B,
format6_1A,
format6_1B,
format6_2
} DCI_format_t; } DCI_format_t;
typedef struct { typedef struct {
...@@ -696,6 +706,74 @@ typedef struct { ...@@ -696,6 +706,74 @@ typedef struct {
uint8_t dci_pdu[8]; uint8_t dci_pdu[8];
} DCI_ALLOC_t; } DCI_ALLOC_t;
#define MAX_EPDCCH_PRB 8
typedef struct {
/// Length of DCI in bits
uint8_t dci_length;
/// Aggregation level
uint8_t L;
/// Position of first CCE of the dci
int firstCCE;
/// flag to indicate that this is a RA response
boolean_t ra_flag;
/// rnti
rnti_t rnti;
/// Format
DCI_format_t format;
/// epdcch resource assignment (0=localized,1=distributed)
uint8_t epdcch_resource_assignment_flag;
/// epdcch index
uint16_t epdcch_id;
/// epdcch start symbol
uint8_t epdcch_start_symbol;
/// epdcch number of PRBs in set
uint8_t epdcch_num_prb;
/// vector of prb ids for set
uint8_t epdcch_prb_index[MAX_EPDCCH_PRB];
/// LBT parameter for frame configuration
uint8_t dwpts_symbols;
/// LBT parameter for frame configuration
uint8_t initial_lbt_sf;
/// DCI pdu
uint8_t dci_pdu[8];
} eDCI_ALLOC_t;
typedef struct {
/// Length of DCI in bits
uint8_t dci_length;
/// Aggregation level
uint8_t L;
/// Position of first CCE of the dci
int firstCCE;
/// flag to indicate that this is a RA response
boolean_t ra_flag;
/// rnti
rnti_t rnti;
/// Format
DCI_format_t format;
/// harq process index
uint8_t harq_pid;
/// Narrowband index
uint8_t narrowband;
/// number of PRB pairs for MPDCCH
uint8_t number_of_prb_pairs;
/// mpdcch resource assignement (0=localized,1=distributed)
uint8_t resource_block_assignment;
/// transmission type
uint8_t transmission_type;
/// mpdcch start symbol
uint8_t start_symbol;
/// CE mode (1=ModeA,2=ModeB)
uint8_t ce_mode;
/// 0-503 n_EPDCCHid_i
uint16_t dmrs_scrambling_init;
/// Absolute subframe of the initial transmission (0-10239)
uint16_t initial_transmission_sf_io;
/// DCI pdu
uint8_t dci_pdu[8];
} mDCI_ALLOC_t;
typedef struct { typedef struct {
uint8_t num_dci; uint8_t num_dci;
...@@ -703,15 +781,17 @@ typedef struct { ...@@ -703,15 +781,17 @@ typedef struct {
DCI_ALLOC_t dci_alloc[32]; DCI_ALLOC_t dci_alloc[32];
} LTE_eNB_PDCCH; } LTE_eNB_PDCCH;
/*
typedef struct {
} LTE_eNB_ePDCCH;
typedef struct { typedef struct {
uint8_t num_dci;
eDCI_ALLOC_t edci_alloc[32];
} LTE_eNB_EPDCCH;
typedef struct {
uint8_t num_dci;
mDCI_ALLOC_t mdci_alloc[32];
} LTE_eNB_MPDCCH; } LTE_eNB_MPDCCH;
*/
typedef struct { typedef struct {
/// \brief Hold the channel estimates in frequency domain based on SRS. /// \brief Hold the channel estimates in frequency domain based on SRS.
......
...@@ -909,6 +909,21 @@ void handle_nfapi_dci_dl_pdu(PHY_VARS_eNB *eNB, ...@@ -909,6 +909,21 @@ void handle_nfapi_dci_dl_pdu(PHY_VARS_eNB *eNB,
fill_dci_and_dlsch(eNB,proc,&pdcch_vars->dci_alloc[pdcch_vars->num_dci],pdu); fill_dci_and_dlsch(eNB,proc,&pdcch_vars->dci_alloc[pdcch_vars->num_dci],pdu);
} }
void handle_nfapi_mpdcch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,nfapi_dl_config_request_pdu_t *dl_config_pdu);
void handle_nfapi_mpdcch_pdu(PHY_VARS_eNB *eNB,
eNB_rxtx_proc_t *proc,
nfapi_dl_config_request_pdu_t *dl_config_pdu) {
int idx = proc->subframe_tx&1;
LTE_eNB_MPDCCH *mpdcch_vars = &eNB->mpdcch_vars[idx];
nfapi_dl_config_mpdcch_pdu *pdu = &dl_config_pdu->mpdcch_pdu;
LOG_I(PHY,"Frame %d, Subframe %d: MDCI processing\n",proc->frame_tx,proc->subframe_tx);
// copy dci configuration into eNB structure
fill_mdci_and_dlsch(eNB,proc,&mpdcch_vars->mdci_alloc[mpdcch_vars->num_dci],pdu);
}
void handle_nfapi_hi_dci0_dci_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, void handle_nfapi_hi_dci0_dci_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
nfapi_hi_dci0_request_pdu_t *hi_dci0_config_pdu); nfapi_hi_dci0_request_pdu_t *hi_dci0_config_pdu);
...@@ -954,12 +969,26 @@ handle_nfapi_bch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, ...@@ -954,12 +969,26 @@ handle_nfapi_bch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
} }
#ifdef Rel14
extern uint32_t localRIV2alloc_LUT6[32];
extern uint32_t localRIV2alloc_LUT25[512];
extern uint32_t localRIV2alloc_LUT50_0[1600];
extern uint32_t localRIV2alloc_LUT50_1[1600];
extern uint32_t localRIV2alloc_LUT100_0[6000];
extern uint32_t localRIV2alloc_LUT100_1[6000];
extern uint32_t localRIV2alloc_LUT100_2[6000];
extern uint32_t localRIV2alloc_LUT100_3[6000];
#endif
handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
nfapi_dl_config_request_pdu_t *dl_config_pdu, nfapi_dl_config_request_pdu_t *dl_config_pdu,
uint8_t codeword_index, uint8_t codeword_index,
uint8_t *sdu) { uint8_t *sdu) {
nfapi_dl_config_dlsch_pdu_rel8_t *rel8 = &dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8; nfapi_dl_config_dlsch_pdu_rel8_t *rel8 = &dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8;
#ifdef Rel14
nfapi_dl_config_dlsch_pdu_rel13_t *rel13 = &dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13;
#endif
LTE_eNB_DLSCH_t *dlsch0=NULL,*dlsch1=NULL; LTE_eNB_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL; LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
int UE_id; int UE_id;
...@@ -969,9 +998,14 @@ handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, ...@@ -969,9 +998,14 @@ handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
UE_id = find_dlsch(rel8->rnti,eNB,SEARCH_EXIST_OR_FREE); UE_id = find_dlsch(rel8->rnti,eNB,SEARCH_EXIST_OR_FREE);
AssertFatal(UE_id!=-1,"no free or exiting dlsch_context\n"); AssertFatal(UE_id!=-1,"no free or exiting dlsch_context\n");
AssertFatal(UE_id<NUMBER_OF_UE_MAX,"returned UE_id %d >= %d(NUMBER_OF_UE_MAX)\n",UE_id,NUMBER_OF_UE_MAX); AssertFatal(UE_id<NUMBER_OF_UE_MAX,"returned UE_id %d >= %d(NUMBER_OF_UE_MAX)\n",UE_id,NUMBER_OF_UE_MAX);
dlsch0 = eNB->dlsch[UE_id][0]; dlsch0 = eNB->dlsch[UE_id][0];
dlsch1 = eNB->dlsch[UE_id][1]; dlsch1 = eNB->dlsch[UE_id][1];
#ifdef Rel14
if ((rel13->pdsch_payload_type == 0) && (rel13->ue_type>0)) dlsch0->harq_ids[proc->subframe_tx] = 0;
#endif
harq_pid = dlsch0->harq_ids[proc->subframe_tx]; harq_pid = dlsch0->harq_ids[proc->subframe_tx];
AssertFatal((harq_pid>=0) && (harq_pid<8),"harq_pid %d not in 0...7\n",harq_pid); AssertFatal((harq_pid>=0) && (harq_pid<8),"harq_pid %d not in 0...7\n",harq_pid);
dlsch0_harq = dlsch0->harq_processes[harq_pid]; dlsch0_harq = dlsch0->harq_processes[harq_pid];
...@@ -983,6 +1017,52 @@ handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, ...@@ -983,6 +1017,52 @@ handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
if (codeword_index == 0) dlsch0_harq->pdu = sdu; if (codeword_index == 0) dlsch0_harq->pdu = sdu;
else dlsch1_harq->pdu = sdu; else dlsch1_harq->pdu = sdu;
#ifdef Rel14
if ((rel13->pdsch_payload_type == 0) && (rel13->ue_type>0)) { // this is a BR/CE UE and SIB1-BR
// configure PDSCH
switch (eNB->frame_parms.N_RB_DL) {
case 6:
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT6[rel8->resource_block_coding];
break;
case 15:
AssertFatal(1==0,"15 PRBs not supported for now\n");
break;
case 25:
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT25[rel8->resource_block_coding];
break;
case 50:
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT50_0[rel8->resource_block_coding];
dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT50_1[rel8->resource_block_coding];
break;
case 75:
AssertFatal(1==0,"75 PRBs not supported for now\n");
break;
case 100:
dlsch0_harq->rb_alloc[0] = localRIV2alloc_LUT100_0[rel8->resource_block_coding];
dlsch0_harq->rb_alloc[1] = localRIV2alloc_LUT100_1[rel8->resource_block_coding];
dlsch0_harq->rb_alloc[2] = localRIV2alloc_LUT100_2[rel8->resource_block_coding];
dlsch0_harq->rb_alloc[3] = localRIV2alloc_LUT100_3[rel8->resource_block_coding];
}
dlsch0->active = 1;
dlsch0_harq->nb_rb = 6;
dlsch0_harq->vrb_type = LOCALIZED;
dlsch0_harq->rvidx = 0;
dlsch0_harq->Nl = 0;
dlsch0_harq->mimo_mode = (eNB->frame_parms.nb_antenna_ports_eNB == 1) ? SISO : ALAMOUTI;
dlsch0_harq->dl_power_off = 1;
dlsch0_harq->round = 0;
dlsch0_harq->status = ACTIVE;
dlsch0_harq->TBS = rel8->length;
}
else {
}
#endif
} }
handle_nfapi_ul_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, handle_nfapi_ul_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
...@@ -1121,7 +1201,8 @@ void schedule_response(Sched_Rsp_t *Sched_INFO) { ...@@ -1121,7 +1201,8 @@ void schedule_response(Sched_Rsp_t *Sched_INFO) {
// handle_nfapi_epdcch_pdu(eNB,dl_config_pdu); // handle_nfapi_epdcch_pdu(eNB,dl_config_pdu);
break; break;
case NFAPI_DL_CONFIG_MPDCCH_PDU_TYPE: case NFAPI_DL_CONFIG_MPDCCH_PDU_TYPE:
// handle_nfapi_mpdcch_pdu(eNB,dl_config_pdu); handle_nfapi_mpdcch_pdu(eNB,proc,dl_config_pdu);
eNB->mpdcch_vars[subframe&1].num_dci++;
break; break;
} }
} }
...@@ -1138,6 +1219,7 @@ void schedule_response(Sched_Rsp_t *Sched_INFO) { ...@@ -1138,6 +1219,7 @@ void schedule_response(Sched_Rsp_t *Sched_INFO) {
case NFAPI_HI_DCI0_HI_PDU_TYPE: case NFAPI_HI_DCI0_HI_PDU_TYPE:
handle_nfapi_hi_dci0_hi_pdu(eNB,proc,hi_dci0_req_pdu); handle_nfapi_hi_dci0_hi_pdu(eNB,proc,hi_dci0_req_pdu);
eNB->pdcch_vars[subframe&1].num_dci++; eNB->pdcch_vars[subframe&1].num_dci++;
break; break;
} }
} }
......
...@@ -451,8 +451,7 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP, ...@@ -451,8 +451,7 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP,
MeasGapConfig_t *measGapConfig, MeasGapConfig_t *measGapConfig,
TDD_Config_t *tdd_Config, TDD_Config_t *tdd_Config,
MobilityControlInfo_t *mobilityControlInfo, MobilityControlInfo_t *mobilityControlInfo,
uint8_t *SIwindowsize, SchedulingInfoList_t *schedulingInfoList,
uint16_t *SIperiod,
uint32_t ul_CarrierFreq, uint32_t ul_CarrierFreq,
long *ul_Bandwidth, long *ul_Bandwidth,
AdditionalSpectrumEmission_t *additionalSpectrumEmission, AdditionalSpectrumEmission_t *additionalSpectrumEmission,
...@@ -461,6 +460,10 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP, ...@@ -461,6 +460,10 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP,
,uint8_t MBMS_Flag, ,uint8_t MBMS_Flag,
MBSFN_AreaInfoList_r9_t *mbsfn_AreaInfoList, MBSFN_AreaInfoList_r9_t *mbsfn_AreaInfoList,
PMCH_InfoList_r9_t *pmch_InfoList PMCH_InfoList_r9_t *pmch_InfoList
#endif
#ifdef Rel14
,
SystemInformationBlockType1_v1310_IEs_t *sib1_v13ext
#endif #endif
) { ) {
...@@ -513,13 +516,16 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP, ...@@ -513,13 +516,16 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP,
mac_init_cell_params(Mod_idP,CC_idP); mac_init_cell_params(Mod_idP,CC_idP);
} }
if ((SIwindowsize!=NULL) && (SIperiod!=NULL)) { if (schedulingInfoList!=NULL) {
RC.mac[Mod_idP]->common_channels[CC_idP].tdd_Config = tdd_Config; RC.mac[Mod_idP]->common_channels[CC_idP].tdd_Config = tdd_Config;
RC.mac[Mod_idP]->common_channels[CC_idP].SIwindowsize = *SIwindowsize; RC.mac[Mod_idP]->common_channels[CC_idP].schedulingInfoList = schedulingInfoList;
RC.mac[Mod_idP]->common_channels[CC_idP].SIperiod = *SIperiod;
config_sib1(Mod_idP,CC_idP,tdd_Config); config_sib1(Mod_idP,CC_idP,tdd_Config);
} }
#ifdef Rel14
if (sib1_v13ext != NULL) {
RC.mac[Mod_idP]->common_channels[CC_idP].sib1_v13ext = sib1_v13ext;
}
#endif
if (radioResourceConfigCommon!=NULL) { if (radioResourceConfigCommon!=NULL) {
LOG_I(MAC,"[CONFIG]SIB2/3 Contents (partial)\n"); LOG_I(MAC,"[CONFIG]SIB2/3 Contents (partial)\n");
LOG_I(MAC,"[CONFIG]pusch_config_common.n_SB = %ld\n",radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.n_SB); LOG_I(MAC,"[CONFIG]pusch_config_common.n_SB = %ld\n",radioResourceConfigCommon->pusch_ConfigCommon.pusch_ConfigBasic.n_SB);
...@@ -533,7 +539,7 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP, ...@@ -533,7 +539,7 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP,
AssertFatal(radioResourceConfigCommon->rach_ConfigCommon.maxHARQ_Msg3Tx > 0, AssertFatal(radioResourceConfigCommon->rach_ConfigCommon.maxHARQ_Msg3Tx > 0,
"radioResourceconfigCommon %d == 0\n", "radioResourceconfigCommon %d == 0\n",
radioResourceConfigCommon->rach_ConfigCommon.maxHARQ_Msg3Tx); (int)radioResourceConfigCommon->rach_ConfigCommon.maxHARQ_Msg3Tx);
RC.mac[Mod_idP]->common_channels[CC_idP].radioResourceConfigCommon = radioResourceConfigCommon; RC.mac[Mod_idP]->common_channels[CC_idP].radioResourceConfigCommon = radioResourceConfigCommon;
if (ul_CarrierFreq>0) RC.mac[Mod_idP]->common_channels[CC_idP].ul_CarrierFreq = ul_CarrierFreq; if (ul_CarrierFreq>0) RC.mac[Mod_idP]->common_channels[CC_idP].ul_CarrierFreq = ul_CarrierFreq;
......
...@@ -56,6 +56,7 @@ ...@@ -56,6 +56,7 @@
#include "RadioResourceConfigCommon.h" #include "RadioResourceConfigCommon.h"
#include "RadioResourceConfigDedicated.h" #include "RadioResourceConfigDedicated.h"
#include "MeasGapConfig.h" #include "MeasGapConfig.h"
#include "SchedulingInfoList.h"
#include "TDD-Config.h" #include "TDD-Config.h"
#include "RACH-ConfigCommon.h" #include "RACH-ConfigCommon.h"
#include "MeasObjectToAddModList.h" #include "MeasObjectToAddModList.h"
...@@ -66,6 +67,9 @@ ...@@ -66,6 +67,9 @@
#include "PMCH-InfoList-r9.h" #include "PMCH-InfoList-r9.h"
#include "SCellToAddMod-r10.h" #include "SCellToAddMod-r10.h"
#endif #endif
#ifdef Rel14
#include "SystemInformationBlockType1-v1310-IEs.h"
#endif
#include "nfapi_interface.h" #include "nfapi_interface.h"
#include "PHY_INTERFACE/IF_Module.h" #include "PHY_INTERFACE/IF_Module.h"
...@@ -310,6 +314,10 @@ typedef struct { ...@@ -310,6 +314,10 @@ typedef struct {
#define PCCH 4 // Paging #define PCCH 4 // Paging
/*!\brief Values of PCCH logical channel (fake) */ /*!\brief Values of PCCH logical channel (fake) */
#define MIBCH 5 // MIB #define MIBCH 5 // MIB
/*!\brief Values of BCCH SIB1_BR logical channel (fake) */
#define BCCH_SIB1_BR 6 // SIB1_BR
/*!\brief Values of BCCH SIB_BR logical channel (fake) */
#define BCCH_SI_BR 7 // SI-BR
/*!\brief Value of CCCH / SRB0 logical channel */ /*!\brief Value of CCCH / SRB0 logical channel */
#define CCCH 0 // srb0 #define CCCH 0 // srb0
/*!\brief DCCH / SRB1 logical channel */ /*!\brief DCCH / SRB1 logical channel */
...@@ -891,10 +899,11 @@ typedef struct { ...@@ -891,10 +899,11 @@ typedef struct {
uint32_t dl_CarrierFreq; uint32_t dl_CarrierFreq;
BCCH_BCH_Message_t *mib; BCCH_BCH_Message_t *mib;
RadioResourceConfigCommonSIB_t *radioResourceConfigCommon; RadioResourceConfigCommonSIB_t *radioResourceConfigCommon;
#ifdef Rel14
RadioResourceConfigCommonSIB_t *radioResourceConfigCommon_BR; RadioResourceConfigCommonSIB_t *radioResourceConfigCommon_BR;
#endif
TDD_Config_t *tdd_Config; TDD_Config_t *tdd_Config;
uint8_t SIwindowsize; SchedulingInfoList_t *schedulingInfoList;
uint16_t SIperiod;
ARFCN_ValueEUTRA_t ul_CarrierFreq; ARFCN_ValueEUTRA_t ul_CarrierFreq;
long ul_Bandwidth; long ul_Bandwidth;
/// Outgoing MIB PDU for PHY /// Outgoing MIB PDU for PHY
...@@ -937,6 +946,14 @@ typedef struct { ...@@ -937,6 +946,14 @@ typedef struct {
/// Outgoing MCH pdu for PHY /// Outgoing MCH pdu for PHY
MCH_PDU MCH_pdu; MCH_PDU MCH_pdu;
#endif #endif
#ifdef Rel14
/// Rel13 parameters from SIB1
SystemInformationBlockType1_v1310_IEs_t *sib1_v13ext;
/// Counter for SIB1-BR scheduling
int SIB1_BR_cnt;
/// Outgoing BCCH-BR pdu for PHY
BCCH_PDU BCCH_BR_pdu[20];
#endif
} COMMON_channels_t; } COMMON_channels_t;
/*! \brief top level eNB MAC structure */ /*! \brief top level eNB MAC structure */
typedef struct eNB_MAC_INST_s { typedef struct eNB_MAC_INST_s {
......
...@@ -62,6 +62,473 @@ ...@@ -62,6 +62,473 @@
// NEED TO ADD schedule_SI_BR for SIB1_BR and SIB23_BR // NEED TO ADD schedule_SI_BR for SIB1_BR and SIB23_BR
// CCE_allocation_infeasible to be done for EPDCCH/MPDCCH // CCE_allocation_infeasible to be done for EPDCCH/MPDCCH
#ifdef Rel14
#define size_Sj25 2
int Sj25[size_Sj25]={0,3};
#define size_Sj50 6
int Sj50[size_Sj50]={0,1,2,5,6,7};
#define size_Sj75 10
int Sj75[size_Sj75]={0,1,2,3,4,7,8,9,10,11};
#define size_Sj100 14
int Sj100[size_Sj100]={0,1,2,3,4,5,6,9,10,11,12,13,14,15};
int SIB1_BR_TBS_table[6] = {208,256,328,504,712,936};
//------------------------------------------------------------------------------
void
schedule_SIB1_BR(
module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP)
//------------------------------------------------------------------------------
{
int8_t bcch_sdu_length;
int CC_id;
eNB_MAC_INST *eNB = RC.mac[module_idP];
COMMON_channels_t *cc;
uint8_t *vrb_map;
int first_rb = -1;
int N_RB_DL;
nfapi_dl_config_request_pdu_t *dl_config_pdu;
nfapi_tx_request_pdu_t *TX_req;
nfapi_dl_config_request_body_t *dl_req;
int m,i,N_S_NB;
int *Sj;
int n_NB = 0;
int TBS;
int k,rvidx;
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
cc = &eNB->common_channels[CC_id];
vrb_map = (void*)&cc->vrb_map;
N_RB_DL = to_prb(cc->mib->message.dl_Bandwidth);
dl_req = &eNB->DL_req[CC_id].dl_config_request_body;
int foffset = cc->physCellId&1;
int sfoffset = (cc->tdd_Config==NULL) ? 0 : 1;
// Time-domain scheduling
if (cc->mib->message.schedulingInfoSIB1_BR_r13==0) continue;
else
switch ((cc->mib->message.schedulingInfoSIB1_BR_r13-1)%3) {
case 0: // repetition 4
k = (frameP>>1)&3;
if ((subframeP!=(4+sfoffset)) || ((frameP&1)!=foffset)) continue;
break;
case 1: // repetition 8
k = frameP&3;
AssertFatal(N_RB_DL<=15,"SIB1-BR repetition 8 not allowed for N_RB_DL= %d\n",N_RB_DL);
if ((foffset==0) && (subframeP!=(4+sfoffset))) continue;
else if ((foffset==1) && (subframeP!=((9+sfoffset)%10))) continue;
break;
case 2: // repetition 16
k = ((10*frameP) + subframeP)&3;
AssertFatal(N_RB_DL<=15,"SIB1-BR repetition 16 not allowed for N_RB_DL= %d\n",N_RB_DL);
if ((sfoffset == 1) && ((subframeP!=0)||(subframeP!=5))) continue;
else if ((sfoffset == 0) && (foffset==0) && ((subframeP!=4) || (subframeP!=9))) continue;
else if ((sfoffset == 0) && (foffset==1) && ((subframeP!=0) || (subframeP!=9))) continue;
break;
}
// if we get here we have to schedule SIB1_BR in this frame/subframe
// keep counter of SIB1_BR repetitions in 8 frame period to choose narrowband on which to transmit
if ((frameP&7) == 0) cc->SIB1_BR_cnt=0;
else cc->SIB1_BR_cnt++;
// Frequency-domain scheduling
switch (N_RB_DL) {
case 6:
case 15:
n_NB=0;
break;
case 25:
m=2;
N_S_NB = 2;
Sj = Sj25;
break;
case 50:
m=2;
N_S_NB = 6;
Sj = Sj50;
break;
case 75:
m=4;
N_S_NB = 10;
Sj = Sj75;
break;
case 100:
m=4;
N_S_NB = 14;
Sj = Sj100;
break;
}
rvidx = (((3*k)>>1) + (k&1))&3;
i = cc->SIB1_BR_cnt & (m-1);
n_NB = Sj[((cc->physCellId % N_S_NB) + (i*N_S_NB/m))%N_S_NB];
bcch_sdu_length = mac_rrc_data_req(module_idP,
CC_id,
frameP,
BCCH_SIB1_BR,1,
&cc->BCCH_BR_pdu[0].payload[0],
1,
module_idP,
0); // not used in this case
AssertFatal(cc->mib->message.schedulingInfoSIB1_BR_r13<19,"schedulingInfoSIB1_BR_r13 %d > 18\n",
(int)cc->mib->message.schedulingInfoSIB1_BR_r13);
TBS = SIB1_BR_TBS_table[(cc->mib->message.schedulingInfoSIB1_BR_r13-1)/3]>>3;
AssertFatal(bcch_sdu_length <= TBS, "length returned by RRC is not compatible with the TBS %d from MIB\n",TBS);
if (bcch_sdu_length > 0) {
LOG_D(MAC,"[eNB %d] Frame %d : BCCH_BR->DLSCH CC_id %d, Received %d bytes \n",module_idP,frameP,CC_id,bcch_sdu_length);
// allocate all 6 PRBs in narrowband for SIB1_BR
first_rb = n_NB*6;
vrb_map[first_rb] = 1;
vrb_map[first_rb+1] = 1;
vrb_map[first_rb+2] = 1;
vrb_map[first_rb+3] = 1;
vrb_map[first_rb+4] = 1;
vrb_map[first_rb+5] = 1;
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DLSCH_PDU_TYPE;
dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dlsch_pdu));
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.length = TBS;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index = eNB->pdu_index[CC_id];
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.rnti = 0xFFFF;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_allocation_type = 2; // format 1A/1B/1D
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.virtual_resource_block_assignment_flag = 0; // localized
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_block_coding = getRIV(N_RB_DL,first_rb,6);
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.modulation = 2; //QPSK
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.redundancy_version = rvidx;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks = 1;// first block
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_block_to_codeword_swap_flag = 0;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transmission_scheme = (cc->p_eNB==1 ) ? 0 : 1;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.number_of_layers = 1;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.number_of_subbands = 1;
// dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.codebook_index = ;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.ue_category_capacity = 1;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pa = 4; // 0 dB
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.delta_power_offset_index = 0;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.ngap = 0;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.nprb = get_subbandsize(cc->mib->message.dl_Bandwidth); // ignored
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transmission_mode = (cc->p_eNB==1 ) ? 1 : 2;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_prb_per_subband = 1;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_vector = 1;
// Rel13 fields
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.ue_type = 1; // CEModeA UE
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.pdsch_payload_type = 0; // SIB1-BR
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.initial_transmission_sf_io = 0xFFFF; // absolute SF
// dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.bf_vector = ;
dl_req->number_pdu++;
// Program TX Request
TX_req = &eNB->TX_req[CC_id].tx_request_body.tx_pdu_list[eNB->TX_req[CC_id].tx_request_body.number_of_pdus];
TX_req->pdu_length = bcch_sdu_length;
TX_req->pdu_index = eNB->pdu_index[CC_id]++;
TX_req->num_segments = 1;
TX_req->segments[0].segment_length = bcch_sdu_length;
TX_req->segments[0].segment_data = cc->BCCH_BR_pdu[0].payload;
eNB->TX_req[CC_id].tx_request_body.number_of_pdus++;
if (opt_enabled == 1) {
trace_pdu(1,
&cc->BCCH_BR_pdu[0].payload[0],
bcch_sdu_length,
0xffff,
4,
0xffff,
eNB->frame,
eNB->subframe,
0,
0);
LOG_D(OPT,"[eNB %d][BCH] Frame %d trace pdu for CC_id %d rnti %x with size %d\n",
module_idP, frameP, CC_id, 0xffff, bcch_sdu_length);
}
if (cc->tdd_Config!=NULL) { //TDD
LOG_D(MAC,"[eNB] Frame %d : Scheduling BCCH-BR 0->DLSCH (TDD) for CC_id %d SIB1-BR %d bytes\n",
frameP,
CC_id,
bcch_sdu_length);
} else {
LOG_D(MAC,"[eNB] Frame %d : Scheduling BCCH-BR 0->DLSCH (FDD) for CC_id %d SIB1-BR %d bytes\n",
frameP,
CC_id,
bcch_sdu_length);
}
} else {
//LOG_D(MAC,"[eNB %d] Frame %d : BCCH not active \n",Mod_id,frame);
}
}
return;
}
int si_WindowLength_BR_r13tab[SystemInformationBlockType1_v1310_IEs__bandwidthReducedAccessRelatedInfo_r13__si_WindowLength_BR_r13_spare] =
{20,40,60,80,120,160,200};
int si_TBS_r13tab[SchedulingInfo_BR_r13__si_TBS_r13_b936+1] = {152,208,256,328,408,504,600,712,808,936};
//------------------------------------------------------------------------------
void
schedule_SI_BR(
module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP)
//------------------------------------------------------------------------------
{
int8_t bcch_sdu_length;
int CC_id;
eNB_MAC_INST *eNB = RC.mac[module_idP];
COMMON_channels_t *cc;
uint8_t *vrb_map;
int first_rb = -1;
int N_RB_DL;
nfapi_dl_config_request_pdu_t *dl_config_pdu;
nfapi_tx_request_pdu_t *TX_req;
nfapi_dl_config_request_body_t *dl_req;
int m,i,N_S_NB;
int *Sj;
int n_NB = 0;
int TBS;
int k,rvidx;
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
cc = &eNB->common_channels[CC_id];
vrb_map = (void*)&cc->vrb_map;
N_RB_DL = to_prb(cc->mib->message.dl_Bandwidth);
dl_req = &eNB->DL_req[CC_id].dl_config_request_body;
// Time-domain scheduling
if (cc->mib->message.schedulingInfoSIB1_BR_r13==0) continue;
else {
AssertFatal(cc->sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13!=NULL,
"sib_v13ext->bandwidthReducedAccessRelatedInfo_r13 is null\n");
SchedulingInfoList_BR_r13_t *schedulingInfoList_BR_r13 = cc->sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13->schedulingInfoList_BR_r13;
AssertFatal(schedulingInfoList_BR_r13!=NULL,
"sib_v13ext->schedulingInfoList_BR_r13 is null\n");
SchedulingInfoList_t *schedulingInfoList = cc->schedulingInfoList;
AssertFatal(schedulingInfoList_BR_r13->list.count==schedulingInfoList->list.count,
"schedulingInfolist_BR.r13->list.count %d != schedulingInfoList.list.count %d\n",
schedulingInfoList_BR_r13->list.count,schedulingInfoList->list.count);
AssertFatal(cc->sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13->si_WindowLength_BR_r13<=SystemInformationBlockType1_v1310_IEs__bandwidthReducedAccessRelatedInfo_r13__si_WindowLength_BR_r13_ms200,
"si_WindowLength_BR_r13 %d > %d\n",
(int)cc->sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13->si_WindowLength_BR_r13,
SystemInformationBlockType1_v1310_IEs__bandwidthReducedAccessRelatedInfo_r13__si_WindowLength_BR_r13_ms200);
long si_WindowLength_BR_r13 = si_WindowLength_BR_r13tab[cc->sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13->si_WindowLength_BR_r13];
long si_RepetitionPattern_r13 = cc->sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13->si_RepetitionPattern_r13;
AssertFatal(si_RepetitionPattern_r13<=SystemInformationBlockType1_v1310_IEs__bandwidthReducedAccessRelatedInfo_r13__si_RepetitionPattern_r13_every8thRF,
"si_RepetitionPattern_r13 %d > %d\n",
(int)si_RepetitionPattern_r13,
SystemInformationBlockType1_v1310_IEs__bandwidthReducedAccessRelatedInfo_r13__si_RepetitionPattern_r13_every8thRF);
// cycle through SIB list
for (i=0;i<schedulingInfoList_BR_r13->list.count;i++) {
long si_Periodicity = schedulingInfoList->list.array[i]->si_Periodicity;
long si_Narrowband_r13 = schedulingInfoList_BR_r13->list.array[i]->si_Narrowband_r13;
long si_TBS_r13 = si_TBS_r13tab[schedulingInfoList_BR_r13->list.array[i]->si_TBS_r13];
// check if the SI is to be scheduled now
int period_in_sf = 80<<si_Periodicity; // 2^i * 80 subframes, note: si_Periodicity is 2^i * 80ms
int sf_mod_period = ((frameP*10)+subframeP)%period_in_sf;
rvidx = (((3*sf_mod_period)>>1) + (sf_mod_period&1))&3;
if ((sf_mod_period < si_WindowLength_BR_r13) &&
((frameP&(((1<<si_RepetitionPattern_r13)-1)))==0)) { // this SIB is to be scheduled
bcch_sdu_length = mac_rrc_data_req(module_idP,
CC_id,
frameP,
BCCH_SI_BR+i,1,
&cc->BCCH_BR_pdu[i+1].payload[0],
1,
module_idP,
0); // not used in this case
if (bcch_sdu_length > 0) {
AssertFatal(bcch_sdu_length <= (si_TBS_r13>>3),
"RRC provided bcch with length %d > %d\n",
bcch_sdu_length,(si_TBS_r13>>3));
LOG_D(MAC,"[eNB %d] Frame %d : BCCH_BR %d->DLSCH CC_id %d, Received %d bytes \n",module_idP,frameP,i,CC_id,bcch_sdu_length);
// allocate all 6 PRBs in narrowband for SIB1_BR
first_rb = si_Narrowband_r13*6;
vrb_map[first_rb] = 1;
vrb_map[first_rb+1] = 1;
vrb_map[first_rb+2] = 1;
vrb_map[first_rb+3] = 1;
vrb_map[first_rb+4] = 1;
vrb_map[first_rb+5] = 1;
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DLSCH_PDU_TYPE;
dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dlsch_pdu));
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.length = si_TBS_r13>>3;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index = eNB->pdu_index[CC_id];
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.rnti = 0xFFFF;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_allocation_type = 2; // format 1A/1B/1D
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.virtual_resource_block_assignment_flag = 0; // localized
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_block_coding = getRIV(N_RB_DL,first_rb,6);
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.modulation = 2; //QPSK
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.redundancy_version = rvidx;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks = 1;// first block
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_block_to_codeword_swap_flag = 0;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transmission_scheme = (cc->p_eNB==1 ) ? 0 : 1;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.number_of_layers = 1;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.number_of_subbands = 1;
// dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.codebook_index = ;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.ue_category_capacity = 1;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pa = 4; // 0 dB
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.delta_power_offset_index = 0;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.ngap = 0;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.nprb = get_subbandsize(cc->mib->message.dl_Bandwidth); // ignored
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transmission_mode = (cc->p_eNB==1 ) ? 1 : 2;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_prb_per_subband = 1;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_vector = 1;
// Rel13 fields
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.ue_type = 1; // CEModeA UE
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.pdsch_payload_type = 1; // SI-BR
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.initial_transmission_sf_io = 0xFFFF; // absolute SF
// dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.bf_vector = ;
dl_req->number_pdu++;
// Program TX Request
TX_req = &eNB->TX_req[CC_id].tx_request_body.tx_pdu_list[eNB->TX_req[CC_id].tx_request_body.number_of_pdus];
TX_req->pdu_length = bcch_sdu_length;
TX_req->pdu_index = eNB->pdu_index[CC_id]++;
TX_req->num_segments = 1;
TX_req->segments[0].segment_length = bcch_sdu_length;
TX_req->segments[0].segment_data = cc->BCCH_BR_pdu[i+1].payload;
eNB->TX_req[CC_id].tx_request_body.number_of_pdus++;
if (opt_enabled == 1) {
trace_pdu(1,
&cc->BCCH_BR_pdu[i+1].payload[0],
bcch_sdu_length,
0xffff,
4,
0xffff,
eNB->frame,
eNB->subframe,
0,
0);
LOG_D(OPT,"[eNB %d][BCH] Frame %d trace pdu for CC_id %d rnti %x with size %d\n",
module_idP, frameP, CC_id, 0xffff, bcch_sdu_length);
}
if (cc->tdd_Config!=NULL) { //TDD
LOG_D(MAC,"[eNB] Frame %d : Scheduling BCCH-BR %d->DLSCH (TDD) for CC_id %d SI-BR %d bytes\n",
frameP,i,
CC_id,
bcch_sdu_length);
} else {
LOG_D(MAC,"[eNB] Frame %d : Scheduling BCCH-BR %d->DLSCH (FDD) for CC_id %d SI-BR %d bytes\n",
frameP,i,
CC_id,
bcch_sdu_length);
}
}
} // scheduling in current frame/subframe
} //for SI List
} // eMTC is activated
} // CC_id
return;
}
#endif
void schedule_mib(module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP) {
eNB_MAC_INST *eNB = RC.mac[module_idP];
COMMON_channels_t *cc;
nfapi_dl_config_request_pdu_t *dl_config_pdu;
nfapi_tx_request_pdu_t *TX_req;
int mib_sdu_length;
int CC_id;
nfapi_dl_config_request_body_t *dl_req;
AssertFatal(subframeP==0,"Subframe must be 0\n");
AssertFatal((frameP&3)==0,"Frame must be a multiple of 4\n");
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
dl_req = &eNB->DL_req[CC_id].dl_config_request_body;
cc = &eNB->common_channels[CC_id];
mib_sdu_length = mac_rrc_data_req(module_idP,
CC_id,
frameP,
MIBCH,1,
&cc->MIB_pdu.payload[0],
1,
module_idP,
0); // not used in this case
LOG_I(MAC,"Frame %d, subframe %d: BCH PDU length %d\n",
frameP,subframeP,mib_sdu_length);
if (mib_sdu_length > 0) {
LOG_I(MAC,"Frame %d, subframe %d: Adding BCH PDU in position %d (length %d)\n",
frameP,subframeP,dl_req->number_pdu,mib_sdu_length);
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_BCH_PDU_TYPE,
dl_config_pdu->pdu_size = 2+sizeof(nfapi_dl_config_bch_pdu);
dl_config_pdu->bch_pdu.bch_pdu_rel8.length = mib_sdu_length;
dl_config_pdu->bch_pdu.bch_pdu_rel8.pdu_index = eNB->pdu_index[CC_id];
dl_config_pdu->bch_pdu.bch_pdu_rel8.transmission_power = 6000;
dl_req->number_pdu++;
LOG_I(MAC,"eNB->DL_req[0].number_pdu %d (%p)\n",
dl_req->number_pdu,&dl_req->number_pdu);
// DL request
TX_req = &eNB->TX_req[CC_id].tx_request_body.tx_pdu_list[eNB->TX_req[CC_id].tx_request_body.number_of_pdus];
TX_req->pdu_length = 3;
TX_req->pdu_index = eNB->pdu_index[CC_id]++;
TX_req->num_segments = 1;
TX_req->segments[0].segment_length = 0;
TX_req->segments[0].segment_data = cc[CC_id].MIB_pdu.payload;
eNB->TX_req[CC_id].tx_request_body.number_of_pdus++;
}
}
}
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------
void void
schedule_SI( schedule_SI(
...@@ -270,65 +737,3 @@ schedule_SI( ...@@ -270,65 +737,3 @@ schedule_SI(
return; return;
} }
void schedule_mib(module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP) {
eNB_MAC_INST *eNB = RC.mac[module_idP];
COMMON_channels_t *cc;
nfapi_dl_config_request_pdu_t *dl_config_pdu;
nfapi_tx_request_pdu_t *TX_req;
int mib_sdu_length;
int CC_id;
nfapi_dl_config_request_body_t *dl_req;
AssertFatal(subframeP==0,"Subframe must be 0\n");
AssertFatal((frameP&3)==0,"Frame must be a multiple of 4\n");
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
dl_req = &eNB->DL_req[CC_id].dl_config_request_body;
cc = &eNB->common_channels[CC_id];
mib_sdu_length = mac_rrc_data_req(module_idP,
CC_id,
frameP,
MIBCH,1,
&cc->MIB_pdu.payload[0],
1,
module_idP,
0); // not used in this case
LOG_I(MAC,"Frame %d, subframe %d: BCH PDU length %d\n",
frameP,subframeP,mib_sdu_length);
if (mib_sdu_length > 0) {
LOG_I(MAC,"Frame %d, subframe %d: Adding BCH PDU in position %d (length %d)\n",
frameP,subframeP,dl_req->number_pdu,mib_sdu_length);
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_BCH_PDU_TYPE,
dl_config_pdu->pdu_size = 2+sizeof(nfapi_dl_config_bch_pdu);
dl_config_pdu->bch_pdu.bch_pdu_rel8.length = mib_sdu_length;
dl_config_pdu->bch_pdu.bch_pdu_rel8.pdu_index = eNB->pdu_index[CC_id];
dl_config_pdu->bch_pdu.bch_pdu_rel8.transmission_power = 6000;
dl_req->number_pdu++;
LOG_I(MAC,"eNB->DL_req[0].number_pdu %d (%p)\n",
dl_req->number_pdu,&dl_req->number_pdu);
// DL request
TX_req = &eNB->TX_req[CC_id].tx_request_body.tx_pdu_list[eNB->TX_req[CC_id].tx_request_body.number_of_pdus];
TX_req->pdu_length = 3;
TX_req->pdu_index = eNB->pdu_index[CC_id]++;
TX_req->num_segments = 1;
TX_req->segments[0].segment_length = 0;
TX_req->segments[0].segment_data = cc[CC_id].MIB_pdu.payload;
eNB->TX_req[CC_id].tx_request_body.number_of_pdus++;
}
}
}
...@@ -736,12 +736,12 @@ unsigned char generate_dlsch_header(unsigned char *mac_header, ...@@ -736,12 +736,12 @@ unsigned char generate_dlsch_header(unsigned char *mac_header,
@param measGapConfig Measurement Gap configuration for MAC (if NULL keep existing configuration) @param measGapConfig Measurement Gap configuration for MAC (if NULL keep existing configuration)
@param tdd_Config TDD Configuration from SIB1 (if NULL keep existing configuration) @param tdd_Config TDD Configuration from SIB1 (if NULL keep existing configuration)
@param mobilityControlInfo mobility control info received for Handover @param mobilityControlInfo mobility control info received for Handover
@param SIwindowsize SI Windowsize from SIB1 (if NULL keep existing configuration) @param SchedInfoList SI Scheduling information
@param SIperiod SI Period from SIB1 (if NULL keep existing configuration)
@param MBMS_Flag indicates MBMS transmission @param MBMS_Flag indicates MBMS transmission
@param mbsfn_SubframeConfigList pointer to mbsfn subframe configuration list from SIB2 @param mbsfn_SubframeConfigList pointer to mbsfn subframe configuration list from SIB2
@param mbsfn_AreaInfoList pointer to MBSFN Area Info list from SIB13 @param mbsfn_AreaInfoList pointer to MBSFN Area Info list from SIB13
@param pmch_InfoList pointer to PMCH_InfoList from MBSFNAreaConfiguration Message (MCCH Message) @param pmch_InfoList pointer to PMCH_InfoList from MBSFNAreaConfiguration Message (MCCH Message)
@param sib1_ext_r13 SI Scheduling information for SI-BR UEs
*/ */
int rrc_mac_config_req_eNB(module_id_t module_idP, int rrc_mac_config_req_eNB(module_id_t module_idP,
...@@ -772,8 +772,7 @@ int rrc_mac_config_req_eNB(module_id_t module_idP, ...@@ -772,8 +772,7 @@ int rrc_mac_config_req_eNB(module_id_t module_idP,
MeasGapConfig_t *measGapConfig, MeasGapConfig_t *measGapConfig,
TDD_Config_t *tdd_Config, TDD_Config_t *tdd_Config,
MobilityControlInfo_t *mobilityControlInfo, MobilityControlInfo_t *mobilityControlInfo,
uint8_t *SIwindowsize, SchedulingInfoList_t *schedulingInfoList,
uint16_t *SIperiod,
uint32_t ul_CarrierFreq, uint32_t ul_CarrierFreq,
long *ul_Bandwidth, long *ul_Bandwidth,
AdditionalSpectrumEmission_t *additionalSpectrumEmission, AdditionalSpectrumEmission_t *additionalSpectrumEmission,
...@@ -785,10 +784,9 @@ int rrc_mac_config_req_eNB(module_id_t module_idP, ...@@ -785,10 +784,9 @@ int rrc_mac_config_req_eNB(module_id_t module_idP,
PMCH_InfoList_r9_t *pmch_InfoList PMCH_InfoList_r9_t *pmch_InfoList
#endif #endif
#ifdef CBA #ifdef Rel14
, ,
uint8_t num_active_cba_groups, SystemInformationBlockType1_v1310_IEs_t *sib1_ext_r13
uint16_t cba_rnti
#endif #endif
); );
......
...@@ -462,6 +462,8 @@ typedef struct { ...@@ -462,6 +462,8 @@ typedef struct {
uint8_t *SIB23; uint8_t *SIB23;
uint8_t sizeof_SIB23; uint8_t sizeof_SIB23;
#ifdef Rel14 #ifdef Rel14
uint8_t *SIB1_BR;
uint8_t sizeof_SIB1_BR;
uint8_t *SIB23_BR; uint8_t *SIB23_BR;
uint8_t sizeof_SIB23_BR; uint8_t sizeof_SIB23_BR;
#endif #endif
...@@ -477,10 +479,12 @@ typedef struct { ...@@ -477,10 +479,12 @@ typedef struct {
// SystemInformation_t systemInformation; // SystemInformation_t systemInformation;
SystemInformationBlockType1_t *sib1; SystemInformationBlockType1_t *sib1;
SystemInformationBlockType2_t *sib2; SystemInformationBlockType2_t *sib2;
SystemInformationBlockType3_t *sib3;
#ifdef Rel14 #ifdef Rel14
SystemInformationBlockType1_t *sib1_BR;
SystemInformationBlockType2_t *sib2_BR; SystemInformationBlockType2_t *sib2_BR;
SystemInformationBlockType2_t *sib3_BR;
#endif #endif
SystemInformationBlockType3_t *sib3;
#if defined(Rel10) || defined(Rel14) #if defined(Rel10) || defined(Rel14)
SystemInformationBlockType13_r9_t *sib13; SystemInformationBlockType13_r9_t *sib13;
uint8_t MBMS_flag; uint8_t MBMS_flag;
...@@ -490,10 +494,6 @@ typedef struct { ...@@ -490,10 +494,6 @@ typedef struct {
MCCH_Message_t mcch; MCCH_Message_t mcch;
MBSFNAreaConfiguration_r9_t *mcch_message; MBSFNAreaConfiguration_r9_t *mcch_message;
SRB_INFO MCCH_MESS[8];// MAX_MBSFN_AREA SRB_INFO MCCH_MESS[8];// MAX_MBSFN_AREA
#endif
#ifdef CBA
uint8_t num_active_cba_groups;
uint16_t cba_rnti[NUM_MAX_CBA_GROUP];
#endif #endif
SRB_INFO SI; SRB_INFO SI;
SRB_INFO Srb0; SRB_INFO Srb0;
......
...@@ -133,6 +133,10 @@ init_SI( ...@@ -133,6 +133,10 @@ init_SI(
int i; int i;
#endif #endif
#ifdef Rel14
SystemInformationBlockType1_v1310_IEs_t *sib1_v13ext=(SystemInformationBlockType1_v1310_IEs_t *)NULL;
#endif
RC.rrc[ctxt_pP->module_id]->carrier[CC_id].MIB = (uint8_t*) malloc16(4); RC.rrc[ctxt_pP->module_id]->carrier[CC_id].MIB = (uint8_t*) malloc16(4);
// copy basic parameters // copy basic parameters
RC.rrc[ctxt_pP->module_id]->carrier[CC_id].physCellId = configuration->Nid_cell[CC_id]; RC.rrc[ctxt_pP->module_id]->carrier[CC_id].physCellId = configuration->Nid_cell[CC_id];
...@@ -263,6 +267,21 @@ init_SI( ...@@ -263,6 +267,21 @@ init_SI(
PROTOCOL_RRC_CTXT_FMT" RRC_UE --- MAC_CONFIG_REQ (SIB1.tdd & SIB2 params) ---> MAC_UE\n", PROTOCOL_RRC_CTXT_FMT" RRC_UE --- MAC_CONFIG_REQ (SIB1.tdd & SIB2 params) ---> MAC_UE\n",
PROTOCOL_RRC_CTXT_ARGS(ctxt_pP)); PROTOCOL_RRC_CTXT_ARGS(ctxt_pP));
#ifdef Rel14
if ((RC.rrc[ctxt_pP->module_id]->carrier[CC_id].mib.message.schedulingInfoSIB1_BR_r13>0) &&
(RC.rrc[ctxt_pP->module_id]->carrier[CC_id].sib1_BR!=NULL)) {
AssertFatal(RC.rrc[ctxt_pP->module_id]->carrier[CC_id].sib1_BR->nonCriticalExtension!=NULL,
"sib2_br->nonCriticalExtension is null (v9.2)\n");
AssertFatal(RC.rrc[ctxt_pP->module_id]->carrier[CC_id].sib1_BR->nonCriticalExtension->nonCriticalExtension!=NULL,
"sib2_br->nonCriticalExtension is null (v11.3)\n");
AssertFatal(RC.rrc[ctxt_pP->module_id]->carrier[CC_id].sib1_BR->nonCriticalExtension->nonCriticalExtension->nonCriticalExtension!=NULL,
"sib2_br->nonCriticalExtension is null (v12.5)\n");
AssertFatal(RC.rrc[ctxt_pP->module_id]->carrier[CC_id].sib1_BR->nonCriticalExtension->nonCriticalExtension->nonCriticalExtension->nonCriticalExtension!=NULL,
"sib2_br->nonCriticalExtension is null (v13.10)\n");
sib1_v13ext = RC.rrc[ctxt_pP->module_id]->carrier[CC_id].sib1_BR->nonCriticalExtension->nonCriticalExtension->nonCriticalExtension->nonCriticalExtension;
}
#endif
rrc_mac_config_req_eNB(ctxt_pP->module_id, CC_id, rrc_mac_config_req_eNB(ctxt_pP->module_id, CC_id,
RC.rrc[ctxt_pP->module_id]->carrier[CC_id].physCellId, RC.rrc[ctxt_pP->module_id]->carrier[CC_id].physCellId,
RC.rrc[ctxt_pP->module_id]->carrier[CC_id].p_eNB, RC.rrc[ctxt_pP->module_id]->carrier[CC_id].p_eNB,
...@@ -292,7 +311,7 @@ init_SI( ...@@ -292,7 +311,7 @@ init_SI(
(MeasGapConfig_t *) NULL, (MeasGapConfig_t *) NULL,
RC.rrc[ctxt_pP->module_id]->carrier[CC_id].sib1->tdd_Config, RC.rrc[ctxt_pP->module_id]->carrier[CC_id].sib1->tdd_Config,
NULL, NULL,
&SIwindowsize, &SIperiod, &RC.rrc[ctxt_pP->module_id]->carrier[CC_id].sib1->schedulingInfoList,
RC.rrc[ctxt_pP->module_id]->carrier[CC_id].ul_CarrierFreq, RC.rrc[ctxt_pP->module_id]->carrier[CC_id].ul_CarrierFreq,
RC.rrc[ctxt_pP->module_id]->carrier[CC_id].sib2->freqInfo.ul_Bandwidth, RC.rrc[ctxt_pP->module_id]->carrier[CC_id].sib2->freqInfo.ul_Bandwidth,
&RC.rrc[ctxt_pP->module_id]->carrier[CC_id].sib2->freqInfo.additionalSpectrumEmission, &RC.rrc[ctxt_pP->module_id]->carrier[CC_id].sib2->freqInfo.additionalSpectrumEmission,
...@@ -303,9 +322,9 @@ init_SI( ...@@ -303,9 +322,9 @@ init_SI(
(MBSFN_AreaInfoList_r9_t*) & RC.rrc[ctxt_pP->module_id]->carrier[CC_id].sib13->mbsfn_AreaInfoList_r9, (MBSFN_AreaInfoList_r9_t*) & RC.rrc[ctxt_pP->module_id]->carrier[CC_id].sib13->mbsfn_AreaInfoList_r9,
(PMCH_InfoList_r9_t *) NULL (PMCH_InfoList_r9_t *) NULL
#endif #endif
#ifdef CBA #ifdef Rel14
, 0, //RC.rrc[ctxt_pP->module_id]->num_active_cba_groups, ,
0 //RC.rrc[ctxt_pP->module_id]->cba_rnti[0] sib1_v13ext
#endif #endif
); );
} }
...@@ -386,15 +405,18 @@ init_MCCH( ...@@ -386,15 +405,18 @@ init_MCCH(
(struct LogicalChannelConfig *)NULL, (struct LogicalChannelConfig *)NULL,
(MeasGapConfig_t *) NULL, (MeasGapConfig_t *) NULL,
(TDD_Config_t *) NULL, (TDD_Config_t *) NULL,
NULL, (uint8_t *) NULL, (uint16_t *) NULL, 0, NULL, NULL, (MBSFN_SubframeConfigList_t *) NULL (MobilityControlInfo_t *)NULL,
(SchedulingInfoList_t *) NULL,
0, NULL, NULL, (MBSFN_SubframeConfigList_t *) NULL
#if defined(Rel10) || defined(Rel14) #if defined(Rel10) || defined(Rel14)
, ,
0, 0,
(MBSFN_AreaInfoList_r9_t *) NULL, (MBSFN_AreaInfoList_r9_t *) NULL,
(PMCH_InfoList_r9_t *) & (RC.rrc[enb_mod_idP]->carrier[CC_id].mcch_message->pmch_InfoList_r9) (PMCH_InfoList_r9_t *) & (RC.rrc[enb_mod_idP]->carrier[CC_id].mcch_message->pmch_InfoList_r9)
# endif # endif
# ifdef CBA # ifdef Rel14
, 0, 0 ,
(SystemInformationBlockType1_v1310_IEs_t *)NULL
# endif # endif
); );
...@@ -2748,8 +2770,7 @@ rrc_eNB_generate_RRCConnectionReconfiguration_handover( ...@@ -2748,8 +2770,7 @@ rrc_eNB_generate_RRCConnectionReconfiguration_handover(
ue_context_pP->ue_context.measGapConfig, ue_context_pP->ue_context.measGapConfig,
(TDD_Config_t*) NULL, (TDD_Config_t*) NULL,
(MobilityControlInfo_t*) NULL, (MobilityControlInfo_t*) NULL,
(uint8_t*) NULL, (SchedulingInfoList_t*) NULL,
(uint16_t*) NULL,
0, 0,
NULL, NULL,
NULL, NULL,
...@@ -2757,9 +2778,10 @@ rrc_eNB_generate_RRCConnectionReconfiguration_handover( ...@@ -2757,9 +2778,10 @@ rrc_eNB_generate_RRCConnectionReconfiguration_handover(
#if defined(Rel10) || defined(Rel14) #if defined(Rel10) || defined(Rel14)
, 0, (MBSFN_AreaInfoList_r9_t *) NULL, (PMCH_InfoList_r9_t *) NULL , 0, (MBSFN_AreaInfoList_r9_t *) NULL, (PMCH_InfoList_r9_t *) NULL
#endif #endif
#ifdef CBA # ifdef Rel14
, RC.rrc[ctxt_pP->module_id]->num_active_cba_groups, RC.rrc[ctxt_pP->module_id]->cba_rnti[0] ,
#endif (SystemInformationBlockType1_v1310_IEs_t *)NULL
# endif
); );
// Configure target eNB SRB2 // Configure target eNB SRB2
...@@ -3327,13 +3349,14 @@ rrc_eNB_generate_RRCConnectionReconfiguration_handover( ...@@ -3327,13 +3349,14 @@ rrc_eNB_generate_RRCConnectionReconfiguration_handover(
ue_context_pP->ue_context.measGapConfig, ue_context_pP->ue_context.measGapConfig,
(TDD_Config_t *) NULL, (TDD_Config_t *) NULL,
(MobilityControlInfo_t *) mobilityInfo, (MobilityControlInfo_t *) mobilityInfo,
(uint8_t *) NULL, (uint16_t *) NULL, 0, NULL, NULL, (MBSFN_SubframeConfigList_t *) NULL (SchedulingInfoList_t *) NULL, 0, NULL, NULL, (MBSFN_SubframeConfigList_t *) NULL
#if defined(Rel10) || defined(Rel14) #if defined(Rel10) || defined(Rel14)
, 0, (MBSFN_AreaInfoList_r9_t *) NULL, (PMCH_InfoList_r9_t *) NULL , 0, (MBSFN_AreaInfoList_r9_t *) NULL, (PMCH_InfoList_r9_t *) NULL
#endif #endif
#ifdef CBA # ifdef Rel14
, 0, 0 ,
#endif (SystemInformationBlockType1_v1310_IEs_t *)NULL
# endif
); );
/* /*
...@@ -3629,14 +3652,15 @@ rrc_eNB_process_RRCConnectionReconfigurationComplete( ...@@ -3629,14 +3652,15 @@ rrc_eNB_process_RRCConnectionReconfigurationComplete(
ue_context_pP->ue_context.measGapConfig, ue_context_pP->ue_context.measGapConfig,
(TDD_Config_t *) NULL, (TDD_Config_t *) NULL,
NULL, NULL,
(uint8_t *) NULL, (SchedulingInfoList_t *) NULL,
(uint16_t *) NULL, 0, NULL, NULL, (MBSFN_SubframeConfigList_t *) NULL 0, NULL, NULL, (MBSFN_SubframeConfigList_t *) NULL
#if defined(Rel10) || defined(Rel14) #if defined(Rel10) || defined(Rel14)
, 0, (MBSFN_AreaInfoList_r9_t *) NULL, (PMCH_InfoList_r9_t *) NULL , 0, (MBSFN_AreaInfoList_r9_t *) NULL, (PMCH_InfoList_r9_t *) NULL
#endif #endif
#ifdef CBA # ifdef Rel14
, RC.rrc[ctxt_pP->module_id]->num_active_cba_groups, RC.rrc[ctxt_pP->module_id]->cba_rnti[0] ,
#endif (SystemInformationBlockType1_v1310_IEs_t *)NULL
# endif
); );
} else { // remove LCHAN from MAC/PHY } else { // remove LCHAN from MAC/PHY
...@@ -3680,13 +3704,16 @@ rrc_eNB_process_RRCConnectionReconfigurationComplete( ...@@ -3680,13 +3704,16 @@ rrc_eNB_process_RRCConnectionReconfigurationComplete(
(LogicalChannelConfig_t *) NULL, (LogicalChannelConfig_t *) NULL,
(MeasGapConfig_t *) NULL, (MeasGapConfig_t *) NULL,
(TDD_Config_t *) NULL, (TDD_Config_t *) NULL,
NULL, (uint8_t *) NULL, (uint16_t *) NULL, 0, NULL, NULL, NULL NULL,
(SchedulingInfoList_t *) NULL,
0, NULL, NULL, NULL
#if defined(Rel10) || defined(Rel14) #if defined(Rel10) || defined(Rel14)
, 0, (MBSFN_AreaInfoList_r9_t *) NULL, (PMCH_InfoList_r9_t *) NULL , 0, (MBSFN_AreaInfoList_r9_t *) NULL, (PMCH_InfoList_r9_t *) NULL
#endif #endif
#ifdef CBA # ifdef Rel14
, 0, 0 ,
#endif (SystemInformationBlockType1_v1310_IEs_t *)NULL
# endif
); );
} }
} }
...@@ -3778,14 +3805,15 @@ rrc_eNB_generate_RRCConnectionSetup( ...@@ -3778,14 +3805,15 @@ rrc_eNB_generate_RRCConnectionSetup(
ue_context_pP->ue_context.measGapConfig, ue_context_pP->ue_context.measGapConfig,
(TDD_Config_t *) NULL, (TDD_Config_t *) NULL,
NULL, NULL,
(uint8_t *) NULL, (SchedulingInfoList_t *) NULL,
(uint16_t *) NULL, 0, NULL, NULL, (MBSFN_SubframeConfigList_t *) NULL 0, NULL, NULL, (MBSFN_SubframeConfigList_t *) NULL
#if defined(Rel10) || defined(Rel14) #if defined(Rel10) || defined(Rel14)
, 0, (MBSFN_AreaInfoList_r9_t *) NULL, (PMCH_InfoList_r9_t *) NULL , 0, (MBSFN_AreaInfoList_r9_t *) NULL, (PMCH_InfoList_r9_t *) NULL
#endif #endif
#ifdef CBA # ifdef Rel14
, 0, 0 ,
#endif (SystemInformationBlockType1_v1310_IEs_t *)NULL
# endif
); );
break; break;
} }
...@@ -3839,14 +3867,16 @@ openair_rrc_eNB_init( ...@@ -3839,14 +3867,16 @@ openair_rrc_eNB_init(
PROTOCOL_RRC_CTXT_ARGS(&ctxt)); PROTOCOL_RRC_CTXT_ARGS(&ctxt));
#if OCP_FRAMEWORK #if OCP_FRAMEWORK
while ( RC.rrc[enb_mod_idP] == NULL ) { while ( RC.rrc[enb_mod_idP] == NULL ) {
LOG_E(RRC, "RC.rrc not yet initialized, waiting 1 second\n"); LOG_E(RRC, "RC.rrc not yet initialized, waiting 1 second\n");
sleep(1); sleep(1);
} }
#endif #endif
AssertFatal(RC.rrc[enb_mod_idP] != NULL, "RC.rrc not initialized!"); AssertFatal(RC.rrc[enb_mod_idP] != NULL, "RC.rrc not initialized!");
AssertFatal(NUMBER_OF_UE_MAX < (module_id_t)0xFFFFFFFFFFFFFFFF, " variable overflow"); AssertFatal(NUMBER_OF_UE_MAX < (module_id_t)0xFFFFFFFFFFFFFFFF, " variable overflow");
#ifdef ENABLE_ITTI
AssertFatal(configuration!=NULL,"configuration input is null\n");
#endif
// for (j = 0; j < NUMBER_OF_UE_MAX; j++) // for (j = 0; j < NUMBER_OF_UE_MAX; j++)
// RC.rrc[ctxt.module_id].Info.UE[j].Status = RRC_IDLE; //CH_READY; // RC.rrc[ctxt.module_id].Info.UE[j].Status = RRC_IDLE; //CH_READY;
// //
...@@ -5050,7 +5080,7 @@ rrc_enb_task( ...@@ -5050,7 +5080,7 @@ rrc_enb_task(
/* Messages from eNB app */ /* Messages from eNB app */
case RRC_CONFIGURATION_REQ: case RRC_CONFIGURATION_REQ:
LOG_I(RRC, "[eNB %d] Received %s\n", instance, msg_name_p); LOG_I(RRC, "[eNB %d] Received %s : %p\n", instance, msg_name_p,&RRC_CONFIGURATION_REQ(msg_p));
openair_rrc_eNB_configuration(ENB_INSTANCE_TO_MODULE_ID(instance), &RRC_CONFIGURATION_REQ(msg_p)); openair_rrc_eNB_configuration(ENB_INSTANCE_TO_MODULE_ID(instance), &RRC_CONFIGURATION_REQ(msg_p));
break; break;
......
...@@ -1754,6 +1754,7 @@ void init_RU(const char *rf_config_file) { ...@@ -1754,6 +1754,7 @@ void init_RU(const char *rf_config_file) {
ru->fh_south_in = rx_rf; // local synchronous RF RX ru->fh_south_in = rx_rf; // local synchronous RF RX
ru->fh_south_out = tx_rf; // local synchronous RF TX ru->fh_south_out = tx_rf; // local synchronous RF TX
ru->start_rf = start_rf; // need to start the local RF interface ru->start_rf = start_rf; // need to start the local RF interface
printf("configuring RRU for ru_id %d (start_rf %p)\n",ru_id,start_rf);
ru->ifdevice.configure_rru = configure_rru; ru->ifdevice.configure_rru = configure_rru;
fill_rf_config(ru,rf_config_file); fill_rf_config(ru,rf_config_file);
......
...@@ -216,6 +216,10 @@ oai_shutdown (void); ...@@ -216,6 +216,10 @@ oai_shutdown (void);
void reset_opp_meas_oaisim (void); void reset_opp_meas_oaisim (void);
void wait_eNBs() {
return;
}
void void
help (void) help (void)
{ {
...@@ -1349,10 +1353,10 @@ main (int argc, char **argv) ...@@ -1349,10 +1353,10 @@ main (int argc, char **argv)
init_seed (set_seed); init_seed (set_seed);
init_devices ();
init_RU(NULL);
init_RU(NULL);
init_devices ();
// init_openair2 (); // init_openair2 ();
// init_openair0(); // init_openair0();
......
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