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ZhouShuya
OpenXG-RAN
Commits
d83c935e
Commit
d83c935e
authored
5 years ago
by
WANG Tsu-Han
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add trx write thread
parent
f8037ab6
dev
1
128-ues
256_QAM_demod
Fix_SA_SIB1
NCTU_OpinConnect_LDPC
NR-PHY-MAC-IF-multi-UE
NRPRACH_highSpeed_saankhya
NRUE_usedlschparallel
NR_10MHz
NR_CSI_reporting
NR_DCI_01
NR_DLUL_PF
NR_DLUL_PF_4UL
NR_DLUL_PF_rebased
NR_DL_MIMO
NR_DL_sched_fixes
NR_DL_scheduler
NR_FAPI_beamindex_SSB_RO
NR_FAPI_beamindex_SSB_RO_SEMPROJ
NR_FDD_FIX
NR_FR2_RA
NR_FR2_RRC_SSB
NR_FR2_initsync_fixes
NR_MAC_CE_GlobalEdge
NR_MAC_Multi_Rach_GlobalEdge
NR_MAC_Multi_Rach_GlobalEdge-old
NR_MAC_SSB
NR_MAC_SSB_RO_GlobalEdge
NR_MAC_SSB_RO_UE_IDCC
NR_MAC_SSB_RO_merge
NR_MAC_TCI_UCI_GlobalEdge
NR_MCS_BLER
NR_NGAP
NR_PUCCH_MultiUE
NR_RA_cleanup
NR_RA_updates
NR_RRCConfiguration_FR2
NR_RRCConfiguration_trx_thread
NR_RRC_PDCP
NR_RRC_X2AP_AMBR_Change_Global_edge
NR_RRC_X2AP_RemoveHardcodings_GlobalEdge
NR_RRC_config_simplified
NR_SA_F1AP_5GRECORDS
NR_SA_F1AP_5GRECORDS_lts
NR_SA_F1AP_RFSIMULATOR
NR_SA_F1AP_RFSIMULATOR2
NR_SA_F1AP_RFSIMULATOR2_SRB
NR_SA_F1AP_RFSIMULATOR3
NR_SA_F1AP_RFSIMULATOR3_tmp
NR_SA_F1AP_RFSIMULATOR3_wf
NR_SA_F1AP_RFSIMULATOR_w5GCN
NR_SA_F1AP_dev
NR_SA_NGAP_RRC
NR_SA_NGAP_RRC_wk42
NR_SA_itti_sim_wk48
NR_SA_itti_sim_wk48_hs
NR_SA_itti_sim_wk48_hs1
NR_SA_w5GCN_new_gtpu
NR_SCHED_HARQ
NR_SCHED_PDCCH_PUCCH_HARQ
NR_SCHED_PDCCH_PUCCH_HARQ_rebased
NR_SCHED_fixes
NR_SRB_Config
NR_UE_CONFIG_REQ_FIXES
NR_UE_MAC_scheduler
NR_UE_RA_fixes
NR_UE_SA
NR_UE_UL_DCI_improvements
NR_UE_dlsch_bugfix
NR_UE_enable_parallelization
NR_UE_stability_fixes
NR_UL_SCFDMA_100MHz
NR_UL_scheduler
NR_UL_scheduler_rebased
NR_UL_scheduling
NR_Wireshark
NR_beam_simulation
NR_cleanup_PUCCH_resources
NR_ipaccess_testing
NR_mac_uci_functions_rework
NR_msg2_phytest
NR_multiplexing_HARQ_CSI_PUCCH
NR_scheduling_CSIRS
NR_scheduling_request
NR_scheduling_request2
NR_scheduling_request3
NR_ue_dlsch_dmrs_cdm
PBCHNRTCFIX
PUSCH_TA_update
RA_CI_test
RFquality
Saankhya_NRPRACH_HighSpeed
UE_DL_DCI_hotfix
add-dmrs-test
bch-fixes-bitmap
benetel_5g_prach_fix
benetel_config_file_fix
benetel_driver_uldl_pf_merge
benetel_driver_update
benetel_fixes
benetel_phase_rotation
benetel_phase_rotation_old
bsr-fix
bugfix-free-ra-process
bugfix-minor-remove-wrong-log
bugfix-nr-bands
bugfix-nr-ldpc-post-processing
bugfix-nr-ldpc-size-typo
bugfix-nr-pdcp-sn-size
bugfix-nr-rate-matching-assertion
bugfix-nr-t-reordering
bugfix-x2-SgNBAdditionRequest
bugfix_gnb_rt_stats_html
bupt-sa-merge
cce_indexing_fix
cce_indexing_fix2
ci-deploy-asterix
ci-deploy-docker-compose
ci-new-docker-pipeline
ci-rd-july-improvements
ci-reduce-nb-vms
ci-test
ci-ul-iperf-from-trf-container
ci_benetel_test
ci_phytest
ci_quectel_support
ci_test_nsa_fix_quectel_nic
ci_test_ra_fr2
ci_vm_resource_fix
clean-5G-scope-round2
cleanup_softmodem_main
constant_power
detached-w16-test
develop
develop-CBRA-v3
develop-CCE
develop-NR_SA_F1AP_5GRECORDS
develop-NR_SA_F1AP_5GRECORDS-hs
develop-NR_SA_F1AP_5GRECORDS-v3
develop-SA-CBRA
develop-SA-CBRA-CUDU
develop-SA-CBRA-Msg5
develop-SA-CBRA-lts
develop-SA-CBRA-ulsch-lts
develop-SA-RA
develop-SnT
develop-oriecpriupdates
develop-sib1
develop-sib1-local
develop-sib1-lts
develop-sib1-update
develop-sib1-update-test1
develop-sib1-update-ue
develop_inria_ci_deployment
develop_stable
dfts_alternatives
disable_CSI_measrep
dlsch-all-dlslots
dlsch_encode_mthread
dlsch_parallel
docker-improvements-2021-april
docker-no-cache-option
dongzhanyi-zte-develop
dongzhanyi-zte-develop2
enhance-rfsim
episys-merge
episys/nsa_baseline
episys/nsa_development
feature/make-s1-mme-port-configurable
feature/make-s1-mme-port-configurable-with-astyle-fixes
fembms-enb-ue
fft_bench_hotfix
finalize-oaicn-integration
firas
fix-ci-tun
fix-itti-segv
fix-nr-pdcp-timer
fix-nr-rlc-range-nack
fix-physim-deploy
fix-quectel
fix-realtime
fix-softmodem-restart
fix-x2-without-gnb
fix_NR_DLUL_PF
fix_NR_DLUL_PF_benchmark
fix_coreset_dmrs_idx
fix_do_ra_data
fix_nr_ulsim
fix_pdsch_low_prb
fix_rb_corruption
fix_reestablishment
fix_rfsim_mimo
fix_rrc_x2_ticking
fixes-CE-RLC-PDU-size
fixes-mac-sched-nfapi
fixes-mac-sched-tun
fixes-tun
fixgtpu
flexran-apps
flexran-repair-mme-mgmt
fujitsu_lte_contribution
fujitsu_lte_contribution-128
git-dashboard
gnb-freerun-txru
gnb-n300-fixes
gnb-only-test
gnb-realtime-hotfix
gnb-realtime-quickfix
gnb-threadpool
hack-exit-gnb-when-no-enb-nsa
harq-hotfix
hotfix-minor-remove-nr-rlc-cppcheck-error
hotfix-nr-rlc-tick
hotfix-ocp-executable
improve_nr_modulation
improve_ue_stability
integ-w13-test-rt-issue
integration_2020_wk15
integration_2020_wk40
integration_2020_wk41
integration_2020_wk42_2
integration_2020_wk45
integration_2020_wk45_2
integration_2020_wk46
integration_2020_wk46_2
integration_2020_wk47
integration_2020_wk48
integration_2020_wk48_2
integration_2020_wk49
integration_2020_wk50
integration_2020_wk50_1
integration_2020_wk51
integration_2020_wk51_2
integration_2021_wk02
integration_2021_wk02_wMR988
integration_2021_wk04
integration_2021_wk05
integration_2021_wk06
integration_2021_wk06_MR978
integration_2021_wk06_b
integration_2021_wk06_c
integration_2021_wk08
integration_2021_wk08_2
integration_2021_wk08_MR963
integration_2021_wk09
integration_2021_wk09_b
integration_2021_wk10
integration_2021_wk10_b
integration_2021_wk11
integration_2021_wk12
integration_2021_wk12_b
integration_2021_wk13_a
integration_2021_wk13_b
integration_2021_wk13_b_fix_tdas
integration_2021_wk13_b_fixed
integration_2021_wk13_c
integration_2021_wk14_a
integration_2021_wk15_a
integration_2021_wk16
integration_2021_wk17_a
integration_2021_wk17_b
integration_2021_wk18_a
integration_2021_wk18_b
integration_2021_wk19
integration_w5GC_CBRA_test
inter-RRU-final
inter-RRU-oairu
inter-rru-UE
itti-enhancement
ldpc-decoder-codegen
ldpc-decoder-codegen2
ldpc-offload
ldpc_short_codeword_fixes
load_gnb
lte-ulsch-bugfix
lte_uplink_improvement
mac-fixes-wk45_2
migrate-cpp-check-container
minor-fix-doc-basic-sim
mosaic5g-oai-ran
mosaic5g-oai-sim
msg4_phy_0303_lfq
multiple_ssb_sib1_bugfix
nasmesh_kernel_5.8
new-gtpu
nfapi-bugfix
nfapi_nr_arch_mod
nfapi_nr_develop
nfapi_nr_develop_new
ngap-dlul
ngap-support
ngap-w48-merge2
ngap-wf
ngap-wf-1120
ngap-wf-1120-srb
ngap-wf-1120-srb-gtp
ngap-wf-1120-srb-gtp-hs
ngap-wf-1120-srb-gtp-hs1
ngap-wf-1120-srb-gtp-hs2
ngap-wf-1120-srb-gtp-yhz
ngap-wf-1203-yunsdr
ngap-wf-liuyu
ngap_lfq_1120
ngap_merge
noCore
nr-bsr-fix
nr-dl-mimo-2layer
nr-dmrs-fixes
nr-mac-pdu-wireshark
nr-mac-remove-ue-list
nr-pdcp-improvements
nr-pdcp-nea2-security
nr-pdcp-nia2-integrity
nr-pdcp-srb-integrity
nr-ra-fix
nr-rlc-am-bugfix-w44
nr-rlc-bugfix-w44
nr-stats-print
nrPBCHTCFix
nrPbchTcFix
nrUE
nrUE-hs
nrUE-upper-layer
nr_bsr
nr_dl_dmrs_type2
nr_dl_pf
nr_dl_pf2
nr_dl_ul_ptrs
nr_fdd_if_fix
nr_polar_decoder_improvement
nr_power_measurement_fixes
nr_prach_fr2
nr_ue_msg3
nr_ue_pdcp_fix
nr_ue_tti_cleanup
nr_ul_pf
nr_ul_scfdma
nrue_msg2_reception
nsa-ue
nsa_remove_band_hardcodings
oai-sim
oairu
oairu-dockerfile-support
oc-docker-october-improvements
openxg/develop
physim-build-deploy
physim-deploy-handle-error-cases
polar8
prb_based_dl_channel_estimation
ptrs_rrc_config
pusch-mthread-scaling-fix
pusch-retrans-fix-ue
ra-dl-ul
recursive-cmake
remove_nos1_hack_pdcp
remove_x2_gnb_hardcoding
repair-TA
revert_memcpy
rh-ci-add-ue-parallelization
rh_ci_add_runtime_stats
rh_ci_add_uldlharq_stats
rh_ci_fix_autoterminate
rh_ci_fr1_update
rh_ci_gsheet_rt_monitoring
rh_ci_nsa2jenkins
rh_ci_nsa_test_n310
rh_ci_oc
rh_ci_phy_test_improve
rh_ci_py
rh_ci_ra_fr2
rh_ci_rfsim_ra
rh_ci_test_benetel
rh_ci_test_nsa
rh_ci_test_nsa_wk16
rh_ci_test_nsa_wk17_b
rh_ci_test_nsa_wk17b
rh_ci_ue_parallel
rh_doc_update_3
rh_fr1_newjenkins
rh_fr1_update
rh_gnb_compile_fix
rh_wk50_debug
rlc-v2-bugfix-status-reporting
rlc-v2-tick
rohan_ulsim2RxFix
rrc-enb-phy-testmode
s1-subnormal_rewrite
s1_subnormal
s1_subnormal-robert
s1ap-bugfix-rab_setup
sa-demo
sa-demo-hs
sa-merge-rrc-srb
sa-msg4
sa-msg4-rrc
sa-msg4-rrc-yihz
sa-msg4-rrc-yihz-hs
sa_rrc_yihz
sanitize-address
sanitize-v1
sanitize-v1-tmp
sarma_pvnp_oai
sim-channels
small-bugfixes-w40
small-config-change
small_nr_bugfixes
smallcleanup
t-gnb-tracer
test-panos
test_nsa_gtpu_fix
test_rt-fix_phy-test
testing_with_external_txdata
tp-ota-test
trx_thread_param
trx_write_thread
ue-csi
ue-dci-false-detection
ue-fixes
ue-fixes-ota
ue-pdsch-pusch-parallel
ue-race-fix
ue_beam_selection
ul-freq-iq-samps-to-file
ul_dl_dci_same_slot
ul_harq
ulsch_decode_mthread
ulsim_changes
usrp_stop_cleanly
usrp_x400
wf-sa-rrc
wireshark-T-hack-ueid
wireshark-log-scheduling-requests
wk11-with-phytest
x2-endc-processing
xiangwab
xiangwan
xw2
yihongzheng_srb
zzs
2021.wk14_a
2021.wk13_d
2021.wk13_c
2021.w18_b
2021.w18_a
2021.w17_b
2021.w16
2021.w15
2021.w14
2021.w13_a
2021.w12
2021.w11
2021.w10
2021.w09
2021.w08
2021.w06
2021.w05
2021.w04
2021.w02
2020.w51_2
2020.w51
2020.w50
2020.w49
2020.w48_2
2020.w48
2020.w47
2020.w46_2
2020.w46
2020.w45_2
2020.w45
2020.w44
2020.w42_2
2020.w42
2020.w41
2020.w39
2020.w38
2020.w37
2020.w36
2020.w34
2020.w33
2020.w31
2020.w30
2020.w29
2020.w28
2020.w26
2020.w25
2020.w24
2020.w23
2020.w22
benetel_phase_rotation
benetel_gnb_rel_2.0
benetel_gnb_rel_1.0
benetel_enb_rel_2.0
benetel_enb_rel_1.0
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Changes
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3 changed files
with
161 additions
and
35 deletions
+161
-35
executables/nr-ru.c
executables/nr-ru.c
+6
-0
targets/ARCH/COMMON/common_lib.h
targets/ARCH/COMMON/common_lib.h
+36
-0
targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
+119
-35
No files found.
executables/nr-ru.c
View file @
d83c935e
...
...
@@ -1444,6 +1444,9 @@ static void *ru_thread( void *param ) {
// if this is a slave RRU, try to synchronize on the DL frequency
if
((
ru
->
is_slave
)
&&
(
ru
->
if_south
==
LOCAL_RF
))
do_ru_synch
(
ru
);
// start trx write thread
start_write_thread
(
ru
);
}
pthread_mutex_lock
(
&
proc
->
mutex_FH1
);
...
...
@@ -1651,6 +1654,9 @@ int stop_rf(RU_t *ru) {
return
0
;
}
int
start_write_thread
(
RU_t
*
ru
)
{
return
(
ru
->
rfdevice
.
trx_write_init
(
&
ru
->
rfdevice
));
}
void
init_RU_proc
(
RU_t
*
ru
)
{
int
i
=
0
;
...
...
This diff is collapsed.
Click to expand it.
targets/ARCH/COMMON/common_lib.h
View file @
d83c935e
...
...
@@ -276,8 +276,38 @@ typedef struct {
void
*
rx
;
}
if_buffer_t
;
typedef
struct
{
openair0_timestamp
timestamp
;
void
**
buff
;
// buffer to be write;
int
nsamps
;
int
cc
;
signed
char
first_packet
;
signed
char
last_packet
;
}
openair0_write_package_t
;
typedef
struct
{
openair0_write_package_t
write_package
[
10
];
/// write package number
int
num_package
;
int
start
;
int
end
;
/// \internal This variable is protected by \ref mutex_write
int
instance_cnt_write
;
/// pthread struct for trx write thread
pthread_t
pthread_write
;
/// pthread attributes for trx write thread
pthread_attr_t
attr_write
;
/// condition varible for trx write thread
pthread_cond_t
cond_write
;
/// mutex for trx write thread
pthread_mutex_t
mutex_write
;
}
openair0_thread_t
;
/*!\brief structure holds the parameters to configure USRP devices */
struct
openair0_device_t
{
/*!tx write thread*/
openair0_thread_t
write_thread
;
/*!brief Module ID of this device */
int
Mod_id
;
...
...
@@ -400,6 +430,12 @@ struct openair0_device_t {
* \param arg pointer to capabilities or configuration
*/
void
(
*
configure_rru
)(
int
idx
,
void
*
arg
);
/*! \brief RRU Configuration callback
* \param idx RU index
* \param arg pointer to capabilities or configuration
*/
int
(
*
trx_write_init
)(
openair0_device
*
device
);
};
/* type of device init function, implemented in shared lib */
...
...
This diff is collapsed.
Click to expand it.
targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
View file @
d83c935e
...
...
@@ -406,37 +406,9 @@ static int trx_usrp_write_recplay(openair0_device *device, openair0_timestamp ti
*/
static
int
trx_usrp_write
(
openair0_device
*
device
,
openair0_timestamp
timestamp
,
void
**
buff
,
int
nsamps
,
int
cc
,
int
flags
)
{
int
ret
=
0
;
usrp_state_t
*
s
=
(
usrp_state_t
*
)
device
->
priv
;
int
nsamps2
;
// aligned to upper 32 or 16 byte boundary
#if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__
nsamps2
=
(
nsamps
+
7
)
>>
3
;
__m256i
buff_tx
[
8
][
nsamps2
];
#else
nsamps2
=
(
nsamps
+
3
)
>>
2
;
__m128i
buff_tx
[
8
][
nsamps2
];
#endif
#elif defined(__arm__)
nsamps2
=
(
nsamps
+
3
)
>>
2
;
int16x8_t
buff_tx
[
8
][
nsamps2
];
#else
#error Unsupported CPU architecture, USRP device cannot be built
#endif
// bring RX data into 12 LSBs for softmodem RX
for
(
int
i
=
0
;
i
<
cc
;
i
++
)
{
for
(
int
j
=
0
;
j
<
nsamps2
;
j
++
)
{
#if defined(__x86_64__) || defined(__i386__)
#ifdef __AVX2__
buff_tx
[
i
][
j
]
=
_mm256_slli_epi16
(((
__m256i
*
)
buff
[
i
])[
j
],
4
);
#else
buff_tx
[
i
][
j
]
=
_mm_slli_epi16
(((
__m128i
*
)
buff
[
i
])[
j
],
4
);
#endif
#elif defined(__arm__)
buff_tx
[
i
][
j
]
=
vshlq_n_s16
(((
int16x8_t
*
)
buff
[
i
])[
j
],
4
);
#endif
}
}
int
end
;
openair0_thread_t
*
write_thread
=
&
device
->
write_thread
;
openair0_write_package_t
*
write_package
=
write_thread
->
write_package
;
boolean_t
first_packet_state
=
false
,
last_packet_state
=
false
;
...
...
@@ -469,9 +441,98 @@ static int trx_usrp_write(openair0_device *device, openair0_timestamp timestamp,
last_packet_state
=
true
;
}
pthread_mutex_lock
(
&
write_thread
->
mutex_write
);
write_thread
->
end
=
(
write_thread
->
end
+
1
)
%
write_thread
->
num_package
;
end
=
write_thread
->
end
;
write_package
[
end
].
timestamp
=
timestamp
;
write_package
[
end
].
nsamps
=
nsamps
;
write_package
[
end
].
cc
=
cc
;
write_package
[
end
].
first_packet
=
first_packet_state
;
write_package
[
end
].
last_packet
=
last_packet_state
;
write_package
[
end
].
buff
=
buff
;
write_thread
->
instance_cnt_write
=
0
;
pthread_cond_signal
(
&
write_thread
->
cond_write
);
printf
(
"trx_usrp_write signal end
\n
"
);
pthread_mutex_unlock
(
&
write_thread
->
mutex_write
);
return
ret
;
}
//-----------------------start--------------------------
/*! \brief Called to send samples to the USRP RF target
@param device pointer to the device structure specific to the RF hardware target
@param timestamp The timestamp at which the first sample MUST be sent
@param buff Buffer which holds the samples
@param nsamps number of samples to be sent
@param antenna_id index of the antenna if the device has multiple antennas
@param flags flags must be set to TRUE if timestamp parameter needs to be applied
*/
void
*
trx_usrp_write_thread
(
void
*
arg
){
int
ret
=
0
;
openair0_device
*
device
=
(
openair0_device
*
)
arg
;
openair0_thread_t
*
write_thread
=
&
device
->
write_thread
;
openair0_write_package_t
*
write_package
=
write_thread
->
write_package
;
while
(
1
){
pthread_mutex_lock
(
&
write_thread
->
mutex_write
);
printf
(
"waiting for signal
\n
"
);
while
(
write_thread
->
instance_cnt_write
<
0
)
{
pthread_cond_wait
(
&
write_thread
->
cond_write
,
&
write_thread
->
mutex_write
);
// this unlocks mutex_rxtx while waiting and then locks it again
}
printf
(
"signal unlock
\n
"
);
int
start
=
write_thread
->
start
;
printf
(
"start = %d, end = %d
\n
"
,
start
,
write_thread
->
end
);
openair0_timestamp
timestamp
=
write_package
[
start
].
timestamp
;
void
**
buff
=
write_package
[
start
].
buff
;
int
nsamps
=
write_package
[
start
].
nsamps
;
int
cc
=
write_package
[
start
].
cc
;
bool
first_packet
=
write_package
[
start
].
first_packet
;
bool
last_packet
=
write_package
[
start
].
last_packet
;
if
(
write_thread
->
end
==
(
write_thread
->
start
+
1
)
%
write_thread
->
num_package
){
write_thread
->
instance_cnt_write
=
-
1
;
}
write_thread
->
start
=
(
write_thread
->
start
+
1
)
%
write_thread
->
num_package
;
pthread_mutex_unlock
(
&
write_thread
->
mutex_write
);
printf
(
"end of write thread signal getting
\n
"
);
usrp_state_t
*
s
=
(
usrp_state_t
*
)
device
->
priv
;
int
nsamps2
;
// aligned to upper 32 or 16 byte boundary
#if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__
nsamps2
=
(
nsamps
+
7
)
>>
3
;
__m256i
buff_tx
[
8
][
nsamps2
];
#else
nsamps2
=
(
nsamps
+
3
)
>>
2
;
__m128i
buff_tx
[
8
][
nsamps2
];
#endif
#elif defined(__arm__)
nsamps2
=
(
nsamps
+
3
)
>>
2
;
int16x8_t
buff_tx
[
8
][
nsamps2
];
#else
#error Unsupported CPU architecture, USRP device cannot be built
#endif
// bring RX data into 12 LSBs for softmodem RX
for
(
int
i
=
0
;
i
<
cc
;
i
++
)
{
for
(
int
j
=
0
;
j
<
nsamps2
;
j
++
)
{
#if defined(__x86_64__) || defined(__i386__)
#ifdef __AVX2__
buff_tx
[
i
][
j
]
=
_mm256_slli_epi16
(((
__m256i
*
)
buff
[
i
])[
j
],
4
);
#else
buff_tx
[
i
][
j
]
=
_mm_slli_epi16
(((
__m128i
*
)
buff
[
i
])[
j
],
4
);
#endif
#elif defined(__arm__)
buff_tx
[
i
][
j
]
=
vshlq_n_s16
(((
int16x8_t
*
)
buff
[
i
])[
j
],
4
);
#endif
}
}
s
->
tx_md
.
has_time_spec
=
true
;
s
->
tx_md
.
start_of_burst
=
(
s
->
tx_count
==
0
)
?
true
:
first_packet
_state
;
s
->
tx_md
.
end_of_burst
=
last_packet
_state
;
s
->
tx_md
.
start_of_burst
=
(
s
->
tx_count
==
0
)
?
true
:
first_packet
;
s
->
tx_md
.
end_of_burst
=
last_packet
;
s
->
tx_md
.
time_spec
=
uhd
::
time_spec_t
::
from_ticks
(
timestamp
,
s
->
sample_rate
);
s
->
tx_count
++
;
...
...
@@ -485,9 +546,31 @@ static int trx_usrp_write(openair0_device *device, openair0_timestamp timestamp,
}
else
ret
=
(
int
)
s
->
tx_stream
->
send
(
&
(((
int16_t
*
)
buff_tx
[
0
])[
0
]),
nsamps
,
s
->
tx_md
);
if
(
ret
!=
nsamps
)
LOG_E
(
HW
,
"[xmit] tx samples %d != %d
\n
"
,
ret
,
nsamps
);
return
ret
;
if
(
0
)
break
;
}
return
NULL
;
}
int
trx_write_init
(
openair0_device
*
device
){
uhd
::
set_thread_priority_safe
(
1.0
);
openair0_thread_t
*
write_thread
=
&
device
->
write_thread
;
printf
(
"initializing tx write thread
\n
"
);
write_thread
->
num_package
=
10
;
write_thread
->
start
=
0
;
write_thread
->
end
=
0
;
write_thread
->
instance_cnt_write
=
-
1
;
printf
(
"end of tx write thread
\n
"
);
pthread_create
(
&
write_thread
->
pthread_write
,
NULL
,
trx_usrp_write_thread
,(
void
*
)
device
);
return
(
0
);
}
//---------------------end-------------------------
/*! \brief Receive samples from iq file.
* Read \ref nsamps samples from each channel to buffers. buff[0] is the array for
* the first channel. *ptimestamp is the time at which the first sample
...
...
@@ -917,6 +1000,7 @@ extern "C" {
device
->
trx_stop_func
=
trx_usrp_stop
;
device
->
trx_set_freq_func
=
trx_usrp_set_freq
;
device
->
trx_set_gains_func
=
trx_usrp_set_gains
;
device
->
trx_write_init
=
trx_write_init
;
if
(
s
->
recplay_mode
==
RECPLAY_REPLAYMODE
)
{
// Replay subframes from from file
...
...
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