Commit ed1714aa authored by Cedric Roux's avatar Cedric Roux

minor: fix spacing

parent 79b7b8ad
dev 1 128-ues 256_QAM_demod 2cw_fairRRscd 340-fix-beamforming-for-multiple-antenna 375-syrtem-sdr-platform 383-ulsch-scheduler-optimization 401-bug-related-to-nr-pucch-format-2-generator 408-reworked 408-ue-main-threads 445-LDPC-implementation-on-GPU 459-pusch-based-ta-updates 464-ru_beamforming_in_gpu 464-ru_beamforming_in_gpu-CPUsubfunction 472-add-pusch-dmrs-modes 481-ldpc-decoder-on-gpu 5g_fapi_scf Fix_SA_SIB1 LTE-sidelink LTE_TRX_on_single_port NCTU_CS_ISIP NCTU_CS_ISIP_CPU NCTU_CS_ISIP_GPU NCTU_OpinConnect_LDPC NR-PHY-MAC-IF-multi-UE NRPRACH_highSpeed_saankhya NRUE_usedlschparallel NR_10MHz NR_CSI_reporting NR_DCI_01 NR_DLUL_PF NR_DLUL_PF_4UL NR_DLUL_PF_rebased NR_DL_MIMO NR_DL_sched_fixes NR_DL_scheduler NR_FAPI_beamindex_SSB_RO NR_FAPI_beamindex_SSB_RO_SEMPROJ NR_FDD_FIX NR_FR2_RA NR_FR2_RRC_SSB NR_FR2_initsync_fixes NR_MAC_CE_GlobalEdge NR_MAC_Multi_Rach_GlobalEdge NR_MAC_Multi_Rach_GlobalEdge-old NR_MAC_SSB NR_MAC_SSB_RO_GlobalEdge NR_MAC_SSB_RO_UE_IDCC NR_MAC_SSB_RO_merge NR_MAC_TCI_UCI_GlobalEdge NR_MCS_BLER NR_NGAP NR_PDCP_noS1 NR_PUCCH_MultiUE NR_RA_cleanup NR_RA_updates NR_RRCConfiguragion_FR2 NR_RRCConfiguration NR_RRCConfiguration_FR2 NR_RRCConfiguration_S1U NR_RRCConfiguration_merge_develop NR_RRCConfiguration_sync_source NR_RRCConfiguration_trx_thread NR_RRC_CP_bugfix NR_RRC_PDCP NR_RRC_PRACH_procedures NR_RRC_PRACH_procedures_todevelop NR_RRC_PUSCH NR_RRC_TA NR_RRC_X2AP_AMBR_Change_Global_edge NR_RRC_X2AP_RemoveHardcodings_GlobalEdge NR_RRC_config_simplified NR_RRC_harq NR_RRC_harq_b NR_RRC_harq_hacks NR_RRC_harq_newdcipdu NR_SA_F1AP_5GRECORDS NR_SA_F1AP_5GRECORDS_lts NR_SA_F1AP_RFSIMULATOR NR_SA_F1AP_RFSIMULATOR2 NR_SA_F1AP_RFSIMULATOR2_SRB NR_SA_F1AP_RFSIMULATOR3 NR_SA_F1AP_RFSIMULATOR3_tmp NR_SA_F1AP_RFSIMULATOR3_wf NR_SA_F1AP_RFSIMULATOR_w5GCN NR_SA_F1AP_dev NR_SA_NGAP_RRC NR_SA_NGAP_RRC_wk42 NR_SA_itti_sim_wk48 NR_SA_itti_sim_wk48_hs NR_SA_itti_sim_wk48_hs1 NR_SA_w5GCN_new_gtpu NR_SCHED NR_SCHED_HARQ NR_SCHED_PDCCH_PUCCH_HARQ NR_SCHED_PDCCH_PUCCH_HARQ_rebased NR_SCHED_fixes NR_SRB_Config NR_TRX_on_single_port NR_TRX_on_single_port2 NR_UE_CONFIG_REQ_FIXES NR_UE_MAC_scheduler NR_UE_RA_fixes NR_UE_SA NR_UE_UL_DCI_improvements NR_UE_dlsch_bugfix NR_UE_enable_parallelization NR_UE_stability_fixes NR_UL_FAPI_programming NR_UL_SCFDMA_100MHz NR_UL_scheduler NR_UL_scheduler_rebased NR_UL_scheduling NR_Wireshark NR_beam_simulation NR_beamforming_test NR_cleanup_PUCCH_resources NR_gNB_SCF_Indication NR_ipaccess_testing NR_mac_uci_functions_rework NR_msg2_phytest NR_multiplexing_HARQ_CSI_PUCCH NR_scheduling_CSIRS NR_scheduling_request NR_scheduling_request2 NR_scheduling_request3 NR_test_S1U_RRC_PRACH_procedures NR_ue_dlsch_dmrs_cdm New-Merge-sidelink-develop OpInConnect_ISIP PBCHNRTCFIX PUSCH_TA_update RA_CI_test RFquality Saankhya_NRPRACH_HighSpeed UE_DL_DCI_hotfix UpdateRANRemoteUEReport add-dmrs-test add_iris_hw addoptions_nr_USRPdevice bch-fixes-bitmap benetel_5g_prach_fix benetel_config_file_fix benetel_driver_uldl_pf_merge benetel_driver_update benetel_fixes benetel_phase_rotation benetel_phase_rotation_old block_mmse_receiver_with_whitenning bsr-fix bugfix-find-uci bugfix-free-ra-process bugfix-minor-remove-wrong-log bugfix-nr-bands bugfix-nr-ldpc-post-processing bugfix-nr-ldpc-size-typo bugfix-nr-pdcp-sn-size bugfix-nr-rate-matching-assertion bugfix-nr-t-reordering bugfix-x2-SgNBAdditionRequest bugfix_gnb_rt_stats_html bupt-sa-merge cce_indexing_fix cce_indexing_fix2 ci-deploy-asterix ci-deploy-docker-compose ci-new-docker-pipeline ci-rd-july-improvements ci-reduce-nb-vms ci-test ci-ul-iperf-from-trf-container ci-yacine ci_benetel_test ci_phytest ci_quectel_support ci_test_nsa_fix_quectel_nic ci_test_ra_fr2 ci_vm_resource_fix clean-5G-scope-round2 cleanup_softmodem_main constant_power container_fix container_v1.2.2 debug_branch_init_sync detached-w16-test develop develop-CBRA-v3 develop-CCE develop-FeMBMS develop-NR_SA_F1AP_5GRECORDS develop-NR_SA_F1AP_5GRECORDS-hs develop-NR_SA_F1AP_5GRECORDS-v3 develop-SA-CBRA develop-SA-CBRA-CUDU develop-SA-CBRA-Msg5 develop-SA-CBRA-lts develop-SA-CBRA-ulsch-lts develop-SA-RA develop-SnT develop-aarch64build develop-ci develop-ci-fju develop-large-scale-emulations develop-m2ap develop-multi-RRUs develop-nb-iot-merge develop-nb-iot-merge-w-conflicts develop-nb-iot-ntust develop-nr develop-nr-adding-2018-09-asn1 develop-nr-fr2 develop-nr-fr2-rework develop-nr_cppcheck develop-oriecpriupdates develop-sib1 develop-sib1-local develop-sib1-lts develop-sib1-update develop-sib1-update-test1 develop-sib1-update-ue develop-vco3 develop_ci develop_inria_ci_deployment develop_inria_ci_deployment_gp develop_inria_ci_deployment_gp_b4merge develop_integration_2019_w44 develop_integration_2020_w15 develop_integration_2020_w19 develop_integration_w08 develop_jenkins_replay develop_stable dfts_alternatives disable_CSI_measrep dlsch-all-dlslots dlsch_encode_mthread dlsch_parallel dlsim-autotests docker-improvements-2021-april docker-no-cache-option documentation docupdate_tools dongzhanyi-zte-0001 dongzhanyi-zte-develop dongzhanyi-zte-develop2 dreibh/apt-auth-fix dreibh/device-load-fix dreibh/device-load-fix-develop-branch dreibh/doxygen-fix dual-connectivity dummy edrx enhance-rfsim episys-merge episys/nsa_baseline episys/nsa_development extend_sharedlibusage extend_sharedlibusage2 fapi_for_dmrs_and_ptrs feat-mac-sock feature-247-tm89 feature-247-tm89-fixes feature-247-tm89-rebased feature-368-channel-simulator feature-4g-sched feature-flexran-cm-s1ap feature-nr-4g-nfapi-modifications feature-pdcp-task feature-send-rrc-message-for-wireshark-logging feature-support-clang-format feature/make-s1-mme-port-configurable feature/make-s1-mme-port-configurable-with-astyle-fixes feature_tm3 fembms-enb-ue fft_bench_hotfix finalize-oaicn-integration firas fix-ci-tun fix-clock-source fix-dirty-ue-same-machine fix-itti fix-itti-segv fix-l2-sim fix-limeSDR-compile fix-nr-pdcp-timer fix-nr-rlc-range-nack fix-physim-deploy fix-quectel fix-realtime fix-segfault-flexran-isolated fix-softmodem-restart fix-warnings fix-x2-without-gnb fix_NR_DLUL_PF fix_NR_DLUL_PF_benchmark fix_coreset_dmrs_idx fix_do_ra_data fix_nr_ulsim fix_pdsch_low_prb fix_rb_corruption fix_reestablishment fix_rfsim_mimo fix_rrc_x2_ticking fixes-CE-RLC-PDU-size fixes-mac-sched-nfapi fixes-mac-sched-tun fixes-tun fixgtpu flexran-apps flexran-improvements flexran-repair-mme-mgmt flexran-report-split fr2-hw-test fujitsu_lte_contribution fujitsu_lte_contribution-128 gNB-nrUE-USRP gNB_mwc18_integration generate_push_ptrs git-dashboard gnb-freerun-txru gnb-n300-fixes gnb-only-test gnb-realtime-hotfix gnb-realtime-quickfix gnb-threadpool hack-exit-gnb-when-no-enb-nsa harq-hotfix hotfix-minor-remove-nr-rlc-cppcheck-error hotfix-nr-rlc-tick hotfix-ocp-executable hotfix-ue-musim-compilation hotfix_usrp_lib improve_build_nr_lte_merge improve_nr_modulation improve_ue_stability initial-nfapi-PNF-fixes integ-w13-test-rt-issue integration-develop-nr-2019w45 integration_2020_wk15 integration_2020_wk40 integration_2020_wk41 integration_2020_wk42_2 integration_2020_wk45 integration_2020_wk45_2 integration_2020_wk46 integration_2020_wk46_2 integration_2020_wk47 integration_2020_wk48 integration_2020_wk48_2 integration_2020_wk49 integration_2020_wk50 integration_2020_wk50_1 integration_2020_wk51 integration_2020_wk51_2 integration_2021_wk02 integration_2021_wk02_wMR988 integration_2021_wk04 integration_2021_wk05 integration_2021_wk06 integration_2021_wk06_MR978 integration_2021_wk06_b integration_2021_wk06_c integration_2021_wk08 integration_2021_wk08_2 integration_2021_wk08_MR963 integration_2021_wk09 integration_2021_wk09_b integration_2021_wk10 integration_2021_wk10_b integration_2021_wk11 integration_2021_wk12 integration_2021_wk12_b integration_2021_wk13_a integration_2021_wk13_b integration_2021_wk13_b_fix_tdas integration_2021_wk13_b_fixed integration_2021_wk13_c integration_2021_wk14_a integration_2021_wk15_a integration_2021_wk16 integration_2021_wk17_a integration_2021_wk17_b integration_2021_wk18_a integration_2021_wk18_b integration_2021_wk19 integration_w5GC_CBRA_test inter-RRU inter-RRU-final inter-RRU-nr inter-RRU-oairu inter-rru-UE interoperability-test isip_nr issue271_simulator issue392-simplify-s1-nos1step2_01 issue416_nfapicleanup issue_345_l2_fapi_simulator itti-enhancement l2-fixes ldpc-dec-layering ldpc-decoder-codegen ldpc-decoder-codegen2 ldpc-decoder-improvements ldpc-offload ldpc_short_codeword_fixes load_gnb lte-m-ue_type lte-ulsch-bugfix lte_uplink_improvement mac-fixes-wk45_2 mac-monitoring main_python master mbms-fix-develop-nr merging-2019-w51-to-develop-nr mex_mmse_receiver migrate-cpp-check-container minor-fix-doc-basic-sim modify_fairRRscd_parallel mosaic5g-oai-ran mosaic5g-oai-sim msg4_phy_0303_lfq mu_allocate multi-L1 multi-RRUs multiple_ssb_sib1_bugfix nasmesh_kernel_5.8 new-gtpu new_nos1 new_pdcp new_rlc new_rlc_2020 new_rlc_in_mbms nfapi-L2-emulator nfapi-bugfix nfapi_improvement nfapi_nr_arch_mod nfapi_nr_develop nfapi_nr_develop_new ngap-dlul ngap-support ngap-w48-merge2 ngap-wf ngap-wf-1120 ngap-wf-1120-srb ngap-wf-1120-srb-gtp ngap-wf-1120-srb-gtp-hs ngap-wf-1120-srb-gtp-hs1 ngap-wf-1120-srb-gtp-hs2 ngap-wf-1120-srb-gtp-yhz ngap-wf-1203-yunsdr ngap-wf-liuyu ngap_lfq_1120 ngap_merge noCore nr-bsr-fix nr-coreset-bug-fix nr-dl-mimo-2layer nr-dlsch-multi-thread nr-dlsch-thread nr-dmrs-fixes nr-dual-connectivity nr-interdigital-test nr-ip-uplink-noS1 nr-mac-pdu-wireshark nr-mac-remove-ue-list nr-multiple-ssb nr-pdcp nr-pdcp-improvements nr-pdcp-nea2-security nr-pdcp-nia2-integrity nr-pdcp-srb-integrity nr-pdsch-extraction-bugfix nr-physim-update nr-ra-fix nr-rlc-am-bugfix-w44 nr-rlc-bugfix-w44 nr-ssb-measurements nr-stats-print nr-timing-measurement nr-timing-measurement-merge nr-ue-buffer-status nr-ue-slot-based nr-uldci nrPBCHTCFix nrPbchTcFix nrUE nrUE-hs nrUE-upper-layer nr_beamforming nr_bsr nr_ci_dlsim nr_csi_newbranch nr_dci_procedures nr_demo_wsa2019 nr_dl_dmrs_type2 nr_dl_pf nr_dl_pf2 nr_dl_ul_ptrs nr_dlsch_parallel_measurements nr_dlsim_plot nr_fapi_for_push_tmp nr_fdd_if_fix nr_fix_easycppcheck nr_flexible_NRBDL nr_improve_build_procedures nr_increase_tp nr_mib_vsa_test nr_pdcch_testing nr_pdcch_updates nr_pdsch_integration nr_polar_decoder_improvement nr_power_measurement_fixes nr_prach nr_prach_fr2 nr_pucch nr_pucch2 nr_segmentation_fixes nr_sim_fix nr_tdd_configuration nr_ue_msg3 nr_ue_pdcp_fix nr_ue_tti_cleanup nr_ul_pf nr_ul_scfdma nr_vcd nrue-multi-thread nrue_msg2_reception nsa-ue nsa_remove_band_hardcodings oai-sim oai-ubuntu-docker oai-ubuntu-docker-for-lmssdr oairu oairu-dockerfile-support oc-docker-october-improvements ocp_simulator openxg/develop pdcp-benchmark pdsch-ch-est physim-build-deploy physim-deploy-handle-error-cases polar8 prb_based_dl_channel_estimation preprocessor_refactor-2 ptrs_rrc_config pusch-mthread-scaling-fix pusch-retrans-fix-ue ra-dl-ul rau_rru_reciprocity_measurements recode_itti_from_scratch recursive-cmake reduce_memory_footprint release_v1_2_0_candidate remove-ci-workaround remove_nos1_hack_pdcp remove_x2_gnb_hardcoding repair-TA revert-f5c94279 revert-itti revert_memcpy rh-ci-add-ue-parallelization rh_ci_add_runtime_stats rh_ci_add_uldlharq_stats rh_ci_fix_autoterminate rh_ci_fr1_update rh_ci_gsheet_rt_monitoring rh_ci_nsa2jenkins rh_ci_nsa_test_n310 rh_ci_oc rh_ci_phy_test_improve rh_ci_py rh_ci_ra_fr2 rh_ci_rfsim_ra rh_ci_test_benetel rh_ci_test_nsa rh_ci_test_nsa_wk16 rh_ci_test_nsa_wk17_b rh_ci_test_nsa_wk17b rh_ci_ue_parallel rh_doc_update_3 rh_fr1_newjenkins rh_fr1_update rh_gnb_compile_fix rh_wk50_debug rhel77-build rlc-v2-bugfix-status-reporting rlc-v2-tick rlc_v2_coverity_fixes rohan_ulsim2RxFix rrc-enb-phy-testmode ru-parallel-beamforming ru_rau_enhancement ru_rau_enhancement-external-timing runel runel-reverse-test s1-subnormal_rewrite s1_subnormal s1_subnormal-robert s1ap-bugfix-rab_setup sa-demo sa-demo-hs sa-merge-rrc-srb sa-msg4 sa-msg4-rrc sa-msg4-rrc-yihz sa-msg4-rrc-yihz-hs sa_rrc_yihz sanitize-address sanitize-v1 sanitize-v1-tmp sarma_pvnp_oai schedule-si-fix signal-delay sim-channels small-bugfixes-w40 small-config-change small_nr_bugfixes smallcleanup softmodem_cleanup split73 t-gnb-tracer tcri test-panos test-x310-perf test_nsa_gtpu_fix test_rt-fix_phy-test testing_2symb_pdcch testing_with_external_txdata thread-pool tools_5Gadapt tp-ota-test trx_thread_param trx_write_thread ue-csi ue-dci-false-detection ue-fixes ue-fixes-ota ue-pdsch-pusch-parallel ue-race-fix ue-updates-runel-test ue_adjust_gain ue_beam_selection ue_dlsch-multi-threading ue_dlsch_decoding_ldpc_offload ue_nfapi_mch ues_test_tmp uhd_priority_set_cleanup ul-freq-iq-samps-to-file ul_dl_dci_same_slot ul_harq ulsch_decode_mthread ulsim_changes update-to-2019-march-june-release usrp_fix_adc_shift_and_pps_sync usrp_gpio_test usrp_stop_cleanly usrp_x400 wf-sa-rrc wireshark-T-hack-ueid wireshark-log-scheduling-requests wk11-with-phytest workaround-rebased workaround-restart-not-working x2-endc-processing x2_neighbor_6cells x2_tdd xiangwab xiangwan xw2 yihongzheng_srb zzs 2021.wk14_a 2021.wk13_d 2021.wk13_c 2021.w18_b 2021.w18_a 2021.w17_b 2021.w16 2021.w15 2021.w14 2021.w13_a 2021.w12 2021.w11 2021.w10 2021.w09 2021.w08 2021.w06 2021.w05 2021.w04 2021.w02 2020.w51_2 2020.w51 2020.w50 2020.w49 2020.w48_2 2020.w48 2020.w47 2020.w46_2 2020.w46 2020.w45_2 2020.w45 2020.w44 2020.w42_2 2020.w42 2020.w41 2020.w39 2020.w38 2020.w37 2020.w36 2020.w34 2020.w33 2020.w31 2020.w30 2020.w29 2020.w28 2020.w26 2020.w25 2020.w24 2020.w23 2020.w22 2020.w19 2020.w17 2020.w16 2020.w15 2020.w11 2020.w09 2020.w06 2020.w05 2020.w04 2020.w03 2019.w51 2019.w44 2019.w41 2019.w36 2019.w30 2019.w28 2019.w27 2019.w25 2019.w23 2019.w21 2019.w17 2019.w15 2019.w13 2019.w11 2019.w10 2019.w09 2019.w08 2019.w07 2019.w06 2019.w04 2019.w03 2018.w51 2018.w48 2018.w47 2018.w46 2018.w44 2018.w41 2018.w40 2018.w39 2018.w36 2018.w33 2018.w31 2018.w29 2018.w25 2018.w19 2018.w15 2018.w12 2018.w11 2018.w10 2018.w09 2018.w08 2018.w07 2018.w06 2018.w05 2018.w04 2018.w03 2018.w02 2017.w48 2017.w46 2017.w43 2017.w42 v1.2.2 v1.2.1 v1.2.0 v1.1.1 v1.1.0 v1.0.3 v1.0.2 v1.0.1 v1.0.0 osa-etsi-ws-ue osa-etsi-ws-try2 osa-etsi-ws-try1 osa-etsi-ws-gNB oai_nr_sync nr-ip-over-lte nr-ip-over-lte-v.1.5 nr-ip-over-lte-v.1.4 nr-ip-over-lte-v.1.3 nr-ip-over-lte-v.1.2 nr-ip-over-lte-v.1.1 nr-ip-over-lte-v.1.0 develop-nr-pdcch develop-nr-2020w03 develop-nr-2020w02 develop-nr-2019w51 develop-nr-2019w50 develop-nr-2019w48 develop-nr-2019w47 develop-nr-2019w45 develop-nr-2019w43 develop-nr-2019w42 develop-nr-2019w40 develop-nr-2019w28 develop-nr-2019w23 benetel_phase_rotation benetel_gnb_rel_2.0 benetel_gnb_rel_1.0 benetel_enb_rel_2.0 benetel_enb_rel_1.0
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......@@ -61,8 +61,8 @@
#define ENABLE_MAC_PAYLOAD_DEBUG
#define DEBUG_eNB_SCHEDULER 1
int choose(int n,int k) {
int choose(int n,int k)
{
int res = 1;
int res2 = 1;
int i;
......@@ -77,8 +77,8 @@ int choose(int n,int k) {
}
// Patented algorithm from Yang et al, US Patent 2009, "Channel Quality Indexing and Reverse Indexing"
void reverse_index(int N,int M,int r,int *v) {
void reverse_index(int N,int M,int r,int *v)
{
int BaseValue=0;
int IncreaseValue,ThresholdValue;
int sumV;
......@@ -90,7 +90,6 @@ void reverse_index(int N,int M,int r,int *v) {
sumV=0;
i=M;
while (i>0 && r>0) {
IncreaseValue = choose(N-M+1-sumV-v[i-1]+i-2,i-1);
ThresholdValue = BaseValue+IncreaseValue;
if (r>=ThresholdValue) {
......@@ -103,26 +102,27 @@ void reverse_index(int N,int M,int r,int *v) {
i--;
BaseValue=0;
}
}
}
int to_prb(int dl_Bandwidth) {
int to_prb(int dl_Bandwidth)
{
int prbmap[6] = {6,15,25,50,75,100};
AssertFatal(dl_Bandwidth < 6,"dl_Bandwidth is 0..5\n");
return(prbmap[dl_Bandwidth]);
}
int to_rbg(int dl_Bandwidth) {
int to_rbg(int dl_Bandwidth)
{
int rbgmap[6] = {6,8,13,17,19,25};
AssertFatal(dl_Bandwidth < 6,"dl_Bandwidth is 0..5\n");
return(rbgmap[dl_Bandwidth]);
}
int get_phich_resource_times6(COMMON_channels_t *cc) {
int get_phich_resource_times6(COMMON_channels_t *cc)
{
int phichmap[4] = {1,3,6,12};
AssertFatal(cc!=NULL,"cc is null\n");
AssertFatal(cc->mib!=NULL,"cc->mib is null\n");
......@@ -133,8 +133,8 @@ int get_phich_resource_times6(COMMON_channels_t *cc) {
return(phichmap[cc->mib->message.phich_Config.phich_Resource]);
}
uint16_t mac_computeRIV(uint16_t N_RB_DL,uint16_t RBstart,uint16_t Lcrbs) {
uint16_t mac_computeRIV(uint16_t N_RB_DL,uint16_t RBstart,uint16_t Lcrbs)
{
uint16_t RIV;
if (Lcrbs<=(1+(N_RB_DL>>1)))
......@@ -145,8 +145,8 @@ uint16_t mac_computeRIV(uint16_t N_RB_DL,uint16_t RBstart,uint16_t Lcrbs) {
return(RIV);
}
uint8_t getQm(uint8_t mcs) {
uint8_t getQm(uint8_t mcs)
{
if (mcs<10) return(2);
else if (mcs<17) return(4);
else return (6);
......@@ -159,7 +159,6 @@ void get_Msg3alloc(COMMON_channels_t *cc,
frame_t *frame,
sub_frame_t *subframe)
{
// Fill in other TDD Configuration!!!!
if (cc->tdd_Config==NULL) { // FDD
......@@ -314,9 +313,7 @@ uint8_t subframe2harqpid(COMMON_channels_t *cc,frame_t frame,sub_frame_t subfram
if (cc->tdd_Config == NULL) { // FDD
ret = (((frame<<1)+subframe)&7);
} else {
switch (cc->tdd_Config->subframeAssignment) {
case 1:
if ((subframe==2) ||
(subframe==3) ||
......@@ -376,7 +373,6 @@ uint8_t get_Msg3harqpid(COMMON_channels_t *cc,
frame_t frame,
sub_frame_t current_subframe)
{
uint8_t ul_subframe=0;
uint32_t ul_frame=0;
......@@ -387,7 +383,6 @@ uint8_t get_Msg3harqpid(COMMON_channels_t *cc,
switch (cc->tdd_Config->subframeAssignment) {
case 1:
switch (current_subframe) {
case 9:
case 0:
ul_subframe = 7;
......@@ -404,7 +399,6 @@ uint8_t get_Msg3harqpid(COMMON_channels_t *cc,
case 3:
switch (current_subframe) {
case 0:
case 5:
case 6:
......@@ -428,7 +422,6 @@ uint8_t get_Msg3harqpid(COMMON_channels_t *cc,
case 4:
switch (current_subframe) {
case 0:
case 5:
case 6:
......@@ -456,7 +449,6 @@ uint8_t get_Msg3harqpid(COMMON_channels_t *cc,
}
return(subframe2harqpid(cc,ul_frame,ul_subframe));
}
uint32_t pdcchalloc2ulframe(COMMON_channels_t *ccP,uint32_t frame, uint8_t n)
......@@ -480,11 +472,10 @@ uint32_t pdcchalloc2ulframe(COMMON_channels_t *ccP,uint32_t frame, uint8_t n)
LOG_D(PHY, "frame %d subframe %d: PUSCH frame = %d\n", frame, n, ul_frame);
return ul_frame;
}
uint8_t pdcchalloc2ulsubframe(COMMON_channels_t *ccP,uint8_t n) {
uint8_t pdcchalloc2ulsubframe(COMMON_channels_t *ccP,uint8_t n)
{
uint8_t ul_subframe;
if ((ccP->tdd_Config) &&
......@@ -508,13 +499,11 @@ uint8_t pdcchalloc2ulsubframe(COMMON_channels_t *ccP,uint8_t n) {
int is_UL_sf(COMMON_channels_t *ccP,sub_frame_t subframeP)
{
// if FDD return dummy value
if (ccP->tdd_Config == NULL)
return(0);
switch (ccP->tdd_Config->subframeAssignment) {
case 1:
switch (subframeP) {
case 0:
......@@ -565,12 +554,11 @@ int is_UL_sf(COMMON_channels_t *ccP,sub_frame_t subframeP)
AssertFatal(1==0,"subframe %d Unsupported TDD configuration %d\n",
subframeP,(int)ccP->tdd_Config->subframeAssignment);
break;
}
}
uint16_t get_pucch1_absSF(COMMON_channels_t *cc,uint16_t dlsch_absSF) {
uint16_t get_pucch1_absSF(COMMON_channels_t *cc,uint16_t dlsch_absSF)
{
uint16_t sf,f,nextf;
if (cc->tdd_Config==NULL) { //FDD n+4
......@@ -624,8 +612,8 @@ uint16_t get_pucch1_absSF(COMMON_channels_t *cc,uint16_t dlsch_absSF) {
AssertFatal(1==0,"Shouldn't get here\n");
}
void get_srs_pos(COMMON_channels_t *cc,uint16_t isrs,uint16_t *psrsPeriodicity,uint16_t *psrsOffset) {
void get_srs_pos(COMMON_channels_t *cc,uint16_t isrs,uint16_t *psrsPeriodicity,uint16_t *psrsOffset)
{
if(cc->tdd_Config) { // TDD
AssertFatal(isrs>=10,"2 ms SRS periodicity not supported");
......@@ -659,10 +647,8 @@ void get_srs_pos(COMMON_channels_t *cc,uint16_t isrs,uint16_t *psrsPeriodicity,u
}
AssertFatal(isrs<=644,"Isrs out of range %d>644\n",isrs);
} // TDD
else { // FDD
if (isrs<2) {
*psrsPeriodicity=2;
*psrsOffset=isrs;
......@@ -696,12 +682,11 @@ void get_srs_pos(COMMON_channels_t *cc,uint16_t isrs,uint16_t *psrsPeriodicity,u
*psrsOffset=isrs-317;
}
AssertFatal(isrs<=636,"Isrs out of range %d>636\n",isrs);
}
}
void get_csi_params(COMMON_channels_t *cc,struct CQI_ReportPeriodic *cqi_ReportPeriodic,uint16_t *Npd,uint16_t *N_OFFSET_CQI,int *H) {
void get_csi_params(COMMON_channels_t *cc,struct CQI_ReportPeriodic *cqi_ReportPeriodic,uint16_t *Npd,uint16_t *N_OFFSET_CQI,int *H)
{
uint16_t cqi_PMI_ConfigIndex = cqi_ReportPeriodic->choice.setup.cqi_pmi_ConfigIndex;
uint8_t Jtab[6] = {0,2,2,3,4,4};
......@@ -778,9 +763,8 @@ void get_csi_params(COMMON_channels_t *cc,struct CQI_ReportPeriodic *cqi_ReportP
*H=1;
}
uint8_t get_dl_cqi_pmi_size_pusch(COMMON_channels_t *cc,uint8_t tmode,uint8_t ri, CQI_ReportModeAperiodic_t *cqi_ReportModeAperiodic) {
uint8_t get_dl_cqi_pmi_size_pusch(COMMON_channels_t *cc,uint8_t tmode,uint8_t ri, CQI_ReportModeAperiodic_t *cqi_ReportModeAperiodic)
{
int Ntab[6] = {0,4,7,9,10,13};
int N = Ntab[cc->mib->message.dl_Bandwidth];
int Ltab_uesel[6] = {0,6,9,13,15,18};
......@@ -789,7 +773,6 @@ uint8_t get_dl_cqi_pmi_size_pusch(COMMON_channels_t *cc,uint8_t tmode,uint8_t ri
AssertFatal(cqi_ReportModeAperiodic != NULL,"cqi_ReportPeriodic is null!\n");
switch (*cqi_ReportModeAperiodic) {
case CQI_ReportModeAperiodic_rm12:
AssertFatal(tmode==4 || tmode==6 || tmode==8 || tmode==9 || tmode==10,"Illegal TM (%d) for CQI_ReportModeAperiodic_rm12\n",tmode);
AssertFatal(cc->p_eNB<=4,"only up to 4 antenna ports supported here\n");
......@@ -852,8 +835,8 @@ uint8_t get_dl_cqi_pmi_size_pusch(COMMON_channels_t *cc,uint8_t tmode,uint8_t ri
return(0);
}
uint8_t get_rel8_dl_cqi_pmi_size(UE_sched_ctrl *sched_ctl,int CC_idP,COMMON_channels_t *cc,uint8_t tmode, struct CQI_ReportPeriodic *cqi_ReportPeriodic) {
uint8_t get_rel8_dl_cqi_pmi_size(UE_sched_ctrl *sched_ctl,int CC_idP,COMMON_channels_t *cc,uint8_t tmode, struct CQI_ReportPeriodic *cqi_ReportPeriodic)
{
int no_pmi=0;
// Ltab[6] = {0,log2(15/4/2),log2(25/4/2),log2(50/6/3),log2(75/8/4),log2(100/8/4)};
......@@ -878,8 +861,6 @@ uint8_t get_rel8_dl_cqi_pmi_size(UE_sched_ctrl *sched_ctl,int CC_idP,COMMON_chan
no_pmi=0;
}
if ((cqi_ReportPeriodic->choice.setup.cqi_FormatIndicatorPeriodic.present == CQI_ReportPeriodic__setup__cqi_FormatIndicatorPeriodic_PR_widebandCQI) ||
(sched_ctl->feedback_cnt[CC_idP] == 0)) {
// send wideband report every opportunity if wideband reporting mode is selected, else every H opportunities
......@@ -909,8 +890,8 @@ void fill_nfapi_dl_dci_1A(nfapi_dl_config_request_pdu_t *dl_config_pdu,
uint8_t mcs,
uint8_t ndi,
uint8_t rv,
uint8_t vrb_flag) {
uint8_t vrb_flag)
{
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dci_dl_pdu));
......@@ -926,11 +907,10 @@ void fill_nfapi_dl_dci_1A(nfapi_dl_config_request_pdu_t *dl_config_pdu,
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.new_data_indicator_1 = ndi;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.redundancy_version_1 = rv;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.virtual_resource_block_assignment_flag = vrb_flag;
}
void program_dlsch_acknak(module_id_t module_idP, int CC_idP,int UE_idP, frame_t frameP, sub_frame_t subframeP,uint8_t cce_idx) {
void program_dlsch_acknak(module_id_t module_idP, int CC_idP,int UE_idP, frame_t frameP, sub_frame_t subframeP,uint8_t cce_idx)
{
eNB_MAC_INST *eNB = RC.mac[module_idP];
COMMON_channels_t *cc = eNB->common_channels;
UE_list_t *UE_list = &eNB->UE_list;
......@@ -1048,7 +1028,6 @@ void program_dlsch_acknak(module_id_t module_idP, int CC_idP,int UE_idP, frame_t
rnti,
ulsch_harq_information);
if (harq_information) fill_nfapi_harq_information(module_idP,CC_idP,
rnti,
(frameP*10)+subframeP,
......@@ -1056,8 +1035,8 @@ void program_dlsch_acknak(module_id_t module_idP, int CC_idP,int UE_idP, frame_t
cce_idx);
}
uint8_t get_V_UL_DAI(module_id_t module_idP,int CC_idP,uint16_t rntiP) {
uint8_t get_V_UL_DAI(module_id_t module_idP,int CC_idP,uint16_t rntiP)
{
nfapi_hi_dci0_request_body_t *HI_DCI0_req = &RC.mac[module_idP]->HI_DCI0_req[CC_idP].hi_dci0_request_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu = &HI_DCI0_req->hi_dci0_pdu_list[0];
......@@ -1068,12 +1047,12 @@ uint8_t get_V_UL_DAI(module_id_t module_idP,int CC_idP,uint16_t rntiP) {
}
return(4); // this is rule from Section 7.3 in 36.213
}
void fill_nfapi_ulsch_harq_information(module_id_t module_idP,
int CC_idP,
uint16_t rntiP,
nfapi_ul_config_ulsch_harq_information *harq_information) {
nfapi_ul_config_ulsch_harq_information *harq_information)
{
eNB_MAC_INST *eNB = RC.mac[module_idP];
COMMON_channels_t *cc = &eNB->common_channels[CC_idP];
UE_list_t *UE_list = &eNB->UE_list;
......@@ -1111,7 +1090,6 @@ void fill_nfapi_ulsch_harq_information(module_id_t module_idP,
case 5:
case 6:
case 7:
if (cc->tdd_Config==NULL) // FDD
harq_information->harq_information_rel10.harq_size = 1;
else {
......@@ -1122,7 +1100,6 @@ void fill_nfapi_ulsch_harq_information(module_id_t module_idP,
}
break;
default: // for any other TM we need 2 bits harq
if (cc->tdd_Config==NULL) {
harq_information->harq_information_rel10.harq_size = 2;
}
......@@ -1141,15 +1118,14 @@ void fill_nfapi_harq_information(module_id_t module_idP,
uint16_t rntiP,
uint16_t absSFP,
nfapi_ul_config_harq_information *harq_information,
uint8_t cce_idxP) {
uint8_t cce_idxP)
{
eNB_MAC_INST *eNB = RC.mac[module_idP];
COMMON_channels_t *cc = &eNB->common_channels[CC_idP];
UE_list_t *UE_list = &eNB->UE_list;
int UE_id = find_UE_id(module_idP,rntiP);
AssertFatal(UE_id>=0,"UE_id cannot be found, impossible\n");
AssertFatal(UE_list!=NULL,"UE_list is null\n");
AssertFatal(UE_list->UE_template[CC_idP][UE_id].physicalConfigDedicated!=NULL,"physicalConfigDedicated for rnti %x is null\n",rntiP);
......@@ -1207,13 +1183,12 @@ void fill_nfapi_harq_information(module_id_t module_idP,
} // get Tmode
}
uint16_t fill_nfapi_uci_acknak(module_id_t module_idP,
int CC_idP,
uint16_t rntiP,
uint16_t absSFP,
uint8_t cce_idxP) {
uint8_t cce_idxP)
{
eNB_MAC_INST *eNB = RC.mac[module_idP];
COMMON_channels_t *cc = &eNB->common_channels[CC_idP];
......@@ -1221,7 +1196,6 @@ uint16_t fill_nfapi_uci_acknak(module_id_t module_idP,
nfapi_ul_config_request_body_t *ul_req = &eNB->UL_req_tmp[CC_idP][ackNAK_absSF%10].ul_config_request_body;
nfapi_ul_config_request_pdu_t *ul_config_pdu = &ul_req->ul_config_pdu_list[ul_req->number_of_pdus];
memset((void*)ul_config_pdu,0,sizeof(nfapi_ul_config_request_pdu_t));
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE;
ul_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_ul_config_uci_harq_pdu));
......@@ -1265,12 +1239,11 @@ void fill_nfapi_dlsch_config(eNB_MAC_INST *eNB,
uint8_t transmission_mode,
uint8_t num_bf_prb_per_subband,
uint8_t num_bf_vector
) {
)
{
nfapi_dl_config_request_pdu_t *dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DLSCH_PDU_TYPE;
dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dlsch_pdu));
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.length = length;
......@@ -1298,8 +1271,8 @@ void fill_nfapi_dlsch_config(eNB_MAC_INST *eNB,
dl_req->number_pdu++;
}
uint16_t fill_nfapi_tx_req(nfapi_tx_request_body_t *tx_req_body,uint16_t absSF,uint16_t pdu_length, uint16_t *pdu_index, uint8_t *pdu) {
uint16_t fill_nfapi_tx_req(nfapi_tx_request_body_t *tx_req_body,uint16_t absSF,uint16_t pdu_length, uint16_t *pdu_index, uint8_t *pdu)
{
nfapi_tx_request_pdu_t *TX_req = &tx_req_body->tx_pdu_list[tx_req_body->number_of_pdus];
LOG_D(MAC,"Filling TX_req %d for pdu length %d\n",tx_req_body->number_of_pdus,pdu_length);
TX_req->pdu_length = pdu_length;
......@@ -1332,9 +1305,8 @@ void fill_nfapi_ulsch_config_request_rel8(nfapi_ul_config_request_pdu_t *ul_con
uint8_t current_tx_nb,
uint8_t n_srs,
uint16_t size
) {
)
{
memset((void*)ul_config_pdu,0,sizeof(nfapi_ul_config_request_pdu_t));
if (cqi_req==0)
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_PDU_TYPE;
......@@ -1399,24 +1371,26 @@ void fill_nfapi_ulsch_config_request_emtc(nfapi_ul_config_request_pdu_t *ul_con
uint8_t ue_type,
uint16_t total_number_of_repetitions,
uint16_t repetition_number,
uint16_t initial_transmission_sf_io) {
uint16_t initial_transmission_sf_io)
{
// Re13 fields
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.ue_type = ue_type;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.total_number_of_repetitions = total_number_of_repetitions;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.repetition_number = repetition_number;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.initial_transmission_sf_io = initial_transmission_sf_io;
}
int get_numnarrowbands(long dl_Bandwidth) {
int get_numnarrowbands(long dl_Bandwidth)
{
int nb_tab[6] = {1,2,4,8,12,16};
AssertFatal(dl_Bandwidth<7 || dl_Bandwidth>=0,"dl_Bandwidth not in [0..6]\n");
return(nb_tab[dl_Bandwidth]);
}
int get_numnarrowbandbits(long dl_Bandwidth) {
int get_numnarrowbandbits(long dl_Bandwidth)
{
int nbbits_tab[6] = {0,1,2,3,4,4};
AssertFatal(dl_Bandwidth<7 || dl_Bandwidth>=0,"dl_Bandwidth not in [0..6]\n");
......@@ -1427,11 +1401,10 @@ int get_numnarrowbandbits(long dl_Bandwidth) {
int startSF_fdd_RA_times2[8] = {2,3,4,5,8,10,16,20};
int startSF_tdd_RA[7] = {1,2,4,5,8,10,20};
int mpdcch_sf_condition(eNB_MAC_INST *eNB,int CC_id, frame_t frameP,sub_frame_t subframeP,int rmax,MPDCCH_TYPES_t mpdcch_type,int UE_id) {
int mpdcch_sf_condition(eNB_MAC_INST *eNB,int CC_id, frame_t frameP,sub_frame_t subframeP,int rmax,MPDCCH_TYPES_t mpdcch_type,int UE_id)
{
struct PRACH_ConfigSIB_v1310 *ext4_prach = eNB->common_channels[CC_id].radioResourceConfigCommon_BR->ext4->prach_ConfigCommon_v1310;
int T;
EPDCCH_SetConfig_r11_t *epdcch_setconfig_r11;
......@@ -1460,7 +1433,6 @@ int mpdcch_sf_condition(eNB_MAC_INST *eNB,int CC_id, frame_t frameP,sub_frame_t
case TYPEUESPEC:
epdcch_setconfig_r11= eNB->UE_list.UE_template[CC_id][UE_id].physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.setConfigToAddModList_r11->list.array[0] ;
AssertFatal(epdcch_setconfig_r11 != NULL," epdcch_setconfig_r11 is null for UE specific \n");
AssertFatal(epdcch_setconfig_r11->ext2 != NULL," ext2 doesn't exist in epdcch config ' \n");
......@@ -1477,11 +1449,10 @@ int mpdcch_sf_condition(eNB_MAC_INST *eNB,int CC_id, frame_t frameP,sub_frame_t
AssertFatal(T>0,"T is 0!\n");
if (((10*frameP) + subframeP)%T == 0) return(1);
else return(0);
}
int narrowband_to_first_rb(COMMON_channels_t *cc, int nb_index) {
int narrowband_to_first_rb(COMMON_channels_t *cc, int nb_index)
{
switch (cc->mib->message.dl_Bandwidth) {
case 0: // 6 PRBs, N_NB=1, i_0=0
return(0);
......@@ -1540,9 +1511,7 @@ void init_ue_sched_info(void)
unsigned char get_ue_weight(module_id_t module_idP, int CC_idP, int ue_idP)
//------------------------------------------------------------------------------
{
return(eNB_dlsch_info[module_idP][CC_idP][ue_idP].weight);
}
//------------------------------------------------------------------------------
......@@ -1571,8 +1540,6 @@ int find_RA_id(module_id_t mod_idP, int CC_idP, rnti_t rntiP)
RA_TEMPLATE *RA_template = (RA_TEMPLATE *)&RC.mac[mod_idP]->common_channels[CC_idP].RA_template[0];
for (RA_id = 0; RA_id < NB_RA_PROC_MAX; RA_id++) {
LOG_D(MAC,"Checking RA_id %d for %x : RA_active %d, wait_ack_Msg4 %d\n",
RA_id,rntiP,
......@@ -1604,7 +1571,6 @@ int UE_PCCID(module_id_t mod_idP,int ue_idP)
rnti_t UE_RNTI(module_id_t mod_idP, int ue_idP)
//------------------------------------------------------------------------------
{
rnti_t rnti = RC.mac[mod_idP]->UE_list.UE_template[UE_PCCID(mod_idP,ue_idP)][ue_idP].rnti;
if (rnti>0) {
......@@ -1653,7 +1619,6 @@ unsigned char get_aggregation (uint8_t bw_index, uint8_t cqi, uint8_t dci_fmt)
unsigned char aggregation=3;
switch (dci_fmt){
case format0:
aggregation = cqi2fmt0_agg[bw_index][cqi];
break;
......@@ -1790,7 +1755,6 @@ int rrc_mac_remove_ue(module_id_t mod_idP,rnti_t rntiP)
eNB_dlsch_info[mod_idP][pCC_id][UE_id].rnti = NOT_A_RNTI;
eNB_dlsch_info[mod_idP][pCC_id][UE_id].status = S_DL_NONE;
// check if this has an RA process active
RA_TEMPLATE *RA_template;
for (i=0;i<NB_RA_PROC_MAX;i++) {
......@@ -1810,8 +1774,6 @@ int rrc_mac_remove_ue(module_id_t mod_idP,rnti_t rntiP)
return 0;
}
int prev(UE_list_t *listP, int nodeP, int ul_flag)
{
int j;
......@@ -1842,13 +1804,11 @@ int prev(UE_list_t *listP, int nodeP, int ul_flag)
nodeP, (ul_flag == 0)? "DL" : "UL");
dump_ue_list(listP, ul_flag);
return(-1);
}
void swap_UEs(UE_list_t *listP,int nodeiP, int nodejP, int ul_flag)
{
int prev_i,prev_j,next_i,next_j;
LOG_T(MAC,"Swapping UE %d,%d\n",nodeiP,nodejP);
......@@ -1899,7 +1859,6 @@ void swap_UEs(UE_list_t *listP,int nodeiP, int nodejP, int ul_flag)
listP->next[nodejP] = next_i;
listP->next[nodeiP] = next_j;
if (nodeiP==listP->head) {
LOG_T(MAC,"changing head to %d\n",nodejP);
listP->head=nodejP;
......@@ -1941,7 +1900,6 @@ void swap_UEs(UE_list_t *listP,int nodeiP, int nodejP, int ul_flag)
listP->next_ul[nodejP] = next_i;
listP->next_ul[nodeiP] = next_j;
if (nodeiP==listP->head_ul) {
LOG_T(MAC,"[UL]changing head to %d\n",nodejP);
listP->head_ul=nodejP;
......@@ -1961,13 +1919,6 @@ void swap_UEs(UE_list_t *listP,int nodeiP, int nodejP, int ul_flag)
dump_ue_list(listP,ul_flag);
}
/*
#if defined(Rel10) || defined(Rel14)
unsigned char generate_mch_header( unsigned char *mac_header,
......@@ -2084,11 +2035,9 @@ void swap_UEs(UE_list_t *listP,int nodeiP, int nodejP, int ul_flag)
// This has to be updated to include BSR information
uint8_t UE_is_to_be_scheduled(module_id_t module_idP,int CC_id,uint8_t UE_id)
{
UE_TEMPLATE *UE_template = &RC.mac[module_idP]->UE_list.UE_template[CC_id][UE_id];
UE_sched_ctrl *UE_sched_ctl = &RC.mac[module_idP]->UE_list.UE_sched_ctrl[UE_id];
// do not schedule UE if UL is not working
if (UE_sched_ctl->ul_failure_timer>0)
return(0);
......@@ -2108,7 +2057,6 @@ uint8_t UE_is_to_be_scheduled(module_id_t module_idP,int CC_id,uint8_t UE_id)
(UE_sched_ctl->ul_scheduled==0)&&
(mac_eNB_get_rrc_status(module_idP,UE_RNTI(module_idP,UE_id)) < RRC_CONNECTED))) // every Frame when not RRC_CONNECTED
{
LOG_D(MAC,"[eNB %d][PUSCH] UE %d/%x should be scheduled (BSR0 %d,SR %d)\n",module_idP,UE_id,UE_RNTI(module_idP,UE_id),
UE_template->bsr_info[LCGID0],
UE_template->ul_SR);
......@@ -2118,9 +2066,8 @@ uint8_t UE_is_to_be_scheduled(module_id_t module_idP,int CC_id,uint8_t UE_id)
}
}
uint8_t get_tmode(module_id_t module_idP,int CC_idP,int UE_idP) {
uint8_t get_tmode(module_id_t module_idP,int CC_idP,int UE_idP)
{
eNB_MAC_INST *eNB = RC.mac[module_idP];
COMMON_channels_t *cc = &eNB->common_channels[CC_idP];
......@@ -2148,8 +2095,8 @@ uint8_t get_tmode(module_id_t module_idP,int CC_idP,int UE_idP) {
}
}
int8_t get_ULharq(module_id_t module_idP,int CC_idP,uint16_t frameP,uint8_t subframeP) {
int8_t get_ULharq(module_id_t module_idP,int CC_idP,uint16_t frameP,uint8_t subframeP)
{
uint8_t ret = -1;
eNB_MAC_INST *eNB = RC.mac[module_idP];
COMMON_channels_t *cc = &eNB->common_channels[CC_idP];
......@@ -2157,9 +2104,7 @@ int8_t get_ULharq(module_id_t module_idP,int CC_idP,uint16_t frameP,uint8_t subf
if (cc->tdd_Config==NULL) { // FDD
ret = (((frameP<<1)+subframeP)&7);
} else {
switch (cc->tdd_Config->subframeAssignment) {
case 1:
if ((subframeP==2) ||
(subframeP==3) ||
......@@ -2221,7 +2166,6 @@ int8_t get_ULharq(module_id_t module_idP,int CC_idP,uint16_t frameP,uint8_t subf
uint16_t getRIV(uint16_t N_RB_DL,uint16_t RBstart,uint16_t Lcrbs)
{
uint16_t RIV;
if (Lcrbs<=(1+(N_RB_DL>>1)))
......@@ -2234,7 +2178,6 @@ uint16_t getRIV(uint16_t N_RB_DL,uint16_t RBstart,uint16_t Lcrbs)
uint32_t allocate_prbs(int UE_id,unsigned char nb_rb, int N_RB_DL, uint32_t *rballoc)
{
int i;
uint32_t rballoc_dci=0;
unsigned char nb_rb_alloc=0;
......@@ -2263,7 +2206,6 @@ uint32_t allocate_prbs(int UE_id,unsigned char nb_rb, int N_RB_DL, uint32_t *rba
int get_bw_index(module_id_t module_id, uint8_t CC_id)
{
int bw_index=0;
int N_RB_DL = to_prb(RC.mac[module_id]->common_channels[CC_id].mib->message.dl_Bandwidth);
......@@ -2296,7 +2238,6 @@ int get_bw_index(module_id_t module_id, uint8_t CC_id)
int get_min_rb_unit(module_id_t module_id, uint8_t CC_id)
{
int min_rb_unit=0;
int N_RB_DL = to_prb(RC.mac[module_id]->common_channels[CC_id].mib->message.dl_Bandwidth);
......@@ -2329,7 +2270,6 @@ int get_min_rb_unit(module_id_t module_id, uint8_t CC_id)
uint32_t allocate_prbs_sub(int nb_rb, int N_RB_DL, int N_RBG, uint8_t *rballoc)
{
int check=0;//check1=0,check2=0;
uint32_t rballoc_dci=0;
//uint8_t number_of_subbands=13;
......@@ -2382,16 +2322,17 @@ uint32_t allocate_prbs_sub(int nb_rb, int N_RB_DL, int N_RBG, uint8_t *rballoc)
return (rballoc_dci);
}
int get_subbandsize(uint8_t dl_Bandwidth) {
int get_subbandsize(uint8_t dl_Bandwidth)
{
uint8_t ss[6] = {6,4,4,6,8,8};
AssertFatal(dl_Bandwidth<6,"dl_Bandwidth %d is out of bounds\n",dl_Bandwidth);
return(ss[dl_Bandwidth]);
}
int get_nb_subband(int N_RB_DL)
{
int nb_sb=0;
switch (N_RB_DL) {
......@@ -2424,7 +2365,6 @@ int get_nb_subband(int N_RB_DL)
}
return nb_sb;
}
void init_CCE_table(int module_idP,int CC_idP)
......@@ -2440,7 +2380,6 @@ int get_nCCE_offset(int *CCE_table,
const unsigned short rnti,
const unsigned char subframe)
{
int search_space_free,m,nb_candidates = 0,l,i;
unsigned int Yk;
/*
......@@ -2490,7 +2429,6 @@ int get_nCCE_offset(int *CCE_table,
Yk = Yk % (nCCE/L);
switch (L) {
case 1:
case 2:
......@@ -2507,7 +2445,6 @@ int get_nCCE_offset(int *CCE_table,
break;
}
LOG_D(MAC,"rnti %x, Yk = %d, nCCE %d (nCCE/L %d),nb_cand %d\n",rnti,Yk,nCCE,nCCE/L,nb_candidates);
for (m = 0 ; m < nb_candidates ; m++) {
......@@ -2533,8 +2470,8 @@ int get_nCCE_offset(int *CCE_table,
}
}
void dump_CCE_table(int *CCE_table,const int nCCE,const unsigned short rnti,const int subframe,int L) {
void dump_CCE_table(int *CCE_table,const int nCCE,const unsigned short rnti,const int subframe,int L)
{
int nb_candidates = 0,i;
unsigned int Yk;
......@@ -2552,7 +2489,6 @@ void dump_CCE_table(int *CCE_table,const int nCCE,const unsigned short rnti,cons
Yk = Yk % (nCCE/L);
switch (L) {
case 1:
case 2:
......@@ -2569,16 +2505,11 @@ void dump_CCE_table(int *CCE_table,const int nCCE,const unsigned short rnti,cons
break;
}
printf("rnti %x, Yk*L = %d, nCCE %d (nCCE/L %d),nb_cand*L %d\n",rnti,Yk*L,nCCE,nCCE/L,nb_candidates*L);
}
uint16_t getnquad(COMMON_channels_t *cc, uint8_t num_pdcch_symbols,uint8_t mi)
{
uint16_t Nreg=0;
AssertFatal(cc!=NULL,"cc is null\n");
......@@ -2630,8 +2561,8 @@ uint16_t getnCCE(COMMON_channels_t *cc, uint8_t num_pdcch_symbols, uint8_t mi)
return(getnquad(cc,num_pdcch_symbols,mi)/9);
}
uint8_t getmi(COMMON_channels_t *cc,int subframe) {
uint8_t getmi(COMMON_channels_t *cc,int subframe)
{
AssertFatal(cc!=NULL,"cc is null\n");
// for FDD
......@@ -2640,7 +2571,6 @@ uint8_t getmi(COMMON_channels_t *cc,int subframe) {
// for TDD
switch (cc->tdd_Config->subframeAssignment) {
case 0:
if ((subframe==0) || (subframe==5))
return(2);
......@@ -2703,9 +2633,8 @@ uint16_t get_nCCE_max(COMMON_channels_t *cc, int num_pdcch_symbols,int subframe)
int allocate_CCEs(int module_idP,
int CC_idP,
int subframeP,
int test_onlyP) {
int test_onlyP)
{
int *CCE_table = RC.mac[module_idP]->CCE_table[CC_idP];
nfapi_dl_config_request_body_t *DL_req = &RC.mac[module_idP]->DL_req[CC_idP].dl_config_request_body;
nfapi_hi_dci0_request_body_t *HI_DCI0_req = &RC.mac[module_idP]->HI_DCI0_req[CC_idP].hi_dci0_request_body;
......@@ -2716,7 +2645,6 @@ int allocate_CCEs(int module_idP,
int i,j,idci;
int nCCE=0;
LOG_D(MAC,"Allocate CCEs subframe %d, test %d : (DL PDU %d, DL DCI %d, UL %d)\n",subframeP,test_onlyP,DL_req->number_pdu,DL_req->number_dci,HI_DCI0_req->number_of_dci);
DL_req->number_pdcch_ofdm_symbols=1;
......@@ -2724,7 +2652,6 @@ try_again:
init_CCE_table(module_idP,CC_idP);
nCCE=0;
for (i=0,idci=0;i<DL_req->number_pdu;i++) {
// allocate DL common DCIs first
if ((dl_config_pdu[i].pdu_type == NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE)&&
......@@ -2916,19 +2843,17 @@ try_again:
return 0;
failed:
failed:
return -1;
}
/*
uint8_t get_ul_req_index(module_id_t module_idP, int CC_idP, sub_frame_t subframeP) {
uint8_t get_ul_req_index(module_id_t module_idP, int CC_idP, sub_frame_t subframeP)
{
if (RC.mac[module_idP]->common_channels[CC_idP].tdd_Config == NULL)
return(0);
switch (RC.mac[module_idP]->common_channels[CC_idP].tdd_Config->subframeAssignment) {
case 0:
case 1:
case 2:
......@@ -2959,8 +2884,8 @@ uint8_t get_ul_req_index(module_id_t module_idP, int CC_idP, sub_frame_t subfram
}
*/
nfapi_ul_config_request_pdu_t* has_ul_grant(module_id_t module_idP,int CC_idP,uint16_t absSFP,uint16_t rnti) {
nfapi_ul_config_request_pdu_t* has_ul_grant(module_id_t module_idP,int CC_idP,uint16_t absSFP,uint16_t rnti)
{
nfapi_ul_config_request_body_t *ul_req;
nfapi_ul_config_request_pdu_t *ul_config_pdu;
......@@ -3000,10 +2925,8 @@ nfapi_ul_config_request_pdu_t* has_ul_grant(module_id_t module_idP,int CC_idP,ui
(ul_config_pdu[i].ulsch_uci_harq_pdu.ulsch_pdu.ulsch_pdu_rel8.rnti == rnti)) return(&ul_config_pdu[i]);
if ((ul_config_pdu[i].pdu_type == NFAPI_UL_CONFIG_ULSCH_CSI_UCI_HARQ_PDU_TYPE)&&
(ul_config_pdu[i].ulsch_csi_uci_harq_pdu.ulsch_pdu.ulsch_pdu_rel8.rnti == rnti)) return(&ul_config_pdu[i]);
}
return(NULL); // no ul grant at all for this UE
}
......@@ -3061,8 +2984,8 @@ boolean_t CCE_allocation_infeasible(int module_idP,
return res;
}
void extract_harq(module_id_t mod_idP,int CC_idP,int UE_id,frame_t frameP,sub_frame_t subframeP,void *harq_indication,int format) {
void extract_harq(module_id_t mod_idP,int CC_idP,int UE_id,frame_t frameP,sub_frame_t subframeP,void *harq_indication,int format)
{
UE_list_t *UE_list = &RC.mac[mod_idP]->UE_list;
UE_sched_ctrl *sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
rnti_t rnti = UE_RNTI(mod_idP,UE_id);
......@@ -3111,7 +3034,6 @@ void extract_harq(module_id_t mod_idP,int CC_idP,int UE_id,frame_t frameP,sub_fr
}
}
else {
harq_indication_fdd = (nfapi_harq_indication_fdd_rel13_t *)harq_indication;
num_ack_nak = harq_indication_fdd->number_of_ack_nack;
pdu = &harq_indication_fdd->harq_tb_n[0];
......@@ -3305,8 +3227,9 @@ void extract_harq(module_id_t mod_idP,int CC_idP,int UE_id,frame_t frameP,sub_fr
}
}
}
void extract_pucch_csi(module_id_t mod_idP,int CC_idP,int UE_id, frame_t frameP,sub_frame_t subframeP,uint8_t *pdu, uint8_t length) {
void extract_pucch_csi(module_id_t mod_idP,int CC_idP,int UE_id, frame_t frameP,sub_frame_t subframeP,uint8_t *pdu, uint8_t length)
{
UE_list_t *UE_list = &RC.mac[mod_idP]->UE_list;
UE_sched_ctrl *sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
COMMON_channels_t *cc=&RC.mac[mod_idP]->common_channels[CC_idP];
......@@ -3404,8 +3327,8 @@ void extract_pucch_csi(module_id_t mod_idP,int CC_idP,int UE_id, frame_t frameP,
}
}
void extract_pusch_csi(module_id_t mod_idP,int CC_idP,int UE_id, frame_t frameP,sub_frame_t subframeP,uint8_t *pdu, uint8_t length) {
void extract_pusch_csi(module_id_t mod_idP,int CC_idP,int UE_id, frame_t frameP,sub_frame_t subframeP,uint8_t *pdu, uint8_t length)
{
UE_list_t *UE_list = &RC.mac[mod_idP]->UE_list;
COMMON_channels_t *cc = &RC.mac[mod_idP]->common_channels[CC_idP];
UE_sched_ctrl *sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
......@@ -3432,7 +3355,6 @@ void extract_pusch_csi(module_id_t mod_idP,int CC_idP,int UE_id, frame_t frameP,
int m;
switch(*cqi_ReportModeAperiodic) {
case CQI_ReportModeAperiodic_rm12:
AssertFatal(0==1, "to be fixed, don't use p but pdu directly\n");
// wideband multiple PMI (TM4/6), Table 5.2.2.6.1-1 (for TM4/6)
......@@ -3596,14 +3518,12 @@ void extract_pusch_csi(module_id_t mod_idP,int CC_idP,int UE_id, frame_t frameP,
AssertFatal(1==0,"CQI_ReportModeAperiodic_rm11 to be done\n");
break;
}
}
void cqi_indication(module_id_t mod_idP, int CC_idP, frame_t frameP, sub_frame_t subframeP, rnti_t rntiP,
nfapi_cqi_indication_rel9_t *rel9,uint8_t *pdu,
nfapi_ul_cqi_information_t *ul_cqi_information) {
nfapi_ul_cqi_information_t *ul_cqi_information)
{
int UE_id = find_UE_id(mod_idP, rntiP);
UE_list_t *UE_list = &RC.mac[mod_idP]->UE_list;
UE_sched_ctrl *sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
......@@ -3666,7 +3586,6 @@ void SR_indication(module_id_t mod_idP, int cc_idP, frame_t frameP, sub_frame_t
void UL_failure_indication(module_id_t mod_idP, int cc_idP, frame_t frameP, rnti_t rntiP, sub_frame_t subframeP)
{
int UE_id = find_UE_id(mod_idP, rntiP);
UE_list_t *UE_list = &RC.mac[mod_idP]->UE_list;
......@@ -3683,9 +3602,8 @@ void UL_failure_indication(module_id_t mod_idP, int cc_idP, frame_t frameP, rnti
}
}
void harq_indication(module_id_t mod_idP, int CC_idP, frame_t frameP, sub_frame_t subframeP, nfapi_harq_indication_pdu_t *harq_pdu) {
void harq_indication(module_id_t mod_idP, int CC_idP, frame_t frameP, sub_frame_t subframeP, nfapi_harq_indication_pdu_t *harq_pdu)
{
rnti_t rnti = harq_pdu->rx_ue_information.rnti;
uint8_t ul_cqi = harq_pdu->ul_cqi_information.ul_cqi;
uint8_t channel = harq_pdu->ul_cqi_information.channel;
......
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