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alex037yang
OpenXG-RAN
Commits
04d30d9d
Commit
04d30d9d
authored
Mar 19, 2021
by
Raymond Knopp
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Cherry picked the commits and fixed segflt
parent
3dc0a098
Changes
10
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Showing
10 changed files
with
273 additions
and
28 deletions
+273
-28
openair1/PHY/NR_TRANSPORT/nr_dlsch.c
openair1/PHY/NR_TRANSPORT/nr_dlsch.c
+1
-1
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
+5
-3
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h
+2
-2
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+4
-2
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+232
-1
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
+3
-3
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+20
-11
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+2
-1
openair2/RRC/NR/rrc_gNB_reconfig.c
openair2/RRC/NR/rrc_gNB_reconfig.c
+3
-3
targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb.conf
targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb.conf
+1
-1
No files found.
openair1/PHY/NR_TRANSPORT/nr_dlsch.c
View file @
04d30d9d
...
...
@@ -158,7 +158,7 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
uint16_t
nb_re
=
((
12
*
rel15
->
NrOfSymbols
)
-
nb_re_dmrs
*
dmrs_len
-
xOverhead
)
*
rel15
->
rbSize
*
rel15
->
nrOfLayers
;
uint8_t
Qm
=
rel15
->
qamModOrder
[
0
];
uint32_t
encoded_length
=
nb_re
*
Qm
;
int16_t
mod_dmrs
[
14
][
n_dmrs
<<
1
]
__attribute__
((
aligned
(
16
)));
int16_t
mod_dmrs
[
14
][
n_dmrs
*
4
]
__attribute__
((
aligned
(
16
)));
/* PTRS */
uint16_t
beta_ptrs
=
1
;
...
...
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
View file @
04d30d9d
...
...
@@ -2159,8 +2159,8 @@ int get_num_dmrs(uint16_t dmrs_mask ) {
return
(
num_dmrs
);
}
/* returns the total DMRS symbols in a slot*/
uint8_t
get_num_dmrs_symbols
(
NR_PDSCH_Config_t
*
pdsch_Config
,
int
dmrs_TypeA_Position
,
int
NrOfSymbols
){
return
get_num_dmrs
(
fill_dmrs_mask
(
pdsch_Config
,
dmrs_TypeA_Position
,
NrOfSymbols
));
uint8_t
get_num_dmrs_symbols
(
NR_PDSCH_Config_t
*
pdsch_Config
,
int
dmrs_TypeA_Position
,
int
NrOfSymbols
,
int
startSymbol
){
return
get_num_dmrs
(
fill_dmrs_mask
(
pdsch_Config
,
dmrs_TypeA_Position
,
NrOfSymbols
,
startSymbol
));
}
// Table 5.1.2.2.1-1 38.214
...
...
@@ -2799,9 +2799,10 @@ int is_nr_UL_slot(NR_ServingCellConfigCommon_t *scc, slot_t slot, lte_frame_type
else
return
(
slot_in_period
>=
slots1
+
scc
->
tdd_UL_DL_ConfigurationCommon
->
pattern2
->
nrofDownlinkSlots
?
1
:
0
);
}
int16_t
fill_dmrs_mask
(
NR_PDSCH_Config_t
*
pdsch_Config
,
int
dmrs_TypeA_Position
,
int
NrOfSymbols
)
{
int16_t
fill_dmrs_mask
(
NR_PDSCH_Config_t
*
pdsch_Config
,
int
dmrs_TypeA_Position
,
int
NrOfSymbols
,
int
startSymbol
)
{
int
l0
;
int
ld
=
NrOfSymbols
;
if
(
dmrs_TypeA_Position
==
NR_ServingCellConfigCommon__dmrs_TypeA_Position_pos2
)
l0
=
2
;
else
if
(
dmrs_TypeA_Position
==
NR_ServingCellConfigCommon__dmrs_TypeA_Position_pos3
)
l0
=
3
;
else
AssertFatal
(
1
==
0
,
"Illegal dmrs_TypeA_Position %d
\n
"
,(
int
)
dmrs_TypeA_Position
);
...
...
@@ -2812,6 +2813,7 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
if
(
pdsch_Config
->
dmrs_DownlinkForPDSCH_MappingTypeA
&&
pdsch_Config
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
present
==
NR_SetupRelease_DMRS_DownlinkConfig_PR_setup
)
{
// Relative to start of slot
ld
+=
startSymbol
;
NR_DMRS_DownlinkConfig_t
*
dmrs_config
=
(
NR_DMRS_DownlinkConfig_t
*
)
pdsch_Config
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
;
AssertFatal
(
NrOfSymbols
>
1
&&
NrOfSymbols
<
15
,
"Illegal NrOfSymbols %d
\n
"
,
NrOfSymbols
);
int
pos2
=
0
;
...
...
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h
View file @
04d30d9d
...
...
@@ -47,7 +47,7 @@ uint64_t from_nrarfcn(int nr_bandP, uint8_t scs_index, uint32_t dl_nrarfcn);
uint32_t
to_nrarfcn
(
int
nr_bandP
,
uint64_t
dl_CarrierFreq
,
uint8_t
scs_index
,
uint32_t
bw
);
int16_t
fill_dmrs_mask
(
NR_PDSCH_Config_t
*
pdsch_Config
,
int
dmrs_TypeA_Position
,
int
NrOfSymbols
);
int16_t
fill_dmrs_mask
(
NR_PDSCH_Config_t
*
pdsch_Config
,
int
dmrs_TypeA_Position
,
int
NrOfSymbols
,
int
startSymbol
);
int
is_nr_DL_slot
(
NR_ServingCellConfigCommon_t
*
scc
,
slot_t
slotP
);
...
...
@@ -146,7 +146,7 @@ bool set_ul_ptrs_values(NR_PTRS_UplinkConfig_t *ul_ptrs_config,
uint8_t
*
K_ptrs
,
uint8_t
*
L_ptrs
,
uint8_t
*
reOffset
,
uint8_t
*
maxNumPorts
,
uint8_t
*
ulPower
,
uint8_t
NrOfSymbols
);
uint8_t
get_num_dmrs_symbols
(
NR_PDSCH_Config_t
*
pdsch_Config
,
int
dmrs_TypeA_Position
,
int
NrOfSymbols
);
uint8_t
get_num_dmrs_symbols
(
NR_PDSCH_Config_t
*
pdsch_Config
,
int
dmrs_TypeA_Position
,
int
NrOfSymbols
,
int
startSymbol
);
/* \brief Set the transform precoding according to 6.1.3 of 3GPP TS 38.214 version 16.3.0 Release 16
@param *pusch_config, pointer to pusch config
...
...
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @
04d30d9d
...
...
@@ -676,7 +676,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
/* dmrs symbol positions*/
dlsch_config_pdu_1_0
->
dlDmrsSymbPos
=
fill_dmrs_mask
(
pdsch_config
,
mac
->
scc
->
dmrs_TypeA_Position
,
dlsch_config_pdu_1_0
->
start_symbol
+
dlsch_config_pdu_1_0
->
number_symbols
);
dlsch_config_pdu_1_0
->
number_symbols
,
dlsch_config_pdu_1_0
->
start_symbol
);
dlsch_config_pdu_1_0
->
dmrsConfigType
=
mac
->
DLbwp
[
0
]
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
dmrs_Type
==
NULL
?
0
:
1
;
/* number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214 version 15.9.0 Release 15 */
if
(
dlsch_config_pdu_1_0
->
number_symbols
==
2
)
...
...
@@ -841,7 +842,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
/* dmrs symbol positions*/
dlsch_config_pdu_1_1
->
dlDmrsSymbPos
=
fill_dmrs_mask
(
pdsch_config
,
mac
->
scc
->
dmrs_TypeA_Position
,
dlsch_config_pdu_1_1
->
number_symbols
);
dlsch_config_pdu_1_1
->
number_symbols
,
dlsch_config_pdu_1_1
->
start_symbol
);
dlsch_config_pdu_1_1
->
dmrsConfigType
=
mac
->
DLbwp
[
dl_bwp_id
-
1
]
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
dmrs_Type
==
NULL
?
0
:
1
;
/* TODO: fix number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214,
using tables 7.3.1.2.2-1, 7.3.1.2.2-2, 7.3.1.2.2-3, 7.3.1.2.2-4 of 3GPP TS 38.212 */
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
View file @
04d30d9d
...
...
@@ -985,7 +985,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
pdsch_pdu_rel15
->
StartSymbolIndex
=
StartSymbolIndex
;
pdsch_pdu_rel15
->
NrOfSymbols
=
NrOfSymbols
;
pdsch_pdu_rel15
->
dlDmrsSymbPos
=
fill_dmrs_mask
(
NULL
,
scc
->
dmrs_TypeA_Position
,
NrOfSymbols
);
pdsch_pdu_rel15
->
dlDmrsSymbPos
=
fill_dmrs_mask
(
NULL
,
scc
->
dmrs_TypeA_Position
,
NrOfSymbols
,
StartSymbolIndex
);
/* Fill PDCCH DL DCI PDU */
nfapi_nr_dl_dci_pdu_t
*
dci_pdu
=
&
pdcch_pdu_rel15
->
dci_pdu
[
pdcch_pdu_rel15
->
numDlDci
];
...
...
@@ -1073,6 +1073,237 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
}
}
void
nr_generate_Msg4
(
module_id_t
module_idP
,
int
CC_id
,
frame_t
frameP
,
sub_frame_t
slotP
,
NR_RA_t
*
ra
)
{
gNB_MAC_INST
*
nr_mac
=
RC
.
nrmac
[
module_idP
];
NR_COMMON_channels_t
*
cc
=
&
nr_mac
->
common_channels
[
CC_id
];
if
(
ra
->
Msg4_frame
==
frameP
&&
ra
->
Msg4_slot
==
slotP
)
{
int
mcsIndex
=
0
;
int
startSymbolAndLength
=
0
;
int
StartSymbolIndex
=
-
1
;
int
NrOfSymbols
=
14
;
int
StartSymbolIndex_tmp
=
0
;
int
NrOfSymbols_tmp
=
0
;
int
x_Overhead
=
0
;
int
time_domain_assignment
=
0
;
uint8_t
nr_of_candidates
=
0
;
uint8_t
aggregation_level
=
0
;
NR_SearchSpace_t
*
ss
=
nr_mac
->
sched_ctrlCommon
->
search_space
;
NR_BWP_Downlink_t
*
bwp
=
nr_mac
->
sched_ctrlCommon
->
active_bwp
;
NR_ControlResourceSet_t
*
coreset
=
nr_mac
->
sched_ctrlCommon
->
coreset
;
NR_ServingCellConfigCommon_t
*
scc
=
cc
->
ServingCellConfigCommon
;
nfapi_nr_dl_tti_request_body_t
*
dl_req
=
&
nr_mac
->
DL_req
[
CC_id
].
dl_tti_request_body
;
// Checking if the DCI allocation is feasible in current subframe
if
(
dl_req
->
nPDUs
>
NFAPI_NR_MAX_DL_TTI_PDUS
-
2
)
{
LOG_I
(
NR_MAC
,
"[RAPROC] Subframe %d: FAPI DL structure is full, skip scheduling UE %d
\n
"
,
slotP
,
ra
->
rnti
);
return
;
}
find_aggregation_candidates
(
&
aggregation_level
,
&
nr_of_candidates
,
ss
);
int
CCEIndex
=
allocate_nr_CCEs
(
nr_mac
,
bwp
,
coreset
,
aggregation_level
,
0
,
0
,
nr_of_candidates
);
if
(
CCEIndex
<
0
)
{
LOG_E
(
NR_MAC
,
"%s(): cannot find free CCE for RNTI %04x!
\n
"
,
__func__
,
ra
->
rnti
);
return
;
}
nfapi_nr_pdu_t
*
tx_req
=
&
nr_mac
->
TX_req
[
CC_id
].
pdu_list
[
nr_mac
->
TX_req
[
CC_id
].
Number_of_PDUs
];
// look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it. This is especially
// important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them
const
int
bwpid
=
bwp
->
bwp_Id
;
const
int
coresetid
=
coreset
->
controlResourceSetId
;
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu_rel15
=
nr_mac
->
pdcch_pdu_idx
[
CC_id
][
bwpid
][
coresetid
];
if
(
!
pdcch_pdu_rel15
)
{
nfapi_nr_dl_tti_request_pdu_t
*
dl_tti_pdcch_pdu
=
&
dl_req
->
dl_tti_pdu_list
[
dl_req
->
nPDUs
];
memset
(
dl_tti_pdcch_pdu
,
0
,
sizeof
(
nfapi_nr_dl_tti_request_pdu_t
));
dl_tti_pdcch_pdu
->
PDUType
=
NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE
;
dl_tti_pdcch_pdu
->
PDUSize
=
(
uint8_t
)(
2
+
sizeof
(
nfapi_nr_dl_tti_pdcch_pdu
));
dl_req
->
nPDUs
+=
1
;
pdcch_pdu_rel15
=
&
dl_tti_pdcch_pdu
->
pdcch_pdu
.
pdcch_pdu_rel15
;
nr_configure_pdcch
(
pdcch_pdu_rel15
,
ss
,
coreset
,
scc
,
bwp
);
nr_mac
->
pdcch_pdu_idx
[
CC_id
][
bwpid
][
coresetid
]
=
pdcch_pdu_rel15
;
}
// TODO: This assignment should be done in function nr_configure_pdcch()
pdcch_pdu_rel15
->
CoreSetType
=
NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG_CSET_0
;
nfapi_nr_dl_tti_request_pdu_t
*
dl_tti_pdsch_pdu
=
&
dl_req
->
dl_tti_pdu_list
[
dl_req
->
nPDUs
];
memset
((
void
*
)
dl_tti_pdsch_pdu
,
0
,
sizeof
(
nfapi_nr_dl_tti_request_pdu_t
));
dl_tti_pdsch_pdu
->
PDUType
=
NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE
;
dl_tti_pdsch_pdu
->
PDUSize
=
(
uint8_t
)(
2
+
sizeof
(
nfapi_nr_dl_tti_pdsch_pdu
));
dl_req
->
nPDUs
+=
1
;
nfapi_nr_dl_tti_pdsch_pdu_rel15_t
*
pdsch_pdu_rel15
=
&
dl_tti_pdsch_pdu
->
pdsch_pdu
.
pdsch_pdu_rel15
;
LOG_I
(
NR_MAC
,
"[gNB %d] [RAPROC] CC_id %d Frame %d, slotP %d: Generating RA-Msg4 DCI, state %d
\n
"
,
module_idP
,
CC_id
,
frameP
,
slotP
,
ra
->
state
);
AssertFatal
(
ra
->
secondaryCellGroup
,
"no secondaryCellGroup for RNTI %04x
\n
"
,
ra
->
rnti
);
AssertFatal
(
ra
->
secondaryCellGroup
->
spCellConfig
->
spCellConfigDedicated
->
downlinkBWP_ToAddModList
->
list
.
count
==
1
,
"downlinkBWP_ToAddModList has %d BWP!
\n
"
,
ra
->
secondaryCellGroup
->
spCellConfig
->
spCellConfigDedicated
->
downlinkBWP_ToAddModList
->
list
.
count
);
pdsch_pdu_rel15
->
pduBitmap
=
0
;
pdsch_pdu_rel15
->
rnti
=
ra
->
rnti
;
// SCF222: PDU index incremented for each PDSCH PDU sent in TX control message. This is used to associate control
// information to data and is reset every slot.
const
int
pduindex
=
nr_mac
->
pdu_index
[
CC_id
]
++
;
pdsch_pdu_rel15
->
pduIndex
=
pduindex
;
pdsch_pdu_rel15
->
BWPSize
=
NRRIV2BW
(
scc
->
downlinkConfigCommon
->
initialDownlinkBWP
->
genericParameters
.
locationAndBandwidth
,
MAX_BWP_SIZE
);
pdsch_pdu_rel15
->
BWPStart
=
NRRIV2PRBOFFSET
(
scc
->
downlinkConfigCommon
->
initialDownlinkBWP
->
genericParameters
.
locationAndBandwidth
,
MAX_BWP_SIZE
);
pdsch_pdu_rel15
->
SubcarrierSpacing
=
bwp
->
bwp_Common
->
genericParameters
.
subcarrierSpacing
;
pdsch_pdu_rel15
->
CyclicPrefix
=
0
;
pdsch_pdu_rel15
->
NrOfCodewords
=
1
;
pdsch_pdu_rel15
->
targetCodeRate
[
0
]
=
nr_get_code_rate_dl
(
mcsIndex
,
0
);
pdsch_pdu_rel15
->
qamModOrder
[
0
]
=
2
;
pdsch_pdu_rel15
->
mcsIndex
[
0
]
=
mcsIndex
;
if
(
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
->
mcs_Table
==
NULL
)
{
pdsch_pdu_rel15
->
mcsTable
[
0
]
=
0
;
}
else
{
if
(
*
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
->
mcs_Table
==
0
)
{
pdsch_pdu_rel15
->
mcsTable
[
0
]
=
1
;
}
else
{
pdsch_pdu_rel15
->
mcsTable
[
0
]
=
2
;
}
}
pdsch_pdu_rel15
->
rvIndex
[
0
]
=
0
;
pdsch_pdu_rel15
->
dataScramblingId
=
*
scc
->
physCellId
;
pdsch_pdu_rel15
->
nrOfLayers
=
1
;
pdsch_pdu_rel15
->
transmissionScheme
=
0
;
pdsch_pdu_rel15
->
refPoint
=
0
;
pdsch_pdu_rel15
->
dmrsConfigType
=
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
dmrs_Type
==
NULL
?
0
:
1
;
pdsch_pdu_rel15
->
dlDmrsScramblingId
=
*
scc
->
physCellId
;
pdsch_pdu_rel15
->
SCID
=
0
;
pdsch_pdu_rel15
->
numDmrsCdmGrpsNoData
=
2
;
pdsch_pdu_rel15
->
dmrsPorts
=
1
;
pdsch_pdu_rel15
->
resourceAlloc
=
1
;
pdsch_pdu_rel15
->
rbStart
=
0
;
pdsch_pdu_rel15
->
rbSize
=
6
;
pdsch_pdu_rel15
->
VRBtoPRBMapping
=
0
;
for
(
int
i
=
0
;
i
<
bwp
->
bwp_Common
->
pdsch_ConfigCommon
->
choice
.
setup
->
pdsch_TimeDomainAllocationList
->
list
.
count
;
i
++
)
{
startSymbolAndLength
=
bwp
->
bwp_Common
->
pdsch_ConfigCommon
->
choice
.
setup
->
pdsch_TimeDomainAllocationList
->
list
.
array
[
i
]
->
startSymbolAndLength
;
SLIV2SL
(
startSymbolAndLength
,
&
StartSymbolIndex_tmp
,
&
NrOfSymbols_tmp
);
if
(
NrOfSymbols_tmp
<
NrOfSymbols
)
{
NrOfSymbols
=
NrOfSymbols_tmp
;
StartSymbolIndex
=
StartSymbolIndex_tmp
;
time_domain_assignment
=
i
;
// this is short PDSCH added to the config to fit mixed slot
}
}
AssertFatal
(
StartSymbolIndex
>=
0
,
"StartSymbolIndex is negative
\n
"
);
pdsch_pdu_rel15
->
StartSymbolIndex
=
StartSymbolIndex
;
pdsch_pdu_rel15
->
NrOfSymbols
=
NrOfSymbols
;
pdsch_pdu_rel15
->
dlDmrsSymbPos
=
fill_dmrs_mask
(
NULL
,
scc
->
dmrs_TypeA_Position
,
NrOfSymbols
,
StartSymbolIndex
);
// Fill PDCCH DL DCI PDU
nfapi_nr_dl_dci_pdu_t
*
dci_pdu
=
&
pdcch_pdu_rel15
->
dci_pdu
[
pdcch_pdu_rel15
->
numDlDci
];
pdcch_pdu_rel15
->
numDlDci
++
;
dci_pdu
->
RNTI
=
ra
->
rnti
;
dci_pdu
->
ScramblingId
=
*
scc
->
physCellId
;
dci_pdu
->
ScramblingRNTI
=
0
;
dci_pdu
->
AggregationLevel
=
aggregation_level
;
dci_pdu
->
CceIndex
=
CCEIndex
;
dci_pdu
->
beta_PDCCH_1_0
=
0
;
dci_pdu
->
powerControlOffsetSS
=
1
;
dci_pdu_rel15_t
dci_payload
;
dci_payload
.
frequency_domain_assignment
.
val
=
PRBalloc_to_locationandbandwidth0
(
pdsch_pdu_rel15
->
rbSize
,
pdsch_pdu_rel15
->
rbStart
,
pdsch_pdu_rel15
->
BWPSize
);
dci_payload
.
time_domain_assignment
.
val
=
time_domain_assignment
;
dci_payload
.
vrb_to_prb_mapping
.
val
=
0
;
dci_payload
.
mcs
=
pdsch_pdu_rel15
->
mcsIndex
[
0
];
dci_payload
.
tb_scaling
=
0
;
LOG_D
(
NR_MAC
,
"[RAPROC] DCI type 1 payload: freq_alloc %d (%d,%d,%d), time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d
\n
"
,
dci_payload
.
frequency_domain_assignment
.
val
,
pdsch_pdu_rel15
->
rbStart
,
pdsch_pdu_rel15
->
rbSize
,
pdsch_pdu_rel15
->
BWPSize
,
dci_payload
.
time_domain_assignment
.
val
,
dci_payload
.
vrb_to_prb_mapping
.
val
,
dci_payload
.
mcs
,
dci_payload
.
tb_scaling
);
LOG_D
(
NR_MAC
,
"[RAPROC] DCI params: rnti 0x%x, rnti_type %d, dci_format %d coreset params: FreqDomainResource %llx, start_symbol %d n_symb %d
\n
"
,
pdcch_pdu_rel15
->
dci_pdu
[
0
].
RNTI
,
NR_RNTI_TC
,
NR_DL_DCI_FORMAT_1_0
,
(
unsigned
long
long
)
pdcch_pdu_rel15
->
FreqDomainResource
,
pdcch_pdu_rel15
->
StartSymbolIndex
,
pdcch_pdu_rel15
->
DurationSymbols
);
fill_dci_pdu_rel15
(
scc
,
nr_mac
->
secondaryCellGroupCommon
,
&
pdcch_pdu_rel15
->
dci_pdu
[
pdcch_pdu_rel15
->
numDlDci
-
1
],
&
dci_payload
,
NR_DL_DCI_FORMAT_1_0
,
NR_RNTI_TC
,
pdsch_pdu_rel15
->
BWPSize
,
nr_mac
->
sched_ctrlCommon
->
active_bwp
->
bwp_Id
);
x_Overhead
=
0
;
nr_get_tbs_dl
(
&
dl_tti_pdsch_pdu
->
pdsch_pdu
,
x_Overhead
,
pdsch_pdu_rel15
->
numDmrsCdmGrpsNoData
,
dci_payload
.
tb_scaling
);
uint8_t
payload
[]
=
{
0x01
,
0x02
,
0x03
,
0x04
,
0x05
,
0x06
,
0x07
,
0x08
};
// DL TX request
tx_req
->
PDU_length
=
pdsch_pdu_rel15
->
TBSize
[
0
];
tx_req
->
PDU_index
=
pduindex
;
tx_req
->
num_TLV
=
1
;
tx_req
->
TLVs
[
0
].
length
=
8
;
nr_mac
->
TX_req
[
CC_id
].
SFN
=
frameP
;
nr_mac
->
TX_req
[
CC_id
].
Number_of_PDUs
++
;
nr_mac
->
TX_req
[
CC_id
].
Slot
=
slotP
;
memcpy
(
tx_req
->
TLVs
[
0
].
value
.
direct
,
payload
,
tx_req
->
TLVs
[
0
].
length
);
// Mark the corresponding RBs as used
uint16_t
*
vrb_map
=
cc
[
CC_id
].
vrb_map
;
for
(
int
rb
=
0
;
rb
<
pdsch_pdu_rel15
->
rbSize
;
rb
++
)
{
vrb_map
[
rb
+
pdsch_pdu_rel15
->
rbStart
]
=
1
;
}
ra
->
state
=
WAIT_Msg4_ACK
;
LOG_D
(
MAC
,
"BWPSize: %i
\n
"
,
pdcch_pdu_rel15
->
BWPSize
);
LOG_D
(
MAC
,
"BWPStart: %i
\n
"
,
pdcch_pdu_rel15
->
BWPStart
);
LOG_D
(
MAC
,
"SubcarrierSpacing: %i
\n
"
,
pdcch_pdu_rel15
->
SubcarrierSpacing
);
LOG_D
(
MAC
,
"CyclicPrefix: %i
\n
"
,
pdcch_pdu_rel15
->
CyclicPrefix
);
LOG_D
(
MAC
,
"StartSymbolIndex: %i
\n
"
,
pdcch_pdu_rel15
->
StartSymbolIndex
);
LOG_D
(
MAC
,
"DurationSymbols: %i
\n
"
,
pdcch_pdu_rel15
->
DurationSymbols
);
for
(
int
n
=
0
;
n
<
6
;
n
++
)
LOG_D
(
MAC
,
"FreqDomainResource[%i]: %x
\n
"
,
n
,
pdcch_pdu_rel15
->
FreqDomainResource
[
n
]);
LOG_D
(
MAC
,
"CceRegMappingType: %i
\n
"
,
pdcch_pdu_rel15
->
CceRegMappingType
);
LOG_D
(
MAC
,
"RegBundleSize: %i
\n
"
,
pdcch_pdu_rel15
->
RegBundleSize
);
LOG_D
(
MAC
,
"InterleaverSize: %i
\n
"
,
pdcch_pdu_rel15
->
InterleaverSize
);
LOG_D
(
MAC
,
"CoreSetType: %i
\n
"
,
pdcch_pdu_rel15
->
CoreSetType
);
LOG_D
(
MAC
,
"ShiftIndex: %i
\n
"
,
pdcch_pdu_rel15
->
ShiftIndex
);
LOG_D
(
MAC
,
"precoderGranularity: %i
\n
"
,
pdcch_pdu_rel15
->
precoderGranularity
);
LOG_D
(
MAC
,
"numDlDci: %i
\n
"
,
pdcch_pdu_rel15
->
numDlDci
);
}
}
void
nr_check_Msg4_Ack
(
module_id_t
module_id
,
int
CC_id
,
frame_t
frame
,
sub_frame_t
slot
,
NR_RA_t
*
ra
)
{
LOG_W
(
NR_MAC
,
"nr_check_Msg4_Ack() is not implemented yet!
\n
"
);
ra
->
state
=
RA_IDLE
;
}
void
nr_clear_ra_proc
(
module_id_t
module_idP
,
int
CC_id
,
frame_t
frameP
){
NR_RA_t
*
ra
=
&
RC
.
nrmac
[
module_idP
]
->
common_channels
[
CC_id
].
ra
[
0
];
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
View file @
04d30d9d
...
...
@@ -289,7 +289,7 @@ void schedule_control_sib1(module_id_t module_id,
// Calculate number of PRB_DMRS
uint8_t
N_PRB_DMRS
=
gNB_mac
->
sched_ctrlCommon
->
numDmrsCdmGrpsNoData
*
6
;
uint16_t
dlDmrsSymbPos
=
fill_dmrs_mask
(
gNB_mac
->
sched_ctrlCommon
->
active_bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
,
gNB_mac
->
common_channels
->
ServingCellConfigCommon
->
dmrs_TypeA_Position
,
startSymbolIndex
+
nrOfSymbols
);
uint16_t
dlDmrsSymbPos
=
fill_dmrs_mask
(
gNB_mac
->
sched_ctrlCommon
->
active_bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
,
gNB_mac
->
common_channels
->
ServingCellConfigCommon
->
dmrs_TypeA_Position
,
nrOfSymbols
,
startSymbolIndex
);
uint16_t
dmrs_length
=
get_num_dmrs
(
dlDmrsSymbPos
);
int
rbSize
=
0
;
...
...
@@ -388,7 +388,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
pdsch_pdu_rel15
->
StartSymbolIndex
=
StartSymbolIndex
;
pdsch_pdu_rel15
->
NrOfSymbols
=
NrOfSymbols
;
pdsch_pdu_rel15
->
dlDmrsSymbPos
=
fill_dmrs_mask
(
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
,
scc
->
dmrs_TypeA_Position
,
pdsch_pdu_rel15
->
StartSymbolIndex
+
pdsch_pdu_rel15
->
NrOfSymbols
);
pdsch_pdu_rel15
->
dlDmrsSymbPos
=
fill_dmrs_mask
(
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
,
scc
->
dmrs_TypeA_Position
,
pdsch_pdu_rel15
->
NrOfSymbols
,
pdsch_pdu_rel15
->
StartSymbolIndex
);
LOG_D
(
MAC
,
"dlDmrsSymbPos = 0x%x
\n
"
,
pdsch_pdu_rel15
->
dlDmrsSymbPos
);
...
...
@@ -489,7 +489,7 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
// Calculate number of PRB_DMRS
uint8_t
N_PRB_DMRS
=
gNB_mac
->
sched_ctrlCommon
->
numDmrsCdmGrpsNoData
*
6
;
uint16_t
dlDmrsSymbPos
=
fill_dmrs_mask
(
gNB_mac
->
sched_ctrlCommon
->
active_bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
,
gNB_mac
->
common_channels
->
ServingCellConfigCommon
->
dmrs_TypeA_Position
,
startSymbolIndex
+
nrOfSymbols
);
uint16_t
dlDmrsSymbPos
=
fill_dmrs_mask
(
gNB_mac
->
sched_ctrlCommon
->
active_bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
,
gNB_mac
->
common_channels
->
ServingCellConfigCommon
->
dmrs_TypeA_Position
,
nrOfSymbols
,
startSymbolIndex
);
uint16_t
dmrs_length
=
get_num_dmrs
(
dlDmrsSymbPos
);
const
uint32_t
TBS
=
nr_compute_tbs
(
nr_get_Qm_dl
(
gNB_mac
->
sched_ctrlCommon
->
mcs
,
gNB_mac
->
sched_ctrlCommon
->
mcsTableIdx
),
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
View file @
04d30d9d
...
...
@@ -302,7 +302,7 @@ int nr_write_ce_dlsch_pdu(module_id_t module_idP,
return
offset
;
}
int
getNrOfSymbols
(
NR_BWP_Downlink_t
*
bwp
,
int
tda
)
{
void
getStartNrOfSymbols
(
NR_BWP_Downlink_t
*
bwp
,
int
tda
,
int
*
startSymbol
,
int
*
nrOfSymbols
)
{
struct
NR_PDSCH_TimeDomainResourceAllocationList
*
tdaList
=
bwp
->
bwp_Common
->
pdsch_ConfigCommon
->
choice
.
setup
->
pdsch_TimeDomainAllocationList
;
AssertFatal
(
tda
<
tdaList
->
list
.
count
,
...
...
@@ -311,9 +311,7 @@ int getNrOfSymbols(NR_BWP_Downlink_t *bwp, int tda) {
tdaList
->
list
.
count
);
const
int
startSymbolAndLength
=
tdaList
->
list
.
array
[
tda
]
->
startSymbolAndLength
;
int
startSymbolIndex
,
nrOfSymbols
;
SLIV2SL
(
startSymbolAndLength
,
&
startSymbolIndex
,
&
nrOfSymbols
);
return
nrOfSymbols
;
SLIV2SL
(
startSymbolAndLength
,
startSymbol
,
nrOfSymbols
);
}
nfapi_nr_dmrs_type_e
getDmrsConfigType
(
NR_BWP_Downlink_t
*
bwp
)
{
...
...
@@ -487,8 +485,12 @@ void pf_dl(module_id_t module_id,
sched_ctrl
->
numDmrsCdmGrpsNoData
=
1
;
uint8_t
N_PRB_DMRS
=
getN_PRB_DMRS
(
sched_ctrl
->
active_bwp
,
sched_ctrl
->
numDmrsCdmGrpsNoData
);
int
nrOfSymbols
=
getNrOfSymbols
(
sched_ctrl
->
active_bwp
,
sched_ctrl
->
time_domain_allocation
);
int
startSymbol
;
int
nrOfSymbols
;
getStartNrOfSymbols
(
sched_ctrl
->
active_bwp
,
sched_ctrl
->
time_domain_allocation
,
&
startSymbol
,
&
nrOfSymbols
);
uint32_t
tbs
=
nr_compute_tbs
(
nr_get_Qm_dl
(
sched_ctrl
->
mcs
,
sched_ctrl
->
mcsTableIdx
),
nr_get_code_rate_dl
(
sched_ctrl
->
mcs
,
sched_ctrl
->
mcsTableIdx
),
1
,
// rbSize
...
...
@@ -574,13 +576,18 @@ void pf_dl(module_id_t module_id,
const
uint8_t
N_PRB_DMRS
=
getN_PRB_DMRS
(
sched_ctrl
->
active_bwp
,
sched_ctrl
->
numDmrsCdmGrpsNoData
);
const
int
nrOfSymbols
=
getNrOfSymbols
(
sched_ctrl
->
active_bwp
,
sched_ctrl
->
time_domain_allocation
);
int
startSymbol
;
int
nrOfSymbols
;
getStartNrOfSymbols
(
sched_ctrl
->
active_bwp
,
sched_ctrl
->
time_domain_allocation
,
&
startSymbol
,
&
nrOfSymbols
);
const
NR_ServingCellConfigCommon_t
*
scc
=
RC
.
nrmac
[
module_id
]
->
common_channels
->
ServingCellConfigCommon
;
const
uint8_t
N_DMRS_SLOT
=
get_num_dmrs_symbols
(
sched_ctrl
->
active_bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
,
scc
->
dmrs_TypeA_Position
,
nrOfSymbols
);
nrOfSymbols
,
startSymbol
);
int
rbSize
=
0
;
uint32_t
TBS
=
0
;
...
...
@@ -697,7 +704,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
getN_PRB_DMRS
(
sched_ctrl
->
active_bwp
,
sched_ctrl
->
numDmrsCdmGrpsNoData
);
uint8_t
N_DMRS_SLOT
=
get_num_dmrs_symbols
(
sched_ctrl
->
active_bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
,
RC
.
nrmac
[
module_id
]
->
common_channels
->
ServingCellConfigCommon
->
dmrs_TypeA_Position
,
nrOfSymbols
);
nrOfSymbols
,
startSymbolIndex
);
const
nfapi_nr_dmrs_type_e
dmrsConfigType
=
getDmrsConfigType
(
sched_ctrl
->
active_bwp
);
const
int
nrOfLayers
=
1
;
const
uint16_t
R
=
nr_get_code_rate_dl
(
sched_ctrl
->
mcs
,
sched_ctrl
->
mcsTableIdx
);
...
...
@@ -818,7 +826,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
pdsch_pdu
->
dlDmrsSymbPos
=
fill_dmrs_mask
(
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
,
scc
->
dmrs_TypeA_Position
,
nrOfSymbols
);
nrOfSymbols
,
startSymbolIndex
);
pdsch_pdu
->
dmrsConfigType
=
dmrsConfigType
;
pdsch_pdu
->
dlDmrsScramblingId
=
*
scc
->
physCellId
;
pdsch_pdu
->
SCID
=
0
;
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @
04d30d9d
...
...
@@ -164,7 +164,8 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
pdsch_pdu_rel15
->
NrOfSymbols
=
NrOfSymbols
;
pdsch_pdu_rel15
->
dlDmrsSymbPos
=
fill_dmrs_mask
(
NULL
,
scc
->
dmrs_TypeA_Position
,
NrOfSymbols
);
NrOfSymbols
,
StartSymbolIndex
);
/*
AssertFatal(k0==0,"k0 is not zero for Initial DL BWP TimeDomain Alloc\n");
...
...
openair2/RRC/NR/rrc_gNB_reconfig.c
View file @
04d30d9d
...
...
@@ -72,7 +72,7 @@ void fill_default_initialDownlinkBWP(NR_BWP_Downlink_t *bwp, NR_ServingCellConfi
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
scramblingID1
=
NULL
;
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
phaseTrackingRS
=
NULL
;
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
dmrs_AdditionalPosition
=
calloc
(
1
,
sizeof
(
*
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
dmrs_AdditionalPosition
));
*
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
dmrs_AdditionalPosition
=
NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos
0
;
*
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
dmrs_AdditionalPosition
=
NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos
1
;
}
void
fill_default_coresetZero
(
NR_ControlResourceSet_t
*
coreset0
,
NR_ServingCellConfigCommon_t
*
servingcellconfigcommon
)
{
...
...
@@ -312,7 +312,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
secondaryCellGroup
->
spCellConfig
->
spCellConfigDedicated
->
initialDownlinkBWP
->
pdsch_Config
->
choice
.
setup
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
phaseTrackingRS
=
NULL
;
secondaryCellGroup
->
spCellConfig
->
spCellConfigDedicated
->
initialDownlinkBWP
->
pdsch_Config
->
choice
.
setup
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
dmrs_AdditionalPosition
=
calloc
(
1
,
sizeof
(
*
secondaryCellGroup
->
spCellConfig
->
spCellConfigDedicated
->
initialDownlinkBWP
->
pdsch_Config
->
choice
.
setup
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
dmrs_AdditionalPosition
));
*
secondaryCellGroup
->
spCellConfig
->
spCellConfigDedicated
->
initialDownlinkBWP
->
pdsch_Config
->
choice
.
setup
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
dmrs_AdditionalPosition
=
NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos
0
;
*
secondaryCellGroup
->
spCellConfig
->
spCellConfigDedicated
->
initialDownlinkBWP
->
pdsch_Config
->
choice
.
setup
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
dmrs_AdditionalPosition
=
NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos
1
;
secondaryCellGroup
->
spCellConfig
->
spCellConfigDedicated
->
initialDownlinkBWP
->
pdsch_Config
->
choice
.
setup
->
tci_StatesToAddModList
=
calloc
(
1
,
sizeof
(
*
secondaryCellGroup
->
spCellConfig
->
spCellConfigDedicated
->
initialDownlinkBWP
->
pdsch_Config
->
choice
.
setup
->
tci_StatesToAddModList
));
...
...
@@ -659,7 +659,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
phaseTrackingRS
=
NULL
;
}
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
dmrs_AdditionalPosition
=
calloc
(
1
,
sizeof
(
*
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
dmrs_AdditionalPosition
));
*
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
dmrs_AdditionalPosition
=
NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos
0
;
*
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
dmrs_AdditionalPosition
=
NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos
1
;
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
->
tci_StatesToAddModList
=
calloc
(
1
,
sizeof
(
*
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
->
tci_StatesToAddModList
));
...
...
targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb.conf
View file @
04d30d9d
...
...
@@ -264,7 +264,7 @@ RUs = (
max_pdschReferenceSignalPower
= -
27
;
max_rxgain
=
114
;
eNB_instances
= [
0
];
clock_src
=
"external"
;
#
clock_src = "external";
}
);
...
...
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