Commit 81d64b3d authored by rmagueta's avatar rmagueta

Minor corrections

parent 9bbe4f7c
...@@ -106,7 +106,7 @@ gNBs = ...@@ -106,7 +106,7 @@ gNBs =
powerRampingStep = 1; powerRampingStep = 1;
#ra_ReponseWindow #ra_ReponseWindow
#1,2,4,8,10,20,40,80 #1,2,4,8,10,20,40,80
ra_ResponseWindow = 4; ra_ResponseWindow = 5;
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR #ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen #1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4; ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4;
......
...@@ -770,8 +770,6 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -770,8 +770,6 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
} }
} }
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) { for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
pil = (int16_t *)&pilot[rb_offset*((config_type==pdsch_dmrs_type1) ? 6:4)]; pil = (int16_t *)&pilot[rb_offset*((config_type==pdsch_dmrs_type1) ? 6:4)];
k = k % ue->frame_parms.ofdm_symbol_size; k = k % ue->frame_parms.ofdm_symbol_size;
......
...@@ -679,14 +679,11 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue, ...@@ -679,14 +679,11 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
uint8_t log2_maxh, aarx; uint8_t log2_maxh, aarx;
int32_t avgs; int32_t avgs;
int32_t avgP[4]; int32_t avgP[4];
for (int i=0;i<pdcch_vars->nb_search_space;i++) { for (int i=0;i<pdcch_vars->nb_search_space;i++) {
rel15 = &pdcch_vars->pdcch_config[i]; rel15 = &pdcch_vars->pdcch_config[i];
int n_rb,rb_offset; int n_rb,rb_offset;
get_coreset_rballoc(rel15->coreset.frequency_domain_resource,&n_rb,&rb_offset); get_coreset_rballoc(rel15->coreset.frequency_domain_resource,&n_rb,&rb_offset);
for (int s=rel15->coreset.StartSymbolIndex; s<(rel15->coreset.StartSymbolIndex+rel15->coreset.duration); s++) { for (int s=rel15->coreset.StartSymbolIndex; s<(rel15->coreset.StartSymbolIndex+rel15->coreset.duration); s++) {
LOG_D(PHY,"in nr_pdcch_extract_rbs_single(rxdataF -> rxdataF_ext || dl_ch_estimates -> dl_ch_estimates_ext)\n"); LOG_D(PHY,"in nr_pdcch_extract_rbs_single(rxdataF -> rxdataF_ext || dl_ch_estimates -> dl_ch_estimates_ext)\n");
......
...@@ -609,8 +609,6 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue, ...@@ -609,8 +609,6 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
ret = 1 + dlsch->max_ldpc_iterations; ret = 1 + dlsch->max_ldpc_iterations;
} }
getchar();
nb_total_decod++; nb_total_decod++;
if (no_iteration_ldpc > dlsch->max_ldpc_iterations){ if (no_iteration_ldpc > dlsch->max_ldpc_iterations){
nb_error_decod++; nb_error_decod++;
......
...@@ -84,6 +84,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ ...@@ -84,6 +84,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
else if (dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH){ else if (dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH){
dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch_SI[0]; dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch_SI[0];
dlsch0->rnti_type = _SI_RNTI_; dlsch0->rnti_type = _SI_RNTI_;
dlsch0->harq_processes[dlsch0->current_harq_pid]->status = ACTIVE;
} }
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15; fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15;
...@@ -97,7 +98,6 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ ...@@ -97,7 +98,6 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
if (dlsch0_harq){ if (dlsch0_harq){
dlsch0_harq->status = ACTIVE;
dlsch0_harq->BWPStart = dlsch_config_pdu->BWPStart; dlsch0_harq->BWPStart = dlsch_config_pdu->BWPStart;
dlsch0_harq->BWPSize = dlsch_config_pdu->BWPSize; dlsch0_harq->BWPSize = dlsch_config_pdu->BWPSize;
dlsch0_harq->nb_rb = dlsch_config_pdu->number_rbs; dlsch0_harq->nb_rb = dlsch_config_pdu->number_rbs;
......
...@@ -1808,8 +1808,6 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, ...@@ -1808,8 +1808,6 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
0, 0,
0); 0);
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15;
dci_cnt = 0; dci_cnt = 0;
for(int n_ss = 0; n_ss<pdcch_vars->nb_search_space; n_ss++) { for(int n_ss = 0; n_ss<pdcch_vars->nb_search_space; n_ss++) {
...@@ -1817,15 +1815,13 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue, ...@@ -1817,15 +1815,13 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
LOG_D(PHY, "pdcch_channel_estimation: first_carrier_offset %d, BWPStart %d, coreset_start_rb %d\n", LOG_D(PHY, "pdcch_channel_estimation: first_carrier_offset %d, BWPStart %d, coreset_start_rb %d\n",
fp->first_carrier_offset, pdcch_vars->pdcch_config[n_ss].BWPStart, coreset_start_rb); fp->first_carrier_offset, pdcch_vars->pdcch_config[n_ss].BWPStart, coreset_start_rb);
rel15 = &pdcch_vars->pdcch_config[n_ss];
if (coreset_nb_rb > 0) if (coreset_nb_rb > 0)
nr_pdcch_channel_estimation(ue, nr_pdcch_channel_estimation(ue,
proc, proc,
0, 0,
nr_slot_rx, nr_slot_rx,
l, l,
(pdcch_vars->pdcch_config[n_ss].BWPStart + coreset_start_rb) * 12, fp->first_carrier_offset+(pdcch_vars->pdcch_config[n_ss].BWPStart + coreset_start_rb)*12,
coreset_nb_rb); coreset_nb_rb);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_OUT); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_OUT);
......
...@@ -446,7 +446,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_ ...@@ -446,7 +446,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
return (FALSE); return (FALSE);
} }
int max_code_rate = 0; //int max_code_rate = 0;
//int Q_m = BITS_PER_SYMBOL_QPSK; /* default pucch modulation type is QPSK with 2 bits per symbol */ //int Q_m = BITS_PER_SYMBOL_QPSK; /* default pucch modulation type is QPSK with 2 bits per symbol */
int N_sc_ctrl_RB = 0; int N_sc_ctrl_RB = 0;
int O_CRC = 0; int O_CRC = 0;
...@@ -503,7 +503,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_ ...@@ -503,7 +503,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
if (format != pucch_format0_nr) { if (format != pucch_format0_nr) {
if (mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->format1 != NULL) { if (mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->format1 != NULL) {
max_code_rate = code_rate_r_time_100[mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->format1->choice.setup->maxCodeRate[0]]; /* it is code rate * 10 */ //max_code_rate = code_rate_r_time_100[mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->format1->choice.setup->maxCodeRate[0]]; /* it is code rate * 10 */
if ((O_ACK != 0) && (mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->format1->choice.setup->simultaneousHARQ_ACK_CSI[0] == 0)) { if ((O_ACK != 0) && (mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->format1->choice.setup->simultaneousHARQ_ACK_CSI[0] == 0)) {
N_UCI = N_UCI - O_CSI; N_UCI = N_UCI - O_CSI;
......
...@@ -1024,9 +1024,13 @@ void NRRCConfig(void) { ...@@ -1024,9 +1024,13 @@ void NRRCConfig(void) {
paramdef_t GNBSParams[] = GNBSPARAMS_DESC; paramdef_t GNBSParams[] = GNBSPARAMS_DESC;
/* get global parameters, defined outside any section in the config file */ /* get global parameters, defined outside any section in the config file */
LOG_I(GNB_APP, "Getting GNBSParams\n"); LOG_I(GNB_APP, "Getting GNBSParams\n");
config_get( GNBSParams,sizeof(GNBSParams)/sizeof(paramdef_t),NULL); config_get( GNBSParams,sizeof(GNBSParams)/sizeof(paramdef_t),NULL);
RC.nb_nr_inst = GNBSParams[GNB_ACTIVE_GNBS_IDX].numelt; RC.nb_nr_inst = GNBSParams[GNB_ACTIVE_GNBS_IDX].numelt;
// Get num MACRLC instances // Get num MACRLC instances
config_getlist( &MACRLCParamList,NULL,0, NULL); config_getlist( &MACRLCParamList,NULL,0, NULL);
RC.nb_macrlc_inst = MACRLCParamList.numelt; RC.nb_macrlc_inst = MACRLCParamList.numelt;
......
...@@ -3144,7 +3144,7 @@ int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDC ...@@ -3144,7 +3144,7 @@ int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDC
type0_PDCCH_CSS_config->n_c=UINT_MAX; type0_PDCCH_CSS_config->n_c=UINT_MAX;
type0_PDCCH_CSS_config->number_of_search_space_per_slot=UINT_MAX; type0_PDCCH_CSS_config->number_of_search_space_per_slot=UINT_MAX;
type0_PDCCH_CSS_config->first_symbol_index=UINT_MAX; type0_PDCCH_CSS_config->first_symbol_index=UINT_MAX;
type0_PDCCH_CSS_config->search_space_duration; // element of search space type0_PDCCH_CSS_config->search_space_duration=0; // element of search space
// 38.213 table 10.1-1 // 38.213 table 10.1-1
/// MUX PATTERN 1 /// MUX PATTERN 1
......
...@@ -789,7 +789,6 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response, ...@@ -789,7 +789,6 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response,
scheduled_response->thread_id = thread_id; scheduled_response->thread_id = thread_id;
} }
uint8_t table_9_2_2_1[16][8]={ uint8_t table_9_2_2_1[16][8]={
{0,12,2, 0, 0,3,0,0}, {0,12,2, 0, 0,3,0,0},
{0,12,2, 0, 0,4,8,0}, {0,12,2, 0, 0,4,8,0},
...@@ -958,10 +957,6 @@ int8_t nr_ue_decode_mib(module_id_t module_id, ...@@ -958,10 +957,6 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
// fill in the elements in config request inside P5 message
mac->phy_config.Mod_id = module_id;
mac->phy_config.CC_id = cc_id;
nr_mac_rrc_data_ind_ue( module_id, cc_id, gNB_index, NR_BCCH_BCH, (uint8_t *) pduP, 3 ); // fixed 3 bytes MIB PDU nr_mac_rrc_data_ind_ue( module_id, cc_id, gNB_index, NR_BCCH_BCH, (uint8_t *) pduP, 3 ); // fixed 3 bytes MIB PDU
AssertFatal(mac->mib != NULL, "nr_ue_decode_mib() mac->mib == NULL\n"); AssertFatal(mac->mib != NULL, "nr_ue_decode_mib() mac->mib == NULL\n");
...@@ -970,7 +965,7 @@ int8_t nr_ue_decode_mib(module_id_t module_id, ...@@ -970,7 +965,7 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
uint16_t frame_number_4lsb = 0; uint16_t frame_number_4lsb = 0;
for (int i=0; i<4; i++) for (int i=0; i<4; i++)
frame_number_4lsb |= ((extra_bits>>i)&1)<<(3-i); frame_number_4lsb |= ((extra_bits>>i)&1)<<(3-i);
uint8_t half_frame_bit = ( extra_bits >> 4 ) & 0x1; // extra bits[4] //uint8_t half_frame_bit = ( extra_bits >> 4 ) & 0x1; // extra bits[4]
uint8_t ssb_subcarrier_offset_msb = ( extra_bits >> 5 ) & 0x1; // extra bits[5] uint8_t ssb_subcarrier_offset_msb = ( extra_bits >> 5 ) & 0x1; // extra bits[5]
uint8_t ssb_subcarrier_offset = (uint8_t)mac->mib->ssb_SubcarrierOffset; uint8_t ssb_subcarrier_offset = (uint8_t)mac->mib->ssb_SubcarrierOffset;
...@@ -997,7 +992,7 @@ int8_t nr_ue_decode_mib(module_id_t module_id, ...@@ -997,7 +992,7 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
LOG_I(MAC,"pdcch config sib1.searchSpaceZero: %d\n", (int)mac->mib->pdcch_ConfigSIB1.searchSpaceZero); LOG_I(MAC,"pdcch config sib1.searchSpaceZero: %d\n", (int)mac->mib->pdcch_ConfigSIB1.searchSpaceZero);
LOG_I(MAC,"cell barred (0=barred,1=notBarred): %d\n", (int)mac->mib->cellBarred); LOG_I(MAC,"cell barred (0=barred,1=notBarred): %d\n", (int)mac->mib->cellBarred);
LOG_I(MAC,"intra frequency reselection (0=allowed,1=notAllowed): %d\n", (int)mac->mib->intraFreqReselection); LOG_I(MAC,"intra frequency reselection (0=allowed,1=notAllowed): %d\n", (int)mac->mib->intraFreqReselection);
LOG_I(MAC,"half frame bit(extra bits): %d\n", (int)half_frame_bit); //LOG_I(MAC,"half frame bit(extra bits): %d\n", (int)half_frame_bit);
LOG_I(MAC,"ssb index(extra bits): %d\n", (int)ssb_index); LOG_I(MAC,"ssb index(extra bits): %d\n", (int)ssb_index);
#endif #endif
...@@ -1010,7 +1005,6 @@ int8_t nr_ue_decode_mib(module_id_t module_id, ...@@ -1010,7 +1005,6 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
mac->type0_pdcch_ss_n_c = mac->type0_PDCCH_CSS_config.n_c; mac->type0_pdcch_ss_n_c = mac->type0_PDCCH_CSS_config.n_c;
mac->dl_config_request.sfn = mac->type0_PDCCH_CSS_config.frame; mac->dl_config_request.sfn = mac->type0_PDCCH_CSS_config.frame;
mac->dl_config_request.slot = (ssb_index>>1) + ((ssb_index>>4)<<1); // not valid for 240kHz SCS mac->dl_config_request.slot = (ssb_index>>1) + ((ssb_index>>4)<<1); // not valid for 240kHz SCS
channel_bandwidth_t min_channel_bw = bw_10MHz; // default for testing
return 0; return 0;
} }
...@@ -1179,9 +1173,6 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -1179,9 +1173,6 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
} }
*/ */
} }
fapi_nr_dl_config_dci_dl_pdu_rel15_t dci_config_rel15 = dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15;
} else if (ul_info) { } else if (ul_info) {
// ULSCH is handled only in phy-test mode (consistently with OAI gNB) // ULSCH is handled only in phy-test mode (consistently with OAI gNB)
...@@ -3372,14 +3363,10 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -3372,14 +3363,10 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
LOG_D(MAC,"dlDmrsSymbPos = 0x%x\n", dlsch_config_pdu_1_0->dlDmrsSymbPos); LOG_D(MAC,"dlDmrsSymbPos = 0x%x\n", dlsch_config_pdu_1_0->dlDmrsSymbPos);
/* number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214 version 15.9.0 Release 15 */ /* number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214 version 15.9.0 Release 15 */
//if (dlsch_config_pdu_1_0->number_symbols == 2) if (dlsch_config_pdu_1_0->number_symbols == 2)
// dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 1;
//else
// dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 2;
/* TODO: fix number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214,
using tables 7.3.1.2.2-1, 7.3.1.2.2-2, 7.3.1.2.2-3, 7.3.1.2.2-4 of 3GPP TS 38.212 */
dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 1; dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 1;
else
dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 2;
/* VRB_TO_PRB_MAPPING */ /* VRB_TO_PRB_MAPPING */
dlsch_config_pdu_1_0->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping.val == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved; dlsch_config_pdu_1_0->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping.val == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved;
...@@ -4013,8 +4000,6 @@ int nr_extract_dci_info(NR_UE_MAC_INST_t *mac, ...@@ -4013,8 +4000,6 @@ int nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
LOG_D(MAC,"dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv); LOG_D(MAC,"dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv);
LOG_D(MAC,"dci_pdu_rel15->system_info_indicator = %i\n", dci_pdu_rel15->system_info_indicator); LOG_D(MAC,"dci_pdu_rel15->system_info_indicator = %i\n", dci_pdu_rel15->system_info_indicator);
getchar();
break; break;
case NR_RNTI_TC: case NR_RNTI_TC:
......
...@@ -215,7 +215,6 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, ...@@ -215,7 +215,6 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP,
} }
void schedule_nr_SI(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP) { void schedule_nr_SI(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP) {
//---------------------------------------- //----------------------------------------
} }
...@@ -236,7 +235,7 @@ void schedule_control_sib1(module_id_t module_id, ...@@ -236,7 +235,7 @@ void schedule_control_sib1(module_id_t module_id,
gNB_MAC_INST *gNB_mac = RC.nrmac[module_id]; gNB_MAC_INST *gNB_mac = RC.nrmac[module_id];
NR_ServingCellConfigCommon_t *servingcellconfigcommon = gNB_mac->common_channels[CC_id].ServingCellConfigCommon; NR_ServingCellConfigCommon_t *servingcellconfigcommon = gNB_mac->common_channels[CC_id].ServingCellConfigCommon;
uint8_t *vrb_map = RC.nrmac[module_id]->common_channels[CC_id].vrb_map; uint16_t *vrb_map = RC.nrmac[module_id]->common_channels[CC_id].vrb_map;
if (gNB_mac->sched_ctrlCommon == NULL){ if (gNB_mac->sched_ctrlCommon == NULL){
gNB_mac->sched_ctrlCommon = calloc(1,sizeof(*gNB_mac->sched_ctrlCommon)); gNB_mac->sched_ctrlCommon = calloc(1,sizeof(*gNB_mac->sched_ctrlCommon));
...@@ -444,7 +443,7 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) ...@@ -444,7 +443,7 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
int time_domain_allocation = 2; // FIXME: For OAI-UE (2), For 3rd party implementation and 3GPP compliant (4) int time_domain_allocation = 2; // FIXME: For OAI-UE (2), For 3rd party implementation and 3GPP compliant (4)
uint8_t mcsTableIdx = 0; uint8_t mcsTableIdx = 0;
uint8_t mcs = 8; uint8_t mcs = 8;
uint8_t numDmrsCdmGrpsNoData = 1; // FIXME: For OAI-UE (1), For 3rd party implementation and 3GPP compliant (2) uint8_t numDmrsCdmGrpsNoData = 2;
gNB_MAC_INST *gNB_mac = RC.nrmac[module_idP]; gNB_MAC_INST *gNB_mac = RC.nrmac[module_idP];
......
...@@ -63,7 +63,6 @@ ...@@ -63,7 +63,6 @@
#define ENABLE_MAC_PAYLOAD_DEBUG #define ENABLE_MAC_PAYLOAD_DEBUG
#define DEBUG_gNB_SCHEDULER 1 #define DEBUG_gNB_SCHEDULER 1
#include "common/ran_context.h" #include "common/ran_context.h"
extern RAN_CONTEXT_t RC; extern RAN_CONTEXT_t RC;
...@@ -189,7 +188,6 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac, ...@@ -189,7 +188,6 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
cce_list = nr_mac->cce_list[bwp->bwp_Id][coreset_id]; cce_list = nr_mac->cce_list[bwp->bwp_Id][coreset_id];
} }
int n_rb=0; int n_rb=0;
for (int i=0;i<6;i++) for (int i=0;i<6;i++)
for (int j=0;j<8;j++) { for (int j=0;j<8;j++) {
......
...@@ -191,7 +191,6 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_ ...@@ -191,7 +191,6 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu, (dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu_length)) << FAPI_NR_RX_PDU_TYPE_SIB; (dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu_length)) << FAPI_NR_RX_PDU_TYPE_SIB;
LOG_D(MAC,"[L2][IF MODULE][DL INDICATION][RX_IND], SIB case Number of PDUs: %d \n", dl_info->rx_ind->number_pdus);
break; break;
case FAPI_NR_RX_PDU_TYPE_DLSCH: case FAPI_NR_RX_PDU_TYPE_DLSCH:
......
...@@ -50,7 +50,7 @@ int generate_pdcch_ConfigSIB1(NR_PDCCH_ConfigSIB1_t *pdcch_ConfigSIB1, ...@@ -50,7 +50,7 @@ int generate_pdcch_ConfigSIB1(NR_PDCCH_ConfigSIB1_t *pdcch_ConfigSIB1,
long subCarrierSpacingCommon, long subCarrierSpacingCommon,
channel_bandwidth_t min_channel_bw) { channel_bandwidth_t min_channel_bw) {
nr_ssb_and_cset_mux_pattern_type_t mux_pattern; nr_ssb_and_cset_mux_pattern_type_t mux_pattern = 0;
switch (ssbSubcarrierSpacing) { switch (ssbSubcarrierSpacing) {
......
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