Commit b6288566 authored by Raymond Knopp's avatar Raymond Knopp

updates in UE for new process scheduling

parent 3fd226f7
......@@ -259,7 +259,7 @@ void phy_config_sib2_ue(uint8_t Mod_id,int CC_id,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_UE_CONFIG_SIB2, VCD_FUNCTION_IN);
LOG_I(PHY,"[UE%d] Frame %d: Applying radioResourceConfigCommon from eNB%d\n",Mod_id,PHY_vars_UE_g[Mod_id][CC_id]->frame_rx,CH_index);
LOG_I(PHY,"[UE%d] Applying radioResourceConfigCommon from eNB%d\n",Mod_id,CH_index);
frame_parms->prach_config_common.rootSequenceIndex =radioResourceConfigCommon->prach_Config.rootSequenceIndex;
......@@ -369,7 +369,7 @@ void phy_config_sib13_ue(uint8_t Mod_id,int CC_id,uint8_t CH_index,int mbsfn_Are
LTE_DL_FRAME_PARMS *frame_parms = &PHY_vars_UE_g[Mod_id][CC_id]->frame_parms;
LOG_I(PHY,"[UE%d] Frame %d: Applying MBSFN_Area_id %d for index %d\n",Mod_id,PHY_vars_UE_g[Mod_id][CC_id]->frame_rx,mbsfn_AreaId_r9,mbsfn_Area_idx);
LOG_I(PHY,"[UE%d] Applying MBSFN_Area_id %d for index %d\n",Mod_id,mbsfn_AreaId_r9,mbsfn_Area_idx);
if (mbsfn_Area_idx == 0) {
frame_parms->Nid_cell_mbsfn = (uint16_t)mbsfn_AreaId_r9;
......@@ -517,8 +517,8 @@ void phy_config_afterHO_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_id, Mobility
// uint8_t prach_fmt;
// int u;
LOG_I(PHY,"[UE%d] Frame %d: Handover triggered: Applying radioResourceConfigCommon from eNB %d\n",
Mod_id,PHY_vars_UE_g[Mod_id][CC_id]->frame_rx,eNB_id);
LOG_I(PHY,"[UE%d] Handover triggered: Applying radioResourceConfigCommon from eNB %d\n",
Mod_id,eNB_id);
frame_parms->prach_config_common.rootSequenceIndex =radioResourceConfigCommon->prach_Config.rootSequenceIndex;
frame_parms->prach_config_common.prach_Config_enabled=1;
......@@ -752,7 +752,7 @@ void phy_config_dedicated_ue(uint8_t Mod_id,int CC_id,uint8_t CH_index,
if (physicalConfigDedicated) {
LOG_D(PHY,"[UE %d] Frame %d: Received physicalConfigDedicated from eNB %d\n",Mod_id, phy_vars_ue->frame_rx,CH_index);
LOG_D(PHY,"[UE %d] Received physicalConfigDedicated from eNB %d\n",Mod_id, CH_index);
LOG_D(PHY,"------------------------------------------------------------------------\n");
if (physicalConfigDedicated->pdsch_ConfigDedicated) {
......@@ -843,7 +843,7 @@ void phy_config_dedicated_ue(uint8_t Mod_id,int CC_id,uint8_t CH_index,
#endif
} else {
LOG_D(PHY,"[PHY][UE %d] Frame %d: Received NULL radioResourceConfigDedicated from eNB %d\n",Mod_id, phy_vars_ue->frame_rx,CH_index);
LOG_D(PHY,"[PHY][UE %d] Received NULL radioResourceConfigDedicated from eNB %d\n",Mod_id,CH_index);
return;
}
......
......@@ -51,7 +51,7 @@ void lte_adjust_synch(LTE_DL_FRAME_PARMS *frame_parms,
ncoef = 32767 - coef;
#ifdef DEBUG_PHY
LOG_D(PHY,"frame %d, slot %d: rx_offset (before) = %d\n",ue->frame_rx,ue->slot_rx,ue->rx_offset);
LOG_D(PHY,"frame %d: rx_offset (before) = %d\n",ue->proc.proc_rxtx[0].frame_rx,ue->rx_offset);
#endif //DEBUG_PHY
......@@ -95,7 +95,7 @@ void lte_adjust_synch(LTE_DL_FRAME_PARMS *frame_parms,
#ifdef DEBUG_PHY
LOG_D(PHY,"frame %d: rx_offset (after) = %d : max_pos = %d,max_pos_fil = %d (peak %d)\n",
ue->frame_rx,ue->rx_offset,max_pos,max_pos_fil,temp);
ue->proc.proc_rxtx[0].frame_rx,ue->rx_offset,max_pos,max_pos_fil,temp);
#endif //DEBUG_PHY
......
......@@ -77,7 +77,7 @@ int16_t get_PL(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
RSoffset = 3;
*/
LOG_D(PHY,"get_PL : Frame %d : rsrp %f dBm/RE (%f), eNB power %d dBm/RE\n", ue->frame_rx,
LOG_D(PHY,"get_PL : Frame %d : rsrp %f dBm/RE (%f), eNB power %d dBm/RE\n", ue->proc.proc_rxtx[0].frame_rx,
(1.0*dB_fixed_times10(ue->measurements.rsrp[eNB_index])-(10.0*ue->rx_total_gain_dB))/10.0,
10*log10((double)ue->measurements.rsrp[eNB_index]),
ue->frame_parms.pdsch_config_common.referenceSignalPower);
......@@ -172,7 +172,7 @@ int8_t set_RSRQ_filtered(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index,float rs
}
void ue_rrc_measurements(PHY_VARS_UE *ue,
uint8_t slot,
uint8_t subframe,
uint8_t abstraction_flag)
{
......@@ -192,7 +192,7 @@ void ue_rrc_measurements(PHY_VARS_UE *ue,
if (abstraction_flag == 0) {
if ((ue->frame_parms.frame_type == FDD) &&
((slot == 0) || (slot == 10))) { // FDD PSS/SSS, compute noise in DTX REs
((subframe == 0) || (subframe == 5))) { // FDD PSS/SSS, compute noise in DTX REs
if (ue->frame_parms.Ncp==NORMAL) {
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
......@@ -240,7 +240,7 @@ void ue_rrc_measurements(PHY_VARS_UE *ue,
}
}
else if ((ue->frame_parms.frame_type == TDD) &&
(slot == 1)) { // TDD SSS, compute noise in DTX REs
(subframe == 0)) { // TDD SSS, compute noise in DTX REs
if (ue->frame_parms.Ncp==NORMAL) {
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
......@@ -294,7 +294,7 @@ void ue_rrc_measurements(PHY_VARS_UE *ue,
for (l=0,nu=0; l<=(4-ue->frame_parms.Ncp); l+=(4-ue->frame_parms.Ncp),nu=3) {
k = (nu + nushift)%6;
#ifdef DEBUG_MEAS
LOG_I(PHY,"[UE %d] Frame %d slot %d Doing ue_rrc_measurements rsrp/rssi (Nid_cell %d, nushift %d, eNB_offset %d, k %d, l %d)\n",ue->Mod_id,ue->frame_rx,slot,Nid_cell,nushift,
LOG_I(PHY,"[UE %d] Frame %d subframe %d Doing ue_rrc_measurements rsrp/rssi (Nid_cell %d, nushift %d, eNB_offset %d, k %d, l %d)\n",ue->Mod_id,ue->proc.proc_rxtx[subframe&1].frame_rx,subframe,Nid_cell,nushift,
eNB_offset,k,l);
#endif
......@@ -376,15 +376,15 @@ void ue_rrc_measurements(PHY_VARS_UE *ue,
// if (slot == 0) {
if (eNB_offset == 0)
LOG_I(PHY,"[UE %d] Frame %d, slot %d RRC Measurements => rssi %3.1f dBm (digital: %3.1f dB, gain %d), N0 %d dBm\n",ue->Mod_id,
ue->frame_rx,slot,10*log10(ue->measurements.rssi)-ue->rx_total_gain_dB,
LOG_I(PHY,"[UE %d] Frame %d, subframe %d RRC Measurements => rssi %3.1f dBm (digital: %3.1f dB, gain %d), N0 %d dBm\n",ue->Mod_id,
ue->proc.proc_rxtx[subframe&1].frame_rx,subframe,10*log10(ue->measurements.rssi)-ue->rx_total_gain_dB,
10*log10(ue->measurements.rssi),
ue->rx_total_gain_dB,
ue->measurements.n0_power_tot_dBm);
LOG_I(PHY,"[UE %d] Frame %d, slot %d RRC Measurements (idx %d, Cell id %d) => rsrp: %3.1f dBm/RE (%d), rsrq: %3.1f dB\n",
LOG_I(PHY,"[UE %d] Frame %d, subframe %d RRC Measurements (idx %d, Cell id %d) => rsrp: %3.1f dBm/RE (%d), rsrq: %3.1f dB\n",
ue->Mod_id,
ue->frame_rx,slot,eNB_offset,
ue->proc.proc_rxtx[subframe&1].frame_rx,subframe,eNB_offset,
(eNB_offset>0) ? ue->measurements.adj_cell_id[eNB_offset-1] : ue->frame_parms.Nid_cell,
10*log10(ue->measurements.rsrp[eNB_offset])-ue->rx_total_gain_dB,
ue->measurements.rsrp[eNB_offset],
......@@ -699,9 +699,9 @@ void lte_ue_measurements(PHY_VARS_UE *ue,
}
void lte_ue_measurements_emul(PHY_VARS_UE *ue,uint8_t last_slot,uint8_t eNB_id)
void lte_ue_measurements_emul(PHY_VARS_UE *ue,uint8_t subframe,uint8_t eNB_id)
{
msg("[PHY] EMUL UE lte_ue_measurements_emul last slot %d, eNB_id %d\n",last_slot,eNB_id);
msg("[PHY] EMUL UE lte_ue_measurements_emul subframe %d, eNB_id %d\n",subframe,eNB_id);
}
......@@ -6236,6 +6236,7 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
uint8_t subframe,
DCI_format_t dci_format,
PHY_VARS_UE *ue,
UE_rxtx_proc_t *proc,
uint16_t si_rnti,
uint16_t ra_rnti,
uint16_t p_rnti,
......@@ -6269,12 +6270,12 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
harq_pid = 0;
else
harq_pid = subframe2harq_pid(frame_parms,
pdcch_alloc2ul_frame(frame_parms,ue->frame_rx,subframe),
pdcch_alloc2ul_frame(frame_parms,proc->frame_rx,subframe),
pdcch_alloc2ul_subframe(frame_parms,subframe));
if (harq_pid == 255) {
LOG_E(PHY, "frame %d, subframe %d, rnti %x, format %d: illegal harq_pid!\n",
ue->frame_rx, subframe, rnti, dci_format);
proc->frame_rx, subframe, rnti, dci_format);
return(-1);
}
......@@ -6401,7 +6402,7 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
if (rballoc > RIV_max) {
LOG_E(PHY,"frame %d, subframe %d, rnti %x, format %d: FATAL ERROR: generate_ue_ulsch_params_from_dci, rb_alloc > RIV_max\n",
ue->frame_rx, subframe, rnti, dci_format);
proc->frame_rx, subframe, rnti, dci_format);
return(-1);
}
......@@ -6416,13 +6417,13 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
if (ue->ul_power_control_dedicated[eNB_id].accumulationEnabled == 1) {
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d: f_pusch (ACC) %d, adjusting by %d (TPC %d)\n",
ue->Mod_id,harq_pid,ue->frame_rx,subframe,ulsch->f_pusch,
ue->Mod_id,harq_pid,proc->frame_rx,subframe,ulsch->f_pusch,
delta_PUSCH_acc[ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC],
ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC);
ulsch->f_pusch += delta_PUSCH_acc[ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC];
} else {
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d: f_pusch (ABS) %d, adjusting to %d (TPC %d)\n",
ue->Mod_id,harq_pid,ue->frame_rx,subframe,ulsch->f_pusch,
ue->Mod_id,harq_pid,proc->frame_rx,subframe,ulsch->f_pusch,
delta_PUSCH_abs[ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC],
ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC);
ulsch->f_pusch = delta_PUSCH_abs[ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC];
......@@ -7044,7 +7045,7 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
}
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d, subframe %d : Programming PUSCH with n_DMRS2 %d (cshift %d), nb_rb %d, first_rb %d, mcs %d, round %d, rv %d\n",
ue->Mod_id,harq_pid,ue->frame_rx,subframe,ulsch->harq_processes[harq_pid]->n_DMRS2,cshift,ulsch->harq_processes[harq_pid]->nb_rb,ulsch->harq_processes[harq_pid]->first_rb,
ue->Mod_id,harq_pid,proc->frame_rx,subframe,ulsch->harq_processes[harq_pid]->n_DMRS2,cshift,ulsch->harq_processes[harq_pid]->nb_rb,ulsch->harq_processes[harq_pid]->first_rb,
ulsch->harq_processes[harq_pid]->mcs,ulsch->harq_processes[harq_pid]->round,ulsch->harq_processes[harq_pid]->rvidx);
// ulsch->n_DMRS2 = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->cshift;
......@@ -7071,7 +7072,7 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
return(0);
} else {
LOG_E(PHY,"frame %d, subframe %d: FATAL ERROR, generate_ue_ulsch_params_from_dci, Illegal dci_format %d\n",
ue->frame_rx, subframe,dci_format);
proc->frame_rx, subframe,dci_format);
return(-1);
}
......
......@@ -123,7 +123,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
break;
default:
LOG_E(PHY,"[UE %d][FATAL] Frame %d subframe %d: Unknown PDSCH format %d\n",ue->frame_rx,subframe,type);
LOG_E(PHY,"[UE %d][FATAL] Frame %d subframe %d: Unknown PDSCH format %d\n",ue->proc.proc_rxtx[0].frame_rx,subframe,type);
return(-1);
break;
}
......
......@@ -43,6 +43,7 @@
//#define DEBUG_DRS
int generate_drs_pusch(PHY_VARS_UE *ue,
UE_rxtx_proc_t *proc,
uint8_t eNB_id,
short amp,
unsigned int subframe,
......@@ -70,7 +71,7 @@ int generate_drs_pusch(PHY_VARS_UE *ue,
uint32_t v0=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[subframe<<1];
uint32_t v1=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[1+(subframe<<1)];
int32_t ref_re,ref_im;
uint8_t harq_pid = subframe2harq_pid(frame_parms,ue->frame_tx,subframe);
uint8_t harq_pid = subframe2harq_pid(frame_parms,proc->frame_tx,subframe);
cyclic_shift0 = (frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift +
ue->ulsch[eNB_id]->harq_processes[harq_pid]->n_DMRS2 +
......
......@@ -239,20 +239,25 @@ int pbch_detection(PHY_VARS_UE *ue, runmode_t mode)
break;
}
ue->frame_rx = (((ue->pbch_vars[0]->decoded_output[2]&3)<<6) + (ue->pbch_vars[0]->decoded_output[1]>>2))<<2;
ue->frame_rx += frame_mod4;
ue->proc.proc_rxtx[0].frame_rx = (((ue->pbch_vars[0]->decoded_output[2]&3)<<6) + (ue->pbch_vars[0]->decoded_output[1]>>2))<<2;
ue->proc.proc_rxtx[0].frame_rx += frame_mod4;
ue->proc.proc_rxtx[1].frame_rx = (((ue->pbch_vars[0]->decoded_output[2]&3)<<6) + (ue->pbch_vars[0]->decoded_output[1]>>2))<<2;
ue->proc.proc_rxtx[1].frame_rx += frame_mod4;
#ifndef USER_MODE
// one frame delay
ue->frame_rx ++;
ue->proc.proc_rxtx[0].frame_rx ++;
ue->proc.proc_rxtx[1].frame_rx ++;
#endif
ue->frame_tx = ue->frame_rx;
ue->proc.proc_rxtx[0].frame_tx = ue->proc.proc_rxtx[0].frame_rx;
ue->proc.proc_rxtx[1].frame_tx = ue->proc.proc_rxtx[1].frame_rx;
#ifdef DEBUG_INITIAL_SYNCH
LOG_I(PHY,"[UE%d] Initial sync: pbch decoded sucessfully mode1_flag %d, tx_ant %d, frame %d, N_RB_DL %d, phich_duration %d, phich_resource %s!\n",
ue->Mod_id,
frame_parms->mode1_flag,
pbch_tx_ant,
ue->frame_rx,
ue->proc.proc_rxtx[0].frame_rx,
frame_parms->N_RB_DL,
frame_parms->phich_config_common.phich_duration,
phich_resource); //frame_parms->phich_config_common.phich_resource);
......@@ -475,7 +480,7 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
if (ue->mac_enabled==1) {
LOG_I(PHY,"[UE%d] Sending synch status to higher layers\n",ue->Mod_id);
//mac_resynch();
mac_xface->dl_phy_sync_success(ue->Mod_id,ue->frame_rx,0,1);//ue->common_vars.eNb_id);
mac_xface->dl_phy_sync_success(ue->Mod_id,ue->proc.proc_rxtx[0].frame_rx,0,1);//ue->common_vars.eNb_id);
ue->UE_mode[0] = PRACH;
}
else {
......@@ -491,7 +496,7 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
}
LOG_I(PHY,"[UE %d] Frame %d RRC Measurements => rssi %3.1f dBm (dig %3.1f dB, gain %d), N0 %d dBm, rsrp %3.1f dBm/RE, rsrq %3.1f dB\n",ue->Mod_id,
ue->frame_rx,
ue->proc.proc_rxtx[0].frame_rx,
10*log10(ue->measurements.rssi)-ue->rx_total_gain_dB,
10*log10(ue->measurements.rssi),
ue->rx_total_gain_dB,
......@@ -502,7 +507,7 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
LOG_I(PHY,"[UE %d] Frame %d MIB Information => %s, %s, NidCell %d, N_RB_DL %d, PHICH DURATION %d, PHICH RESOURCE %s, TX_ANT %d\n",
ue->Mod_id,
ue->frame_rx,
ue->proc.proc_rxtx[0].frame_rx,
duplex_string[ue->frame_parms.frame_type],
prefix_string[ue->frame_parms.Ncp],
ue->frame_parms.Nid_cell,
......@@ -513,7 +518,7 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
LOG_I(PHY,"[UE %d] Frame %d Measured Carrier Frequency %.0f Hz (offset %d Hz)\n",
ue->Mod_id,
ue->frame_rx,
ue->proc.proc_rxtx[0].frame_rx,
openair0_cfg[0].rx_freq[0]-ue->common_vars.freq_offset,
ue->common_vars.freq_offset);
......
......@@ -1055,6 +1055,7 @@ void generate_phich(LTE_DL_FRAME_PARMS *frame_parms,
void rx_phich(PHY_VARS_UE *ue,
UE_rxtx_proc_t *proc,
uint8_t subframe,
uint8_t eNB_id)
{
......@@ -1064,7 +1065,7 @@ void rx_phich(PHY_VARS_UE *ue,
LTE_UE_PDCCH **pdcch_vars = ue->pdcch_vars;
// uint8_t HI;
uint8_t harq_pid = phich_subframe_to_harq_pid(frame_parms,ue->frame_rx,subframe);
uint8_t harq_pid = phich_subframe_to_harq_pid(frame_parms,proc->frame_rx,subframe);
LTE_UE_ULSCH_t *ulsch = ue->ulsch[eNB_id];
int16_t phich_d[24],*phich_d_ptr,HI16;
// unsigned int i,aa;
......@@ -1082,10 +1083,10 @@ void rx_phich(PHY_VARS_UE *ue,
uint8_t pusch_subframe;
// check if we're expecting a PHICH in this subframe
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d PHICH RX\n",ue->Mod_id,harq_pid,ue->frame_rx,subframe);
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d PHICH RX\n",ue->Mod_id,harq_pid,proc->frame_rx,subframe);
if (ulsch->harq_processes[harq_pid]->status == ACTIVE) {
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d PHICH RX ACTIVE\n",ue->Mod_id,harq_pid,ue->frame_rx,subframe);
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d PHICH RX ACTIVE\n",ue->Mod_id,harq_pid,proc->frame_rx,subframe);
Ngroup_PHICH = (frame_parms->phich_config_common.phich_resource*frame_parms->N_RB_DL)/48;
if (((frame_parms->phich_config_common.phich_resource*frame_parms->N_RB_DL)%48) > 0)
......@@ -1349,14 +1350,14 @@ void rx_phich(PHY_VARS_UE *ue,
if (ue->ulsch_Msg3_active[eNB_id] == 1) {
LOG_D(PHY,"[UE %d][PUSCH %d][RAPROC] Frame %d subframe %d Msg3 PHICH, received NAK (%d) nseq %d, ngroup %d\n",
ue->Mod_id,harq_pid,
ue->frame_rx,
proc->frame_rx,
subframe,
HI16,
nseq_PHICH,
ngroup_PHICH);
get_Msg3_alloc_ret(&ue->frame_parms,
subframe,
ue->frame_rx,
proc->frame_rx,
&ue->ulsch_Msg3_frame[eNB_id],
&ue->ulsch_Msg3_subframe[eNB_id]);
ulsch->harq_processes[harq_pid]->subframe_scheduling_flag = 1;
......@@ -1374,7 +1375,7 @@ void rx_phich(PHY_VARS_UE *ue,
//#ifdef DEBUG_PHICH
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d PHICH, received NAK (%d) nseq %d, ngroup %d\n",
ue->Mod_id,harq_pid,
ue->frame_rx,
proc->frame_rx,
subframe,
HI16,
nseq_PHICH,
......@@ -1394,7 +1395,7 @@ void rx_phich(PHY_VARS_UE *ue,
if (ue->ulsch_Msg3_active[eNB_id] == 1) {
LOG_D(PHY,"[UE %d][PUSCH %d][RAPROC] Frame %d subframe %d Msg3 PHICH, received ACK (%d) nseq %d, ngroup %d\n\n",
ue->Mod_id,harq_pid,
ue->frame_rx,
proc->frame_rx,
subframe,
HI16,
nseq_PHICH,ngroup_PHICH);
......@@ -1402,7 +1403,7 @@ void rx_phich(PHY_VARS_UE *ue,
//#ifdef PHICH_DEBUG
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d PHICH, received ACK (%d) nseq %d, ngroup %d\n\n",
ue->Mod_id,harq_pid,
ue->frame_rx,
proc->frame_rx,
subframe, HI16,
nseq_PHICH,ngroup_PHICH);
//#endif
......
......@@ -55,7 +55,7 @@ extern int mac_get_rrc_status(uint8_t Mod_id,uint8_t eNB_flag,uint8_t index);
extern openair0_config_t openair0_cfg[];
#endif
int dump_ue_stats(PHY_VARS_UE *ue, char* buffer, int length, runmode_t mode, int input_level_dBm)
int dump_ue_stats(PHY_VARS_UE *ue, UE_rxtx_proc_t *proc,char* buffer, int length, runmode_t mode, int input_level_dBm)
{
uint8_t eNB=0;
......@@ -78,7 +78,7 @@ int dump_ue_stats(PHY_VARS_UE *ue, char* buffer, int length, runmode_t mode, int
/*
len += sprintf(&buffer[len],
"[UE PROC] Frame count: %d\neNB0 RSSI %d dBm/RE (%d dB, %d dB)\neNB1 RSSI %d dBm/RE (%d dB, %d dB)neNB2 RSSI %d dBm/RE (%d dB, %d dB)\nN0 %d dBm/RE, %f dBm/%dPRB (%d dB, %d dB)\n",
ue->frame_rx,
proc->frame_rx,
ue->measurements.rx_rssi_dBm[0],
ue->measurements.rx_power_dB[0][0],
ue->measurements.rx_power_dB[0][1],
......@@ -535,7 +535,7 @@ int dump_ue_stats(PHY_VARS_UE *ue, char* buffer, int length, runmode_t mode, int
} else {
len += sprintf(&buffer[len], "[UE PROC] Frame count: %d, RSSI %3.2f dB (%d dB, %d dB), N0 %3.2f dB (%d dB, %d dB)\n",
ue->frame_rx,
proc->frame_rx,
10*log10(ue->measurements.rssi),
ue->measurements.rx_power_dB[0][0],
ue->measurements.rx_power_dB[0][1],
......
......@@ -1328,6 +1328,7 @@ int32_t generate_srs_tx(PHY_VARS_UE *phy_vars_ue,
*/
int32_t generate_drs_pusch(PHY_VARS_UE *phy_vars_ue,
UE_rxtx_proc_t *proc,
uint8_t eNB_id,
int16_t amp,
uint32_t subframe,
......@@ -1398,6 +1399,7 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
uint8_t subframe,
DCI_format_t dci_format,
PHY_VARS_UE *phy_vars_ue,
UE_rxtx_proc_t *proc,
uint16_t si_rnti,
uint16_t ra_rnti,
uint16_t p_rnti,
......@@ -1406,6 +1408,7 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
uint8_t use_srs);
int32_t generate_ue_ulsch_params_from_rar(PHY_VARS_UE *phy_vars_ue,
UE_rxtx_proc_t *proc,
uint8_t eNB_id);
double sinr_eff_cqi_calc(PHY_VARS_UE *phy_vars_ue,
uint8_t eNB_id);
......@@ -1424,16 +1427,13 @@ int generate_eNB_ulsch_params_from_dci(PHY_VARS_eNB *PHY_vars_eNB,
void dump_ulsch(PHY_VARS_eNB *phy_vars_eNB,eNB_rxtx_proc_t *proc,uint8_t UE_id);
void dump_dlsch(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe,uint8_t harq_pid);
void dump_dlsch_SI(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe);
void dump_dlsch_ra(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe);
void dump_dlsch2(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint16_t coded_bits_per_codeword,int round);
int dump_dci(LTE_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci);
int dump_ue_stats(PHY_VARS_UE *phy_vars_ue, char* buffer, int length, runmode_t mode, int input_level_dBm);
int dump_ue_stats(PHY_VARS_UE *phy_vars_ue, UE_rxtx_proc_t *proc, char* buffer, int length, runmode_t mode, int input_level_dBm);
int dump_eNB_stats(PHY_VARS_eNB *phy_vars_eNB, char* buffer, int length);
......@@ -1550,11 +1550,13 @@ void generate_phich_top(PHY_VARS_eNB *phy_vars_eNB,
/* \brief This routine demodulates the PHICH and updates PUSCH/ULSCH parameters.
@param phy_vars_ue Pointer to UE variables
@param proc Pointer to RXN_TXNp4 proc
@param subframe Subframe of received PDCCH/PHICH
@param eNB_id Index of eNB
*/
void rx_phich(PHY_VARS_UE *phy_vars_ue,
UE_rxtx_proc_t *proc,
uint8_t subframe,
uint8_t eNB_id);
......@@ -1653,11 +1655,12 @@ void generate_pucch(int32_t **txdataF,
uint8_t subframe);
void generate_pucch_emul(PHY_VARS_UE *phy_vars_ue,
UE_rxtx_proc_t *proc,
PUCCH_FMT_t format,
uint8_t ncs1,
uint8_t *pucch_ack_payload,
uint8_t sr,
uint8_t subframe);
uint8_t sr);
uint32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
......
......@@ -403,13 +403,16 @@ void generate_pucch(int32_t **txdataF,
}
void generate_pucch_emul(PHY_VARS_UE *ue,
UE_rxtx_proc_t *proc,
PUCCH_FMT_t format,
uint8_t ncs1,
uint8_t *pucch_payload,
uint8_t sr,
uint8_t subframe)
uint8_t sr)
{
int subframe = proc->subframe_tx;
UE_transport_info[ue->Mod_id][ue->CC_id].cntl.pucch_flag = format;
UE_transport_info[ue->Mod_id][ue->CC_id].cntl.pucch_Ncs1 = ncs1;
......@@ -428,7 +431,7 @@ void generate_pucch_emul(PHY_VARS_UE *ue,
ue->pucch_payload[0] = pucch_payload[0] + (pucch_payload[1]<<1);
UE_transport_info[ue->Mod_id][ue->CC_id].cntl.pucch_payload = pucch_payload[0] + (pucch_payload[1]<<1);
} else if (format == pucch_format1) {
LOG_D(PHY,"[UE %d] Frame %d subframe %d Generating PUCCH for SR %d\n",ue->Mod_id,ue->frame_tx,subframe,sr);
LOG_D(PHY,"[UE %d] Frame %d subframe %d Generating PUCCH for SR %d\n",ue->Mod_id,proc->frame_tx,subframe,sr);
}
ue->sr[subframe] = sr;
......
......@@ -175,6 +175,7 @@ int generate_eNB_ulsch_params_from_rar(unsigned char *rar_pdu,
int8_t delta_PUSCH_msg2[8] = {-6,-4,-2,0,2,4,6,8};
int generate_ue_ulsch_params_from_rar(PHY_VARS_UE *ue,
UE_rxtx_proc_t *proc,
unsigned char eNB_id )
{
......@@ -189,13 +190,13 @@ int generate_ue_ulsch_params_from_rar(PHY_VARS_UE *ue,
// int current_dlsch_cqi = ue->current_dlsch_cqi[eNB_id];
uint8_t *rar = (uint8_t *)(rar_pdu+1);
uint8_t harq_pid = subframe2harq_pid(frame_parms,ue->frame_tx,subframe);
uint8_t harq_pid = subframe2harq_pid(frame_parms,proc->frame_tx,subframe);
uint16_t rballoc;
uint8_t cqireq;
uint16_t *RIV2nb_rb_LUT, *RIV2first_rb_LUT;
uint16_t RIV_max = 0;
LOG_D(PHY,"[eNB][RAPROC] Frame %d: generate_ue_ulsch_params_from_rar: subframe %d (harq_pid %d)\n",ue->frame_tx,subframe,harq_pid);
LOG_D(PHY,"[eNB][RAPROC] Frame %d: generate_ue_ulsch_params_from_rar: subframe %d (harq_pid %d)\n",proc->frame_tx,subframe,harq_pid);
switch (frame_parms->N_RB_DL) {
case 6:
......@@ -272,7 +273,7 @@ int generate_ue_ulsch_params_from_rar(PHY_VARS_UE *ue,
ulsch->uci_format = HLC_subband_cqi_nopmi;
fill_CQI(ulsch,meas,eNB_id,0,ue->frame_parms.N_RB_DL,0, transmission_mode,ue->sinr_eff);
if (((ue->frame_tx % 100) == 0) || (ue->frame_tx < 10))
if (((proc->frame_tx % 100) == 0) || (proc->frame_tx < 10))
print_CQI(ulsch->o,ulsch->uci_format,eNB_id,ue->frame_parms.N_RB_DL);
} else {
ulsch->O_RI = 0;
......
......@@ -509,7 +509,7 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
float **chest_t_abs;
float time[FRAME_LENGTH_COMPLEX_SAMPLES];
float freq[nsymb_ce*nb_antennas_rx*nb_antennas_tx];
int frame = phy_vars_ue->frame_rx;
int frame = phy_vars_ue->proc.proc_rxtx[0].frame_rx;
uint32_t total_dlsch_bitrate = phy_vars_ue->bitrate[eNB_id];
int coded_bits_per_codeword = 0;
int mcs = 0;
......
......@@ -159,7 +159,7 @@ enum transmission_access_mode {
typedef enum {
eNodeB_3GPP=0, // classical eNodeB function
eNodeB_3GPP_BBU, // classical eNodeB function with transport interface
eNodeB_3GPP_BBU, // eNodeB with NGFI IF5
NGFI_RRU_IF4, // NGFI_RRU (NGFI remote radio-unit, currently split at common - ue_specific interface, IF4)
NGFI_RCC_IF4 // NGFI_RCC (NGFI radio cloud center, currently split at common - ue_specific interface, IF4)
} eNB_func_t;
......@@ -250,8 +250,58 @@ typedef struct {
eNB_rxtx_proc_t proc_rxtx[2];
} eNB_proc_t;
//! \brief Number of eNB TX and RX threads.
//! This number must be equal to the number of LTE subframes (10). Each thread is responsible for a single subframe.
/// Context data structure for RX/TX portion of subframe processing
typedef struct {
/// Component Carrier index
uint8_t CC_id;
/// timestamp transmitted to HW
openair0_timestamp timestamp_tx;
/// subframe to act upon for transmission
int subframe_tx;
/// subframe to act upon for reception
int subframe_rx;
/// frame to act upon for transmission
int frame_tx;
/// frame to act upon for reception
int frame_rx;
/// \brief Instance count for RXn-TXnp4 processing thread.
/// \internal This variable is protected by \ref mutex_rxtx.
int instance_cnt_rxtx;
/// pthread structure for RXn-TXnp4 processing thread
pthread_t pthread_rxtx;
/// pthread attributes for RXn-TXnp4 processing thread
pthread_attr_t attr_rxtx;
/// condition variable for tx processing thread
pthread_cond_t cond_rxtx;
/// mutex for RXn-TXnp4 processing thread
pthread_mutex_t mutex_rxtx;
/// scheduling parameters for RXn-TXnp4 thread
struct sched_param sched_param_rxtx;
} UE_rxtx_proc_t;
/// Context data structure for eNB subframe processing
typedef struct {
/// Component Carrier index
uint8_t CC_id;
/// Last RX timestamp
openair0_timestamp timestamp_rx;
/// \brief Instance count for synch thread.
/// \internal This variable is protected by \ref mutex_synch.
int instance_cnt_synch;
/// pthread attributes for prach processing thread
pthread_attr_t attr_synch;
/// scheduling parameters for synch thread
struct sched_param sched_param_synch;
/// pthread descriptor synch thread
pthread_t pthread_synch;
/// condition variable for UE synch thread;
pthread_cond_t cond_synch;
/// mutex for UE synch thread
pthread_mutex_t mutex_synch;
/// set of scheduling variables RXn-TXnp4 threads
UE_rxtx_proc_t proc_rxtx[2];
} UE_proc_t;
/// Top-level PHY Data Structure for eNB
typedef struct PHY_VARS_eNB_s {
......@@ -491,34 +541,8 @@ typedef struct {
int UE_scan_carrier;
/// \brief Indicator that UE is synchronized to an eNB
int is_synchronized;
/// \brief Instance count of TX processing thread (-1 means ready, 0 means busy)
int instance_cnt_tx;
/// \brief Instance count of RX processing thread (-1 means ready, 0 means busy)
int instance_cnt_rx;
/// \brief Instance count of initial synchronization thread (-1 means ready, 0 means busy).
/// Protected by mutex \ref mutex_synch and condition \ref cond_synch.
int instance_cnt_synch;
/// \brief Condition variable for TX processing thread
pthread_cond_t cond_tx;
/// \brief Condition variable for RX processing thread
pthread_cond_t cond_rx;
/// \brief Condition variable for initial synchronization thread.
/// The corresponding mutex is \ref mutex_synch.
pthread_cond_t cond_synch;
/// \brief Mutex for TX processing thread
pthread_mutex_t mutex_tx;
/// \brief Mutex for RX processing thread
pthread_mutex_t mutex_rx;
/// \brief Mutex for initial synchronization thread.
/// Used to protect \ref instance_cnt_synch.
/// \sa cond_synch
pthread_mutex_t mutex_synch;
/// \brief Pthread structure for RX processing thread
pthread_t thread_rx;
/// \brief Pthread structure for TX processing thread
pthread_t thread_tx;
/// \brief Pthread structure to RX processing thread
pthread_t thread_synch;
/// Data structure for UE process scheduling
UE_proc_t proc;
/// \brief Total gain of the TX chain (16-bit baseband I/Q to antenna)
uint32_t tx_total_gain_dB;
/// \brief Total gain of the RX chain (antenna to baseband I/Q) This is a function of rx_gain_mode (and the corresponding gain) and the rx_gain of the card.
......@@ -535,10 +559,6 @@ typedef struct {
int tx_total_RE;
/// \brief Maximum transmit power
int8_t tx_power_max_dBm;
/// \brief Frame counters for TX and RX processing
uint32_t frame_rx,frame_tx;
/// \brief Slot counters for TX and RX processing
uint32_t slot_tx,slot_rx;
/// \brief Number of eNB seen by UE
uint8_t n_connected_eNB;
/// \brief indicator that Handover procedure has been initiated
......@@ -587,10 +607,14 @@ typedef struct {
uint32_t high_speed_flag;
uint32_t perfect_ce;
int16_t ch_est_alpha;
int generate_ul_signal[NUMBER_OF_CONNECTED_eNB_MAX];
UE_SCAN_INFO_t scan_info[NB_BANDS_MAX];
char ulsch_no_allocation_counter[NUMBER_OF_CONNECTED_eNB_MAX];
unsigned char ulsch_Msg3_active[NUMBER_OF_CONNECTED_eNB_MAX];
uint32_t ulsch_Msg3_frame[NUMBER_OF_CONNECTED_eNB_MAX];
unsigned char ulsch_Msg3_subframe[NUMBER_OF_CONNECTED_eNB_MAX];
......
......@@ -72,12 +72,7 @@ enum openair_ERROR {
enum openair_SYNCH_STATUS {
openair_NOT_SYNCHED=1,
#ifdef OPENAIR_LTE
openair_SYNCHED,
#else
openair_SYNCHED_TO_CHSCH,
openair_SYNCHED_TO_MRSCH,
#endif
openair_SCHED_EXIT
};
......@@ -86,65 +81,6 @@ enum openair_SYNCH_STATUS {
#define DAQ_AGC_OFF 0
/*
typedef struct {
boolean_t is_eNB;
uint8_t mode;
uint8_t synch_source;
uint32_t slot_count;
uint32_t sched_cnt;
uint32_t synch_wait_cnt;
uint32_t sync_state;
uint32_t scheduler_interval_ns;
uint32_t last_adac_cnt;
uint8_t first_sync_call;
int32_t instance_cnt;
uint8_t one_shot_get_frame;
uint8_t do_synch;
uint8_t node_configured; // &1..basic config, &3..ue config &5..eNb config
uint8_t node_running;
uint8_t tx_test;
uint8_t mac_registered;
//uint8_t freq;
uint32_t freq;
uint32_t rx_gain_val;
uint32_t rx_gain_mode;
uint32_t tcxo_dac;
uint32_t auto_freq_correction;
int32_t freq_offset;
uint32_t tx_rx_switch_point;
uint32_t manual_timing_advance; /// 1 to override automatic timing advance
int32_t timing_advance;
uint32_t dual_tx; /// 1 for dual-antenna TX, 0 for single-antenna TX
uint32_t tdd; /// 1 for TDD mode, 0 for FDD mode
uint32_t rx_rf_mode;
uint32_t node_id;
uint32_t rach_detection_count;
uint32_t channel_vacant[4];
uint32_t target_ue_dl_mcs;
uint32_t target_ue_ul_mcs;
uint32_t ue_ul_nb_rb;
uint32_t ue_dl_rb_alloc;
uint32_t dlsch_rate_adaptation;
uint32_t dlsch_transmission_mode;
uint32_t ulsch_allocation_mode;
uint32_t rx_total_gain_dB;
uint32_t hw_frame;
uint32_t get_frame_done;
uint32_t use_ia_receiver;
} OPENAIR_DAQ_VARS;
*/
#ifndef USER_MODE
int32_t openair_sched_init(void);
void openair_sched_cleanup(void);
void openair_sched_exit(char *);
void openair1_restart(void);
int32_t init_dlsch_threads(void);
void cleanup_dlsch_threads(void);
#endif //USER_MODE
#ifdef OPENAIR_LTE
/** @addtogroup _PHY_PROCEDURES_
* @{
*/
......@@ -168,7 +104,7 @@ void phy_procedures_eNB_lte(uint8_t subframe,PHY_VARS_eNB **phy_vars_eNB,uint8_t
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
@param *phy_vars_rn pointer to RN variables
*/
void phy_procedures_UE_lte(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,relaying_type_t r_type,PHY_VARS_RN *phy_vars_rn);
void phy_procedures_UE_lte(PHY_VARS_UE *phy_vars_ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,relaying_type_t r_type,PHY_VARS_RN *phy_vars_rn);
#ifdef Rel10
/*! \brief Top-level entry routine for relay node procedures when acting as eNB. This proc will make us of the existing eNB procs.
......@@ -187,22 +123,24 @@ int phy_procedures_RN_UE_RX(unsigned char last_slot, unsigned char next_slot, re
/*! \brief Scheduling for UE TX procedures in normal subframes.
@param phy_vars_ue Pointer to UE variables on which to act
@param proc Pointer to RXn-TXnp4 proc information
@param eNB_id Local id of eNB on which to act
@param abstraction_flag Indicator of PHY abstraction
@param mode calib/normal mode
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
*/
void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,relaying_type_t r_type);
void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,relaying_type_t r_type);
/*! \brief Scheduling for UE RX procedures in normal subframes.
@param last_slot Index of last slot (0-19)
@param phy_vars_ue Pointer to UE variables on which to act
@param proc Pointer to RXn_TXnp4 proc information
@param eNB_id Local id of eNB on which to act
@param abstraction_flag Indicator of PHY abstraction
@param mode calibration/debug mode
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
@param phy_vars_rn pointer to RN variables
*/
int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,relaying_type_t r_type,PHY_VARS_RN *phy_vars_rn);
int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,relaying_type_t r_type,PHY_VARS_RN *phy_vars_rn);
/*! \brief Scheduling for UE TX procedures in TDD S-subframes.
@param phy_vars_ue Pointer to UE variables on which to act
......@@ -385,11 +323,11 @@ uint8_t ul_ACK_subframe2_M(LTE_DL_FRAME_PARMS *frame_parms,unsigned char subfram
/*! \brief Indicates the SR TXOp in current subframe. Implements Table 10.1-5 from 36.213.
@param phy_vars_ue Pointer to UE variables
@param proc Pointer to RXn_TXnp4 thread context
@param eNB_id ID of eNB which is to receive the SR
@param subframe index of next subframe
@returns 1 if TXOp is active.
*/
uint8_t is_SR_TXOp(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe);
uint8_t is_SR_TXOp(PHY_VARS_UE *phy_vars_ue,UE_rxtx_proc_t *proc,uint8_t eNB_id);
/*! \brief Indicates the SR TXOp in current subframe for eNB and particular UE index. Implements Table 10.1-5 from 36.213.
@param phy_vars_eNB Pointer to eNB variables
......@@ -426,7 +364,7 @@ int32_t add_ue(int16_t rnti, PHY_VARS_eNB *phy_vars_eNB);
int mac_phy_remove_ue(module_id_t Mod_idP,rnti_t rnti);
void process_timing_advance(module_id_t Mod_id,uint8_t CC_id,int16_t timing_advance);
void process_timing_advance_rar(PHY_VARS_UE *phy_vars_ue,uint16_t timing_advance);
void process_timing_advance_rar(PHY_VARS_UE *phy_vars_ue,UE_rxtx_proc_t *proc,uint16_t timing_advance);
unsigned int get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb);
......@@ -436,15 +374,15 @@ void phy_reset_ue(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
subframe n-4 which is acknowledged in subframe n (for FDD) according to n1_pucch = Ncce + N1_pucch. For
TDD, this routine computes the complex procedure described in Section 10.1 of 36.213 (through tables 10.1-1,10.1-2)
@param phy_vars_ue Pointer to UE variables
@param proc Pointer to RXn-TXnp4 proc information
@param eNB_id Index of eNB
@param subframe subframe on which to act
@param b Pointer to PUCCH payload (b[0],b[1])
@param SR 1 means there's a positive SR in parallel to ACK/NAK
@returns n1_pucch
*/
uint16_t get_n1_pucch(PHY_VARS_UE *phy_vars_ue,
UE_rxtx_proc_t *proc,
uint8_t eNB_id,
uint8_t subframe,
uint8_t *b,
uint8_t SR);
......@@ -497,21 +435,21 @@ UE_MODE_t get_ue_mode(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
/*! \brief This function implements the power control mechanism for PUCCH from 36.213.
@param phy_vars_ue PHY variables
@param subframe Index of subframe
@param proc Pointer to proc descriptor
@param eNB_id Index of eNB
@param pucch_fmt Format of PUCCH that is being transmitted
@returns Transmit power
*/
int8_t pucch_power_cntl(PHY_VARS_UE *phy_vars_ue,uint8_t subframe,uint8_t eNB_id,PUCCH_FMT_t pucch_fmt);
int8_t pucch_power_cntl(PHY_VARS_UE *phy_vars_ue, UE_rxtx_proc_t *proc,uint8_t eNB_id,PUCCH_FMT_t pucch_fmt);
/*! \brief This function implements the power control mechanism for PUCCH from 36.213.
@param phy_vars_ue PHY variables
@param subframe Index of subframe
@param proc Pointer to proc descriptor
@param eNB_id Index of eNB
@param j index of type of PUSCH (SPS, Normal, Msg3)
@returns Transmit power
*/
void pusch_power_cntl(PHY_VARS_UE *phy_vars_ue,uint8_t subframe,uint8_t eNB_id,uint8_t j, uint8_t abstraction_flag);
void pusch_power_cntl(PHY_VARS_UE *phy_vars_ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t j, uint8_t abstraction_flag);
int8_t get_PHR(uint8_t Mod_id, uint8_t CC_id, uint8_t eNB_index);
......@@ -543,15 +481,13 @@ int16_t get_target_pucch_rx_power(module_id_t module_idP, uint8_t CC_id);
int get_ue_active_harq_pid(uint8_t Mod_id,uint8_t CC_id,uint16_t rnti,int frame, uint8_t subframe,uint8_t *harq_pid,uint8_t *round,uint8_t ul_flag);
void dump_dlsch(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe,uint8_t harq_pid);
void dump_dlsch_SI(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe);
void dump_dlsch_ra(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe);
void dump_dlsch(PHY_VARS_UE *phy_vars_ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subframe,uint8_t harq_pid);
void dump_dlsch_SI(PHY_VARS_UE *phy_vars_ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subframe);
void dump_dlsch_ra(PHY_VARS_UE *phy_vars_ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subframe);
void dump_dlsch2(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint16_t coded_bits_per_codeword,int round);
/*@}*/
#endif //OPENAIR_LTE
extern int slot_irq_handler(int irq, void *cookie);
#endif
......
......@@ -25,7 +25,7 @@
Address : Eurecom, Campus SophiaTech, 450 Route des Chappes, CS 50193 - 06904 Biot Sophia Antipolis cedex, FRANCE
*******************************************************************************/
*******************************************************************************/
/*! \file phy_procedures_lte_ue.c
* \brief Implementation of UE procedures from 36.213 LTE specifications
......@@ -49,14 +49,6 @@
#include "SCHED/phy_procedures_emos.h"
#endif
#ifdef EXMIMO
#ifdef DRIVER2013
#include "openair0_lib.h"
#include "gain_control.h"
extern int card;
#endif
#endif
#define DEBUG_PHY_PROC
#ifndef PUCCH
......@@ -75,9 +67,6 @@ fifo_dump_emos_UE emos_dump_UE;
#if defined(ENABLE_ITTI)
# include "intertask_interface.h"
# if ENABLE_RAL
# include "timer.h"
# endif
#endif
......@@ -91,24 +80,8 @@ extern int oai_exit;
uint8_t ulsch_input_buffer[2700] __attribute__ ((aligned(16)));
uint8_t access_mode;
#ifdef DLSCH_THREAD
extern int dlsch_instance_cnt[8];
extern int dlsch_subframe[8];
extern pthread_mutex_t dlsch_mutex[8];
/// Condition variable for dlsch thread
extern pthread_cond_t dlsch_cond[8];
extern int rx_pdsch_instance_cnt;
extern int rx_pdsch_slot;
extern pthread_mutex_t rx_pdsch_mutex;
/// Condition variable for rx_pdsch thread
extern pthread_cond_t rx_pdsch_cond;
#endif
DCI_ALLOC_t dci_alloc_rx[8];
#ifdef DIAG_PHY
extern int rx_sig_fifo;
#endif
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
......@@ -117,7 +90,7 @@ extern uint32_t downlink_frequency[MAX_NUM_CCs][4];
void dump_dlsch(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t subframe,uint8_t harq_pid)
void dump_dlsch(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subframe,uint8_t harq_pid)
{
unsigned int coded_bits_per_codeword;
uint8_t nsymb = (ue->frame_parms.Ncp == 0) ? 14 : 12;
......@@ -128,7 +101,7 @@ void dump_dlsch(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t subframe,uint8_t harq_pid
ue->dlsch[eNB_id][0]->harq_processes[harq_pid]->Qm,
ue->dlsch[eNB_id][0]->harq_processes[harq_pid]->Nl,
ue->pdcch_vars[eNB_id]->num_pdcch_symbols,
ue->frame_rx,subframe);
proc->frame_rx,subframe);
write_output("rxsigF0.m","rxsF0", ue->common_vars.rxdataF[0],2*nsymb*ue->frame_parms.ofdm_symbol_size,2,1);
write_output("rxsigF0_ext.m","rxsF0_ext", ue->pdsch_vars[0]->rxdataF_ext[0],2*nsymb*ue->frame_parms.ofdm_symbol_size,1,1);
......@@ -146,7 +119,7 @@ void dump_dlsch(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t subframe,uint8_t harq_pid
write_output("dlsch_mag2.m","dlschmag2",ue->pdsch_vars[0]->dl_ch_magb0,300*12,1,1);
}
void dump_dlsch_SI(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t subframe)
void dump_dlsch_SI(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subframe)
{
unsigned int coded_bits_per_codeword;
uint8_t nsymb = ((ue->frame_parms.Ncp == 0) ? 14 : 12);
......@@ -157,7 +130,7 @@ void dump_dlsch_SI(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t subframe)
2,
1,
ue->pdcch_vars[eNB_id]->num_pdcch_symbols,
ue->frame_rx,subframe);
proc->frame_rx,subframe);
LOG_D(PHY,"[UE %d] Dumping dlsch_SI : ofdm_symbol_size %d, nsymb %d, nb_rb %d, mcs %d, nb_rb %d, num_pdcch_symbols %d,G %d\n",
ue->Mod_id,
ue->frame_parms.ofdm_symbol_size,
......@@ -190,8 +163,8 @@ void dump_dlsch_SI(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t subframe)
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
//unsigned int gain_table[31] = {100,112,126,141,158,178,200,224,251,282,316,359,398,447,501,562,631,708,794,891,1000,1122,1258,1412,1585,1778,1995,2239,2512,2818,3162};
/*
unsigned int get_tx_amp_prach(int power_dBm, int power_max_dBm, int N_RB_UL)
{
unsigned int get_tx_amp_prach(int power_dBm, int power_max_dBm, int N_RB_UL)
{
int gain_dB = power_dBm - power_max_dBm;
int amp_x_100;
......@@ -226,7 +199,7 @@ unsigned int get_tx_amp_prach(int power_dBm, int power_max_dBm, int N_RB_UL)
return(amp_x_100);
else
return(amp_x_100/gain_table[-gain_dB]); // 245 corresponds to the factor sqrt(25/6)
}
}
*/
unsigned int get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb)
......@@ -251,7 +224,7 @@ unsigned int get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb
#endif
void dump_dlsch_ra(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t subframe)
void dump_dlsch_ra(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subframe)
{
unsigned int coded_bits_per_codeword;
uint8_t nsymb = ((ue->frame_parms.Ncp == 0) ? 14 : 12);
......@@ -262,7 +235,7 @@ void dump_dlsch_ra(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t subframe)
2,
1,
ue->pdcch_vars[eNB_id]->num_pdcch_symbols,
ue->frame_rx,subframe);
proc->frame_rx,subframe);
LOG_D(PHY,"[UE %d] Dumping dlsch_ra : nb_rb %d, mcs %d, nb_rb %d, num_pdcch_symbols %d,G %d\n",
ue->Mod_id,
ue->dlsch_ra[eNB_id]->harq_processes[0]->nb_rb,
......@@ -329,7 +302,7 @@ void ra_failed(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
// if contention resolution fails, go back to PRACH
PHY_vars_UE_g[Mod_id][CC_id]->UE_mode[eNB_index] = PRACH;
LOG_E(PHY,"[UE %d] Frame %d Random-access procedure fails, going back to PRACH, setting SIStatus = 0 and State RRC_IDLE\n",Mod_id,PHY_vars_UE_g[Mod_id][CC_id]->frame_rx);
LOG_E(PHY,"[UE %d] Random-access procedure fails, going back to PRACH, setting SIStatus = 0 and State RRC_IDLE\n",Mod_id);
//mac_xface->macphy_exit("");
}
......@@ -338,7 +311,7 @@ void ra_succeeded(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
int i;
LOG_I(PHY,"[UE %d][RAPROC] Frame %d Random-access procedure succeeded\n",Mod_id,PHY_vars_UE_g[Mod_id][CC_id]->frame_rx);
LOG_I(PHY,"[UE %d][RAPROC] Random-access procedure succeeded\n",Mod_id);
PHY_vars_UE_g[Mod_id][CC_id]->ulsch_Msg3_active[eNB_index] = 0;
PHY_vars_UE_g[Mod_id][CC_id]->UE_mode[eNB_index] = PUSCH;
......@@ -359,19 +332,13 @@ UE_MODE_t get_ue_mode(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
return(PHY_vars_UE_g[Mod_id][CC_id]->UE_mode[eNB_index]);
}
void process_timing_advance_rar(PHY_VARS_UE *ue,uint16_t timing_advance)
{
/*
if ((timing_advance>>10) & 1) //it is negative
timing_advance = timing_advance - (1<<11);
*/
void process_timing_advance_rar(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint16_t timing_advance) {
ue->timing_advance = timing_advance*4;
#ifdef DEBUG_PHY_PROC
LOG_I(PHY,"[UE %d] Frame %d, received (rar) timing_advance %d, HW timing advance %d\n",ue->Mod_id,ue->frame_rx, ue->timing_advance);
LOG_I(PHY,"[UE %d] Frame %d, received (rar) timing_advance %d, HW timing advance %d\n",ue->Mod_id,proc->frame_rx, ue->timing_advance);
#endif
}
......@@ -392,11 +359,13 @@ void process_timing_advance(uint8_t Mod_id,uint8_t CC_id,int16_t timing_advance)
}
uint8_t is_SR_TXOp(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t subframe)
uint8_t is_SR_TXOp(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id)
{
int subframe=proc->subframe_tx;
LOG_D(PHY,"[UE %d][SR %x] Frame %d subframe %d Checking for SR TXOp (sr_ConfigIndex %d)\n",
ue->Mod_id,ue->pdcch_vars[eNB_id]->crnti,ue->frame_tx,subframe,
ue->Mod_id,ue->pdcch_vars[eNB_id]->crnti,proc->frame_tx,subframe,
ue->scheduling_request_config[eNB_id].sr_ConfigIndex);
if (ue->scheduling_request_config[eNB_id].sr_ConfigIndex <= 4) { // 5 ms SR period
......@@ -406,13 +375,13 @@ uint8_t is_SR_TXOp(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t subframe)
if (subframe==(ue->scheduling_request_config[eNB_id].sr_ConfigIndex-5))
return(1);
} else if (ue->scheduling_request_config[eNB_id].sr_ConfigIndex <= 34) { // 20 ms SR period
if ((10*(ue->frame_tx&1)+subframe) == (ue->scheduling_request_config[eNB_id].sr_ConfigIndex-15))
if ((10*(proc->frame_tx&1)+subframe) == (ue->scheduling_request_config[eNB_id].sr_ConfigIndex-15))
return(1);
} else if (ue->scheduling_request_config[eNB_id].sr_ConfigIndex <= 74) { // 40 ms SR period
if ((10*(ue->frame_tx&3)+subframe) == (ue->scheduling_request_config[eNB_id].sr_ConfigIndex-35))
if ((10*(proc->frame_tx&3)+subframe) == (ue->scheduling_request_config[eNB_id].sr_ConfigIndex-35))
return(1);
} else if (ue->scheduling_request_config[eNB_id].sr_ConfigIndex <= 154) { // 80 ms SR period
if ((10*(ue->frame_tx&7)+subframe) == (ue->scheduling_request_config[eNB_id].sr_ConfigIndex-75))
if ((10*(proc->frame_tx&7)+subframe) == (ue->scheduling_request_config[eNB_id].sr_ConfigIndex-75))
return(1);
}
......@@ -420,8 +389,8 @@ uint8_t is_SR_TXOp(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t subframe)
}
uint16_t get_n1_pucch(PHY_VARS_UE *ue,
UE_rxtx_proc_t *proc,
uint8_t eNB_id,
uint8_t subframe,
uint8_t *b,
uint8_t SR)
{
......@@ -434,6 +403,7 @@ uint16_t get_n1_pucch(PHY_VARS_UE *ue,
int sf;
int M;
// clear this, important for case where n1_pucch selection is not used
int subframe=proc->subframe_tx;
ue->pucch_sel[subframe] = 0;
......@@ -451,10 +421,10 @@ uint16_t get_n1_pucch(PHY_VARS_UE *ue,
#ifdef DEBUG_PHY_PROC
if (bundling_flag==bundling) {
LOG_D(PHY,"[UE%d] Frame %d subframe %d : get_n1_pucch, bundling, SR %d/%d\n",ue->Mod_id,ue->frame_tx,subframe,SR,
LOG_D(PHY,"[UE%d] Frame %d subframe %d : get_n1_pucch, bundling, SR %d/%d\n",ue->Mod_id,proc->frame_tx,subframe,SR,
ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex);
} else {
LOG_D(PHY,"[UE%d] Frame %d subframe %d : get_n1_pucch, multiplexing, SR %d/%d\n",ue->Mod_id,ue->frame_tx,subframe,SR,
LOG_D(PHY,"[UE%d] Frame %d subframe %d : get_n1_pucch, multiplexing, SR %d/%d\n",ue->Mod_id,proc->frame_tx,subframe,SR,
ue->scheduling_request_config[eNB_id].sr_PUCCH_ResourceIndex);
}
......@@ -479,7 +449,7 @@ uint16_t get_n1_pucch(PHY_VARS_UE *ue,
subframe_offset = 4;
} else {
LOG_E(PHY,"[UE%d] : Frame %d phy_procedures_lte.c: get_n1pucch, illegal subframe %d for tdd_config %d\n",
ue->Mod_id,ue->frame_tx,subframe,frame_parms->tdd_config);
ue->Mod_id,proc->frame_tx,subframe,frame_parms->tdd_config);
return(0);
}
......@@ -589,14 +559,14 @@ uint16_t get_n1_pucch(PHY_VARS_UE *ue,
} // switch tdd_config
}
LOG_E(PHY,"[UE%d] : Frame %d phy_procedures_lte.c: get_n1pucch, exit without proper return\n",ue->frame_tx);
LOG_E(PHY,"[UE%d] : Frame %d phy_procedures_lte.c: get_n1pucch, exit without proper return\n",proc->frame_tx);
return(-1);
}
#ifdef EMOS
/*
void phy_procedures_emos_UE_TX(uint8_t next_slot,uint8_t eNB_id) {
void phy_procedures_emos_UE_TX(uint8_t next_slot,uint8_t eNB_id) {
uint8_t harq_pid;
......@@ -622,83 +592,244 @@ void phy_procedures_emos_UE_TX(uint8_t next_slot,uint8_t eNB_id) {
emos_dump_UE.uci_cnt[next_slot>>1] = 0;
}
}
}
}
*/
#endif
int dummy_tx_buffer[3840*4] __attribute__((aligned(16)));
PRACH_RESOURCES_t prach_resources_local;
void phy_procedures_UE_TX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,relaying_type_t r_type)
{
void ulsch_common_procedures(PHY_VARS_UE *ue, UE_rxtx_proc_t *proc) {
int i;
uint16_t first_rb, nb_rb;
uint8_t harq_pid;
unsigned int input_buffer_length;
unsigned int aa;
uint8_t Msg3_flag=0;
uint8_t pucch_ack_payload[2];
uint8_t n1_pucch;
ANFBmode_t bundling_flag;
PUCCH_FMT_t format;
uint8_t SR_payload;
int32_t prach_power;
uint8_t nsymb;
int aa;
LTE_DL_FRAME_PARMS *frame_parms=&ue->frame_parms;
uint8_t generate_ul_signal = 0;
uint8_t ack_status=0;
int8_t Po_PUCCH;
int32_t ulsch_start=0;
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
int overflow=0;
int k,l;
int nsymb;
int subframe_tx = proc->subframe_tx;
int frame_tx = proc->frame_tx;
int ulsch_start;
int overflow=0;
int dummy_tx_buffer[3840*4] __attribute__((aligned(16)));
start_meas(&ue->ofdm_mod_stats);
nsymb = (frame_parms->Ncp == 0) ? 14 : 12;
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)//this is the EXPRESS MIMO case
ulsch_start = (ue->rx_offset+subframe_tx*frame_parms->samples_per_tti-
ue->hw_timing_advance-
ue->timing_advance-
ue->N_TA_offset+5)%(LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_tti);
#else //this is the normal case
ulsch_start = (frame_parms->samples_per_tti*subframe_tx)-ue->N_TA_offset; //-ue->timing_advance;
#endif //else EXMIMO
if ((frame_tx%100) == 0)
LOG_D(PHY,"[UE %d] Frame %d, subframe %d: ulsch_start = %d (rxoff %d, HW TA %d, timing advance %d, TA_offset %d\n",
ue->Mod_id,frame_tx,subframe_tx,
ulsch_start,
ue->rx_offset,
ue->hw_timing_advance,
ue->timing_advance,
ue->N_TA_offset);
for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
if (frame_parms->Ncp == 1)
PHY_ofdm_mod(&ue->common_vars.txdataF[aa][subframe_tx*nsymb*frame_parms->ofdm_symbol_size],
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
dummy_tx_buffer,
#else
&ue->common_vars.txdata[aa][ulsch_start],
#endif
int slot_tx = ue->slot_tx;
int subframe_tx = ue->slot_tx>>1;
int frame_tx = ue->frame_tx;
int Mod_id = ue->Mod_id;
int CC_id = ue->CC_id;
int tx_amp;
frame_parms->ofdm_symbol_size,
nsymb,
frame_parms->nb_prefix_samples,
CYCLIC_PREFIX);
else
normal_prefix_mod(&ue->common_vars.txdataF[aa][subframe_tx*nsymb*frame_parms->ofdm_symbol_size],
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
dummy_tx_buffer,
#else
&ue->common_vars.txdata[aa][ulsch_start],
#endif
nsymb,
&ue->frame_parms);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX,VCD_FUNCTION_IN);
start_meas(&ue->phy_proc_tx);
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
apply_7_5_kHz(ue,dummy_tx_buffer,0);
apply_7_5_kHz(ue,dummy_tx_buffer,1);
#else
apply_7_5_kHz(ue,&ue->common_vars.txdata[aa][ulsch_start],0);
apply_7_5_kHz(ue,&ue->common_vars.txdata[aa][ulsch_start],1);
#endif
#ifdef EMOS
//phy_procedures_emos_UE_TX(next_slot);
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
overflow = ulsch_start - 9*frame_parms->samples_per_tti;
for (k=ulsch_start,l=0; k<cmin(frame_parms->samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME,ulsch_start+frame_parms->samples_per_tti); k++,l++) {
((short*)ue->common_vars.txdata[aa])[2*k] = ((short*)dummy_tx_buffer)[2*l]<<4;
((short*)ue->common_vars.txdata[aa])[2*k+1] = ((short*)dummy_tx_buffer)[2*l+1]<<4;
}
for (k=0; k<overflow; k++,l++) {
((short*)ue->common_vars.txdata[aa])[2*k] = ((short*)dummy_tx_buffer)[2*l]<<4;
((short*)ue->common_vars.txdata[aa])[2*k+1] = ((short*)dummy_tx_buffer)[2*l+1]<<4;
}
#if defined(EXMIMO)
// handle switch before 1st TX subframe, guarantee that the slot prior to transmission is switch on
for (k=ulsch_start - (frame_parms->samples_per_tti>>1) ; k<ulsch_start ; k++) {
if (k<0)
ue->common_vars.txdata[aa][k+frame_parms->samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME] &= 0xFFFEFFFE;
else if (k>(frame_parms->samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME))
ue->common_vars.txdata[aa][k-frame_parms->samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME] &= 0xFFFEFFFE;
else
ue->common_vars.txdata[aa][k] &= 0xFFFEFFFE;
}
#endif
#endif
if ((slot_tx%2)==0) {
ue->tx_power_dBm=-127;
} //nb_antennas_tx
if (abstraction_flag==0) {
for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
memset(&ue->common_vars.txdataF[aa][subframe_tx*frame_parms->ofdm_symbol_size*frame_parms->symbols_per_tti],
0,
frame_parms->ofdm_symbol_size*frame_parms->symbols_per_tti*sizeof(int32_t));
stop_meas(&ue->ofdm_mod_stats);
}
void ue_prach_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode) {
int frame_tx = proc->frame_tx;
int subframe_tx = proc->subframe_tx;
int prach_power;
PRACH_RESOURCES_t prach_resources_local;
ue->generate_prach=0;
if (ue->mac_enabled==0){
ue->prach_resources[eNB_id] = &prach_resources_local;
prach_resources_local.ra_RNTI = 0xbeef;
prach_resources_local.ra_PreambleIndex = 0;
}
if (ue->mac_enabled==1){
// ask L2 for RACH transport
if ((mode != rx_calib_ue) && (mode != rx_calib_ue_med) && (mode != rx_calib_ue_byp) && (mode != no_L2_connect) ) {
ue->prach_resources[eNB_id] = mac_xface->ue_get_rach(ue->Mod_id,
ue->CC_id,
frame_tx,
eNB_id,
subframe_tx);
// LOG_I(PHY,"Got prach_resources for eNB %d address %d, RRCCommon %d\n",eNB_id,ue->prach_resources[eNB_id],UE_mac_inst[Mod_id].radioResourceConfigCommon);
}
}
if (ue->UE_mode[eNB_id] != PRACH) {
/*
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d] Frame %d, slot %d: Generating SRS\n",Mod_id,ue->frame,slot_tx);
#endif
if (ue->prach_resources[eNB_id]!=NULL) {
ue->generate_prach=1;
ue->prach_cnt=0;
#ifdef SMBV
ue->prach_resources[eNB_id]->ra_PreambleIndex = 19;
#endif
#ifdef OAI_EMU
ue->prach_PreambleIndex=ue->prach_resources[eNB_id]->ra_PreambleIndex;
#endif
if (abstraction_flag == 0) {
#ifdef OFDMA_ULSCH
generate_srs_tx(ue,eNB_id,AMP,subframe_tx);
#else
generate_srs_tx(ue,eNB_id,AMP,subframe_tx);
#endif
}
LOG_I(PHY,"[UE %d][RAPROC] Frame %d, Subframe %d : Generating PRACH, preamble %d, TARGET_RECEIVED_POWER %d dBm, PRACH TDD Resource index %d, RA-RNTI %d\n",
ue->Mod_id,
frame_tx,
subframe_tx,
ue->prach_resources[eNB_id]->ra_PreambleIndex,
ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER,
ue->prach_resources[eNB_id]->ra_TDD_map_index,
ue->prach_resources[eNB_id]->ra_RNTI);
#ifdef PHY_ABSTRACTION
if ((ue->mac_enabled==1) && (mode != calib_prach_tx)) {
ue->tx_power_dBm = ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER+get_PL(ue->Mod_id,ue->CC_id,eNB_id);
}
else {
generate_srs_tx_emul(ue,subframe_tx);
ue->tx_power_dBm = ue->tx_power_max_dBm;
ue->prach_resources[eNB_id]->ra_PreambleIndex = 19;
}
#endif
*/
ue->tx_total_RE = 96;
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
ue->prach_vars[eNB_id]->amp = get_tx_amp(ue->tx_power_dBm,
ue->tx_power_max_dBm,
ue->frame_parms.N_RB_UL,
6);
#else
ue->prach_vars[eNB_id]->amp = AMP;
#endif
if ((mode == calib_prach_tx) && (((proc->frame_tx&0xfffe)%100)==0))
LOG_D(PHY,"[UE %d][RAPROC] Frame %d, Subframe %d : PRACH TX power %d dBm, amp %d\n",
ue->Mod_id,
proc->frame_rx,
proc->subframe_tx,
ue->tx_power_dBm,
ue->prach_vars[eNB_id]->amp);
// start_meas(&ue->tx_prach);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GENERATE_PRACH, VCD_FUNCTION_IN);
prach_power = generate_prach(ue,eNB_id,subframe_tx,frame_tx);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GENERATE_PRACH, VCD_FUNCTION_OUT);
// stop_meas(&ue->tx_prach);
LOG_D(PHY,"[UE %d][RAPROC] PRACH PL %d dB, power %d dBm, digital power %d dB (amp %d)\n",
ue->Mod_id,
get_PL(ue->Mod_id,ue->CC_id,eNB_id),
ue->tx_power_dBm,
dB_fixed(prach_power),
ue->prach_vars[eNB_id]->amp);
} else {
UE_transport_info[ue->Mod_id][ue->CC_id].cntl.prach_flag=1;
UE_transport_info[ue->Mod_id][ue->CC_id].cntl.prach_id=ue->prach_resources[eNB_id]->ra_PreambleIndex;
if (ue->mac_enabled==1){
mac_xface->Msg1_transmitted(ue->Mod_id,
ue->CC_id,
frame_tx,
eNB_id);
}
}
LOG_D(PHY,"[UE %d][RAPROC] Frame %d, subframe %d: Generating PRACH (eNB %d) preamble index %d for UL, TX power %d dBm (PL %d dB), l3msg \n",
ue->Mod_id,frame_tx,subframe_tx,eNB_id,
ue->prach_resources[eNB_id]->ra_PreambleIndex,
ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER+get_PL(ue->Mod_id,ue->CC_id,eNB_id),
get_PL(ue->Mod_id,ue->CC_id,eNB_id));
}
// if we're calibrating the PRACH kill the pointer to its resources so that the RA protocol doesn't continue
if (mode == calib_prach_tx)
ue->prach_resources[eNB_id]=NULL;
LOG_D(PHY,"[UE %d] frame %d subframe %d : generate_prach %d, prach_cnt %d\n",
ue->Mod_id,frame_tx,subframe_tx,ue->generate_prach,ue->prach_cnt);
ue->prach_cnt++;
if (ue->prach_cnt==3)
ue->generate_prach=0;
}
void ue_ulsch_uespec_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag) {
int harq_pid;
int frame_tx=proc->frame_tx;
int subframe_tx=proc->subframe_tx;
int Mod_id = ue->Mod_id;
int CC_id = ue->CC_id;
uint8_t Msg3_flag=0;
uint8_t ack_status=0;
uint16_t first_rb, nb_rb;
unsigned int input_buffer_length;
int i;
int aa;
int tx_amp;
// get harq_pid from subframe relationship
harq_pid = subframe2harq_pid(&ue->frame_parms,
frame_tx,
......@@ -714,6 +845,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_fla
if (ue->ulsch[eNB_id]->harq_processes[harq_pid]->round==0)
generate_ue_ulsch_params_from_rar(ue,
proc,
eNB_id);
ue->ulsch[eNB_id]->power_offset = 14;
......@@ -740,7 +872,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_fla
if (ue->ulsch[eNB_id]->harq_processes[harq_pid]->subframe_scheduling_flag == 1) {
generate_ul_signal = 1;
ue->generate_ul_signal[eNB_id] = 1;
// deactivate service request
ue->ulsch[eNB_id]->harq_processes[harq_pid]->subframe_scheduling_flag = 0;
......@@ -754,10 +886,6 @@ void phy_procedures_UE_TX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_fla
nb_rb = ue->ulsch[eNB_id]->harq_processes[harq_pid]->nb_rb;
//frame_parms->pusch_config_c ommon.ul_ReferenceSignalsPUSCH.cyclicShift = 0;
//frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.nPRS[20] = 0;
#ifdef DEBUG_PHY_PROC
......@@ -768,12 +896,12 @@ void phy_procedures_UE_TX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_fla
ue->ulsch[eNB_id]->harq_processes[harq_pid]->round,
ue->ulsch[eNB_id]->harq_processes[harq_pid]->mcs,
ue->ulsch[eNB_id]->harq_processes[harq_pid]->rvidx,
(frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift+
(ue->frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift+
ue->ulsch[eNB_id]->harq_processes[harq_pid]->n_DMRS2+
frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.nPRS[slot_tx])%12,
frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift,
ue->frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.nPRS[subframe_tx<<1])%12,
ue->frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift,
ue->ulsch[eNB_id]->harq_processes[harq_pid]->n_DMRS2,
frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.nPRS[slot_tx],
ue->frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.nPRS[subframe_tx<<1],
ue->ulsch[eNB_id]->o_ACK[0],ue->ulsch[eNB_id]->o_ACK[1],
ue->ulsch[eNB_id]->harq_processes[harq_pid]->O_ACK);
#endif
......@@ -791,12 +919,9 @@ void phy_procedures_UE_TX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_fla
//#ifdef DEBUG_PHY_PROC
// debug_LOG_D(PHY,"[UE %d] Frame %d, Subframe %d ulsch harq_pid %d : O %d, O_ACK %d, O_RI %d, TBS %d\n",Mod_id,ue->frame,subframe_tx,harq_pid,ue->ulsch[eNB_id]->O,ue->ulsch[eNB_id]->O_ACK,ue->ulsch[eNB_id]->O_RI,ue->ulsch[eNB_id]->harq_processes[harq_pid]->TBS);
//#endif
if (Msg3_flag == 1) {
LOG_I(PHY,"[UE %d][RAPROC] Frame %d, Subframe %d next slot %d Generating (RRCConnectionRequest) Msg3 (nb_rb %d, first_rb %d, round %d, rvidx %d) Msg3: %x.%x.%x|%x.%x.%x.%x.%x.%x\n",Mod_id,frame_tx,
subframe_tx, slot_tx,
LOG_I(PHY,"[UE %d][RAPROC] Frame %d, Subframe %d Generating (RRCConnectionRequest) Msg3 (nb_rb %d, first_rb %d, round %d, rvidx %d) Msg3: %x.%x.%x|%x.%x.%x.%x.%x.%x\n",Mod_id,frame_tx,
subframe_tx,
ue->ulsch[eNB_id]->harq_processes[harq_pid]->nb_rb,
ue->ulsch[eNB_id]->harq_processes[harq_pid]->first_rb,
ue->ulsch[eNB_id]->harq_processes[harq_pid]->round,
......@@ -833,6 +958,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_fla
}
#endif
stop_meas(&ue->ulsch_encoding_stats);
if (ue->mac_enabled == 1) {
......@@ -842,7 +968,8 @@ void phy_procedures_UE_TX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_fla
frame_tx,
eNB_id);
}
} else {
} // Msg3_flag==1
else {
input_buffer_length = ue->ulsch[eNB_id]->harq_processes[harq_pid]->TBS/8;
if (ue->mac_enabled==1) {
......@@ -858,18 +985,6 @@ void phy_procedures_UE_TX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_fla
ulsch_input_buffer,
input_buffer_length,
&access_mode);
//}
/*
else {
// Get calibration information from TDD procedures
LOG_D(PHY,"[UE %d] Frame %d, subframe %d : ULSCH: Getting TDD Auto-Calibration information\n",
Mod_id,ue->frame,subframe_tx);
for (i=0;i<input_buffer_length;i++)
ulsch_input_buffer[i]= i;
}
*/
}
#ifdef DEBUG_PHY_PROC
......@@ -884,40 +999,17 @@ void phy_procedures_UE_TX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_fla
#endif
}
else {
// the following lines were necessary for the calibration in CROWN
/*
if (ue->ulsch[eNB_id]->harq_processes[harq_pid]->calibration_flag == 0) {
for (i=0;i<input_buffer_length;i++)
ulsch_input_buffer[i]= (uint8_t)(taus()&0xff);
}
else {
// Get calibration information from TDD procedures
}
*/
unsigned int taus(void);
for (i=0; i<input_buffer_length; i++)
ulsch_input_buffer[i]= (uint8_t)(taus()&0xff);
// the following lines were necessary for the collaborative UL in PUCCO
/*
memset(ue->ulsch[eNB_id]->o ,0,MAX_CQI_BYTES*sizeof(uint8_t));
memset(ue->ulsch[eNB_id]->o_RI ,0,2*sizeof(uint8_t));
memset(ue->ulsch[eNB_id]->o_ACK,0,4*sizeof(uint8_t));
for (i=0;i<input_buffer_length;i++)
ulsch_input_buffer[i]= i;
*/
}
start_meas(&ue->ulsch_encoding_stats);
if (abstraction_flag==0) {
/*
if (ue->frame%100==0) {
LOG_I(PHY,"Encoding ulsch\n");
}
*/
if (ulsch_encoding(ulsch_input_buffer,
ue,
harq_pid,
......@@ -942,7 +1034,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_fla
if (abstraction_flag == 0) {
if (ue->mac_enabled==1) {
pusch_power_cntl(ue,subframe_tx,eNB_id,1, abstraction_flag);
pusch_power_cntl(ue,proc,eNB_id,1, abstraction_flag);
ue->tx_power_dBm = ue->ulsch[eNB_id]->Po_PUSCH;
}
else {
......@@ -969,6 +1061,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_fla
ue->ulsch[eNB_id]);
for (aa=0; aa<1/*frame_parms->nb_antennas_tx*/; aa++)
generate_drs_pusch(ue,
proc,
eNB_id,
tx_amp,
subframe_tx,
......@@ -983,16 +1076,31 @@ void phy_procedures_UE_TX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_fla
// clear SR
ue->sr[subframe_tx]=0;
}
} // ULSCH is active
} // subframe_scheduling_flag==1
}
void ue_pucch_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag) {
uint8_t pucch_ack_payload[2];
uint8_t n1_pucch;
ANFBmode_t bundling_flag;
PUCCH_FMT_t format;
uint8_t SR_payload;
LTE_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
int frame_tx=proc->frame_tx;
int subframe_tx=proc->subframe_tx;
int Mod_id = ue->Mod_id;
int CC_id = ue->CC_id;
int tx_amp;
int8_t Po_PUCCH;
#ifdef PUCCH
else if (ue->UE_mode[eNB_id] == PUSCH) { // check if we need to use PUCCH 1a/1b
// debug_LOG_D(PHY,"[UE%d] Frame %d, subframe %d: Checking for PUCCH 1a/1b\n",Mod_id,frame_tx,subframe_tx);
bundling_flag = ue->pucch_config_dedicated[eNB_id].tdd_AckNackFeedbackMode;
if ((frame_parms->frame_type==FDD) ||
(bundling_flag==bundling) ||
((frame_parms->frame_type==TDD)&&(frame_parms->tdd_config==1)&&((slot_tx!=4)||(slot_tx!=14)))) {
((frame_parms->frame_type==TDD)&&(frame_parms->tdd_config==1)&&((subframe_tx!=2)||(subframe_tx!=7)))) {
format = pucch_format1a;
LOG_D(PHY,"[UE] PUCCH 1a\n");
} else {
......@@ -1001,7 +1109,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_fla
}
// Check for SR and do ACK/NACK accordingly
if (is_SR_TXOp(ue,eNB_id,subframe_tx)==1) {
if (is_SR_TXOp(ue,proc,eNB_id)==1) {
LOG_D(PHY,"[UE %d][SR %x] Frame %d subframe %d: got SR_TXOp, Checking for SR for PUSCH from MAC\n",
Mod_id,ue->pdcch_vars[eNB_id]->crnti,frame_tx,subframe_tx);
......@@ -1018,7 +1126,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_fla
}
if (SR_payload>0) {
generate_ul_signal = 1;
ue->generate_ul_signal[eNB_id] = 1;
LOG_D(PHY,"[UE %d][SR %x] Frame %d subframe %d got the SR for PUSCH is %d\n",
Mod_id,ue->pdcch_vars[eNB_id]->crnti,frame_tx,subframe_tx,SR_payload);
} else {
......@@ -1033,16 +1141,16 @@ void phy_procedures_UE_TX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_fla
subframe_tx,pucch_ack_payload) > 0) {
// we need to transmit ACK/NAK in this subframe
generate_ul_signal = 1;
ue->generate_ul_signal[eNB_id] = 1;
n1_pucch = get_n1_pucch(ue,
proc,
eNB_id,
subframe_tx,
pucch_ack_payload,
SR_payload);
if (ue->mac_enabled == 1) {
Po_PUCCH = pucch_power_cntl(ue,subframe_tx,eNB_id,format);
Po_PUCCH = pucch_power_cntl(ue,proc,eNB_id,format);
}
else {
Po_PUCCH = ue->tx_power_max_dBm;
......@@ -1096,6 +1204,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_fla
#ifdef PHY_ABSTRACTION
LOG_D(PHY,"Calling generate_pucch_emul ... (ACK %d %d, SR %d)\n",pucch_ack_payload[0],pucch_ack_payload[1],SR_payload);
generate_pucch_emul(ue,
proc,
format,
ue->frame_parms.pucch_config_common.nCS_AN,
pucch_ack_payload,
......@@ -1106,7 +1215,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_fla
} else if (SR_payload==1) { // no ACK/NAK but SR is triggered by MAC
if (ue->mac_enabled == 1) {
Po_PUCCH = pucch_power_cntl(ue,subframe_tx,eNB_id,pucch_format1);
Po_PUCCH = pucch_power_cntl(ue,proc,eNB_id,pucch_format1);
}
else {
Po_PUCCH = ue->tx_power_max_dBm;
......@@ -1145,16 +1254,59 @@ void phy_procedures_UE_TX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_fla
} else {
LOG_D(PHY,"Calling generate_pucch_emul ...\n");
generate_pucch_emul(ue,
proc,
pucch_format1,
ue->frame_parms.pucch_config_common.nCS_AN,
pucch_ack_payload,
SR_payload,
subframe_tx);
SR_payload);
}
} // SR_Payload==1
}
void phy_procedures_UE_TX(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,relaying_type_t r_type) {
LTE_DL_FRAME_PARMS *frame_parms=&ue->frame_parms;
int32_t ulsch_start=0;
int subframe_tx = proc->subframe_tx;
int frame_tx = proc->frame_tx;
unsigned int aa;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX,VCD_FUNCTION_IN);
ue->generate_ul_signal[eNB_id] = 0;
start_meas(&ue->phy_proc_tx);
#ifdef EMOS
//phy_procedures_emos_UE_TX(next_slot);
#endif
ue->tx_power_dBm=-127;
if (abstraction_flag==0) {
for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
memset(&ue->common_vars.txdataF[aa][subframe_tx*frame_parms->ofdm_symbol_size*frame_parms->symbols_per_tti],
0,
frame_parms->ofdm_symbol_size*frame_parms->symbols_per_tti*sizeof(int32_t));
}
}
if (ue->UE_mode[eNB_id] != PRACH) {
ue_ulsch_uespec_procedures(ue,proc,eNB_id,abstraction_flag);
}
#endif // PUCCH
if (ue->UE_mode[eNB_id] == PUSCH) { // check if we need to use PUCCH 1a/1b
} // UE_mode==PUSCH
#ifdef CBA
......@@ -1213,9 +1365,12 @@ void phy_procedures_UE_TX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_fla
#endif // end CBA
if (abstraction_flag == 0) {
nsymb = (frame_parms->Ncp == 0) ? 14 : 12;
if (ue->generate_ul_signal[eNB_id] == 1 )
ulsch_common_procedures(ue,proc);
else { // no uplink so clear signal buffer instead
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)//this is the EXPRESS MIMO case
ulsch_start = (ue->rx_offset+subframe_tx*frame_parms->samples_per_tti-
ue->hw_timing_advance-
......@@ -1224,222 +1379,27 @@ void phy_procedures_UE_TX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_fla
#else //this is the normal case
ulsch_start = (frame_parms->samples_per_tti*subframe_tx)-ue->N_TA_offset; //-ue->timing_advance;
#endif //else EXMIMO
if ((frame_tx%100) == 0)
LOG_D(PHY,"[UE %d] Frame %d, subframe %d: ulsch_start = %d (rxoff %d, HW TA %d, timing advance %d, TA_offset %d\n",
Mod_id,frame_tx,subframe_tx,
ulsch_start,
ue->rx_offset,
ue->hw_timing_advance,
ue->timing_advance,
ue->N_TA_offset);
if (generate_ul_signal == 1 ) {
start_meas(&ue->ofdm_mod_stats);
for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
if (frame_parms->Ncp == 1)
PHY_ofdm_mod(&ue->common_vars.txdataF[aa][subframe_tx*nsymb*frame_parms->ofdm_symbol_size],
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
dummy_tx_buffer,
#else
&ue->common_vars.txdata[aa][ulsch_start],
#endif
frame_parms->ofdm_symbol_size,
nsymb,
frame_parms->nb_prefix_samples,
CYCLIC_PREFIX);
else
normal_prefix_mod(&ue->common_vars.txdataF[aa][subframe_tx*nsymb*frame_parms->ofdm_symbol_size],
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
dummy_tx_buffer,
#else
&ue->common_vars.txdata[aa][ulsch_start],
#endif
nsymb,
&ue->frame_parms);
/*
if (subframe_tx == 8) {
printf("Symbol 0 %p (offset %d) base %p\n",
&ue->common_vars.txdataF[0][nsymb*OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES_NO_PREFIX*subframe],
nsymb*OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES_NO_PREFIX*subframe,
ue->common_vars.txdataF[0]);
write_output("txsigF8.m","txsF8", &ue->common_vars.txdataF[0][nsymb*OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES_NO_PREFIX*subframe],
ue->frame_parms.ofdm_symbol_size*nsymb,1,1);
write_output("txsig8.m","txs8", &ue->common_vars.txdata[0][ue->frame_parms.samples_per_tti*subframe],
ue->frame_parms.samples_per_tti,1,1);
}
*/
#ifndef OFDMA_ULSCH
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
apply_7_5_kHz(ue,dummy_tx_buffer,0);
apply_7_5_kHz(ue,dummy_tx_buffer,1);
#else
apply_7_5_kHz(ue,&ue->common_vars.txdata[aa][ulsch_start],0);
apply_7_5_kHz(ue,&ue->common_vars.txdata[aa][ulsch_start],1);
#endif
/*
if (subframe_tx == 8) {
write_output("txsig8_mod.m","txs8_mod", &ue->common_vars.txdata[0][ue->frame_parms.samples_per_tti*subframe],
ue->frame_parms.samples_per_tti,1,1);
}
*/
#endif
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
overflow = ulsch_start - 9*frame_parms->samples_per_tti;
//if ((slot_tx==4) && (aa==0)) printf("ulsch_start %d, overflow %d\n",ulsch_start,overflow);
for (k=ulsch_start,l=0; k<cmin(frame_parms->samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME,ulsch_start+frame_parms->samples_per_tti); k++,l++) {
((short*)ue->common_vars.txdata[aa])[2*k] = ((short*)dummy_tx_buffer)[2*l]<<4;
((short*)ue->common_vars.txdata[aa])[2*k+1] = ((short*)dummy_tx_buffer)[2*l+1]<<4;
}
for (k=0; k<overflow; k++,l++) {
((short*)ue->common_vars.txdata[aa])[2*k] = ((short*)dummy_tx_buffer)[2*l]<<4;
((short*)ue->common_vars.txdata[aa])[2*k+1] = ((short*)dummy_tx_buffer)[2*l+1]<<4;
}
#if defined(EXMIMO)
// handle switch before 1st TX subframe, guarantee that the slot prior to transmission is switch on
for (k=ulsch_start - (frame_parms->samples_per_tti>>1) ; k<ulsch_start ; k++) {
if (k<0)
ue->common_vars.txdata[aa][k+frame_parms->samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME] &= 0xFFFEFFFE;
else if (k>(frame_parms->samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME))
ue->common_vars.txdata[aa][k-frame_parms->samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME] &= 0xFFFEFFFE;
else
ue->common_vars.txdata[aa][k] &= 0xFFFEFFFE;
}
#endif
#endif
} //nb_antennas_tx
stop_meas(&ue->ofdm_mod_stats);
} // generate_ul_signal == 1
else { // no uplink so clear signal buffer instead
for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
memset(&ue->common_vars.txdata[aa][ulsch_start],0,frame_parms->samples_per_tti<<2);
}
}
}
} // mode != PRACH
// }// slot_tx is even
// else { // slot_tx is odd, do the PRACH here
if ((ue->UE_mode[eNB_id] == PRACH) && (ue->frame_parms.prach_config_common.prach_Config_enabled==1)) {
// check if we have PRACH opportunity
if (is_prach_subframe(&ue->frame_parms,frame_tx,subframe_tx)) {
ue->generate_prach=0;
if (ue->mac_enabled==1){
// ask L2 for RACH transport
if ((mode != rx_calib_ue) && (mode != rx_calib_ue_med) && (mode != rx_calib_ue_byp) && (mode != no_L2_connect) ) {
ue->prach_resources[eNB_id] = mac_xface->ue_get_rach(Mod_id,
CC_id,
frame_tx,
eNB_id,
subframe_tx);
// LOG_I(PHY,"Got prach_resources for eNB %d address %d, RRCCommon %d\n",eNB_id,ue->prach_resources[eNB_id],UE_mac_inst[Mod_id].radioResourceConfigCommon);
}
}
if (ue->prach_resources[eNB_id]!=NULL) {
ue->generate_prach=1;
ue->prach_cnt=0;
#ifdef SMBV
ue->prach_resources[eNB_id]->ra_PreambleIndex = 19;
#endif
#ifdef OAI_EMU
ue->prach_PreambleIndex=ue->prach_resources[eNB_id]->ra_PreambleIndex;
#endif
if (abstraction_flag == 0) {
LOG_I(PHY,"[UE %d][RAPROC] Frame %d, Subframe %d : Generating PRACH, preamble %d, TARGET_RECEIVED_POWER %d dBm, PRACH TDD Resource index %d, RA-RNTI %d\n",
Mod_id,
frame_tx,
subframe_tx,
ue->prach_resources[eNB_id]->ra_PreambleIndex,
ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER,
ue->prach_resources[eNB_id]->ra_TDD_map_index,
ue->prach_resources[eNB_id]->ra_RNTI);
if ((ue->mac_enabled==1) && (mode != calib_prach_tx)) {
ue->tx_power_dBm = ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER+get_PL(Mod_id,CC_id,eNB_id);
}
else {
ue->tx_power_dBm = ue->tx_power_max_dBm;
ue->prach_resources[eNB_id]->ra_PreambleIndex = 19;
}
ue->tx_total_RE = 96;
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
ue->prach_vars[eNB_id]->amp = get_tx_amp(ue->tx_power_dBm,
ue->tx_power_max_dBm,
ue->frame_parms.N_RB_UL,
6);
#else
ue->prach_vars[eNB_id]->amp = AMP;
#endif
if ((mode == calib_prach_tx) && (((ue->frame_tx&0xfffe)%100)==0))
LOG_D(PHY,"[UE %d][RAPROC] Frame %d, Subframe %d : PRACH TX power %d dBm, amp %d\n",Mod_id,ue->frame_rx,ue->slot_tx>>1,ue->tx_power_dBm,
ue->prach_vars[eNB_id]->amp);
// start_meas(&ue->tx_prach);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GENERATE_PRACH, VCD_FUNCTION_IN);
prach_power = generate_prach(ue,eNB_id,subframe_tx,frame_tx);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GENERATE_PRACH, VCD_FUNCTION_OUT);
// stop_meas(&ue->tx_prach);
LOG_D(PHY,"[UE %d][RAPROC] PRACH PL %d dB, power %d dBm, digital power %d dB (amp %d)\n",
Mod_id,
get_PL(Mod_id,CC_id,eNB_id),
ue->tx_power_dBm,
dB_fixed(prach_power),
ue->prach_vars[eNB_id]->amp);
} else {
UE_transport_info[Mod_id][CC_id].cntl.prach_flag=1;
UE_transport_info[Mod_id][CC_id].cntl.prach_id=ue->prach_resources[eNB_id]->ra_PreambleIndex;
if (ue->mac_enabled==1){
mac_xface->Msg1_transmitted(Mod_id,
CC_id,
frame_tx,
eNB_id);
for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
memset(&ue->common_vars.txdata[aa][ulsch_start],0,frame_parms->samples_per_tti<<2);
}
}
LOG_D(PHY,"[UE %d][RAPROC] Frame %d, subframe %d: Generating PRACH (eNB %d) preamble index %d for UL, TX power %d dBm (PL %d dB), l3msg \n",
Mod_id,frame_tx,subframe_tx,eNB_id,
ue->prach_resources[eNB_id]->ra_PreambleIndex,
ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER+get_PL(Mod_id,CC_id,eNB_id),
get_PL(Mod_id,CC_id,eNB_id));
}
} // mode != PRACH
}
// if we're calibrating the PRACH kill the pointer to its resources so that the RA protocol doesn't continue
if (mode == calib_prach_tx)
ue->prach_resources[eNB_id]=NULL;
LOG_D(PHY,"[UE %d] frame %d subframe %d : generate_prach %d, prach_cnt %d\n",
Mod_id,frame_tx,subframe_tx,ue->generate_prach,ue->prach_cnt);
if ((ue->UE_mode[eNB_id] == PRACH) &&
(ue->frame_parms.prach_config_common.prach_Config_enabled==1)) {
ue->prach_cnt++;
// check if we have PRACH opportunity
if (is_prach_subframe(&ue->frame_parms,frame_tx,subframe_tx)) {
if (ue->prach_cnt==3)
ue->generate_prach=0;
ue_prach_procedures(ue,proc,eNB_id,abstraction_flag,mode);
}
} // mode is PRACH
else {
ue->generate_prach=0;
}
} // slot_tx is even
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX, VCD_FUNCTION_OUT);
stop_meas(&ue->phy_proc_tx);
......@@ -1468,18 +1428,12 @@ void phy_procedures_UE_S_TX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_f
}
}
void ue_measurement_procedures(uint16_t l, PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode)
void ue_measurement_procedures(uint16_t l, PHY_VARS_UE *ue,UE_rxtx_proc_t *proc, uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode)
{
LTE_DL_FRAME_PARMS *frame_parms=&ue->frame_parms;
// int aa;
#if defined(EXMIMO) && defined(DRIVER2013)
// exmimo_config_t *p_exmimo_config = openair0_exmimo_pci[0].exmimo_config_ptr;
// int aa;
#endif
int slot_rx = ue->slot_rx;
int subframe_rx = slot_rx>>1;
int subframe_rx = proc->subframe_rx;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_MEASUREMENT_PROCEDURES, VCD_FUNCTION_IN);
......@@ -1490,7 +1444,7 @@ void ue_measurement_procedures(uint16_t l, PHY_VARS_UE *ue,uint8_t eNB_id,uint8_
lte_ue_measurements(ue,
(subframe_rx*frame_parms->samples_per_tti+ue->rx_offset)%(frame_parms->samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME),
(slot_rx == 2) ? 1 : 0,
(subframe_rx == 1) ? 1 : 0,
0);
} else {
lte_ue_measurements(ue,
......@@ -1506,7 +1460,7 @@ void ue_measurement_procedures(uint16_t l, PHY_VARS_UE *ue,uint8_t eNB_id,uint8_
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_RRC_MEASUREMENTS, VCD_FUNCTION_IN);
ue_rrc_measurements(ue,
slot_rx,
subframe_rx,
abstraction_flag);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_RRC_MEASUREMENTS, VCD_FUNCTION_OUT);
......@@ -1515,7 +1469,7 @@ void ue_measurement_procedures(uint16_t l, PHY_VARS_UE *ue,uint8_t eNB_id,uint8_
}
if ((slot_rx==1) && (l==(4-frame_parms->Ncp))) {
if ((subframe_rx==0) && (l==(4-frame_parms->Ncp))) {
// AGC
......@@ -1587,7 +1541,7 @@ void phy_procedures_emos_UE_RX(PHY_VARS_UE *ue,uint8_t last_slot,uint8_t eNB_id)
if (last_slot==0) {
emos_dump_UE.timestamp = rt_get_time_ns();
emos_dump_UE.frame_rx = ue->frame_rx;
emos_dump_UE.frame_rx = proc->frame_rx;
emos_dump_UE.UE_mode = ue->UE_mode[eNB_id];
emos_dump_UE.mimo_mode = ue->transmission_mode[eNB_id];
emos_dump_UE.freq_offset = ue->common_vars.freq_offset;
......@@ -1624,10 +1578,10 @@ void phy_procedures_emos_UE_RX(PHY_VARS_UE *ue,uint8_t last_slot,uint8_t eNB_id)
bytes = rtf_put(CHANSOUNDER_FIFO_MINOR, &emos_dump_UE, sizeof(fifo_dump_emos_UE));
if (bytes!=sizeof(fifo_dump_emos_UE)) {
LOG_W(PHY,"[UE %d] frame %d, slot %d, Problem writing EMOS data to FIFO\n",Mod_id,ue->frame_rx, last_slot);
LOG_W(PHY,"[UE %d] frame %d, slot %d, Problem writing EMOS data to FIFO\n",Mod_id,proc->frame_rx, last_slot);
} else {
if (ue->frame_rx%100==0) {
LOG_I(PHY,"[UE %d] frame %d, slot %d, Writing %d bytes EMOS data to FIFO\n",Mod_id,ue->frame_rx, last_slot, bytes);
if (proc->frame_rx%100==0) {
LOG_I(PHY,"[UE %d] frame %d, slot %d, Writing %d bytes EMOS data to FIFO\n",Mod_id,proc->frame_rx, last_slot, bytes);
}
}
}
......@@ -1636,12 +1590,12 @@ void phy_procedures_emos_UE_RX(PHY_VARS_UE *ue,uint8_t last_slot,uint8_t eNB_id)
#endif
void restart_phy(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag)
void restart_phy(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc, uint8_t eNB_id,uint8_t abstraction_flag)
{
// uint8_t last_slot;
uint8_t i;
LOG_I(PHY,"[UE %d] frame %d, slot %d, restarting PHY!\n",ue->Mod_id,ue->frame_rx,ue->slot_rx);
LOG_I(PHY,"[UE %d] frame %d, slot %d, restarting PHY!\n",ue->Mod_id,proc->frame_rx,proc->subframe_rx);
mac_xface->macphy_exit("restart_phy called");
// first_run = 1;
......@@ -1652,8 +1606,8 @@ void restart_phy(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag)
ue->prach_resources[eNB_id]=NULL;
}
ue->frame_rx = -1;
ue->frame_tx = -1;
proc->frame_rx = -1;
proc->frame_tx = -1;
// ue->synch_wait_cnt=0;
// ue->sched_cnt=-1;
......@@ -1694,7 +1648,7 @@ void restart_phy(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag)
}
void ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,uint8_t abstraction_flag)
void ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,UE_rxtx_proc_t *proc, uint8_t abstraction_flag)
{
// int i;
......@@ -1705,8 +1659,9 @@ void ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,uint8_t abstraction_flag)
uint8_t pbch_trials = 0;
DevAssert(ue);
int slot_rx = ue->slot_rx;
int frame_rx = ue->frame_rx;
int frame_rx = proc->frame_rx;
int subframe_rx = proc->subframe_rx;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PBCH_PROCEDURES, VCD_FUNCTION_IN);
......@@ -1778,76 +1733,49 @@ void ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,uint8_t abstraction_flag)
if (first_run) {
first_run = 0;
LOG_I(PHY,"[UE %d] frame %d, slot %d: Adjusting frame counter (PBCH ant_tx=%d, frame_tx=%d, phase %d).\n",
LOG_I(PHY,"[UE %d] frame %d, subframe %d: Adjusting frame counter (PBCH ant_tx=%d, frame_tx=%d, phase %d).\n",
ue->Mod_id,
frame_rx,
slot_rx,
subframe_rx,
pbch_tx_ant,
frame_tx,
pbch_phase);
ue->frame_rx = (ue->frame_rx & 0xFFFFFC00) | (frame_tx & 0x000003FF);
ue->frame_tx = ue->frame_rx;
frame_rx = ue->frame_rx;
} else if (((frame_tx & 0x03FF) != (ue->frame_rx & 0x03FF))) {
proc->frame_rx = (proc->frame_rx & 0xFFFFFC00) | (frame_tx & 0x000003FF);
proc->frame_tx = proc->frame_rx;
frame_rx = proc->frame_rx;
} else if (((frame_tx & 0x03FF) != (proc->frame_rx & 0x03FF))) {
//(pbch_tx_ant != ue->frame_parms.nb_antennas_tx)) {
LOG_D(PHY,"[UE %d] frame %d, slot %d: Re-adjusting frame counter (PBCH ant_tx=%d, frame_rx=%d, frame%1024=%d, phase %d).\n",
LOG_D(PHY,"[UE %d] frame %d, subframe %d: Re-adjusting frame counter (PBCH ant_tx=%d, frame_rx=%d, frame%1024=%d, phase %d).\n",
ue->Mod_id,
ue->frame_rx,
slot_rx,
proc->frame_rx,
subframe_rx,
pbch_tx_ant,
frame_tx,
frame_rx & 0x03FF,
pbch_phase);
ue->frame_rx = (ue->frame_rx & 0xFFFFFC00) | (frame_tx & 0x000003FF);
ue->frame_tx = ue->frame_rx;
frame_rx = ue->frame_rx;
/*
LOG_D(PHY,"[UE %d] frame %d, slot %d: PBCH PDU does not match, ignoring it (PBCH ant_tx=%d, frame_tx=%d).\n",
ue->Mod_id,
ue->frame,
slot_rx,
pbch_tx_ant,
frame_tx);
*/
//ue->pbch_vars[eNB_id]->pdu_errors_conseq = 21; // this will make it go out of sync
//ue->pbch_vars[eNB_id]->pdu_errors_conseq += 1; // this will make it go out of sync
proc->frame_rx = (proc->frame_rx & 0xFFFFFC00) | (frame_tx & 0x000003FF);
proc->frame_tx = proc->frame_rx;
frame_rx = proc->frame_rx;
}
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d] frame %d, slot %d, Received PBCH (MIB): mode1_flag %d, tx_ant %d, frame_tx %d. N_RB_DL %d, phich_duration %d, phich_resource %d/6!\n",
LOG_D(PHY,"[UE %d] frame %d, subframe %d, Received PBCH (MIB): mode1_flag %d, tx_ant %d, frame_tx %d. N_RB_DL %d, phich_duration %d, phich_resource %d/6!\n",
ue->Mod_id,
frame_rx,
slot_rx,
subframe_rx,
ue->frame_parms.mode1_flag,
pbch_tx_ant,
frame_tx,
ue->frame_parms.N_RB_DL,
ue->frame_parms.phich_config_common.phich_duration,
ue->frame_parms.phich_config_common.phich_resource);
/*
if (frame_rx%100 == 0) {
LOG_I(PHY,"[UE %d] frame %d, slot %d, PBCH: mode1_flag %d, tx_ant %d, frame_tx %d, phase %d. N_RB_DL %d, phich_duration %d, phich_resource %d/6,Frequency offset %d Hz (%d)\n",
ue->Mod_id,
frame_rx,
slot_rx,
ue->frame_parms.mode1_flag,
pbch_tx_ant,
frame_tx,
pbch_phase,
ue->frame_parms.N_RB_DL,
ue->frame_parms.phich_config_common.phich_duration,
ue->frame_parms.phich_config_common.phich_resource,
ue->common_vars.freq_offset,openair_daq_vars.freq_offset);
//dump_frame_parms(&ue->frame_parms);
}
*/
#endif
} else {
LOG_E(PHY,"[UE %d] frame %d, slot %d, Error decoding PBCH!\n",
ue->Mod_id,frame_rx, slot_rx);
ue->Mod_id,frame_rx, subframe_rx);
ue->pbch_vars[eNB_id]->pdu_errors_conseq++;
ue->pbch_vars[eNB_id]->pdu_errors++;
if (ue->mac_enabled == 1) {
......@@ -1868,24 +1796,20 @@ void ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,uint8_t abstraction_flag)
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d] frame %d, slot %d, PBCH errors = %d, consecutive errors = %d!\n",
ue->Mod_id,frame_rx, slot_rx,
ue->Mod_id,frame_rx, subframe_rx,
ue->pbch_vars[eNB_id]->pdu_errors,
ue->pbch_vars[eNB_id]->pdu_errors_conseq);
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PBCH_PROCEDURES, VCD_FUNCTION_OUT);
}
int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,uint8_t abstraction_flag)
int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t abstraction_flag)
{
unsigned int dci_cnt=0, i;
//DCI_PDU *DCI_pdu;
//uint16_t ra_RNTI;
int frame_rx = ue->frame_rx;
int slot_rx = ue->slot_rx;
int subframe_rx = slot_rx>>1;
int frame_rx = proc->frame_rx;
int subframe_rx = proc->subframe_rx;
#ifdef PHY_ABSTRACTION
......@@ -1923,7 +1847,7 @@ int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,uint8_t abstraction_flag)
if (is_phich_subframe(&ue->frame_parms,subframe_rx)) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PHICH, VCD_FUNCTION_IN);
rx_phich(ue,
rx_phich(ue,proc,
subframe_rx,eNB_id);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PHICH, VCD_FUNCTION_OUT);
}
......@@ -1958,7 +1882,7 @@ int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,uint8_t abstraction_flag)
UE_id = (uint32_t)find_ue((int16_t)ue->pdcch_vars[eNB_id]->crnti,PHY_vars_eNB_g[i][CC_id]);
if (UE_id>=0) {
// msg("Checking PHICH for UE %d (eNB %d)\n",UE_id,i);
// printf("Checking PHICH for UE %d (eNB %d)\n",UE_id,i);
if (is_phich_subframe(&ue->frame_parms,subframe_rx)) {
harq_pid = phich_subframe_to_harq_pid(&ue->frame_parms,frame_rx,subframe_rx);
......@@ -1969,38 +1893,7 @@ int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,uint8_t abstraction_flag)
ue->ulsch_Msg3_active[eNB_id] = 0;
ue->ulsch[eNB_id]->harq_processes[harq_pid]->round = 0;
LOG_D(PHY,"Msg3 inactive\n");
/* Phich is not abstracted for the moment
if (PHY_vars_eNB_g[i][CC_id]->ulsch_eNB[(uint32_t)UE_id]->harq_processes[harq_pid]->phich_ACK==0) { // NAK
if (ue->ulsch_Msg3_active[eNB_id] == 1) {
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d][RAPROC] Frame %d, subframe %d: Msg3 PHICH, received NAK\n",
ue->Mod_id,
frame_rx,
subframe_rx);
#endif
get_Msg3_alloc_ret(&ue->frame_parms,
subframe_rx,
frame_rx,
&ue->ulsch_Msg3_frame[eNB_id],
&ue->ulsch_Msg3_subframe[eNB_id]);
}
// PHY_vars_eNB_g[i][CC_id]->ulsch_eNB[UE_id]->harq_processes[harq_pid]->subframe_scheduling_flag = 1;
// PHY_vars_eNB_g[i][CC_id]->ulsch_eNB[UE_id]->harq_processes[harq_pid]->Ndi = 0;
// PHY_vars_eNB_g[i][CC_id]->ulsch_eNB[UE_id]->harq_processes[harq_pid]->round++;
}
else {
#ifdef DEBUG_PHY_PROC
if (ue->ulsch_Msg3_active[eNB_id] == 1)
LOG_D(PHY,"[UE %d][RAPROC] Frame %d, subframe %d: Msg3 PHICH, received ACK\n",
ue->Mod_id,
frame_rx,
subframe_rx);
#endif
PHY_vars_eNB_g[i][CC_id]->ulsch_eNB[UE_id]->harq_processes[harq_pid]->subframe_scheduling_flag =0;
PHY_vars_eNB_g[i][CC_id]->ulsch_eNB[UE_id]->harq_processes[harq_pid]->status = IDLE;
// inform MAC?
ue->ulsch_Msg3_active[eNB_id] = 0;
} //phich_ACK */
} // harq_pid is ACTIVE
} // This is a PHICH subframe
} // UE_id exists
......@@ -2009,41 +1902,15 @@ int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,uint8_t abstraction_flag)
#endif
//#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d] Frame %d, slot %d, Mode %s: DCI found %i\n",ue->Mod_id,frame_rx,slot_rx,mode_string[ue->UE_mode[eNB_id]],dci_cnt);
LOG_D(PHY,"[UE %d] Frame %d, subframe %d, Mode %s: DCI found %i\n",ue->Mod_id,frame_rx,subframe_rx,mode_string[ue->UE_mode[eNB_id]],dci_cnt);
//#endif
ue->pdcch_vars[eNB_id]->dci_received += dci_cnt;
/*
#ifdef DEBUG_PHY_PROC
if (slot_rx==18)
debug_LOG_D(PHY,"[UE %d] Frame %d, slot %d: PDCCH: DCI errors %d, DCI received %d, DCI missed %d, DCI False Detection %d \n",
ue->Mod_id,frame_rx,slot_rx,
ue->pdcch_vars[eNB_id]->dci_errors,
ue->pdcch_vars[eNB_id]->dci_received,
ue->pdcch_vars[eNB_id]->dci_missed,
ue->pdcch_vars[eNB_id]->dci_false);
#endif
*/
#ifdef EMOS
//emos_dump_UE.dci_cnt[subframe_rx] = dci_cnt;
#endif
/*
#ifdef DIAG_PHY
//if (ue->UE_mode[eNB_id] == PUSCH)
if (dci_cnt > 1) {
LOG_D(PHY,"[UE %d][DIAG] frame %d, subframe %d: received %d>1 DCI!\n",ue->Mod_id,frame_rx,subframe_rx,dci_cnt);
ue->pdcch_vars[eNB_id]->dci_false++;
}
else if (dci_cnt==0) {
LOG_D(PHY,"[UE %d][DIAG] frame %d, subframe %d: received %d DCI!\n",ue->Mod_id,frame_rx,subframe_rx,dci_cnt);
ue->pdcch_vars[eNB_id]->dci_missed++;
}
#endif
*/
// dci_cnt = 0;
// ra_RNTI = (ue->prach_resources[eNB_id]) ? ue->prach_resources[eNB_id]->ra_RNTI : 0;
for (i=0; i<dci_cnt; i++) {
#ifdef DEBUG_PHY_PROC
......@@ -2055,9 +1922,6 @@ int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,uint8_t abstraction_flag)
#endif
//if ((ue->UE_mode[eNB_id] != PRACH) &&
// (dci_alloc_rx[i].rnti != 0x1234) &&
if ((ue->UE_mode[eNB_id]>PRACH) &&
(dci_alloc_rx[i].rnti == ue->pdcch_vars[eNB_id]->crnti) &&
(dci_alloc_rx[i].format != format0)) {
......@@ -2073,18 +1937,7 @@ int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,uint8_t abstraction_flag)
#endif
#ifdef DIAG_PHY
if (!(((subframe_rx == 7) && (dci_alloc_rx[i].format == format1E_2A_M10PRB)) ||
((subframe_rx == 7) && (dci_alloc_rx[i].format == format1)))) {
LOG_E(PHY,"[UE %d][DIAG] frame %d, subframe %d: should not have received C_RNTI Format %d!\n",ue->Mod_id,frame_rx,subframe_rx,dci_alloc_rx[i].format);
ue->pdcch_vars[eNB_id]->dci_errors++;
ue->pdcch_vars[eNB_id]->dci_false++;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PDCCH_PROCEDURES, VCD_FUNCTION_OUT);
return(-1);
}
#endif
// dump_dci(&ue->frame_parms, &dci_alloc_rx[i]);
if ((ue->UE_mode[eNB_id] > PRACH) &&
......@@ -2100,23 +1953,12 @@ int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,uint8_t abstraction_flag)
0,
P_RNTI)==0)) {
#ifdef DIAG_PHY
if (ue->dlsch[eNB_id][0]->harq_processes[ue->dlsch[eNB_id][0]->current_harq_pid]->mcs != (((frame_rx%1024)%28))) {
LOG_E(PHY,"[UE %d][DIAG] frame %d, subframe %d: wrong mcs!\n",ue->Mod_id,frame_rx,subframe_rx,
ue->dlsch[eNB_id][0]->harq_processes[ue->dlsch[eNB_id][0]->current_harq_pid]->mcs);
dump_dci(&ue->frame_parms,(void *)&dci_alloc_rx[i]);
}
#endif
ue->dlsch_received[eNB_id]++;
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d] Generated UE DLSCH C_RNTI format %d\n",ue->Mod_id,dci_alloc_rx[i].format);
dump_dci(&ue->frame_parms, &dci_alloc_rx[i]);
LOG_D(PHY,"[UE %d] *********** dlsch->active in subframe %d (%d)=> %d\n",ue->Mod_id,subframe_rx,slot_rx,ue->dlsch[eNB_id][0]->active);
LOG_D(PHY,"[UE %d] *********** dlsch->active in subframe %d=> %d\n",ue->Mod_id,subframe_rx,ue->dlsch[eNB_id][0]->active);
#endif
// we received a CRNTI, so we're in PUSCH
......@@ -2139,22 +1981,8 @@ int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,uint8_t abstraction_flag)
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d] subframe %d: Found rnti %x, format 1%s, dci_cnt %d\n",ue->Mod_id,subframe_rx,dci_alloc_rx[i].rnti,dci_alloc_rx[i].format==format1A?"A":"C",i);
/*
if (((frame_rx%100) == 0) || (frame_rx < 20))
dump_dci(&ue->frame_parms, &dci_alloc_rx[i]);
*/
#endif
#ifdef DIAG_PHY
if ((subframe_rx != 5)) {
LOG_E(PHY,"[UE %d][DIAG] frame %d, subframe %d: should not have received SI_RNTI!\n",ue->Mod_id,frame_rx,subframe_rx);
ue->pdcch_vars[eNB_id]->dci_errors++;
ue->pdcch_vars[eNB_id]->dci_false++;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PDCCH_PROCEDURES, VCD_FUNCTION_OUT);
return(-1);
}
#endif
if (generate_ue_dlsch_params_from_dci(frame_rx,
subframe_rx,
......@@ -2188,17 +2016,7 @@ int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,uint8_t abstraction_flag)
//dump_dci(&ue->frame_parms, &dci_alloc_rx[i]);
//mac_xface->macphy_exit("so far so good...\n");
#endif
#ifdef DIAG_PHY
if (subframe_rx != 9) {
LOG_E(PHY,"[UE %d][DIAG] frame %d, subframe %d: should not have received RA_RNTI!\n",ue->Mod_id,frame_rx,subframe_rx);
ue->pdcch_vars[eNB_id]->dci_errors++;
ue->pdcch_vars[eNB_id]->dci_false++;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PDCCH_PROCEDURES, VCD_FUNCTION_OUT);
return(-1);
}
#endif
if (generate_ue_dlsch_params_from_dci(frame_rx,
subframe_rx,
......@@ -2224,21 +2042,6 @@ int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,uint8_t abstraction_flag)
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d][PUSCH] Frame %d subframe %d: Found rnti %x, format 0, dci_cnt %d\n",
ue->Mod_id,frame_rx,subframe_rx,dci_alloc_rx[i].rnti,i);
/*
if (((frame_rx%100) == 0) || (frame_rx < 20))
dump_dci(&ue->frame_parms, &dci_alloc_rx[i]);
*/
#endif
#ifdef DIAG_PHY
if (subframe_rx != 9) {
LOG_E(PHY,"[UE %d][DIAG] frame %d, subframe %d: should not have received C_RNTI Format 0!\n",ue->Mod_id,frame_rx,subframe_rx);
ue->pdcch_vars[eNB_id]->dci_errors++;
ue->pdcch_vars[eNB_id]->dci_false++;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PDCCH_PROCEDURES, VCD_FUNCTION_OUT);
return(-1);
}
#endif
ue->ulsch_no_allocation_counter[eNB_id] = 0;
......@@ -2250,6 +2053,7 @@ int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,uint8_t abstraction_flag)
subframe_rx,
format0,
ue,
proc,
SI_RNTI,
0,
P_RNTI,
......@@ -2274,18 +2078,6 @@ int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,uint8_t abstraction_flag)
dump_dci(&ue->frame_parms, &dci_alloc_rx[i]);
*/
#endif
/*
#ifdef DIAG_PHY
if (subframe_rx != 8) {
LOG_E(PHY,"[UE %d][DIAG] frame %d, subframe %d: should not have received CBA RNTI Format 0!\n",
ue->Mod_id,frame_rx,subframe_rx);
ue->pdcch_vars[eNB_id]->dci_errors++;
ue->pdcch_vars[eNB_id]->dci_false++;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PDCCH_PROCEDURES, VCD_FUNCTION_OUT);
return(-1);
}
#endif
*/
ue->ulsch_no_allocation_counter[eNB_id] = 0;
//dump_dci(&ue->frame_parms,&dci_alloc_rx[i]);
......@@ -2296,6 +2088,7 @@ int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,uint8_t abstraction_flag)
subframe_rx,
format0,
ue,
proc,
SI_RNTI,
0,
P_RNTI,
......@@ -2317,36 +2110,18 @@ int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,uint8_t abstraction_flag)
ue->ulsch[eNB_id]->cba_rnti[0],
dci_alloc_rx[i].format);
// dump_dci(&ue->frame_parms, &dci_alloc_rx[i]);
#endif
#ifdef DIAG_PHY
ue->pdcch_vars[eNB_id]->dci_errors++;
ue->pdcch_vars[eNB_id]->dci_false++;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PDCCH_PROCEDURES, VCD_FUNCTION_OUT);
return(-1);
#endif
}
}
/*
if ((frame_rx > 1000) && ((frame_rx&1)==0) && (subframe_rx == 5)) {
write_output("rxsig0.m","rxs0", ue->common_vars.rxdata[0],10*ue->frame_parms.samples_per_tti,1,1);
write_output("rxsigF0.m","rxsF0", ue->common_vars.rxdataF[0],ue->frame_parms.ofdm_symbol_size*2*((ue->frame_parms.Ncp==0)?14:12),2,1);
write_output("H00.m","h00",&(ue->common_vars.dl_ch_estimates[0][0][0]),((ue->frame_parms.Ncp==0)?7:6)*(ue->frame_parms.ofdm_symbol_size),1,1);
write_output("pdcch_rxF_ext0.m","pdcch_rxF_ext0",ue->pdcch_vars[eNB_id]->rxdataF_ext[0],3*12*ue->frame_parms.N_RB_DL,1,1);
write_output("pdcch_rxF_comp0.m","pdcch0_rxF_comp0",ue->pdcch_vars[eNB_id]->rxdataF_comp[0],4*12*ue->frame_parms.N_RB_DL,1,1);
write_output("pdcch_rxF_llr.m","pdcch_llr",ue->pdcch_vars[eNB_id]->llr,2400,1,4);
mac_xface->macphy_exit("debug exit");
}
*/
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PDCCH_PROCEDURES, VCD_FUNCTION_OUT);
return(0);
}
int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,
relaying_type_t r_type,PHY_VARS_RN *phy_vars_rn)
{
int phy_procedures_UE_RX(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,
relaying_type_t r_type,PHY_VARS_RN *phy_vars_rn) {
uint16_t l,m,n_symb;
// int eNB_id = 0,
......@@ -2354,34 +2129,36 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
uint8_t harq_pid = -1;
int timing_advance;
uint8_t pilot1,pilot2,pilot3;
#ifndef DLSCH_THREAD
uint8_t i_mod = 0;
int eNB_id_i = 1;
uint8_t dual_stream_UE = 0;
#endif
uint8_t *rar;
int pmch_flag=0;
uint8_t sync_area=255;
int pmch_mcs=-1;
uint8_t mcch_active=0;
int frame_rx = ue->frame_rx;
int slot_rx = ue->slot_rx;
int subframe_rx = slot_rx>>1;
int frame_rx = proc->frame_rx;
int subframe_rx = proc->subframe_rx;
int subframe_prev = (subframe_rx+9)%10;
int CC_id = ue->CC_id;
int slot;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_IN);
start_meas(&ue->phy_proc_rx);
for (slot=0;slot<2;slot++) {
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[%s %d] Frame %d subframe %d: Doing phy_procedures_UE_RX(%d)\n",
LOG_D(PHY,"[%s %d] Frame %d subframe %d: Doing phy_procedures_UE_RX (%d)\n",
(r_type == multicast_relay) ? "RN/UE" : "UE",
ue->Mod_id,frame_rx, subframe_rx, slot_rx);
ue->Mod_id,frame_rx, subframe_rx,slot);
#endif
#ifdef EMOS
if ((slot_rx == 0)) {
if (subframe_rx == 0) {
if (frame_rx%1024 == 0)
openair_daq_vars.use_ia_receiver = 0;
else
......@@ -2408,27 +2185,17 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
if (subframe_select(&ue->frame_parms,subframe_rx) == SF_S) {
if ((slot_rx%2)==0)
if (slot==0)
n_symb = 5;//3;
else
n_symb = 0;
} else {
/*
if (is_pmch_subframe(frame_rx,subframe_rx,&ue->frame_parms)) {
if ((slot_rx%2)==0) {
n_symb=2;
pmch_flag=1;
}
else
n_symb=0;
}
else*/
n_symb = ue->frame_parms.symbols_per_tti/2;
}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
// This is normal processing (i.e. not MBSFN)
// RX processing of symbols in slot_rx
// RX processing of symbols in slot
......@@ -2439,7 +2206,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
slot_fep(ue,
l,
slot_rx,
(subframe_rx<<1)+slot,
ue->rx_offset,
0,
0);
......@@ -2447,81 +2214,23 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
stop_meas(&ue->ofdm_demod_stats);
}
//if (subframe_select(&ue->frame_parms,subframe_rx) == SF_DL)
ue_measurement_procedures(l,ue,eNB_id,abstraction_flag,mode);
if ((slot_rx==1) && (l==4-ue->frame_parms.Ncp)) {
/*
ue->ulsch_no_allocation_counter[eNB_id]++;
if (ue->ulsch_no_allocation_counter[eNB_id] == 10) {
#ifdef DEBUG_PHY_PROC
msg("[UE %d] no_allocation : setting mode to PRACH\n",ue->Mod_id);
#endif
ue->UE_mode[eNB_id] = PRACH;
ue->pdcch_vars[eNB_id]->crnti = 0x1234;
}
*/
ue_pbch_procedures(eNB_id,ue,abstraction_flag);
/*
if (ue->UE_mode[eNB_id] == RA_RESPONSE) {
ue->Msg3_timer[eNB_id]--;
msg("[UE RAR] frame %d: Msg3_timer %d\n",frame_rx,ue->Msg3_timer);
if (ue->Msg3_timer[eNB_id] == 0) {
LOG_D(PHY,"[UE %d] Frame %d: Msg3_timer = 0 : setting mode to PRACH\n",ue->Mod_id,frame_rx);
// I guess here we also need to tell the RRC
ue->UE_mode[eNB_id] = PRACH;
ue->pdcch_vars[eNB_id]->crnti = 0x1234;
}
}
*/
}
#ifdef DLSCH_THREAD
if (ue->dlsch[eNB_id][0]->active == 1) {
// activate thread since Chest is now done for slot before slot_rx
if (l==0) {
LOG_I(PHY,"frame %d, slot_rx %d: Calling rx_pdsch_thread for harq_pid %d\n",frame_rx,slot_rx, ue->dlsch[eNB_id][0]->current_harq_pid);
ue_measurement_procedures(l,ue,proc,eNB_id,abstraction_flag,mode);
if (pthread_mutex_lock (&rx_pdsch_mutex) != 0) { // Signal MAC_PHY Scheduler
LOG_E(PHY,"[UE %d] ERROR pthread_mutex_lock\n",ue->Mod_id); // lock before accessing shared resource
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_OUT);
} else {
rx_pdsch_instance_cnt++;
(slot_rx == 0) ? (rx_pdsch_slot = 19) : (rx_pdsch_slot = (slot_rx-1));
pthread_mutex_unlock (&rx_pdsch_mutex);
if ((slot==1) && (l==4-ue->frame_parms.Ncp)) {
if (rx_pdsch_instance_cnt == 0) {
if (pthread_cond_signal(&rx_pdsch_cond) != 0) {
LOG_E(PHY,"[UE %d] ERROR pthread_cond_signal for rx_pdsch_cond\n",ue->Mod_id);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_OUT);
}
} else {
LOG_W(PHY,"[UE %d] Frame=%d, Slot=%d, RX_PDSCH thread for rx_pdsch_thread busy!!!\n",ue->Mod_id,frame_rx,slot_rx);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_OUT);
}
}
ue_pbch_procedures(eNB_id,ue,proc,abstraction_flag);
// trigger DLSCH decoding thread
if ((slot_rx%2)==1) // odd slots
ue->dlsch[eNB_id][0]->active = 0;
}
}
#endif
// process last DLSCH symbols + invoke decoding
if (((slot_rx%2)==0) && (l==0)) {
if ((slot==0) &&
(l==0)) {
// Regular PDSCH
LOG_D(PHY,"[UE %d] dlsch->active in subframe %d => %d\n",ue->Mod_id,subframe_prev,ue->dlsch[eNB_id][0]->active);
if (ue->dlsch[eNB_id][0]->active == 1) {
#ifndef DLSCH_THREAD //USER_MODE
harq_pid = ue->dlsch[eNB_id][0]->current_harq_pid;
LOG_D(PHY,"[UE %d] PDSCH active in subframe %d, harq_pid %d\n",ue->Mod_id,subframe_prev,harq_pid);
......@@ -2565,6 +2274,8 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
ue->dlsch[eNB_id][0]->active = 0;
//#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d][PDSCH %x/%d] Frame %d subframe %d Scheduling DLSCH decoding\n",
ue->Mod_id,
......@@ -2624,16 +2335,12 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
ue->dlsch[eNB_id][0]->harq_processes[harq_pid]->rvidx,
ue->dlsch[eNB_id][0]->harq_processes[harq_pid]->mcs,
ue->dlsch[eNB_id][0]->harq_processes[harq_pid]->TBS);
/*
if (abstraction_flag ==0 )
dump_dlsch(ue,eNB_id,subframe_prev,harq_pid);
mac_xface->macphy_exit("");
*/
#endif
} else {
LOG_D(PHY,"[UE %d][PDSCH %x/%d] Frame %d subframe %d (slot_rx %d): Received DLSCH (rv %d,mcs %d,TBS %d)\n",
LOG_D(PHY,"[UE %d][PDSCH %x/%d] Frame %d subframe %d (slot %d): Received DLSCH (rv %d,mcs %d,TBS %d)\n",
ue->Mod_id,ue->dlsch[eNB_id][0]->rnti,
harq_pid,frame_rx,subframe_prev,slot_rx,
harq_pid,frame_rx,subframe_prev,slot,
ue->dlsch[eNB_id][0]->harq_processes[harq_pid]->rvidx,
ue->dlsch[eNB_id][0]->harq_processes[harq_pid]->mcs,
ue->dlsch[eNB_id][0]->harq_processes[harq_pid]->TBS);
......@@ -2648,6 +2355,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
LOG_T(PHY,"\n");
#endif
#endif
if (ue->mac_enabled == 1) {
mac_xface->ue_send_sdu(ue->Mod_id,
CC_id,
......@@ -2684,12 +2392,13 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
}
#endif
#endif //DLSCH_THREAD
} else {
// printf("PDSCH inactive in subframe %d\n",subframe_rx-1);
ue->dlsch[eNB_id][0]->harq_ack[subframe_prev].send_harq_status = 0;
}
// SI_DLSCH
if (ue->dlsch_SI[eNB_id]->active == 1) {
#ifdef DEBUG_PHY_PROC
......@@ -2703,8 +2412,8 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
for (m=pilot3; m<ue->frame_parms.symbols_per_tti; m++) {
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d] Frame %d, slot %d: DLSCH (SI) demod between pilot 3 and 4 (2nd slot), m %d\n",
ue->Mod_id,frame_rx,slot_rx,m);
LOG_D(PHY,"[UE %d] Frame %d, subframe %d: DLSCH (SI) demod between pilot 3 and 4 (2nd slot), m %d\n",
ue->Mod_id,frame_rx,subframe_rx,m);
#endif
rx_pdsch(ue,
......@@ -2776,7 +2485,11 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
#endif
}
#ifdef PHY_ABSTRACTION
else {
......@@ -2789,6 +2502,10 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
#endif
if (ret == (1+ue->dlsch_SI[eNB_id]->max_turbo_iterations)) {
ue->dlsch_SI_errors[eNB_id]++;
#ifdef DEBUG_PHY_PROC
......@@ -2813,7 +2530,6 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
#ifdef DEBUG_PHY_PROC
//if ((frame_rx % 100) == 0)
LOG_D(PHY,"[UE %d] Frame %d, subframe %d, received SI for TBS %d, mcs %d, rvidx %d, rballoc %X.%X.%X.%X\n",
ue->Mod_id,frame_rx,subframe_prev,
ue->dlsch_SI[eNB_id]->harq_processes[0]->TBS,
......@@ -2826,12 +2542,6 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
#endif
if (ue->mac_enabled == 1) {
/*
printf("\n\n");
for (i=0;i<ue->dlsch_SI[eNB_id]->harq_processes[0]->TBS>>3;i++)
printf("%02x ",ue->dlsch_SI[eNB_id]->harq_processes[0]->b[i]);
printf("\n");
*/
mac_xface->ue_decode_si(ue->Mod_id,
CC_id,
frame_rx,
......@@ -2841,19 +2551,12 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
}
}
}
/*
#ifdef DEBUG_PHY_PROC
debug_LOG_D(PHY,"[UE %d] Frame %d, slot %d: dlsch_decoding (SI) ret %d (%d errors)\n",
ue->Mod_id,frame_rx,slot_rx,ret,ue->dlsch_SI_errors[eNB_id]);
#endif
*/
}
}
if (ue->dlsch_ra[eNB_id]->active == 1) {
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d] Frame %d, slot %d: DLSCH (RA) demod symbols 10,11,12\n",ue->Mod_id,frame_rx,slot_rx);
LOG_D(PHY,"[UE %d] Frame %d, subframe %d: DLSCH (RA) demod symbols 10,11,12\n",ue->Mod_id,frame_rx,subframe_rx);
#endif
// process symbols 10,11,12 and trigger DLSCH decoding
......@@ -2935,6 +2638,8 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
#endif
if (ret == (1+ue->dlsch_ra[eNB_id]->max_turbo_iterations)) {
ue->dlsch_ra_errors[eNB_id]++;
LOG_D(PHY,"[UE %d] Frame %d, subframe %d, received RA in error\n",ue->Mod_id,frame_rx,subframe_prev);
......@@ -2979,7 +2684,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
timing_advance);
//timing_advance = 0;
process_timing_advance_rar(ue,timing_advance);
process_timing_advance_rar(ue,proc,timing_advance);
if (mode!=debug_prach) {
ue->ulsch_Msg3_active[eNB_id]=1;
......@@ -3016,32 +2721,24 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
rar = ue->dlsch_ra[eNB_id]->harq_processes[0]->b+1;
timing_advance = ((((uint16_t)(rar[0]&0x7f))<<4) + (rar[1]>>4));
//timing_advance = ue->dlsch_ra[eNB_id]->harq_processes[0]->b[0];
process_timing_advance_rar(ue,timing_advance);
process_timing_advance_rar(ue,proc,timing_advance);
}
} //ret <= MAX_ITERATIONS
/*
#ifdef DEBUG_PHY_PROC
debug_LOG_D(PHY,"[UE %d] Frame %d, slot %d: dlsch_decoding (RA) ret %d (%d errors)\n",
ue->Mod_id,frame_rx,slot_rx,ret,ue->dlsch_ra_errors[eNB_id]);
#endif
*/
} // dlsch_ra[eNB_id]->active == 1
}
if ((((slot_rx%2)==0) && ((l==pilot1))) ||
if (((slot==0) && ((l==pilot1))) ||
((pmch_flag==1)&&(l==1))) {
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d] Frame %d, slot %d: Calling pdcch procedures (eNB %d)\n",ue->Mod_id,frame_rx,slot_rx,eNB_id);
LOG_D(PHY,"[UE %d] Frame %d, slot %d: Calling pdcch procedures (eNB %d)\n",ue->Mod_id,frame_rx,slot,eNB_id);
#endif
// rt_printk("[PDCCH] Frame %d, slot %d, start %llu\n",frame_rx,slot_rx,rt_get_time_ns());
if (ue_pdcch_procedures(eNB_id,ue,abstraction_flag) == -1) {
if (ue_pdcch_procedures(eNB_id,ue,proc,abstraction_flag) == -1) {
#ifdef DEBUG_PHY_PROC
LOG_E(PHY,"[UE %d] Frame %d, slot %d: Error in pdcch procedures\n",ue->Mod_id,frame_rx,slot_rx);
LOG_E(PHY,"[UE %d] Frame %d, subframe %d: Error in pdcch procedures\n",ue->Mod_id,frame_rx,subframe_rx);
#endif
return(-1);
}
......@@ -3055,18 +2752,17 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
if (abstraction_flag==0) {
if (((slot_rx%2)==1) && (l==0)) {
if ((slot==1) &&
(l==0)) {
start_meas(&ue->dlsch_llr_stats);
for (m=ue->pdcch_vars[eNB_id]->num_pdcch_symbols;
m<pilot2;
m++) {
#ifndef DLSCH_THREAD
if (ue->dlsch[eNB_id][0]->active == 1) {
harq_pid = ue->dlsch[eNB_id][0]->current_harq_pid;
LOG_D(PHY,"[UE %d] PDSCH active in subframe %d (%d), harq_pid %d\n",ue->Mod_id,subframe_rx,slot_rx,harq_pid);
LOG_D(PHY,"[UE %d] PDSCH active in subframe %d (%d), harq_pid %d\n",ue->Mod_id,subframe_rx,subframe_rx,harq_pid);
if ((ue->transmission_mode[eNB_id] == 5) &&
(ue->dlsch[eNB_id][0]->harq_processes[harq_pid]->dl_power_off==0) &&
......@@ -3082,6 +2778,8 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
// process DLSCH received in first slot
rx_pdsch(ue,
PDSCH,
eNB_id,
......@@ -3094,7 +2792,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
ue->dlsch[eNB_id][0]->current_harq_pid);
} // CRNTI active
#endif
if (ue->dlsch_SI[eNB_id]->active == 1) {
// process SI DLSCH in first slot
......@@ -3127,12 +2825,12 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
stop_meas(&ue->dlsch_llr_stats);
} // 2nd quarter
if (((slot_rx%2)==1) && (l==pilot1)) {
if ((slot==1) && (l==pilot1)) {
start_meas(&ue->dlsch_llr_stats);
for (m=pilot2; m<pilot3; m++) {
#ifndef DLSCH_THREAD
if (ue->dlsch[eNB_id][0]->active == 1) {
harq_pid = ue->dlsch[eNB_id][0]->current_harq_pid;
......@@ -3161,7 +2859,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
ue->dlsch[eNB_id][0]->current_harq_pid);
} // CRNTI active
#endif
if(ue->dlsch_SI[eNB_id]->active == 1) {
rx_pdsch(ue,
......@@ -3197,7 +2895,8 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
}// l loop
// calculate some statistics
if (slot_rx==19) {
if ((subframe_rx==9) &&
(slot==1)) {
if (frame_rx % 10 == 0) {
if ((ue->dlsch_received[eNB_id] - ue->dlsch_received_last[eNB_id]) != 0)
ue->dlsch_fer[eNB_id] = (100*(ue->dlsch_errors[eNB_id] - ue->dlsch_errors_last[eNB_id]))/(ue->dlsch_received[eNB_id] - ue->dlsch_received_last[eNB_id]);
......@@ -3221,9 +2920,9 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
if (is_pmch_subframe((subframe_rx==9?-1:0)+frame_rx,subframe_rx,&ue->frame_parms)) {
LOG_D(PHY,"ue calling pmch subframe ..\n ");
if ((slot_rx%2)==1) {
if (slot==1) {
LOG_D(PHY,"[UE %d] Frame %d, subframe %d: Querying for PMCH demodulation(%d)\n",
ue->Mod_id,(subframe_rx==9?-1:0)+frame_rx,subframe_rx,slot_rx);
ue->Mod_id,(subframe_rx==9?-1:0)+frame_rx,subframe_rx,slot);
#ifdef Rel10
pmch_mcs = mac_xface->ue_query_mch(ue->Mod_id,
CC_id,
......@@ -3339,8 +3038,8 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
eNB_id,// not relevant in eMBMS context
sync_area);
/* for (i=0;i<ue->dlsch_MCH[0]->harq_processes[0]->TBS>>3;i++)
msg("%2x.",ue->dlsch_MCH[0]->harq_processes[0]->b[i]);
msg("\n");
printf("%2x.",ue->dlsch_MCH[0]->harq_processes[0]->b[i]);
printf("\n");
*/
if (mcch_active == 1)
......@@ -3374,9 +3073,9 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
#ifdef DEBUG_PHY
for (int i=0; i<phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->TBS>>3; i++)
msg("%02x ",phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->b[i]);
printf("%02x ",phy_vars_rn->dlsch_rn_MCH[subframe_rx]->harq_processes[0]->b[i]);
msg("\n");
printf("\n");
#endif
} else
LOG_W(PHY,"[UE %d] Frame %d: not supported option\n",ue->Mod_id, frame_rx);
......@@ -3388,9 +3087,10 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag
}
#ifdef EMOS
phy_procedures_emos_UE_RX(ue,slot_rx,eNB_id);
phy_procedures_emos_UE_RX(ue,slot,eNB_id);
#endif
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_OUT);
stop_meas(&ue->phy_proc_rx);
return (0);
......@@ -3426,7 +3126,7 @@ int phy_procedures_RN_UE_RX(uint8_t slot_rx, uint8_t next_slot, relaying_type_t
#endif
void phy_procedures_UE_lte(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,
void phy_procedures_UE_lte(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,
relaying_type_t r_type, PHY_VARS_RN *phy_vars_rn)
{
#if defined(ENABLE_ITTI)
......@@ -3436,33 +3136,22 @@ void phy_procedures_UE_lte(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_fl
unsigned int Mod_id;
int result;
#endif
# if ENABLE_RAL
int CC_id =0;
#endif
int frame_rx = ue->frame_rx;
int frame_tx = ue->frame_tx;
int slot_rx = ue->slot_rx;
int slot_tx = ue->slot_tx;
int subframe_tx = slot_tx>>1;
int subframe_rx = slot_rx>>1;
int frame_rx = proc->frame_rx;
int frame_tx = proc->frame_tx;
int subframe_rx = proc->subframe_rx;
int subframe_tx = proc->subframe_tx;
#undef DEBUG_PHY_PROC
UE_L2_STATE_t ret;
int slot;
if (ue->mac_enabled == 0) {
ue->UE_mode[eNB_id]=PUSCH;
ue->prach_resources[eNB_id] = &prach_resources_local;
prach_resources_local.ra_RNTI = 0xbeef;
prach_resources_local.ra_PreambleIndex = 0;
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_LTE,1);
#if defined(EXMIMO)
#ifndef OAI_USRP
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_DAQ_MBOX, *((volatile unsigned int *) openair0_exmimo_pci[0].rxcnt_ptr[0]));
#endif
#endif
start_meas(&ue->phy_proc);
#if defined(ENABLE_ITTI)
......@@ -3480,138 +3169,7 @@ void phy_procedures_UE_lte(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_fl
LOG_I(PHY, "[UE %d] Received %s\n", Mod_id, msg_name);
/* TODO process the message */
# if ENABLE_RAL
{
MessageDef *message_p;
message_p = itti_alloc_new_message(TASK_PHY_UE , PHY_FIND_CELL_IND);
memset(&PHY_FIND_CELL_IND(message_p), 0, sizeof(PHY_FIND_CELL_IND(message_p)));
PHY_FIND_CELL_IND (message_p).transaction_id = PHY_FIND_CELL_REQ(msg_p).transaction_id;
PHY_FIND_CELL_IND (message_p).cell_nb = 1;
PHY_FIND_CELL_IND (message_p).cells[0].earfcn = 1;
PHY_FIND_CELL_IND (message_p).cells[0].cell_id = 06;
PHY_FIND_CELL_IND (message_p).cells[0].rsrp = 39;
PHY_FIND_CELL_IND (message_p).cells[0].rsrq = 39;
itti_send_msg_to_task(TASK_RRC_UE, instance, message_p);
}
# endif
break;
# if ENABLE_RAL
case TIMER_HAS_EXPIRED:
// check if it is a measurement timer
{
hashtable_rc_t hashtable_rc;
hashtable_rc = hashtable_is_key_exists(ue_g[Mod_id][CC_id]->ral_thresholds_timed, (uint64_t)(TIMER_HAS_EXPIRED(msg_p).timer_id));
LOG_I(PHY, "[UE %d] Received TIMER HAS EXPIRED: (hash_rc %d, HASH_TABLE_OK %d)\n", Mod_id, hashtable_rc, HASH_TABLE_OK);
if (hashtable_rc == HASH_TABLE_OK) {
phy_UE_lte_check_measurement_thresholds(instance, (ral_threshold_phy_t*)TIMER_HAS_EXPIRED(msg_p).arg);
}
}
break;
case PHY_MEAS_THRESHOLD_REQ:
#warning "TO DO LIST OF THRESHOLDS"
LOG_I(PHY, "[UE %d] Received %s\n", Mod_id, msg_name);
{
ral_threshold_phy_t* threshold_phy_p = NULL;
int index, res;
long timer_id;
hashtable_rc_t hashtable_rc;
switch (PHY_MEAS_THRESHOLD_REQ(msg_p).cfg_param.th_action) {
case RAL_TH_ACTION_CANCEL_THRESHOLD:
break;
case RAL_TH_ACTION_SET_NORMAL_THRESHOLD:
case RAL_TH_ACTION_SET_ONE_SHOT_THRESHOLD:
for (index = 0; index < PHY_MEAS_THRESHOLD_REQ(msg_p).cfg_param.num_thresholds; index++) {
threshold_phy_p = calloc(1, sizeof(ral_threshold_phy_t));
threshold_phy_p->th_action = PHY_MEAS_THRESHOLD_REQ(msg_p).cfg_param.th_action;
memcpy(&threshold_phy_p->link_param.link_param_type,
&PHY_MEAS_THRESHOLD_REQ(msg_p).cfg_param.link_param_type,
sizeof(ral_link_param_type_t));
memcpy(&threshold_phy_p->threshold,
&PHY_MEAS_THRESHOLD_REQ(msg_p).cfg_param.thresholds[index],
sizeof(ral_threshold_t));
switch (PHY_MEAS_THRESHOLD_REQ(msg_p).cfg_param.union_choice) {
case RAL_LINK_CFG_PARAM_CHOICE_TIMER_NULL:
switch (PHY_MEAS_THRESHOLD_REQ(msg_p).cfg_param.link_param_type.choice) {
case RAL_LINK_PARAM_TYPE_CHOICE_GEN:
SLIST_INSERT_HEAD(
&ue_g[Mod_id][CC_id]->ral_thresholds_gen_polled[PHY_MEAS_THRESHOLD_REQ(msg_p).cfg_param.link_param_type._union.link_param_gen],
threshold_phy_p,
ral_thresholds);
break;
case RAL_LINK_PARAM_TYPE_CHOICE_LTE:
SLIST_INSERT_HEAD(
&ue_g[Mod_id][CC_id]->ral_thresholds_lte_polled[PHY_MEAS_THRESHOLD_REQ(msg_p).cfg_param.link_param_type._union.link_param_lte],
threshold_phy_p,
ral_thresholds);
//LOG_E(PHY, "[UE %d] NORMAL/ONE SHOT - TIMER NULL - type LTE in %s\n", Mod_id, msg_name);
break;
default:
LOG_E(PHY, "[UE %d] BAD PARAMETER cfg_param.link_param_type.choice %d in %s\n",
Mod_id, PHY_MEAS_THRESHOLD_REQ(msg_p).cfg_param.link_param_type.choice, msg_name);
}
break;
case RAL_LINK_CFG_PARAM_CHOICE_TIMER:
res = timer_setup(
(uint32_t)(PHY_MEAS_THRESHOLD_REQ(msg_p).cfg_param._union.timer_interval/1000),//uint32_t interval_sec,
(uint32_t)(PHY_MEAS_THRESHOLD_REQ(msg_p).cfg_param._union.timer_interval%1000),//uint32_t interval_us,
TASK_PHY_UE,
instance,
TIMER_PERIODIC,
threshold_phy_p,
&timer_id);
if (res == 0) {
hashtable_rc = hashtable_insert(ue_g[Mod_id][CC_id]->ral_thresholds_timed, (uint64_t )timer_id, (void*)threshold_phy_p);
if (hashtable_rc == HASH_TABLE_OK) {
threshold_phy_p->timer_id = timer_id;
LOG_I(PHY, "[UE %d] NORMAL/ONE SHOT - TIMER CHOICE - OK - in Hash %s\n", Mod_id, msg_name);
} else {
LOG_E(PHY, "[UE %d] %s: Error in hashtable. Could not configure threshold index %d \n",
Mod_id, msg_name, index);
}
} else {
LOG_E(PHY, "[UE %d] %s: Could not configure threshold index %d because of timer initialization failure\n",
Mod_id, msg_name, index);
}
break;
default: // already checked in RRC, should not happen here
LOG_E(PHY, "[UE %d] BAD PARAMETER cfg_param.union_choice %d in %s\n",
Mod_id, PHY_MEAS_THRESHOLD_REQ(msg_p).cfg_param.union_choice, msg_name);
}
}
break;
default:
LOG_E(PHY, "[UE %d] BAD PARAMETER th_action value %d in %s\n",
Mod_id, PHY_MEAS_THRESHOLD_REQ(msg_p).cfg_param.th_action, msg_name);
}
}
break;
# endif
default:
LOG_E(PHY, "[UE %d] Received unexpected message %s\n", Mod_id, msg_name);
......@@ -3625,36 +3183,38 @@ void phy_procedures_UE_lte(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_fl
#endif
for (slot=0;slot<2;slot++) {
if ((subframe_select(&ue->frame_parms,subframe_tx)==SF_UL)||
(ue->frame_parms.frame_type == FDD)) {
phy_procedures_UE_TX(ue,eNB_id,abstraction_flag,mode,r_type);
phy_procedures_UE_TX(ue,proc,eNB_id,abstraction_flag,mode,r_type);
}
if ((subframe_select(&ue->frame_parms,subframe_rx)==SF_DL) ||
(ue->frame_parms.frame_type == FDD)) {
#ifdef Rel10
if (phy_procedures_RN_UE_RX(slot_rx, slot_tx, r_type) != 0 )
if (phy_procedures_RN_UE_RX(subframe_rx, subframe_tx, r_type) != 0 )
#endif
phy_procedures_UE_RX(ue,eNB_id,abstraction_flag,mode,r_type,phy_vars_rn);
phy_procedures_UE_RX(ue,proc,eNB_id,abstraction_flag,mode,r_type,phy_vars_rn);
}
if ((subframe_select(&ue->frame_parms,subframe_tx)==SF_S) &&
((slot_tx&1)==1)) {
(slot==1)) {
phy_procedures_UE_S_TX(ue,eNB_id,abstraction_flag,r_type);
}
if ((subframe_select(&ue->frame_parms,subframe_rx)==SF_S) &&
((slot_rx&1)==0)) {
(slot==0)) {
#ifdef Rel10
if (phy_procedures_RN_UE_RX(slot_rx, slot_tx, r_type) != 0 )
if (phy_procedures_RN_UE_RX(subframe_rx, subframe_tx, r_type) != 0 )
#endif
phy_procedures_UE_RX(ue,eNB_id,abstraction_flag,mode,r_type,phy_vars_rn);
phy_procedures_UE_RX(ue,proc,eNB_id,abstraction_flag,mode,r_type,phy_vars_rn);
}
if (ue->mac_enabled==1) {
if (slot_rx%2==0) {
if (slot==0) {
ret = mac_xface->ue_scheduler(ue->Mod_id,
frame_tx,
subframe_rx,
......@@ -3683,4 +3243,7 @@ void phy_procedures_UE_lte(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t abstraction_fl
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_LTE,0);
stop_meas(&ue->phy_proc);
} // slot
}
......@@ -42,7 +42,7 @@
#include "PHY/LTE_TRANSPORT/proto.h"
#include "PHY/extern.h"
int8_t pucch_power_cntl(PHY_VARS_UE *ue,uint8_t subframe,uint8_t eNB_id,PUCCH_FMT_t pucch_fmt)
int8_t pucch_power_cntl(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t subframe,uint8_t eNB_id,PUCCH_FMT_t pucch_fmt)
{
int8_t Po_PUCCH;
......@@ -98,7 +98,7 @@ int8_t pucch_power_cntl(PHY_VARS_UE *ue,uint8_t subframe,uint8_t eNB_id,PUCCH_FM
if (pucch_fmt!=pucch_format1) {
LOG_I(PHY,"[UE %d][PDSCH %x] frame %d, subframe %d: Po_PUCCH %d dBm : Po_NOMINAL_PUCCH %d dBm, PL %d dB, g_pucch %d dB\n",
ue->Mod_id,
ue->dlsch[eNB_id][0]->rnti,ue->frame_tx,subframe,
ue->dlsch[eNB_id][0]->rnti,proc->frame_tx,subframe,
Po_PUCCH,
ue->frame_parms.ul_power_control_config_common.p0_NominalPUCCH,
get_PL(ue->Mod_id,ue->CC_id,eNB_id),
......@@ -106,7 +106,7 @@ int8_t pucch_power_cntl(PHY_VARS_UE *ue,uint8_t subframe,uint8_t eNB_id,PUCCH_FM
} else {
LOG_I(PHY,"[UE %d][SR %x] frame %d, subframe %d: Po_PUCCH %d dBm : Po_NOMINAL_PUCCH %d dBm, PL %d dB g_pucch %d dB\n",
ue->Mod_id,
ue->dlsch[eNB_id][0]->rnti,ue->frame_tx,subframe,
ue->dlsch[eNB_id][0]->rnti,proc->frame_tx,subframe,
Po_PUCCH,
ue->frame_parms.ul_power_control_config_common.p0_NominalPUCCH,
get_PL(ue->Mod_id,ue->CC_id,eNB_id),
......
......@@ -136,13 +136,13 @@ int16_t get_hundred_times_delta_IF(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t harq_p
uint8_t alpha_lut[8] = {0,40,50,60,70,80,90,100};
void pusch_power_cntl(PHY_VARS_UE *ue,uint8_t subframe,uint8_t eNB_id,uint8_t j, uint8_t abstraction_flag)
void pusch_power_cntl(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t j, uint8_t abstraction_flag)
{
uint8_t harq_pid = subframe2harq_pid(&ue->frame_parms,
ue->frame_tx,
subframe);
proc->frame_tx,
proc->subframe_tx);
uint8_t nb_rb = ue->ulsch[eNB_id]->harq_processes[harq_pid]->nb_rb;
int8_t PL;
......@@ -164,7 +164,7 @@ void pusch_power_cntl(PHY_VARS_UE *ue,uint8_t subframe,uint8_t eNB_id,uint8_t j,
ue->ulsch[eNB_id]->Po_PUSCH += (mac_xface->get_Po_NOMINAL_PUSCH(ue->Mod_id,0) + PL);
LOG_I(PHY,"[UE %d][RAPROC] frame %d, subframe %d: Msg3 Po_PUSCH %d dBm (%d,%d,100*PL=%d,%d,%d)\n",
ue->Mod_id,ue->frame_tx,subframe,ue->ulsch[eNB_id]->Po_PUSCH,
ue->Mod_id,proc->frame_tx,proc->subframe_tx,ue->ulsch[eNB_id]->Po_PUSCH,
100*mac_xface->get_Po_NOMINAL_PUSCH(ue->Mod_id,0),
hundred_times_log10_NPRB[nb_rb-1],
100*PL,
......@@ -183,7 +183,7 @@ void pusch_power_cntl(PHY_VARS_UE *ue,uint8_t subframe,uint8_t eNB_id,uint8_t j,
ue->ulsch[eNB_id]->PHR = 40;
LOG_D(PHY,"[UE %d][PUSCH %d] frame %d, subframe %d: Po_PUSCH %d dBm : tx power %d, Po_NOMINAL_PUSCH %d,log10(NPRB) %f,PHR %d, PL %d, alpha*PL %f,delta_IF %f,f_pusch %d\n",
ue->Mod_id,harq_pid,ue->frame_tx,subframe,
ue->Mod_id,harq_pid,proc->frame_tx,proc->subframe_tx,
ue->ulsch[eNB_id]->Po_PUSCH,
ue->tx_power_max_dBm,
ue->frame_parms.ul_power_control_config_common.p0_NominalPUSCH,
......
......@@ -499,7 +499,7 @@ static void *scope_thread(void *arg)
while (!oai_exit) {
if (UE_flag==1) {
len = dump_ue_stats (PHY_vars_UE_g[0][0], stats_buffer, 0, mode,rx_input_level_dBm);
len = dump_ue_stats (PHY_vars_UE_g[0][0], &PHY_vars_UE_g[0][0]->proc.proc_rxtx[0],stats_buffer, 0, mode,rx_input_level_dBm);
//fl_set_object_label(form_stats->stats_text, stats_buffer);
fl_clear_browser(form_stats->stats_text);
fl_add_browser_line(form_stats->stats_text, stats_buffer);
......
......@@ -306,7 +306,7 @@ static void *UE_thread_synch(void *arg)
pthread_mutex_unlock(&sync_mutex);
printf("unlocked sync_mutex (UE_sync_thread)\n");
printf("starting UE synch thread (IC %d)\n",UE->instance_cnt_synch);
printf("starting UE synch thread (IC %d)\n",UE->proc.instance_cnt_synch);
ind = 0;
found = 0;
......@@ -358,34 +358,8 @@ static void *UE_thread_synch(void *arg)
openair0_cfg[card].rx_freq[i] = downlink_frequency[card][i];
openair0_cfg[card].tx_freq[i] = downlink_frequency[card][i]+uplink_frequency_offset[card][i];
#ifdef OAI_USRP
openair0_cfg[card].rx_gain[i] = UE->rx_total_gain_dB;//-USRP_GAIN_OFFSET;
#if 0 // UHD 3.8
switch(UE->frame_parms.N_RB_DL) {
case 6:
openair0_cfg[card].rx_gain[i] -= 12;
break;
case 25:
openair0_cfg[card].rx_gain[i] -= 6;
break;
case 50:
openair0_cfg[card].rx_gain[i] -= 3;
break;
case 100:
openair0_cfg[card].rx_gain[i] -= 0;
break;
default:
printf( "Unknown number of RBs %d\n", UE->frame_parms.N_RB_DL );
break;
}
#endif
openair0_cfg[card].rx_gain[i] = UE->rx_total_gain_dB;
printf( "UE synch: setting RX gain (%d,%d) to %f\n", card, i, openair0_cfg[card].rx_gain[i] );
#endif
}
}
......@@ -393,19 +367,19 @@ static void *UE_thread_synch(void *arg)
while (oai_exit==0) {
if (pthread_mutex_lock(&UE->mutex_synch) != 0) {
if (pthread_mutex_lock(&UE->proc.mutex_synch) != 0) {
LOG_E( PHY, "[SCHED][UE] error locking mutex for UE initial synch thread\n" );
exit_fun("noting to add");
return &UE_thread_synch_retval;
}
while (UE->instance_cnt_synch < 0) {
while (UE->proc.instance_cnt_synch < 0) {
// the thread waits here most of the time
pthread_cond_wait( &UE->cond_synch, &UE->mutex_synch );
pthread_cond_wait( &UE->proc.cond_synch, &UE->proc.mutex_synch );
}
if (pthread_mutex_unlock(&UE->mutex_synch) != 0) {
if (pthread_mutex_unlock(&UE->proc.mutex_synch) != 0) {
LOG_E( PHY, "[SCHED][eNB] error unlocking mutex for UE Initial Synch thread\n" );
exit_fun("nothing to add");
return &UE_thread_synch_retval;
......@@ -437,36 +411,8 @@ static void *UE_thread_synch(void *arg)
openair0_cfg[card].rx_freq[i] = downlink_frequency[card][i];
openair0_cfg[card].tx_freq[i] = downlink_frequency[card][i]+uplink_frequency_offset[card][i];
#ifdef OAI_USRP
openair0_cfg[card].rx_gain[i] = UE->rx_total_gain_dB;//-USRP_GAIN_OFFSET; // 65 calibrated for USRP B210 @ 2.6 GHz
#if 0 // UHD 3.8
switch(UE->frame_parms.N_RB_DL) {
case 6:
openair0_cfg[card].rx_gain[i] -= 12;
break;
case 25:
openair0_cfg[card].rx_gain[i] -= 6;
break;
case 50:
openair0_cfg[card].rx_gain[i] -= 3;
break;
case 100:
openair0_cfg[card].rx_gain[i] -= 0;
break;
default:
printf("Unknown number of RBs %d\n",UE->frame_parms.N_RB_DL);
break;
}
#endif
openair0_cfg[card].rx_gain[i] = UE->rx_total_gain_dB;
printf("UE synch: setting RX gain (%d,%d) to %f\n",card,i,openair0_cfg[card].rx_gain[i]);
#endif
}
}
......@@ -539,7 +485,7 @@ static void *UE_thread_synch(void *arg)
if( UE->mode == rx_dump_frame ){
FILE *fd;
if ((UE->frame_rx&1) == 0) { // this guarantees SIB1 is present
if ((UE->proc.proc_rxtx[0].frame_rx&1) == 0) { // this guarantees SIB1 is present
if ((fd = fopen("rxsig_frame0.dat","w")) != NULL) {
fwrite((void*)&UE->common_vars.rxdata[0][0],
sizeof(int32_t),
......@@ -558,11 +504,6 @@ static void *UE_thread_synch(void *arg)
UE->is_synchronized = 0;
}
}
UE->slot_rx = 0;
UE->slot_tx = 4;
}
} else {
// initial sync failed
......@@ -631,16 +572,16 @@ static void *UE_thread_synch(void *arg)
if (pthread_mutex_lock(&UE->mutex_synch) != 0) {
if (pthread_mutex_lock(&UE->proc.mutex_synch) != 0) {
LOG_E( PHY, "[SCHED][UE] error locking mutex for UE synch\n" );
exit_fun("noting to add");
return &UE_thread_synch_retval;
}
// indicate readiness
UE->instance_cnt_synch--;
UE->proc.instance_cnt_synch--;
if (pthread_mutex_unlock(&UE->mutex_synch) != 0) {
if (pthread_mutex_unlock(&UE->proc.mutex_synch) != 0) {
LOG_E( PHY, "[SCHED][UE] error unlocking mutex for UE synch\n" );
exit_fun("noting to add");
return &UE_thread_synch_retval;
......@@ -658,6 +599,7 @@ static void *UE_thread_synch(void *arg)
* \param arg is a pointer to a \ref PHY_VARS_UE structure.
* \returns a pointer to an int. The storage is not on the heap and must not be freed.
*/
/*
static void *UE_thread_tx(void *arg)
{
static int UE_thread_tx_retval;
......@@ -677,7 +619,7 @@ static void *UE_thread_tx(void *arg)
attr.sched_nice = 0;
attr.sched_priority = 0;
/* This creates a 1ms reservation every 10ms period*/
// This creates a 1ms reservation every 10ms period
attr.sched_policy = SCHED_DEADLINE;
attr.sched_runtime = 900000; // each tx thread requires .5ms to finish its job
attr.sched_deadline = 1000000; // each tx thread will finish within 1ms
......@@ -695,8 +637,8 @@ static void *UE_thread_tx(void *arg)
char cpu_affinity[1024];
cpu_set_t cpuset;
/* Set affinity mask to include CPUs 1 to MAX_CPUS */
/* CPU 0 is reserved for UHD threads */
// Set affinity mask to include CPUs 1 to MAX_CPUS
// CPU 0 is reserved for UHD threads
CPU_ZERO(&cpuset);
#ifdef CPU_AFFINITY
......@@ -714,7 +656,7 @@ static void *UE_thread_tx(void *arg)
}
#endif
/* Check the actual affinity mask assigned to the thread */
// Check the actual affinity mask assigned to the thread
s = pthread_getaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset);
if (s != 0)
......@@ -836,44 +778,24 @@ static void *UE_thread_tx(void *arg)
return &UE_thread_tx_retval;
}
*/
/*!
* \brief This is the UE receive thread.
* \brief This is the UE thread for RX subframe n and TX subframe n+4.
* This thread performs the phy_procedures_UE_RX() on every received slot.
* then, if TX is enabled it performs TX for n+4.
* \param arg is a pointer to a \ref PHY_VARS_UE structure.
* \returns a pointer to an int. The storage is not on the heap and must not be freed.
*/
/*
#ifdef OAI_USRP
void rescale(int16_t *input,int length)
{
#if defined(__x86_64__) || defined(__i386__)
__m128i *input128 = (__m128i *)input;
#elif defined(__arm__)
int16x8_t *input128 = (int16x8_t *)input;
#endif
int i;
for (i=0; i<length>>2; i++) {
#if defined(__x86_64__) || defined(__i386__)
input128[i] = _mm_srai_epi16(input128[i],4);
#elif defined(__arm__)
input128[i] = vshrq_n_s16(input128[i],4);
#endif
}
}
#endif
*/
static void *UE_thread_rx(void *arg)
static void *UE_thread_rxn_txnp4(void *arg)
{
static int UE_thread_rx_retval;
PHY_VARS_UE *UE = (PHY_VARS_UE*)arg;
int i;
UE_rxtx_proc_t *proc = (UE_rxtx_proc_t *)arg;
int ret;
UE->instance_cnt_rx=-1;
PHY_VARS_UE *UE=PHY_vars_UE_g[0][proc->CC_id];
proc->instance_cnt_rxtx=-1;
#ifdef DEADLINE_SCHEDULER
......@@ -970,10 +892,10 @@ static void *UE_thread_rx(void *arg)
// Lock memory from swapping. This is a process wide call (not constraint to this thread).
mlockall(MCL_CURRENT | MCL_FUTURE);
printf("waiting for sync (UE_thread_rx)\n");
printf("waiting for sync (UE_thread_rxn_txnp4)\n");
pthread_mutex_lock(&sync_mutex);
printf("Locked sync_mutex, waiting (UE_thread_rx)\n");
printf("Locked sync_mutex, waiting (UE_thread_rxn_txnp4)\n");
while (sync_var<0)
pthread_cond_wait(&sync_cond, &sync_mutex);
......@@ -981,154 +903,70 @@ static void *UE_thread_rx(void *arg)
pthread_mutex_unlock(&sync_mutex);
printf("unlocked sync_mutex, waiting (UE_thread_rx)\n");
printf("Starting UE RX thread\n");
printf("Starting UE RXN_TXNP4 thread\n");
while (!oai_exit) {
if (pthread_mutex_lock(&UE->mutex_rx) != 0) {
if (pthread_mutex_lock(&proc->mutex_rxtx) != 0) {
LOG_E( PHY, "[SCHED][UE] error locking mutex for UE RX\n" );
exit_fun("nothing to add");
return &UE_thread_rx_retval;
}
while (UE->instance_cnt_rx < 0) {
while (proc->instance_cnt_rxtx < 0) {
// most of the time, the thread is waiting here
pthread_cond_wait( &UE->cond_rx, &UE->mutex_rx );
pthread_cond_wait( &proc->cond_rxtx, &proc->mutex_rxtx );
}
if (pthread_mutex_unlock(&UE->mutex_rx) != 0) {
LOG_E( PHY, "[SCHED][UE] error unlocking mutex for UE RX\n" );
if (pthread_mutex_unlock(&proc->mutex_rxtx) != 0) {
LOG_E( PHY, "[SCHED][UE] error unlocking mutex for UE RXn_TXnp4\n" );
exit_fun("nothing to add");
return &UE_thread_rx_retval;
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_UE_THREAD_RX, 1 );
for (i=0; i<2; i++) {
if ((subframe_select( &UE->frame_parms, UE->slot_rx>>1 ) == SF_DL) ||
(UE->frame_parms.frame_type == FDD)) {
/*
#ifdef OAI_USRP
// this does the adjustments of RX signal amplitude to bring into least 12 significant bits
int slot_length = UE->frame_parms.samples_per_tti>>1;
int rx_offset = (UE->slot_rx)*slot_length + UE->rx_offset;
int frame_length = UE->frame_parms.samples_per_tti*10;
int aa;
if (rx_offset > frame_length)
rx_offset-=frame_length;
if (rx_offset >= 0) {
if (rx_offset + slot_length < frame_length)
for (aa=0;aa<UE->frame_parms.nb_antennas_rx;aa++)
rescale((int16_t*)&UE->common_vars.rxdata[aa][rx_offset&(~0x3)],
slot_length);
else {
int diff = rx_offset + slot_length - frame_length;
for (aa=0;aa<UE->frame_parms.nb_antennas_rx;aa++){
rescale((int16_t*)&UE->common_vars.rxdata[aa][rx_offset&(~0x3)],
slot_length-diff);
rescale((int16_t*)&UE->common_vars.rxdata[aa][0],
diff);
}
}
}
else {
for (aa=0;aa<UE->frame_parms.nb_antennas_rx;aa++){
rescale((int16_t*)&UE->common_vars.rxdata[aa][(frame_length+rx_offset)&(~0x3)],
-rx_offset);
rescale((int16_t*)&UE->common_vars.rxdata[aa][0],
slot_length+rx_offset);
}
}
#endif
*/
phy_procedures_UE_RX( UE, 0, 0, UE->mode, no_relay, NULL );
}
if ((subframe_select( &UE->frame_parms, UE->slot_rx>>1 ) == SF_S) &&
((UE->slot_rx&1) == 0)) {
/*
#ifdef OAI_USRP
// this does the adjustments of RX signal amplitude to bring into least 12 significant bits
int slot_length = UE->frame_parms.samples_per_tti>>1;
int rx_offset = (UE->slot_rx)*slot_length + UE->rx_offset;
int frame_length = UE->frame_parms.samples_per_tti*10;
if (rx_offset > frame_length)
rx_offset-=frame_length;
int aa;
if (rx_offset >= 0) {
if (rx_offset + slot_length < frame_length)
for (aa=0;aa<UE->frame_parms.nb_antennas_rx;aa++)
rescale((int16_t*)&UE->common_vars.rxdata[aa][rx_offset&(~0x3)],
slot_length);
else {
int diff = rx_offset + slot_length - frame_length;
for (aa=0;aa<UE->frame_parms.nb_antennas_rx;aa++){
rescale((int16_t*)&UE->common_vars.rxdata[aa][rx_offset&(~0x3)],
slot_length-diff);
rescale((int16_t*)&UE->common_vars.rxdata[aa][0],
diff);
}
}
}
else {
for (aa=0;aa<UE->frame_parms.nb_antennas_rx;aa++){
rescale((int16_t*)&UE->common_vars.rxdata[aa][(frame_length+rx_offset)&(~0x3)],
-rx_offset);
rescale((int16_t*)&UE->common_vars.rxdata[aa][0],
slot_length+rx_offset);
}
}
#endif
*/
phy_procedures_UE_RX( UE, 0, 0, UE->mode, no_relay, NULL );
if ((subframe_select( &UE->frame_parms, proc->subframe_rx) == SF_DL) ||
(UE->frame_parms.frame_type == FDD) ||
(subframe_select( &UE->frame_parms, proc->subframe_rx ) == SF_S)) {
phy_procedures_UE_RX( UE, proc, 0, 0, UE->mode, no_relay, NULL );
}
if ((UE->mac_enabled==1) && (i==0)) {
if (UE->mac_enabled==1) {
ret = mac_xface->ue_scheduler(UE->Mod_id,
UE->frame_tx,
UE->slot_rx>>1,
subframe_select(&UE->frame_parms,UE->slot_tx>>1),
proc->frame_tx,
proc->subframe_rx,
subframe_select(&UE->frame_parms,proc->subframe_tx),
0,
0/*FIXME CC_id*/);
if (ret == CONNECTION_LOST) {
LOG_E( PHY, "[UE %"PRIu8"] Frame %"PRIu32", subframe %u RRC Connection lost, returning to PRACH\n",
UE->Mod_id, UE->frame_rx, UE->slot_tx>>1 );
UE->Mod_id, proc->frame_rx, proc->subframe_tx );
UE->UE_mode[0] = PRACH;
} else if (ret == PHY_RESYNCH) {
LOG_E( PHY, "[UE %"PRIu8"] Frame %"PRIu32", subframe %u RRC Connection lost, trying to resynch\n",
UE->Mod_id, UE->frame_rx, UE->slot_tx>>1 );
UE->Mod_id, proc->frame_rx, proc->subframe_tx );
UE->UE_mode[0] = RESYNCH;
} else if (ret == PHY_HO_PRACH) {
LOG_I( PHY, "[UE %"PRIu8"] Frame %"PRIu32", subframe %u, return to PRACH and perform a contention-free access\n",
UE->Mod_id, UE->frame_rx, UE->slot_tx>>1 );
UE->Mod_id, proc->frame_rx, proc->subframe_tx );
UE->UE_mode[0] = PRACH;
}
}
UE->slot_rx++;
if (UE->slot_rx == 20) {
UE->slot_rx = 0;
UE->frame_rx++;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX_UE, UE->frame_rx );
}
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX_UE, UE->slot_rx>>1 );
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_UE_THREAD_RX, 0 );
if (pthread_mutex_lock(&UE->mutex_rx) != 0) {
if (pthread_mutex_lock(&proc->mutex_rxtx) != 0) {
LOG_E( PHY, "[SCHED][UE] error locking mutex for UE RX\n" );
exit_fun("noting to add");
return &UE_thread_rx_retval;
}
UE->instance_cnt_rx--;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE_INST_CNT_RX, UE->instance_cnt_rx);
proc->instance_cnt_rxtx--;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE_INST_CNT_RX, proc->instance_cnt_rxtx);
if (pthread_mutex_unlock(&UE->mutex_rx) != 0) {
if (pthread_mutex_unlock(&proc->mutex_rxtx) != 0) {
LOG_E( PHY, "[SCHED][UE] error unlocking mutex for UE RX\n" );
exit_fun("noting to add");
return &UE_thread_rx_retval;
......@@ -1150,13 +988,185 @@ static void *UE_thread_rx(void *arg)
/*!
* \brief This is the main UE thread.
* This thread controls the other three UE threads:
* - UE_thread_rx
* - UE_thread_tx
* - UE_thread_rxn_txnp4 (even subframes)
* - UE_thread_rxn_txnp4 (odd subframes)
* - UE_thread_synch
* \param arg unused
* \returns a pointer to an int. The storage is not on the heap and must not be freed.
*/
void *UE_thread(void *arg)
void *UE_thread(void *arg) {
static int UE_thread_retval;
PHY_VARS_UE *UE = PHY_vars_UE_g[0][0];
// int tx_enabled = 0;
unsigned int rxs;
int dummy_rx[UE->frame_parms.nb_antennas_rx][UE->frame_parms.samples_per_tti];
openair0_timestamp timestamp;
void* rxp[2];
#ifdef NAS_UE
MessageDef *message_p;
#endif
int start_rx_stream = 0;
#ifdef DEADLINE_SCHEDULER
struct sched_attr attr;
unsigned int flags = 0;
attr.size = sizeof(attr);
attr.sched_flags = 0;
attr.sched_nice = 0;
attr.sched_priority = 0;//sched_get_priority_max(SCHED_DEADLINE);
// This creates a .5 ms reservation
attr.sched_policy = SCHED_DEADLINE;
attr.sched_runtime = 100000;
attr.sched_deadline = 500000;
attr.sched_period = 500000;
if (sched_setattr(0, &attr, flags) < 0 ) {
perror("[SCHED] main eNB thread: sched_setattr failed\n");
exit_fun("Nothing to add");
return &UE_thread_retval;
}
LOG_I(HW,"[SCHED][eNB] eNB main deadline thread %lu started on CPU %d\n",
(unsigned long)gettid(), sched_getcpu());
#else
struct sched_param sp;
sp.sched_priority = sched_get_priority_max(SCHED_FIFO);
pthread_setschedparam(pthread_self(),SCHED_FIFO,&sp);
#endif
// Lock memory from swapping. This is a process wide call (not constraint to this thread).
mlockall(MCL_CURRENT | MCL_FUTURE);
printf("waiting for sync (UE_thread)\n");
pthread_mutex_lock(&sync_mutex);
printf("Locked sync_mutex, waiting (UE_thread)\n");
while (sync_var<0)
pthread_cond_wait(&sync_cond, &sync_mutex);
pthread_mutex_unlock(&sync_mutex);
printf("unlocked sync_mutex, waiting (UE_thread)\n");
printf("starting UE thread\n");
#ifdef NAS_UE
message_p = itti_alloc_new_message(TASK_NAS_UE, INITIALIZE_MESSAGE);
itti_send_msg_to_task (TASK_NAS_UE, INSTANCE_DEFAULT, message_p);
#endif
while (!oai_exit) {
if (UE->is_synchronized == 0) {
if (pthread_mutex_lock(&UE->proc.mutex_synch) != 0) {
LOG_E( PHY, "[SCHED][UE] verror locking mutex for UE initial synch thread\n" );
exit_fun("nothing to add");
return &UE_thread_retval;
}
int instance_cnt_synch = UE->proc.instance_cnt_synch;
if (pthread_mutex_unlock(&UE->proc.mutex_synch) != 0) {
LOG_E( PHY, "[SCHED][UE] error unlocking mutex for UE initial synch thread\n" );
exit_fun("nothing to add");
return &UE_thread_retval;
}
if (instance_cnt_synch < 0) { // we can invoke the synch
// grab 10 ms of signal and wakeup synch thread
for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++)
rxp[i] = (void*)&rxdata[i][0];
if (UE->mode != loop_through_memory) {
rxs = openair0.trx_read_func(&openair0,
&timestamp,
rxp,
UE->frame_parms.samples_per_tti*10,
UE->frame_parms.nb_antennas_rx);
}
instance_cnt_synch = ++UE->proc.instance_cnt_synch;
if (instance_cnt_synch == 0) {
if (pthread_cond_signal(&UE->proc.cond_synch) != 0) {
LOG_E( PHY, "[SCHED][UE] ERROR pthread_cond_signal for UE sync thread\n" );
exit_fun("nothing to add");
return &UE_thread_retval;
}
} else {
LOG_E( PHY, "[SCHED][UE] UE sync thread busy!!\n" );
exit_fun("nothing to add");
return &UE_thread_retval;
}
} //
else {
// grab 10 ms of signal into dummy buffer
if (UE->mode != loop_through_memory) {
for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++)
rxp[i] = (void*)&dummy_rx[i][0];
for (int sf=0;sf<10;sf++)
rxs = openair0.trx_read_func(&openair0,
&timestamp,
rxp,
UE->frame_parms.samples_per_tti,
UE->frame_parms.nb_antennas_rx);
}
}
} // UE->is_synchronized==0
else {
if (start_rx_stream==0) {
start_rx_stream=1;
if (UE->mode != loop_through_memory) {
LOG_I(PHY,"Resynchronizing RX by %d samples\n",UE->rx_offset);
rxs = openair0.trx_read_func(&openair0,
&timestamp,
(void**)rxdata,
UE->rx_offset,
UE->frame_parms.nb_antennas_rx);
if (rxs != UE->rx_offset) {
exit_fun("problem in rx");
return &UE_thread_retval;
}
UE->rx_offset=0;
} //UE->mode != loop_through_memory
else
rt_sleep_ns(1000000);
// read in first symbol (to process one subframe we need symbol 0 - 14 and 1st symbol of next subframe
rxs = openair0.trx_read_func(&openair0,
&timestamp,
(void**)rxdata,
UE->frame_parms.ofdm_symbol_size+UE->frame_parms.nb_prefix_samples0,
UE->frame_parms.nb_antennas_rx);
}// start_rx_stream==0
if (UE->mode != loop_through_memory) {
for (int sf=0;sf<10;sf++)
for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++)
rxp[i] = (void*)&dummy_rx[i][sf*UE->frame_parms.samples_per_tti];
rxs = openair0.trx_read_func(&openair0,
&timestamp,
rxp,
UE->frame_parms.samples_per_tti,
UE->frame_parms.nb_antennas_rx);
}
} // UE->is_synchronized==1
} // while !oai_exit
} // UE_thread
/*
void *UE_thread_old(void *arg)
{
UNUSED(arg)
static int UE_thread_retval;
......@@ -1176,6 +1186,7 @@ void *UE_thread(void *arg)
int first_rx = 0;
RTIME T0;
unsigned int rxs;
void* rxp[2];
openair0_timestamp timestamp;
......@@ -1254,8 +1265,6 @@ void *UE_thread(void *arg)
for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++)
rxp[i] = (dummy_dump==0) ? (void*)&rxdata[i][rxpos] : (void*)dummy[i];
/* if (dummy_dump == 0)
printf("writing %d samples to %d (first_rx %d)\n",spp - ((first_rx==1) ? rx_off_diff : 0),rxpos,first_rx);*/
if (UE->mode != loop_through_memory) {
rxs = openair0.trx_read_func(&openair0,
......@@ -1342,7 +1351,7 @@ void *UE_thread(void *arg)
if (instance_cnt_rx == 0) {
LOG_D(HW,"signalling rx thread to wake up, hw_frame %d, hw_subframe %d (time %lli)\n", frame, hw_subframe, rt_get_time_ns()-T0 );
if (pthread_cond_signal(&UE->cond_rx) != 0) {
if (pthread_cond_signal(&UE->proc.cond_rx) != 0) {
LOG_E( PHY, "[SCHED][UE] ERROR pthread_cond_signal for UE RX thread\n" );
exit_fun("nothing to add");
return &UE_thread_retval;
......@@ -1538,7 +1547,7 @@ void *UE_thread(void *arg)
return &UE_thread_retval;
}
*/
/*!
* \brief Initialize the UE theads.
......@@ -1561,23 +1570,21 @@ void init_UE_threads(void)
#endif
// the threads are not yet active, therefore access is allowed without locking
UE->instance_cnt_tx = -1;
UE->instance_cnt_rx = -1;
UE->instance_cnt_synch = -1;
pthread_mutex_init(&UE->mutex_tx,NULL);
pthread_mutex_init(&UE->mutex_rx,NULL);
pthread_mutex_init(&UE->mutex_synch,NULL);
pthread_cond_init(&UE->cond_tx,NULL);
pthread_cond_init(&UE->cond_rx,NULL);
pthread_cond_init(&UE->cond_synch,NULL);
pthread_create(&UE->thread_tx,NULL,UE_thread_tx,(void*)UE);
pthread_setname_np( UE->thread_tx, "UE_thread_tx" );
pthread_create(&UE->thread_rx,NULL,UE_thread_rx,(void*)UE);
pthread_setname_np( UE->thread_rx, "UE_thread_rx" );
pthread_create(&UE->thread_synch,NULL,UE_thread_synch,(void*)UE);
pthread_setname_np( UE->thread_synch, "UE_thread_synch" );
UE->frame_tx = 0;
UE->frame_rx = 0;
UE->proc.proc_rxtx[0].instance_cnt_rxtx = -1;
UE->proc.proc_rxtx[1].instance_cnt_rxtx = -1;
UE->proc.instance_cnt_synch = -1;
pthread_mutex_init(&UE->proc.proc_rxtx[0].mutex_rxtx,NULL);
pthread_mutex_init(&UE->proc.proc_rxtx[1].mutex_rxtx,NULL);
pthread_mutex_init(&UE->proc.mutex_synch,NULL);
pthread_cond_init(&UE->proc.proc_rxtx[0].cond_rxtx,NULL);
pthread_cond_init(&UE->proc.proc_rxtx[1].cond_rxtx,NULL);
pthread_cond_init(&UE->proc.cond_synch,NULL);
pthread_create(&UE->proc.proc_rxtx[0].pthread_rxtx,NULL,UE_thread_rxn_txnp4,(void*)&UE->proc.proc_rxtx[0]);
pthread_setname_np( UE->proc.proc_rxtx[0].pthread_rxtx, "UE_thread_rxn_txnp4_even" );
pthread_create(&UE->proc.proc_rxtx[1].pthread_rxtx,NULL,UE_thread_rxn_txnp4,(void*)&UE->proc.proc_rxtx[1]);
pthread_setname_np( UE->proc.proc_rxtx[1].pthread_rxtx, "UE_thread_rxn_txnp4_odd" );
pthread_create(&UE->proc.pthread_synch,NULL,UE_thread_synch,(void*)UE);
pthread_setname_np( UE->proc.pthread_synch, "UE_thread_synch" );
}
......
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