Commit 7818958d authored by Raymond Knopp's avatar Raymond Knopp

Validated up to reception of first PUSCH after Msg4 (contains RRCSetupComplete)

parent cfe82245
...@@ -45,6 +45,8 @@ ...@@ -45,6 +45,8 @@
#define FAPI_NR_DL_CONFIG_TYPE_DLSCH 0x02 #define FAPI_NR_DL_CONFIG_TYPE_DLSCH 0x02
#define FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH 0x03 #define FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH 0x03
#define FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH 0x04 #define FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH 0x04
#define FAPI_NR_DL_CONFIG_TYPE_P_DLSCH 0x05
#define FAPI_NR_DL_CONFIG_TYPES 0x05
#define FAPI_NR_CCE_REG_MAPPING_TYPE_INTERLEAVED 0x01 #define FAPI_NR_CCE_REG_MAPPING_TYPE_INTERLEAVED 0x01
#define FAPI_NR_CCE_REG_MAPPING_TYPE_NON_INTERLEAVED 0x02 #define FAPI_NR_CCE_REG_MAPPING_TYPE_NON_INTERLEAVED 0x02
...@@ -59,6 +61,6 @@ ...@@ -59,6 +61,6 @@
#define FAPI_NR_UL_CONFIG_TYPE_PUCCH 0x02 #define FAPI_NR_UL_CONFIG_TYPE_PUCCH 0x02
#define FAPI_NR_UL_CONFIG_TYPE_PUSCH 0x03 #define FAPI_NR_UL_CONFIG_TYPE_PUSCH 0x03
#define FAPI_NR_UL_CONFIG_TYPE_SRS 0x04 #define FAPI_NR_UL_CONFIG_TYPE_SRS 0x04
#define FAPI_NR_UL_CONFIG_TYPES 0x04
#endif #endif
...@@ -80,7 +80,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB, ...@@ -80,7 +80,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
uint16_t nb_rb_pusch = pusch_pdu->rb_size; uint16_t nb_rb_pusch = pusch_pdu->rb_size;
#ifdef DEBUG_CH #ifdef DEBUG_CH
LOG_D(PHY, "In %s: ch_offset %d, symbol_offset %d OFDM size %d, Ns = %d, k = %d symbol %d\n", LOG_I(PHY, "In %s: ch_offset %d, symbol_offset %d OFDM size %d, Ns = %d, k = %d symbol %d\n",
__FUNCTION__, __FUNCTION__,
ch_offset, ch_offset,
symbol_offset, symbol_offset,
......
...@@ -1222,6 +1222,8 @@ int nr_rx_pusch(PHY_VARS_gNB *gNB, ...@@ -1222,6 +1222,8 @@ int nr_rx_pusch(PHY_VARS_gNB *gNB,
for (aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) { for (aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) {
gNB->pusch_vars[ulsch_id]->ulsch_power[aarx] = signal_energy_nodc(&gNB->pusch_vars[ulsch_id]->ul_ch_estimates[aarx][symbol*frame_parms->ofdm_symbol_size], gNB->pusch_vars[ulsch_id]->ulsch_power[aarx] = signal_energy_nodc(&gNB->pusch_vars[ulsch_id]->ul_ch_estimates[aarx][symbol*frame_parms->ofdm_symbol_size],
rel15_ul->rb_size*12); rel15_ul->rb_size*12);
LOG_D(PHY,"ulsch_power[%d] symbol %d %f (%p)\n",aarx,symbol,dB_fixed_times10( gNB->pusch_vars[ulsch_id]->ulsch_power[aarx])/10.0,
&gNB->pusch_vars[ulsch_id]->ul_ch_estimates[aarx][symbol*frame_parms->ofdm_symbol_size]);
if (gNB->pusch_vars[ulsch_id]->ulsch_power[aarx]==1) return (1); if (gNB->pusch_vars[ulsch_id]->ulsch_power[aarx]==1) return (1);
} }
......
...@@ -264,21 +264,22 @@ int nr_ulsch_encoding(NR_UE_ULSCH_t *ulsch, ...@@ -264,21 +264,22 @@ int nr_ulsch_encoding(NR_UE_ULSCH_t *ulsch,
LOG_D(PHY,"ulsch coding nb_rb %d, Nl = %d\n", nb_rb, harq_process->pusch_pdu.nrOfLayers); LOG_D(PHY,"ulsch coding nb_rb %d, Nl = %d\n", nb_rb, harq_process->pusch_pdu.nrOfLayers);
LOG_D(PHY,"ulsch coding A %d G %d mod_order %d\n", A,G, mod_order); LOG_D(PHY,"ulsch coding A %d G %d mod_order %d\n", A,G, mod_order);
LOG_D(PHY,"harq_pid %d harq_process->ndi %d, pusch_data.new_data_indicator %d\n",harq_pid,harq_process->ndi,harq_process->pusch_pdu.pusch_data.new_data_indicator);
if (harq_process->ndi != harq_process->pusch_pdu.pusch_data.new_data_indicator) { // this is a new packet if (harq_process->first_tx == 1 ||
harq_process->ndi != harq_process->pusch_pdu.pusch_data.new_data_indicator) { // this is a new packet
#ifdef DEBUG_ULSCH_CODING #ifdef DEBUG_ULSCH_CODING
printf("encoding thinks this is a new packet \n"); printf("encoding thinks this is a new packet \n");
#endif #endif
harq_process->first_tx=0;
///////////////////////// a---->| add CRC |---->b ///////////////////////// ///////////////////////// a---->| add CRC |---->b /////////////////////////
/////////// ///////////
/*
int i; int i;
printf("ulsch (tx): \n"); printf("ulsch (tx): \n");
for (i=0;i<(A>>3);i++) for (i=0;i<(A>>3);i++)
printf("%02x.",a[i]); printf("%02x.",harq_process->a[i]);
printf("\n"); printf("\n");
*/
if (A > 3824) { if (A > 3824) {
// Add 24-bit crc (polynomial A) to payload // Add 24-bit crc (polynomial A) to payload
...@@ -412,6 +413,7 @@ int nr_ulsch_encoding(NR_UE_ULSCH_t *ulsch, ...@@ -412,6 +413,7 @@ int nr_ulsch_encoding(NR_UE_ULSCH_t *ulsch,
/////////// ///////////
/////////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////////
LOG_I(PHY,"setting ndi to %d from pusch_data\n",harq_process->pusch_pdu.pusch_data.new_data_indicator);
harq_process->ndi = harq_process->pusch_pdu.pusch_data.new_data_indicator; harq_process->ndi = harq_process->pusch_pdu.pusch_data.new_data_indicator;
} }
F = harq_process->F; F = harq_process->F;
......
...@@ -104,7 +104,7 @@ void handle_nfapi_nr_pdcch_pdu(PHY_VARS_gNB *gNB, ...@@ -104,7 +104,7 @@ void handle_nfapi_nr_pdcch_pdu(PHY_VARS_gNB *gNB,
int frame, int slot, int frame, int slot,
nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu) { nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu) {
LOG_D(PHY,"Frame %d, Slot %d: DCI processing - proc:slot_tx:%d pdcch_pdu_rel15->numDlDci:%d\n",frame,slot, slot, pdcch_pdu->pdcch_pdu_rel15.numDlDci); LOG_I(PHY,"Frame %d, Slot %d: DCI processing - proc:slot_tx:%d pdcch_pdu_rel15->numDlDci:%d\n",frame,slot, slot, pdcch_pdu->pdcch_pdu_rel15.numDlDci);
// copy dci configuration into gNB structure // copy dci configuration into gNB structure
// gNB->pdcch_pdu = pdcch_pdu; // gNB->pdcch_pdu = pdcch_pdu;
...@@ -220,7 +220,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){ ...@@ -220,7 +220,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
for (int i = 0; i < number_ul_tti_pdu; i++) { for (int i = 0; i < number_ul_tti_pdu; i++) {
switch (UL_tti_req->pdus_list[i].pdu_type) { switch (UL_tti_req->pdus_list[i].pdu_type) {
case NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE: case NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE:
LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_UL_TTI_PUSCH_PDU_TYPE for %d.%d\n", frame, slot, UL_tti_req->SFN, UL_tti_req->Slot); LOG_I(PHY,"frame %d, slot %d, Got NFAPI_NR_UL_TTI_PUSCH_PDU_TYPE for %d.%d\n", frame, slot, UL_tti_req->SFN, UL_tti_req->Slot);
nr_fill_ulsch(gNB,UL_tti_req->SFN, UL_tti_req->Slot, &UL_tti_req->pdus_list[i].pusch_pdu); nr_fill_ulsch(gNB,UL_tti_req->SFN, UL_tti_req->Slot, &UL_tti_req->pdus_list[i].pusch_pdu);
break; break;
case NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE: case NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE:
......
...@@ -249,7 +249,7 @@ void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) { ...@@ -249,7 +249,7 @@ void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) {
// if all segments are done // if all segments are done
if (rdata->nbSegments == ulsch_harq->processedSegments) { if (rdata->nbSegments == ulsch_harq->processedSegments) {
if (decodeSuccess) { if (decodeSuccess) {
LOG_I(PHY,"[gNB %d] ULSCH: Setting ACK for slot %d TBS %d\n", LOG_D(PHY,"[gNB %d] ULSCH: Setting ACK for slot %d TBS %d\n",
gNB->Mod_id,ulsch_harq->slot,ulsch_harq->TBS); gNB->Mod_id,ulsch_harq->slot,ulsch_harq->TBS);
ulsch_harq->status = SCH_IDLE; ulsch_harq->status = SCH_IDLE;
ulsch_harq->round = 0; ulsch_harq->round = 0;
...@@ -257,9 +257,9 @@ void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) { ...@@ -257,9 +257,9 @@ void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) {
LOG_D(PHY, "ULSCH received ok \n"); LOG_D(PHY, "ULSCH received ok \n");
nr_fill_indication(gNB,ulsch_harq->frame, ulsch_harq->slot, rdata->ulsch_id, rdata->harq_pid, 0); nr_fill_indication(gNB,ulsch_harq->frame, ulsch_harq->slot, rdata->ulsch_id, rdata->harq_pid, 0);
// log_dump(PHY, ulsch_harq->b, 16, LOG_DUMP_CHAR,"gnb pusch rx frame %d %d: ", ulsch_harq->frame, ulsch_harq->slot); log_dump(PHY, ulsch_harq->b, 16, LOG_DUMP_CHAR,"gnb pusch rx frame %d %d: ", ulsch_harq->frame, ulsch_harq->slot);
} else { } else {
LOG_I(PHY,"[gNB %d] ULSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d) r %d\n", LOG_D(PHY,"[gNB %d] ULSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d) r %d\n",
gNB->Mod_id, ulsch_harq->frame, ulsch_harq->slot, gNB->Mod_id, ulsch_harq->frame, ulsch_harq->slot,
rdata->harq_pid,ulsch_harq->status, ulsch_harq->round,ulsch_harq->TBS,r); rdata->harq_pid,ulsch_harq->status, ulsch_harq->round,ulsch_harq->TBS,r);
if (ulsch_harq->round >= ulsch->Mlimit) { if (ulsch_harq->round >= ulsch->Mlimit) {
...@@ -383,7 +383,7 @@ void nr_fill_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int ULSCH_id, ...@@ -383,7 +383,7 @@ void nr_fill_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int ULSCH_id,
// estimate UL_CQI for MAC (from antenna port 0 only) // estimate UL_CQI for MAC (from antenna port 0 only)
int SNRtimes10 = dB_fixed_times10(gNB->pusch_vars[ULSCH_id]->ulsch_power[0]) - (10*gNB->measurements.n0_power_dB[0]); int SNRtimes10 = dB_fixed_times10(gNB->pusch_vars[ULSCH_id]->ulsch_power[0]) - (10*gNB->measurements.n0_power_dB[0]);
LOG_D(PHY, "Estimated SNR for PUSCH is = %d dB\n", SNRtimes10/10); LOG_D(PHY, "Estimated SNR for PUSCH is = %f dB (ulsch_power %f)\n", SNRtimes10/10,dB_fixed_times10(gNB->pusch_vars[ULSCH_id]->ulsch_power[0])/10.0);
if (SNRtimes10 < -640) cqi=0; if (SNRtimes10 < -640) cqi=0;
else if (SNRtimes10 > 635) cqi=255; else if (SNRtimes10 > 635) cqi=255;
...@@ -535,9 +535,8 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) ...@@ -535,9 +535,8 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
gNB_I0_measurements(gNB); gNB_I0_measurements(gNB);
// measure enegry in SS=10 L=4, nb_rb = 18, first_rb = 0 (corresponds to msg3)
int offset = 10*gNB->frame_parms.ofdm_symbol_size + gNB->frame_parms.first_carrier_offset; int offset = 10*gNB->frame_parms.ofdm_symbol_size + gNB->frame_parms.first_carrier_offset;
int power_rxF = signal_energy_nodc(&gNB->common_vars.rxdataF[0][offset],12*18); int power_rxF = signal_energy_nodc(&gNB->common_vars.rxdataF[0][offset+(47*12)],12*18);
LOG_D(PHY,"frame %d, slot %d: UL signal energy %d\n",frame_rx,slot_rx,power_rxF); LOG_D(PHY,"frame %d, slot %d: UL signal energy %d\n",frame_rx,slot_rx,power_rxF);
for (int i=0;i<NUMBER_OF_NR_PUCCH_MAX;i++){ for (int i=0;i<NUMBER_OF_NR_PUCCH_MAX;i++){
......
...@@ -42,7 +42,7 @@ ...@@ -42,7 +42,7 @@
extern PHY_VARS_NR_UE ***PHY_vars_UE_g; extern PHY_VARS_NR_UE ***PHY_vars_UE_g;
const char *dl_pdu_type[]={"DCI", "DLSCH", "RA_DLSCH"}; const char *dl_pdu_type[]={"DCI", "DLSCH", "RA_DLSCH", "SI_DLSCH", "P_DLSCH"};
const char *ul_pdu_type[]={"PRACH", "PUCCH", "PUSCH", "SRS"}; const char *ul_pdu_type[]={"PRACH", "PUCCH", "PUSCH", "SRS"};
int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
...@@ -67,7 +67,8 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ ...@@ -67,7 +67,8 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
pdcch_vars->nb_search_space = 0; pdcch_vars->nb_search_space = 0;
for (i = 0; i < dl_config->number_pdus; ++i){ for (i = 0; i < dl_config->number_pdus; ++i){
AssertFatal(dl_config->number_pdus < FAPI_NR_DL_CONFIG_LIST_NUM,"dl_config->number_pdus %d out of bounds\n",dl_config->number_pdus);
AssertFatal(dl_config->dl_config_list[i].pdu_type<=FAPI_NR_DL_CONFIG_TYPES,"pdu_type %d > 2\n",dl_config->dl_config_list[i].pdu_type);
LOG_D(PHY, "In %s: received 1 DL %s PDU of %d total DL PDUs:\n", __FUNCTION__, dl_pdu_type[dl_config->dl_config_list[i].pdu_type - 1], dl_config->number_pdus); LOG_D(PHY, "In %s: received 1 DL %s PDU of %d total DL PDUs:\n", __FUNCTION__, dl_pdu_type[dl_config->dl_config_list[i].pdu_type - 1], dl_config->number_pdus);
if (dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_DCI) { if (dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_DCI) {
...@@ -149,6 +150,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ ...@@ -149,6 +150,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
for (i = 0; i < ul_config->number_pdus; ++i){ for (i = 0; i < ul_config->number_pdus; ++i){
AssertFatal(ul_config->ul_config_list[i].pdu_type <= FAPI_NR_UL_CONFIG_TYPES,"pdu_type %d out of bounds\n",ul_config->ul_config_list[i].pdu_type);
LOG_D(PHY, "In %s: processing %s PDU of %d total UL PDUs (ul_config %p) \n", __FUNCTION__, ul_pdu_type[ul_config->ul_config_list[i].pdu_type - 1], ul_config->number_pdus, ul_config); LOG_D(PHY, "In %s: processing %s PDU of %d total UL PDUs (ul_config %p) \n", __FUNCTION__, ul_pdu_type[ul_config->ul_config_list[i].pdu_type - 1], ul_config->number_pdus, ul_config);
uint8_t pdu_type = ul_config->ul_config_list[i].pdu_type, pucch_resource_id, current_harq_pid, format, gNB_id = 0; uint8_t pdu_type = ul_config->ul_config_list[i].pdu_type, pucch_resource_id, current_harq_pid, format, gNB_id = 0;
...@@ -181,7 +183,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ ...@@ -181,7 +183,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
if (scheduled_response->tx_request){ if (scheduled_response->tx_request){
fapi_nr_tx_request_body_t *tx_req_body = &scheduled_response->tx_request->tx_request_body[i]; fapi_nr_tx_request_body_t *tx_req_body = &scheduled_response->tx_request->tx_request_body[i];
LOG_I(PHY,"%d.%d Copying %d bytes to harq_process_ul_ue->a (harq_pid %d)\n",scheduled_response->frame,slot,tx_req_body->pdu_length,current_harq_pid);
memcpy(harq_process_ul_ue->a, tx_req_body->pdu, tx_req_body->pdu_length); memcpy(harq_process_ul_ue->a, tx_req_body->pdu, tx_req_body->pdu_length);
harq_process_ul_ue->status = ACTIVE; harq_process_ul_ue->status = ACTIVE;
......
...@@ -236,7 +236,11 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_ ...@@ -236,7 +236,11 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
/* update current context */ /* update current context */
if (mac->cg &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->csi_MeasConfig)
AssertFatal(1==0,"0 > %d.%d csi_MeasConfig is not null\n",frame_tx,nr_slot_tx);
int subframe_number = proc->nr_slot_rx / ue->frame_parms.slots_per_subframe; int subframe_number = proc->nr_slot_rx / ue->frame_parms.slots_per_subframe;
nb_pucch_format_4_in_subframes[subframe_number] = 0; /* reset pucch format 4 counter at current rx position */ nb_pucch_format_4_in_subframes[subframe_number] = 0; /* reset pucch format 4 counter at current rx position */
...@@ -341,10 +345,22 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_ ...@@ -341,10 +345,22 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
} }
} }
if (mac->cg &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->csi_MeasConfig)
AssertFatal(1==0,"6 > %d.%d csi_MeasConfig is not null\n",frame_tx,nr_slot_tx);
N_UCI = O_SR + O_ACK + O_CSI; N_UCI = O_SR + O_ACK + O_CSI;
if (N_UCI ==0) return(TRUE); if (N_UCI ==0) return(TRUE);
if (mac->cg &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->csi_MeasConfig)
AssertFatal(1==0,"5 > %d.%d csi_MeasConfig is not null\n",frame_tx,nr_slot_tx);
/* Part - III */ /* Part - III */
/* Choice PUCCH format and its related parameters */ /* Choice PUCCH format and its related parameters */
pucch_format_nr_t format = pucch_format0_nr; pucch_format_nr_t format = pucch_format0_nr;
...@@ -363,7 +379,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_ ...@@ -363,7 +379,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
int occ_Index = 0; int occ_Index = 0;
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[dl_harq_pid]->harq_ack; NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[proc->thread_id][gNB_id][0]->harq_processes[dl_harq_pid]->harq_ack;
int BWPsize,BWPstart;
if (select_pucch_resource(ue, mac, gNB_id, N_UCI, pucch_resource_indicator, &initial_pucch_id, &pucch_resource_set, if (select_pucch_resource(ue, mac, gNB_id, N_UCI, pucch_resource_indicator, &initial_pucch_id, &pucch_resource_set,
&pucch_resource_id, harq_status) == TRUE) { &pucch_resource_id, harq_status) == TRUE) {
/* use of initial pucch configuration provided by system information 1 */ /* use of initial pucch configuration provided by system information 1 */
...@@ -376,8 +392,10 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_ ...@@ -376,8 +392,10 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
int N_CS = initial_pucch_resource[initial_pucch_id].nb_CS_indexes; int N_CS = initial_pucch_resource[initial_pucch_id].nb_CS_indexes;
/* see TS 38213 Table 9.2.1-1: PUCCH resource sets before dedicated PUCCH resource configuration */ /* see TS 38213 Table 9.2.1-1: PUCCH resource sets before dedicated PUCCH resource configuration */
int BWPsize = NRRIV2BW(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth, BWPsize = NRRIV2BW(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth,
MAX_BWP_SIZE); MAX_BWP_SIZE);
BWPstart = NRRIV2PRBOFFSET(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth,
MAX_BWP_SIZE);
int RB_BWP_offset; int RB_BWP_offset;
if (initial_pucch_id == 15) { if (initial_pucch_id == 15) {
RB_BWP_offset =BWPsize/4; RB_BWP_offset =BWPsize/4;
...@@ -403,6 +421,8 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_ ...@@ -403,6 +421,8 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
LOG_W(PHY,"PUCCH ue is not expected to generate more than one HARQ-ACK at AbsSubframe %d.%d \n", frame_tx%1024, nr_slot_tx); LOG_W(PHY,"PUCCH ue is not expected to generate more than one HARQ-ACK at AbsSubframe %d.%d \n", frame_tx%1024, nr_slot_tx);
} }
NR_TST_PHY_PRINTF("PUCCH common configuration with index %d \n", initial_pucch_id); NR_TST_PHY_PRINTF("PUCCH common configuration with index %d \n", initial_pucch_id);
startingPRB += BWPstart;
secondHopPRB += BWPstart;
} }
/* use dedicated pucch resource configuration */ /* use dedicated pucch resource configuration */
/**********************************************/ /**********************************************/
...@@ -421,8 +441,8 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_ ...@@ -421,8 +441,8 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
format = pucch_resource->format.present; format = pucch_resource->format.present;
nb_symbols_total = get_nb_symbols_pucch(pucch_resource, format); nb_symbols_total = get_nb_symbols_pucch(pucch_resource, format);
starting_symbol_index = get_starting_symb_idx(pucch_resource, format); starting_symbol_index = get_starting_symb_idx(pucch_resource, format);
startingPRB = pucch_resource->startingPRB; startingPRB = BWPstart + pucch_resource->startingPRB;
secondHopPRB = pucch_resource->intraSlotFrequencyHopping ? pucch_resource->secondHopPRB : startingPRB; secondHopPRB = pucch_resource->intraSlotFrequencyHopping ? (BWPstart+pucch_resource->secondHopPRB) : startingPRB;
if (format==pucch_format1_nr) if (format==pucch_format1_nr)
time_domain_occ = pucch_resource->format.choice.format1->timeDomainOCC; time_domain_occ = pucch_resource->format.choice.format1->timeDomainOCC;
if (format==pucch_format4_nr) { if (format==pucch_format4_nr) {
...@@ -614,7 +634,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_ ...@@ -614,7 +634,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
format, (Q_m == BITS_PER_SYMBOL_QPSK ? " QPSK " : " BPSK "), nb_of_prbs, nb_symbols_total, nb_symbols, max_code_rate, starting_symbol_index); format, (Q_m == BITS_PER_SYMBOL_QPSK ? " QPSK " : " BPSK "), nb_of_prbs, nb_symbols_total, nb_symbols, max_code_rate, starting_symbol_index);
NR_TST_PHY_PRINTF("PUCCH ( startingPRB : %d ) ( secondHopPRB : %d ) ( m_0 : %d ) ( m_CS : %d ) ( time_domain_occ %d ) (occ_length : %d ) ( occ_Index : %d ) \n", NR_TST_PHY_PRINTF("PUCCH ( startingPRB : %d ) ( secondHopPRB : %d ) ( m_0 : %d ) ( m_CS : %d ) ( time_domain_occ %d ) (occ_length : %d ) ( occ_Index : %d ) \n",
startingPRB, secondHopPRB, m_0, m_CS, time_domain_occ, occ_length, occ_Index); startingPRB (absolute), secondHopPRB (absolute), m_0, m_CS, time_domain_occ, occ_length, occ_Index);
/* Part - IV */ /* Part - IV */
/* Generate PUCCH signal according to its format and parameters */ /* Generate PUCCH signal according to its format and parameters */
......
...@@ -1247,7 +1247,7 @@ int DU_handle_DL_NR_RRC_MESSAGE_TRANSFER(instance_t instance, ...@@ -1247,7 +1247,7 @@ int DU_handle_DL_NR_RRC_MESSAGE_TRANSFER(instance_t instance,
RC.nrrrc[ctxt.module_id], RC.nrrrc[ctxt.module_id],
ctxt.rnti); ctxt.rnti);
gNB_RRC_INST *rrc = &RC.nrrrc[ctxt.module_id]; gNB_RRC_INST *rrc = RC.nrrrc[ctxt.module_id];
if (srb_id == 0) { if (srb_id == 0) {
NR_DL_CCCH_Message_t* dl_ccch_msg=NULL; NR_DL_CCCH_Message_t* dl_ccch_msg=NULL;
asn_dec_rval_t dec_rval; asn_dec_rval_t dec_rval;
...@@ -1260,6 +1260,7 @@ int DU_handle_DL_NR_RRC_MESSAGE_TRANSFER(instance_t instance, ...@@ -1260,6 +1260,7 @@ int DU_handle_DL_NR_RRC_MESSAGE_TRANSFER(instance_t instance,
switch (dl_ccch_msg->message.choice.c1->present) { switch (dl_ccch_msg->message.choice.c1->present) {
case NR_DL_CCCH_MessageType__c1_PR_NOTHING: case NR_DL_CCCH_MessageType__c1_PR_NOTHING:
LOG_I(F1AP, "Received PR_NOTHING on DL-CCCH-Message\n"); LOG_I(F1AP, "Received PR_NOTHING on DL-CCCH-Message\n");
break; break;
......
...@@ -228,10 +228,10 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p ...@@ -228,10 +228,10 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p
return -1; return -1;
} }
LOG_D(MAC,"riv = %i\n", riv); LOG_D(MAC,"DLSCH riv = %i\n", riv);
LOG_D(MAC,"n_RB_DLBWP = %i\n", n_RB_DLBWP); LOG_D(MAC,"DLSCH n_RB_DLBWP = %i\n", n_RB_DLBWP);
LOG_D(MAC,"number_rbs = %i\n", dlsch_config_pdu->number_rbs); LOG_D(MAC,"DLSCH number_rbs = %i\n", dlsch_config_pdu->number_rbs);
LOG_D(MAC,"start_rb = %i\n", dlsch_config_pdu->start_rb); LOG_D(MAC,"DLSCH start_rb = %i\n", dlsch_config_pdu->start_rb);
} }
if(pusch_config_pdu != NULL){ if(pusch_config_pdu != NULL){
...@@ -254,7 +254,10 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p ...@@ -254,7 +254,10 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p
LOG_W(MAC, "Frequency domain assignment values are invalid! #RBs: %d, Start RB: %d, n_RB_ULBWP: %d \n",pusch_config_pdu->rb_size, pusch_config_pdu->rb_start, n_RB_ULBWP); LOG_W(MAC, "Frequency domain assignment values are invalid! #RBs: %d, Start RB: %d, n_RB_ULBWP: %d \n",pusch_config_pdu->rb_size, pusch_config_pdu->rb_start, n_RB_ULBWP);
return -1; return -1;
} }
LOG_D(MAC,"ULSCH riv = %i\n", riv);
LOG_D(MAC,"ULSCH n_RB_DLBWP = %i\n", n_RB_ULBWP);
LOG_D(MAC,"ULSCH number_rbs = %i\n", pusch_config_pdu->rb_size);
LOG_D(MAC,"ULSCH start_rb = %i\n", pusch_config_pdu->rb_start);
} }
return 0; return 0;
} }
...@@ -396,6 +399,7 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac, ...@@ -396,6 +399,7 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
return -1; return -1;
} }
LOG_D(NR_MAC,"Filling Time-Domain Allocation from pusch_TimeDomainAllocationList\n");
int startSymbolAndLength = pusch_TimeDomainAllocationList->list.array[time_domain_ind]->startSymbolAndLength; int startSymbolAndLength = pusch_TimeDomainAllocationList->list.array[time_domain_ind]->startSymbolAndLength;
int S,L; int S,L;
SLIV2SL(startSymbolAndLength,&S,&L); SLIV2SL(startSymbolAndLength,&S,&L);
...@@ -403,6 +407,7 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac, ...@@ -403,6 +407,7 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->nr_of_symbols=L; pusch_config_pdu->nr_of_symbols=L;
} }
else { else {
LOG_D(NR_MAC,"Filling Time-Domain Allocation from tables\n");
// k_offset = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][0]; // k_offset = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][0];
sliv_S = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][1]; sliv_S = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][1];
sliv_L = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][2]; sliv_L = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][2];
...@@ -412,6 +417,9 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac, ...@@ -412,6 +417,9 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->nr_of_symbols = sliv_L; pusch_config_pdu->nr_of_symbols = sliv_L;
pusch_config_pdu->start_symbol_index = sliv_S; pusch_config_pdu->start_symbol_index = sliv_S;
} }
LOG_D(NR_MAC,"start_symbol = %i\n", pusch_config_pdu->start_symbol_index);
LOG_D(NR_MAC,"number_symbols = %i\n", pusch_config_pdu->nr_of_symbols);
} }
return 0; return 0;
} }
...@@ -483,6 +491,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -483,6 +491,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
return -1; return -1;
} }
AssertFatal(ul_config->number_pdus<FAPI_NR_UL_CONFIG_LIST_NUM, "ul_config->number_pdus %d out of bounds\n",ul_config->number_pdus);
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu; nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu;
fill_ul_config(ul_config, frame_tx, slot_tx, FAPI_NR_UL_CONFIG_TYPE_PUSCH); fill_ul_config(ul_config, frame_tx, slot_tx, FAPI_NR_UL_CONFIG_TYPE_PUSCH);
......
...@@ -61,7 +61,7 @@ void fill_ul_config(fapi_nr_ul_config_request_t *ul_config, frame_t frame_tx, in ...@@ -61,7 +61,7 @@ void fill_ul_config(fapi_nr_ul_config_request_t *ul_config, frame_t frame_tx, in
ul_config->sfn = frame_tx; ul_config->sfn = frame_tx;
ul_config->number_pdus++; ul_config->number_pdus++;
LOG_D(MAC, "In %s: Set config request for UL transmission in [%d.%d], number of UL PDUs: %d\n", __FUNCTION__, ul_config->sfn, ul_config->slot, ul_config->number_pdus); LOG_D(NR_MAC, "In %s: Set config request for UL transmission in [%d.%d], number of UL PDUs: %d\n", __FUNCTION__, ul_config->sfn, ul_config->slot, ul_config->number_pdus);
} }
...@@ -111,7 +111,7 @@ long get_k2(NR_UE_MAC_INST_t *mac, uint8_t time_domain_ind) { ...@@ -111,7 +111,7 @@ long get_k2(NR_UE_MAC_INST_t *mac, uint8_t time_domain_ind) {
if (pusch_TimeDomainAllocationList) { if (pusch_TimeDomainAllocationList) {
if (time_domain_ind >= pusch_TimeDomainAllocationList->list.count) { if (time_domain_ind >= pusch_TimeDomainAllocationList->list.count) {
LOG_E(MAC, "time_domain_ind %d >= pusch->TimeDomainAllocationList->list.count %d\n", LOG_E(NR_MAC, "time_domain_ind %d >= pusch->TimeDomainAllocationList->list.count %d\n",
time_domain_ind, pusch_TimeDomainAllocationList->list.count); time_domain_ind, pusch_TimeDomainAllocationList->list.count);
return -1; return -1;
} }
...@@ -122,7 +122,7 @@ long get_k2(NR_UE_MAC_INST_t *mac, uint8_t time_domain_ind) { ...@@ -122,7 +122,7 @@ long get_k2(NR_UE_MAC_INST_t *mac, uint8_t time_domain_ind) {
"Slot offset K2 (%ld) cannot be less than DURATION_RX_TO_TX (%d)\n", "Slot offset K2 (%ld) cannot be less than DURATION_RX_TO_TX (%d)\n",
k2,DURATION_RX_TO_TX); k2,DURATION_RX_TO_TX);
LOG_D(MAC, "get_k2(): k2 is %ld\n", k2); LOG_D(NR_MAC, "get_k2(): k2 is %ld\n", k2);
return k2; return k2;
} }
...@@ -136,7 +136,7 @@ fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int sl ...@@ -136,7 +136,7 @@ fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int sl
//Check if request to access ul_config is for a UL slot //Check if request to access ul_config is for a UL slot
if (is_nr_UL_slot(tdd_config, slot, mac->frame_type) == 0) { if (is_nr_UL_slot(tdd_config, slot, mac->frame_type) == 0) {
LOG_W(MAC, "Slot %d is not a UL slot. %s called for wrong slot!!!\n", slot, __FUNCTION__); LOG_W(NR_MAC, "Slot %d is not a UL slot. %s called for wrong slot!!!\n", slot, __FUNCTION__);
return NULL; return NULL;
} }
...@@ -149,9 +149,9 @@ fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int sl ...@@ -149,9 +149,9 @@ fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int sl
NR_TDD_UL_DL_Pattern_t *tdd_pattern = &tdd_config->pattern1; NR_TDD_UL_DL_Pattern_t *tdd_pattern = &tdd_config->pattern1;
const int num_slots_per_tdd = nr_slots_per_frame[mu] >> (7 - tdd_pattern->dl_UL_TransmissionPeriodicity); const int num_slots_per_tdd = nr_slots_per_frame[mu] >> (7 - tdd_pattern->dl_UL_TransmissionPeriodicity);
const int num_slots_ul = tdd_pattern->nrofUplinkSlots + (tdd_pattern->nrofUplinkSymbols!=0); const int num_slots_ul = tdd_pattern->nrofUplinkSlots + (tdd_pattern->nrofUplinkSymbols!=0);
int index = (slot + num_slots_ul) % num_slots_per_tdd; int index = slot % num_slots_ul;
LOG_D(MAC, "In %s slots per tdd %d, num_slots_ul %d, index %d\n", __FUNCTION__, LOG_D(NR_MAC, "In %s slots per tdd %d, num_slots_ul %d, index %d\n", __FUNCTION__,
num_slots_per_tdd, num_slots_per_tdd,
num_slots_ul, num_slots_ul,
index); index);
...@@ -558,7 +558,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, ...@@ -558,7 +558,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->nr_of_symbols = NrOfSymbols; pusch_config_pdu->nr_of_symbols = NrOfSymbols;
#ifdef DEBUG_MSG3 #ifdef DEBUG_MSG3
LOG_D(MAC, "In %s BWP assignment (BWP (start %d, size %d) \n", __FUNCTION__, pusch_config_pdu->bwp_start, pusch_config_pdu->bwp_size); LOG_D(NR_MAC, "In %s BWP assignment (BWP (start %d, size %d) \n", __FUNCTION__, pusch_config_pdu->bwp_start, pusch_config_pdu->bwp_size);
#endif #endif
// MCS // MCS
...@@ -616,7 +616,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, ...@@ -616,7 +616,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
// Basic sanity check for MCS value to check for a false or erroneous DCI // Basic sanity check for MCS value to check for a false or erroneous DCI
if (dci->mcs > 28) { if (dci->mcs > 28) {
LOG_W(MAC, "MCS value %d out of bounds! Possibly due to false DCI. Ignoring DCI!\n", dci->mcs); LOG_W(NR_MAC, "MCS value %d out of bounds! Possibly due to false DCI. Ignoring DCI!\n", dci->mcs);
return -1; return -1;
} }
...@@ -634,7 +634,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, ...@@ -634,7 +634,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
/* BANDWIDTH_PART_IND */ /* BANDWIDTH_PART_IND */
if (dci->bwp_indicator.val != 1) { if (dci->bwp_indicator.val != 1) {
LOG_W(MAC, "bwp_indicator != 1! Possibly due to false DCI. Ignoring DCI!\n"); LOG_W(NR_MAC, "bwp_indicator != 1! Possibly due to false DCI. Ignoring DCI!\n");
return -1; return -1;
} }
config_bwp_ue(mac, &dci->bwp_indicator.val, dci_format); config_bwp_ue(mac, &dci->bwp_indicator.val, dci_format);
...@@ -644,7 +644,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, ...@@ -644,7 +644,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
} else { } else {
LOG_E(MAC, "In %s: UL grant from DCI format %d is not handled...\n", __FUNCTION__, *dci_format); LOG_E(NR_MAC, "In %s: UL grant from DCI format %d is not handled...\n", __FUNCTION__, *dci_format);
return -1; return -1;
} }
...@@ -677,7 +677,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, ...@@ -677,7 +677,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
else else
AssertFatal(1==0,"SequenceGroupHopping or sequenceHopping are NOT Supported\n"); AssertFatal(1==0,"SequenceGroupHopping or sequenceHopping are NOT Supported\n");
LOG_D(MAC,"TRANSFORM PRECODING IS ENABLED. CDM groups: %d, U: %d \n", pusch_config_pdu->num_dmrs_cdm_grps_no_data, LOG_D(NR_MAC,"TRANSFORM PRECODING IS ENABLED. CDM groups: %d, U: %d \n", pusch_config_pdu->num_dmrs_cdm_grps_no_data,
pusch_config_pdu->dfts_ofdm.low_papr_group_number); pusch_config_pdu->dfts_ofdm.low_papr_group_number);
} }
...@@ -766,13 +766,13 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, ...@@ -766,13 +766,13 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
if(valid_ptrs_setup==true) { if(valid_ptrs_setup==true) {
pusch_config_pdu->pdu_bit_map |= PUSCH_PDU_BITMAP_PUSCH_PTRS; pusch_config_pdu->pdu_bit_map |= PUSCH_PDU_BITMAP_PUSCH_PTRS;
} }
LOG_D(MAC, "UL PTRS values: PTRS time den: %d, PTRS freq den: %d\n", pusch_config_pdu->pusch_ptrs.ptrs_time_density, pusch_config_pdu->pusch_ptrs.ptrs_freq_density); LOG_D(NR_MAC, "UL PTRS values: PTRS time den: %d, PTRS freq den: %d\n", pusch_config_pdu->pusch_ptrs.ptrs_time_density, pusch_config_pdu->pusch_ptrs.ptrs_freq_density);
} }
} }
} }
LOG_D(MAC, "In %s: received UL grant (rb_start %d, rb_size %d, start_symbol_index %d, nr_of_symbols %d) for RNTI type %s \n", LOG_D(NR_MAC, "In %s: received UL grant (rb_start %d, rb_size %d, start_symbol_index %d, nr_of_symbols %d) for RNTI type %s \n",
__FUNCTION__, __FUNCTION__,
pusch_config_pdu->rb_start, pusch_config_pdu->rb_start,
pusch_config_pdu->rb_size, pusch_config_pdu->rb_size,
...@@ -785,7 +785,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, ...@@ -785,7 +785,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->qam_mod_order = nr_get_Qm_ul(pusch_config_pdu->mcs_index, pusch_config_pdu->mcs_table); pusch_config_pdu->qam_mod_order = nr_get_Qm_ul(pusch_config_pdu->mcs_index, pusch_config_pdu->mcs_table);
if (pusch_config_pdu->target_code_rate == 0 || pusch_config_pdu->qam_mod_order == 0) { if (pusch_config_pdu->target_code_rate == 0 || pusch_config_pdu->qam_mod_order == 0) {
LOG_W(MAC, "In %s: Invalid code rate or Mod order, likely due to unexpected UL DCI. Ignoring DCI! \n", __FUNCTION__); LOG_W(NR_MAC, "In %s: Invalid code rate or Mod order, likely due to unexpected UL DCI. Ignoring DCI! \n", __FUNCTION__);
return -1; return -1;
} }
...@@ -822,13 +822,19 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -822,13 +822,19 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
slot_t rx_slot = dl_info->slot; slot_t rx_slot = dl_info->slot;
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
if (mac->cg &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->csi_MeasConfig)
AssertFatal(1==0,"1 > %d.%d csi_MeasConfig is not null\n",rx_frame,rx_slot);
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request; fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
nr_scheduled_response_t scheduled_response; nr_scheduled_response_t scheduled_response;
nr_dcireq_t dcireq; nr_dcireq_t dcireq;
// check type0 from 38.213 13 if we have no CellGroupConfig // check type0 from 38.213 13 if we have no CellGroupConfig
// TODO: implementation to be completed // TODO: implementation to be completed
LOG_D(MAC,"nr_ue_scheduler(): mac->cg %p\n",mac->cg); LOG_D(NR_MAC,"nr_ue_scheduler(): mac->cg %p\n",mac->cg);
if (mac->cg == NULL) { if (mac->cg == NULL) {
if(dl_info->ssb_index != -1){ if(dl_info->ssb_index != -1){
...@@ -870,7 +876,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -870,7 +876,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.rnti = 0xaaaa; // to be set dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.rnti = 0xaaaa; // to be set
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = 106; // to be set dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = 106; // to be set
LOG_I(MAC,"nr_ue_scheduler Type0 PDCCH with rnti %x, BWP %d\n", LOG_I(NR_MAC,"nr_ue_scheduler Type0 PDCCH with rnti %x, BWP %d\n",
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.rnti, dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.rnti,
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP); dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP);
*/ */
...@@ -884,7 +890,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -884,7 +890,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
config_dci_pdu(mac, rel15, dl_config, NR_RNTI_SI, -1); config_dci_pdu(mac, rel15, dl_config, NR_RNTI_SI, -1);
fill_dci_search_candidates(ss0, rel15); fill_dci_search_candidates(ss0, rel15);
dl_config->number_pdus = 1; dl_config->number_pdus = 1;
LOG_D(MAC,"Calling fill_scheduled_response, type0_pdcch, num_pdus %d\n",dl_config->number_pdus); LOG_D(NR_MAC,"Calling fill_scheduled_response, type0_pdcch, num_pdus %d\n",dl_config->number_pdus);
fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->thread_id); fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->thread_id);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL) if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL)
mac->if_module->scheduled_response(&scheduled_response); mac->if_module->scheduled_response(&scheduled_response);
...@@ -896,7 +902,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -896,7 +902,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
config_dci_pdu(mac, rel15, dl_config, mac->ra.ra_state == WAIT_RAR ? NR_RNTI_RA : NR_RNTI_TC , -1); config_dci_pdu(mac, rel15, dl_config, mac->ra.ra_state == WAIT_RAR ? NR_RNTI_RA : NR_RNTI_TC , -1);
fill_dci_search_candidates(ss0, rel15); fill_dci_search_candidates(ss0, rel15);
dl_config->number_pdus = 1; dl_config->number_pdus = 1;
LOG_D(MAC,"mac->cg %p: Calling fill_scheduled_response rnti %x, type0_pdcch, num_pdus %d\n",mac->cg,rel15->rnti,dl_config->number_pdus); LOG_D(NR_MAC,"mac->cg %p: Calling fill_scheduled_response rnti %x, type0_pdcch, num_pdus %d\n",mac->cg,rel15->rnti,dl_config->number_pdus);
fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->thread_id); fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->thread_id);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL) if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL)
mac->if_module->scheduled_response(&scheduled_response); mac->if_module->scheduled_response(&scheduled_response);
...@@ -950,7 +956,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -950,7 +956,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
// AND if a UL grant (UL DCI or Msg3) has been received (as indicated by num_pdus) // AND if a UL grant (UL DCI or Msg3) has been received (as indicated by num_pdus)
if (ul_config && (ul_info->slot_tx == ul_config->slot && ul_info->frame_tx == ul_config->sfn) && ul_config->number_pdus > 0){ if (ul_config && (ul_info->slot_tx == ul_config->slot && ul_info->frame_tx == ul_config->sfn) && ul_config->number_pdus > 0){
LOG_D(MAC, "In %s:[%d.%d]: number of UL PDUs: %d with UL transmission in [%d.%d]\n", __FUNCTION__, frame_tx, slot_tx, ul_config->number_pdus, ul_config->sfn, ul_config->slot); LOG_I(NR_MAC, "In %s:[%d.%d]: number of UL PDUs: %d with UL transmission in [%d.%d]\n", __FUNCTION__, frame_tx, slot_tx, ul_config->number_pdus, ul_config->sfn, ul_config->slot);
uint8_t ulsch_input_buffer[MAX_ULSCH_PAYLOAD_BYTES]; uint8_t ulsch_input_buffer[MAX_ULSCH_PAYLOAD_BYTES];
uint8_t data_existing = 0; uint8_t data_existing = 0;
...@@ -964,15 +970,21 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -964,15 +970,21 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
if (ulcfg_pdu->pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUSCH) { if (ulcfg_pdu->pdu_type == FAPI_NR_UL_CONFIG_TYPE_PUSCH) {
uint16_t TBS_bytes = ulcfg_pdu->pusch_config_pdu.pusch_data.tb_size; uint16_t TBS_bytes = ulcfg_pdu->pusch_config_pdu.pusch_data.tb_size;
LOG_D(NR_MAC,"harq_id %d, NDI %d NDI_DCI %d, TBS_bytes %d (ra_state %d\n",
ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id,
mac->UL_ndi[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id],
ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator,
TBS_bytes);
if (ra->ra_state == WAIT_RAR && !ra->cfra){ if (ra->ra_state == WAIT_RAR && !ra->cfra){
memcpy(ulsch_input_buffer, mac->ulsch_pdu.payload, TBS_bytes); memcpy(ulsch_input_buffer, mac->ulsch_pdu.payload, TBS_bytes);
LOG_D(NR_MAC,"[RAPROC] Msg3 to be transmitted:\n"); LOG_D(NR_MAC,"[RAPROC] Msg3 to be transmitted:\n");
for (int k = 0; k < TBS_bytes; k++) { for (int k = 0; k < TBS_bytes; k++) {
LOG_D(NR_MAC,"(%i): 0x%x\n",k,mac->ulsch_pdu.payload[k]); LOG_D(NR_MAC,"(%i): 0x%x\n",k,mac->ulsch_pdu.payload[k]);
} }
LOG_D(NR_MAC,"Flipping NDI for harq_id %d (Msg3)\n",ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator);
mac->UL_ndi[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id] = ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator;
} else { } else {
if (IS_SOFTMODEM_NOS1 && (mac->UL_ndi[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id] != ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator)){ if (mac->UL_ndi[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id] != ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator){
// Getting IP traffic to be transmitted // Getting IP traffic to be transmitted
data_existing = nr_ue_get_sdu(mod_id, data_existing = nr_ue_get_sdu(mod_id,
cc_id, cc_id,
...@@ -984,9 +996,10 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -984,9 +996,10 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
&access_mode); &access_mode);
} }
LOG_D(NR_MAC,"Flipping NDI for harq_id %d\n",ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator);
mac->UL_ndi[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id] = ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator; mac->UL_ndi[ulcfg_pdu->pusch_config_pdu.pusch_data.harq_process_id] = ulcfg_pdu->pusch_config_pdu.pusch_data.new_data_indicator;
//Random traffic to be transmitted if there is no IP traffic available for this Tx opportunity //Random traffic to be transmitted if there is no IP traffic available for this Tx opportunity
if (!IS_SOFTMODEM_NOS1 || !data_existing) { if (!data_existing) {
//Use zeros for the header bytes in noS1 mode, in order to make sure that the LCID is not valid //Use zeros for the header bytes in noS1 mode, in order to make sure that the LCID is not valid
//and block this traffic from being forwarded to the upper layers at the gNB //and block this traffic from being forwarded to the upper layers at the gNB
LOG_D(PHY, "In %s: Random data to be transmitted: TBS_bytes %d \n", __FUNCTION__, TBS_bytes); LOG_D(PHY, "In %s: Random data to be transmitted: TBS_bytes %d \n", __FUNCTION__, TBS_bytes);
...@@ -1020,7 +1033,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -1020,7 +1033,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
tx_req.tx_request_body[0].pdu = ulsch_input_buffer; tx_req.tx_request_body[0].pdu = ulsch_input_buffer;
if (ra->ra_state != RA_SUCCEEDED && !ra->cfra){ if (ra->ra_state != RA_SUCCEEDED && !ra->cfra){
LOG_I(NR_MAC,"[RAPROC] RA-Msg3 transmitted\n"); LOG_D(NR_MAC,"[RAPROC] RA-Msg3 transmitted\n");
nr_Msg3_transmitted(ul_info->module_id, ul_info->cc_id, ul_info->frame_tx, ul_info->gNB_index); nr_Msg3_transmitted(ul_info->module_id, ul_info->cc_id, ul_info->frame_tx, ul_info->gNB_index);
} }
...@@ -1110,7 +1123,7 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac, ...@@ -1110,7 +1123,7 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac,
} }
LOG_D(MAC, "In %s: currently at [%d.%d] UL transmission in [%d.%d] (k2 %d delta %d)\n", __FUNCTION__, current_frame, current_slot, *frame_tx, *slot_tx, k2, delta); LOG_D(NR_MAC, "In %s: currently at [%d.%d] UL transmission in [%d.%d] (k2 %d delta %d)\n", __FUNCTION__, current_frame, current_slot, *frame_tx, *slot_tx, k2, delta);
return 0; return 0;
...@@ -1168,7 +1181,7 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) { ...@@ -1168,7 +1181,7 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) {
int unpaired = mac->phy_config.config_req.cell_config.frame_duplex_type; int unpaired = mac->phy_config.config_req.cell_config.frame_duplex_type;
// Identify the proper PRACH Configuration Index table according to the operating frequency // Identify the proper PRACH Configuration Index table according to the operating frequency
LOG_D(MAC,"mu = %u, PRACH config index = %u, unpaired = %u\n", mu, config_index, unpaired); LOG_D(NR_MAC,"mu = %u, PRACH config index = %u, unpaired = %u\n", mu, config_index, unpaired);
int fr2_flag=0; int fr2_flag=0;
if (downlink_frequency[0][0] > 6e9) fr2_flag = 1; if (downlink_frequency[0][0] > 6e9) fr2_flag = 1;
...@@ -1205,7 +1218,7 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) { ...@@ -1205,7 +1218,7 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) {
prach_conf_start_symbol = prach_config_info_p[5]; prach_conf_start_symbol = prach_config_info_p[5];
N_t_slot = prach_config_info_p[7]; N_t_slot = prach_config_info_p[7];
N_dur = prach_config_info_p[8]; N_dur = prach_config_info_p[8];
LOG_D(MAC,"N_t_slot %d, N_dur %d\n",N_t_slot,N_dur); LOG_D(NR_MAC,"N_t_slot %d, N_dur %d\n",N_t_slot,N_dur);
if (prach_config_info_p[1] != -1) if (prach_config_info_p[1] != -1)
format2 = (uint8_t) prach_config_info_p[1]; format2 = (uint8_t) prach_config_info_p[1];
format = ((uint8_t) prach_config_info_p[0]) | (format2<<8); format = ((uint8_t) prach_config_info_p[0]) | (format2<<8);
...@@ -1221,7 +1234,7 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) { ...@@ -1221,7 +1234,7 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) {
prach_assoc_pattern.nb_of_prach_conf_period_in_max_period = MAX_NB_PRACH_CONF_PERIOD_IN_ASSOCIATION_PATTERN_PERIOD / x; prach_assoc_pattern.nb_of_prach_conf_period_in_max_period = MAX_NB_PRACH_CONF_PERIOD_IN_ASSOCIATION_PATTERN_PERIOD / x;
nb_of_frames_per_prach_conf_period = x; nb_of_frames_per_prach_conf_period = x;
LOG_D(MAC,"nb_of_prach_conf_period_in_max_period %d\n", prach_assoc_pattern.nb_of_prach_conf_period_in_max_period); LOG_D(NR_MAC,"nb_of_prach_conf_period_in_max_period %d\n", prach_assoc_pattern.nb_of_prach_conf_period_in_max_period);
// Fill in the PRACH occasions table for every slot in every frame in every PRACH configuration periods in the maximum association pattern period // Fill in the PRACH occasions table for every slot in every frame in every PRACH configuration periods in the maximum association pattern period
// ---------------------------------------------------------------------------------------------------------------------------------------------- // ----------------------------------------------------------------------------------------------------------------------------------------------
...@@ -1233,14 +1246,14 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) { ...@@ -1233,14 +1246,14 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) {
prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].nb_of_frame = nb_of_frames_per_prach_conf_period; prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].nb_of_frame = nb_of_frames_per_prach_conf_period;
prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].nb_of_slot = nr_slots_per_frame[mu]; prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].nb_of_slot = nr_slots_per_frame[mu];
LOG_D(MAC,"PRACH Conf Period Idx %d\n", prach_conf_period_idx); LOG_D(NR_MAC,"PRACH Conf Period Idx %d\n", prach_conf_period_idx);
// For every frames in a PRACH configuration period // For every frames in a PRACH configuration period
// ------------------------------------------------ // ------------------------------------------------
for (prach_conf_period_frame_idx=0; prach_conf_period_frame_idx<nb_of_frames_per_prach_conf_period; prach_conf_period_frame_idx++) { for (prach_conf_period_frame_idx=0; prach_conf_period_frame_idx<nb_of_frames_per_prach_conf_period; prach_conf_period_frame_idx++) {
frame = (prach_conf_period_idx * nb_of_frames_per_prach_conf_period) + prach_conf_period_frame_idx; frame = (prach_conf_period_idx * nb_of_frames_per_prach_conf_period) + prach_conf_period_frame_idx;
LOG_D(MAC,"PRACH Conf Period Frame Idx %d - Frame %d\n", prach_conf_period_frame_idx, frame); LOG_D(NR_MAC,"PRACH Conf Period Frame Idx %d - Frame %d\n", prach_conf_period_frame_idx, frame);
// Is it a valid frame for this PRACH configuration index? (n_sfn mod x = y) // Is it a valid frame for this PRACH configuration index? (n_sfn mod x = y)
if ( (frame%x)==y || (frame%x)==y2 ) { if ( (frame%x)==y || (frame%x)==y2 ) {
...@@ -1267,7 +1280,7 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) { ...@@ -1267,7 +1280,7 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) {
for (n_prach_occ_in_time=0; n_prach_occ_in_time<N_t_slot; n_prach_occ_in_time++) { for (n_prach_occ_in_time=0; n_prach_occ_in_time<N_t_slot; n_prach_occ_in_time++) {
uint8_t start_symbol = prach_conf_start_symbol + n_prach_occ_in_time * N_dur; uint8_t start_symbol = prach_conf_start_symbol + n_prach_occ_in_time * N_dur;
LOG_D(MAC,"PRACH Occ in time %d\n", n_prach_occ_in_time); LOG_D(NR_MAC,"PRACH Occ in time %d\n", n_prach_occ_in_time);
for (n_prach_occ_in_freq=0; n_prach_occ_in_freq<nb_fdm; n_prach_occ_in_freq++) { for (n_prach_occ_in_freq=0; n_prach_occ_in_freq<nb_fdm; n_prach_occ_in_freq++) {
prach_occasion_info_t *prach_occasion_p = &prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].prach_occasion_slot_map[prach_conf_period_frame_idx][slot].prach_occasion[n_prach_occ_in_time][n_prach_occ_in_freq]; prach_occasion_info_t *prach_occasion_p = &prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].prach_occasion_slot_map[prach_conf_period_frame_idx][slot].prach_occasion[n_prach_occ_in_time][n_prach_occ_in_freq];
...@@ -1279,7 +1292,7 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) { ...@@ -1279,7 +1292,7 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) {
prach_occasion_p->format = format; prach_occasion_p->format = format;
prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].nb_of_prach_occasion++; prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].nb_of_prach_occasion++;
LOG_D(MAC,"Adding a PRACH occasion: frame %u, slot-symbol %d-%d, occ_in_time-occ_in-freq %d-%d, nb ROs in conf period %d, for this slot: RO# in time %d, RO# in freq %d\n", LOG_D(NR_MAC,"Adding a PRACH occasion: frame %u, slot-symbol %d-%d, occ_in_time-occ_in-freq %d-%d, nb ROs in conf period %d, for this slot: RO# in time %d, RO# in freq %d\n",
frame, slot, start_symbol, n_prach_occ_in_time, n_prach_occ_in_freq, prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].nb_of_prach_occasion, frame, slot, start_symbol, n_prach_occ_in_time, n_prach_occ_in_freq, prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].nb_of_prach_occasion,
prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].prach_occasion_slot_map[prach_conf_period_frame_idx][slot].nb_of_prach_occasion_in_time, prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].prach_occasion_slot_map[prach_conf_period_frame_idx][slot].nb_of_prach_occasion_in_time,
prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].prach_occasion_slot_map[prach_conf_period_frame_idx][slot].nb_of_prach_occasion_in_freq); prach_assoc_pattern.prach_conf_period_list[prach_conf_period_idx].prach_occasion_slot_map[prach_conf_period_frame_idx][slot].nb_of_prach_occasion_in_freq);
...@@ -1308,14 +1321,14 @@ static void build_ssb_list(NR_UE_MAC_INST_t *mac) { ...@@ -1308,14 +1321,14 @@ static void build_ssb_list(NR_UE_MAC_INST_t *mac) {
ssb_bitmap = &scc->ssb_PositionsInBurst->choice.shortBitmap; ssb_bitmap = &scc->ssb_PositionsInBurst->choice.shortBitmap;
ssb_positionsInBurst = BIT_STRING_to_uint8(ssb_bitmap); ssb_positionsInBurst = BIT_STRING_to_uint8(ssb_bitmap);
LOG_D(MAC,"SSB config: SSB_positions_in_burst 0x%lx\n", ssb_positionsInBurst); LOG_D(NR_MAC,"SSB config: SSB_positions_in_burst 0x%lx\n", ssb_positionsInBurst);
for (uint8_t bit_nb=3; bit_nb<=3; bit_nb--) { for (uint8_t bit_nb=3; bit_nb<=3; bit_nb--) {
// If SSB is transmitted // If SSB is transmitted
if ((ssb_positionsInBurst>>bit_nb) & 0x01) { if ((ssb_positionsInBurst>>bit_nb) & 0x01) {
ssb_list.nb_tx_ssb++; ssb_list.nb_tx_ssb++;
ssb_list.tx_ssb[ssb_idx].transmitted = true; ssb_list.tx_ssb[ssb_idx].transmitted = true;
LOG_D(MAC,"SSB idx %d transmitted\n", ssb_idx); LOG_D(NR_MAC,"SSB idx %d transmitted\n", ssb_idx);
} }
ssb_idx++; ssb_idx++;
} }
...@@ -1324,14 +1337,14 @@ static void build_ssb_list(NR_UE_MAC_INST_t *mac) { ...@@ -1324,14 +1337,14 @@ static void build_ssb_list(NR_UE_MAC_INST_t *mac) {
ssb_bitmap = &scc->ssb_PositionsInBurst->choice.mediumBitmap; ssb_bitmap = &scc->ssb_PositionsInBurst->choice.mediumBitmap;
ssb_positionsInBurst = BIT_STRING_to_uint8(ssb_bitmap); ssb_positionsInBurst = BIT_STRING_to_uint8(ssb_bitmap);
LOG_D(MAC,"SSB config: SSB_positions_in_burst 0x%lx\n", ssb_positionsInBurst); LOG_D(NR_MAC,"SSB config: SSB_positions_in_burst 0x%lx\n", ssb_positionsInBurst);
for (uint8_t bit_nb=7; bit_nb<=7; bit_nb--) { for (uint8_t bit_nb=7; bit_nb<=7; bit_nb--) {
// If SSB is transmitted // If SSB is transmitted
if ((ssb_positionsInBurst>>bit_nb) & 0x01) { if ((ssb_positionsInBurst>>bit_nb) & 0x01) {
ssb_list.nb_tx_ssb++; ssb_list.nb_tx_ssb++;
ssb_list.tx_ssb[ssb_idx].transmitted = true; ssb_list.tx_ssb[ssb_idx].transmitted = true;
LOG_D(MAC,"SSB idx %d transmitted\n", ssb_idx); LOG_D(NR_MAC,"SSB idx %d transmitted\n", ssb_idx);
} }
ssb_idx++; ssb_idx++;
} }
...@@ -1340,14 +1353,14 @@ static void build_ssb_list(NR_UE_MAC_INST_t *mac) { ...@@ -1340,14 +1353,14 @@ static void build_ssb_list(NR_UE_MAC_INST_t *mac) {
ssb_bitmap = &scc->ssb_PositionsInBurst->choice.longBitmap; ssb_bitmap = &scc->ssb_PositionsInBurst->choice.longBitmap;
ssb_positionsInBurst = BIT_STRING_to_uint64(ssb_bitmap); ssb_positionsInBurst = BIT_STRING_to_uint64(ssb_bitmap);
LOG_D(MAC,"SSB config: SSB_positions_in_burst 0x%lx\n", ssb_positionsInBurst); LOG_D(NR_MAC,"SSB config: SSB_positions_in_burst 0x%lx\n", ssb_positionsInBurst);
for (uint8_t bit_nb=63; bit_nb<=63; bit_nb--) { for (uint8_t bit_nb=63; bit_nb<=63; bit_nb--) {
// If SSB is transmitted // If SSB is transmitted
if ((ssb_positionsInBurst>>bit_nb) & 0x01) { if ((ssb_positionsInBurst>>bit_nb) & 0x01) {
ssb_list.nb_tx_ssb++; ssb_list.nb_tx_ssb++;
ssb_list.tx_ssb[ssb_idx].transmitted = true; ssb_list.tx_ssb[ssb_idx].transmitted = true;
LOG_D(MAC,"SSB idx %d transmitted\n", ssb_idx); LOG_D(NR_MAC,"SSB idx %d transmitted\n", ssb_idx);
} }
ssb_idx++; ssb_idx++;
} }
...@@ -1362,14 +1375,14 @@ static void build_ssb_list(NR_UE_MAC_INST_t *mac) { ...@@ -1362,14 +1375,14 @@ static void build_ssb_list(NR_UE_MAC_INST_t *mac) {
ssb_bitmap = &mac->scc_SIB->ssb_PositionsInBurst.inOneGroup; ssb_bitmap = &mac->scc_SIB->ssb_PositionsInBurst.inOneGroup;
ssb_positionsInBurst = BIT_STRING_to_uint8(ssb_bitmap); ssb_positionsInBurst = BIT_STRING_to_uint8(ssb_bitmap);
LOG_D(MAC,"SSB config: SSB_positions_in_burst 0x%lx\n", ssb_positionsInBurst); LOG_D(NR_MAC,"SSB config: SSB_positions_in_burst 0x%lx\n", ssb_positionsInBurst);
for (uint8_t bit_nb=7; bit_nb<=7; bit_nb--) { for (uint8_t bit_nb=7; bit_nb<=7; bit_nb--) {
// If SSB is transmitted // If SSB is transmitted
if ((ssb_positionsInBurst>>bit_nb) & 0x01) { if ((ssb_positionsInBurst>>bit_nb) & 0x01) {
ssb_list.nb_tx_ssb++; ssb_list.nb_tx_ssb++;
ssb_list.tx_ssb[ssb_idx].transmitted = true; ssb_list.tx_ssb[ssb_idx].transmitted = true;
LOG_D(MAC,"SSB idx %d transmitted\n", ssb_idx); LOG_D(NR_MAC,"SSB idx %d transmitted\n", ssb_idx);
} }
ssb_idx++; ssb_idx++;
} }
...@@ -1431,14 +1444,14 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) { ...@@ -1431,14 +1444,14 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) {
AssertFatal(1 == 0, "Unsupported ssb_perRACH_config %d\n", ssb_perRACH_config); AssertFatal(1 == 0, "Unsupported ssb_perRACH_config %d\n", ssb_perRACH_config);
break; break;
} }
LOG_D(MAC,"SSB rach ratio %d, Multiple SSB per RO %d\n", ssb_rach_ratio, multiple_ssb_per_ro); LOG_D(NR_MAC,"SSB rach ratio %d, Multiple SSB per RO %d\n", ssb_rach_ratio, multiple_ssb_per_ro);
// Evaluate the number of PRACH configuration periods required to map all the SSBs and set the association period // Evaluate the number of PRACH configuration periods required to map all the SSBs and set the association period
// ============================================================================================================== // ==============================================================================================================
// WIP: Assumption for now is that all the PRACH configuration periods within a maximum association pattern period have the same number of PRACH occasions // WIP: Assumption for now is that all the PRACH configuration periods within a maximum association pattern period have the same number of PRACH occasions
// (No PRACH occasions are conflicting with SSBs nor TDD_UL_DL_ConfigurationCommon schedule) // (No PRACH occasions are conflicting with SSBs nor TDD_UL_DL_ConfigurationCommon schedule)
// There is only one possible association period which can contain up to 16 PRACH configuration periods // There is only one possible association period which can contain up to 16 PRACH configuration periods
LOG_D(MAC,"Evaluate the number of PRACH configuration periods required to map all the SSBs and set the association period\n"); LOG_D(NR_MAC,"Evaluate the number of PRACH configuration periods required to map all the SSBs and set the association period\n");
if (true == multiple_ssb_per_ro) { if (true == multiple_ssb_per_ro) {
required_nb_of_prach_occasion = ((ssb_list.nb_tx_ssb-1) + ssb_rach_ratio) / ssb_rach_ratio; required_nb_of_prach_occasion = ((ssb_list.nb_tx_ssb-1) + ssb_rach_ratio) / ssb_rach_ratio;
} }
...@@ -1472,7 +1485,7 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) { ...@@ -1472,7 +1485,7 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) {
prach_assoc_pattern.prach_association_period_list[0].nb_of_frame = prach_assoc_pattern.prach_association_period_list[0].nb_of_prach_conf_period * prach_assoc_pattern.prach_conf_period_list[0].nb_of_frame; prach_assoc_pattern.prach_association_period_list[0].nb_of_frame = prach_assoc_pattern.prach_association_period_list[0].nb_of_prach_conf_period * prach_assoc_pattern.prach_conf_period_list[0].nb_of_frame;
prach_assoc_pattern.nb_of_frame = prach_assoc_pattern.prach_association_period_list[0].nb_of_frame; prach_assoc_pattern.nb_of_frame = prach_assoc_pattern.prach_association_period_list[0].nb_of_frame;
LOG_D(MAC,"Assoc period %d, Nb of frames in assoc period %d\n", LOG_D(NR_MAC,"Assoc period %d, Nb of frames in assoc period %d\n",
prach_assoc_pattern.prach_association_period_list[0].nb_of_prach_conf_period, prach_assoc_pattern.prach_association_period_list[0].nb_of_prach_conf_period,
prach_assoc_pattern.prach_association_period_list[0].nb_of_frame); prach_assoc_pattern.prach_association_period_list[0].nb_of_frame);
...@@ -1484,7 +1497,7 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) { ...@@ -1484,7 +1497,7 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) {
prach_conf_period_t *prach_conf_period_p; prach_conf_period_t *prach_conf_period_p;
// Map all the association periods within the association pattern period // Map all the association periods within the association pattern period
LOG_D(MAC,"Proceed to the SSB to RO mapping\n"); LOG_D(NR_MAC,"Proceed to the SSB to RO mapping\n");
for (association_period_idx=0; association_period_idx<prach_assoc_pattern.nb_of_assoc_period; association_period_idx++) { for (association_period_idx=0; association_period_idx<prach_assoc_pattern.nb_of_assoc_period; association_period_idx++) {
uint8_t n_prach_conf=0; // PRACH Configuration period index within the association period uint8_t n_prach_conf=0; // PRACH Configuration period index within the association period
uint8_t frame=0; uint8_t frame=0;
...@@ -1532,8 +1545,8 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) { ...@@ -1532,8 +1545,8 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) {
ssb_list.tx_ssb[ssb_idx].nb_mapped_ro++; ssb_list.tx_ssb[ssb_idx].nb_mapped_ro++;
AssertFatal(MAX_NB_RO_PER_SSB_IN_ASSOCIATION_PATTERN > ssb_list.tx_ssb[ssb_idx].nb_mapped_ro,"Too many mapped ROs (%d) to a single SSB\n", ssb_list.tx_ssb[ssb_idx].nb_mapped_ro); AssertFatal(MAX_NB_RO_PER_SSB_IN_ASSOCIATION_PATTERN > ssb_list.tx_ssb[ssb_idx].nb_mapped_ro,"Too many mapped ROs (%d) to a single SSB\n", ssb_list.tx_ssb[ssb_idx].nb_mapped_ro);
LOG_D(MAC,"Mapped ssb_idx %u to RO slot-symbol %u-%u, %u-%u-%u/%u\n", ssb_idx, ro_p->slot, ro_p->start_symbol, slot, ro_in_time, ro_in_freq, prach_conf_period_p->prach_occasion_slot_map[frame][slot].nb_of_prach_occasion_in_freq); LOG_D(NR_MAC,"Mapped ssb_idx %u to RO slot-symbol %u-%u, %u-%u-%u/%u\n", ssb_idx, ro_p->slot, ro_p->start_symbol, slot, ro_in_time, ro_in_freq, prach_conf_period_p->prach_occasion_slot_map[frame][slot].nb_of_prach_occasion_in_freq);
LOG_D(MAC,"Nb mapped ROs for this ssb idx: in the association period only %u\n", ssb_list.tx_ssb[ssb_idx].nb_mapped_ro); LOG_D(NR_MAC,"Nb mapped ROs for this ssb idx: in the association period only %u\n", ssb_list.tx_ssb[ssb_idx].nb_mapped_ro);
// If all the required SSBs are mapped to this RO, exit the loop of SSBs // If all the required SSBs are mapped to this RO, exit the loop of SSBs
if (ro_p->nb_mapped_ssb == ssb_rach_ratio) { if (ro_p->nb_mapped_ssb == ssb_rach_ratio) {
...@@ -1580,7 +1593,7 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) { ...@@ -1580,7 +1593,7 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) {
for (ssb_idx=0; ssb_idx<MAX_NB_SSB; ssb_idx++) { for (ssb_idx=0; ssb_idx<MAX_NB_SSB; ssb_idx++) {
uint8_t nb_mapped_ro_in_association_period=0; // Reset the nb of mapped ROs for the new SSB index uint8_t nb_mapped_ro_in_association_period=0; // Reset the nb of mapped ROs for the new SSB index
LOG_D(MAC,"Checking ssb_idx %d => %d\n", LOG_D(NR_MAC,"Checking ssb_idx %d => %d\n",
ssb_idx,ssb_list.tx_ssb[ssb_idx].transmitted); ssb_idx,ssb_list.tx_ssb[ssb_idx].transmitted);
// Map only the transmitted ssb_idx // Map only the transmitted ssb_idx
...@@ -1607,8 +1620,8 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) { ...@@ -1607,8 +1620,8 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) {
AssertFatal(MAX_NB_RO_PER_SSB_IN_ASSOCIATION_PATTERN > ssb_list.tx_ssb[ssb_idx].nb_mapped_ro,"Too many mapped ROs (%d) to a single SSB\n", ssb_list.tx_ssb[ssb_idx].nb_mapped_ro); AssertFatal(MAX_NB_RO_PER_SSB_IN_ASSOCIATION_PATTERN > ssb_list.tx_ssb[ssb_idx].nb_mapped_ro,"Too many mapped ROs (%d) to a single SSB\n", ssb_list.tx_ssb[ssb_idx].nb_mapped_ro);
nb_mapped_ro_in_association_period++; nb_mapped_ro_in_association_period++;
LOG_D(MAC,"Mapped ssb_idx %u to RO slot-symbol %u-%u, %u-%u-%u/%u\n", ssb_idx, ro_p->slot, ro_p->start_symbol, slot, ro_in_time, ro_in_freq, prach_conf_period_p->prach_occasion_slot_map[frame][slot].nb_of_prach_occasion_in_freq); LOG_D(NR_MAC,"Mapped ssb_idx %u to RO slot-symbol %u-%u, %u-%u-%u/%u\n", ssb_idx, ro_p->slot, ro_p->start_symbol, slot, ro_in_time, ro_in_freq, prach_conf_period_p->prach_occasion_slot_map[frame][slot].nb_of_prach_occasion_in_freq);
LOG_D(MAC,"Nb mapped ROs for this ssb idx: in the association period only %u / total %u\n", ssb_list.tx_ssb[ssb_idx].nb_mapped_ro, nb_mapped_ro_in_association_period); LOG_D(NR_MAC,"Nb mapped ROs for this ssb idx: in the association period only %u / total %u\n", ssb_list.tx_ssb[ssb_idx].nb_mapped_ro, nb_mapped_ro_in_association_period);
// Exit the loop if this SSB has been mapped to all the required ROs // Exit the loop if this SSB has been mapped to all the required ROs
// WIP: Assuming that ssb_rach_ratio equals the maximum nb of times a given ssb_idx is mapped within an association period: // WIP: Assuming that ssb_rach_ratio equals the maximum nb of times a given ssb_idx is mapped within an association period:
...@@ -1671,9 +1684,9 @@ static int get_nr_prach_info_from_ssb_index(uint8_t ssb_idx, ...@@ -1671,9 +1684,9 @@ static int get_nr_prach_info_from_ssb_index(uint8_t ssb_idx,
// - exact slot number // - exact slot number
// - frame offset // - frame offset
ssb_info_p = &ssb_list.tx_ssb[ssb_idx]; ssb_info_p = &ssb_list.tx_ssb[ssb_idx];
LOG_D(MAC,"checking for prach : ssb_info_p->nb_mapped_ro %d\n",ssb_info_p->nb_mapped_ro); LOG_D(NR_MAC,"checking for prach : ssb_info_p->nb_mapped_ro %d\n",ssb_info_p->nb_mapped_ro);
for (uint8_t n_mapped_ro=0; n_mapped_ro<ssb_info_p->nb_mapped_ro; n_mapped_ro++) { for (uint8_t n_mapped_ro=0; n_mapped_ro<ssb_info_p->nb_mapped_ro; n_mapped_ro++) {
LOG_D(MAC,"%d.%d: mapped_ro[%d]->frame.slot %d.%d, prach_assoc_pattern.nb_of_frame %d\n",slot,ssb_info_p->mapped_ro[n_mapped_ro]->frame,ssb_info_p->mapped_ro[n_mapped_ro]->slot,prach_assoc_pattern.nb_of_frame); LOG_D(NR_MAC,"%d.%d: mapped_ro[%d]->frame.slot %d.%d, prach_assoc_pattern.nb_of_frame %d\n",slot,ssb_info_p->mapped_ro[n_mapped_ro]->frame,ssb_info_p->mapped_ro[n_mapped_ro]->slot,prach_assoc_pattern.nb_of_frame);
if ((slot == ssb_info_p->mapped_ro[n_mapped_ro]->slot) && if ((slot == ssb_info_p->mapped_ro[n_mapped_ro]->slot) &&
(ssb_info_p->mapped_ro[n_mapped_ro]->frame == (frame % prach_assoc_pattern.nb_of_frame))) { (ssb_info_p->mapped_ro[n_mapped_ro]->frame == (frame % prach_assoc_pattern.nb_of_frame))) {
...@@ -1740,17 +1753,17 @@ void build_ssb_to_ro_map(NR_UE_MAC_INST_t *mac) { ...@@ -1740,17 +1753,17 @@ void build_ssb_to_ro_map(NR_UE_MAC_INST_t *mac) {
memset(&ssb_list, 0, sizeof(ssb_list_info_t)); memset(&ssb_list, 0, sizeof(ssb_list_info_t));
// Build the list of all the valid RACH occasions in the maximum association pattern period according to the PRACH config // Build the list of all the valid RACH occasions in the maximum association pattern period according to the PRACH config
LOG_D(MAC,"Build RO list\n"); LOG_D(NR_MAC,"Build RO list\n");
build_ro_list(mac); build_ro_list(mac);
// Build the list of all the valid/transmitted SSBs according to the config // Build the list of all the valid/transmitted SSBs according to the config
LOG_D(MAC,"Build SSB list\n"); LOG_D(NR_MAC,"Build SSB list\n");
build_ssb_list(mac); build_ssb_list(mac);
// Map the transmitted SSBs to the ROs and create the association pattern according to the config // Map the transmitted SSBs to the ROs and create the association pattern according to the config
LOG_D(MAC,"Map SSB to RO\n"); LOG_D(NR_MAC,"Map SSB to RO\n");
map_ssb_to_ro(mac); map_ssb_to_ro(mac);
LOG_D(MAC,"Map SSB to RO done\n"); LOG_D(NR_MAC,"Map SSB to RO done\n");
} }
// This function schedules the PRACH according to prach_ConfigurationIndex and TS 38.211, tables 6.3.3.2.x // This function schedules the PRACH according to prach_ConfigurationIndex and TS 38.211, tables 6.3.3.2.x
...@@ -1826,7 +1839,7 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s ...@@ -1826,7 +1839,7 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s
prach_config_pdu->restricted_set = prach_config->restricted_set_config; prach_config_pdu->restricted_set = prach_config->restricted_set_config;
prach_config_pdu->freq_msg1 = prach_config->num_prach_fd_occasions_list[prach_occasion_info_p->fdm].k1; prach_config_pdu->freq_msg1 = prach_config->num_prach_fd_occasions_list[prach_occasion_info_p->fdm].k1;
LOG_D(MAC,"Selected RO Frame %u, Slot %u, Symbol %u, Fdm %u\n", frameP, prach_config_pdu->prach_slot, prach_config_pdu->prach_start_symbol, prach_config_pdu->num_ra); LOG_D(NR_MAC,"Selected RO Frame %u, Slot %u, Symbol %u, Fdm %u\n", frameP, prach_config_pdu->prach_slot, prach_config_pdu->prach_start_symbol, prach_config_pdu->num_ra);
// Search which SSB is mapped in the RO (among all the SSBs mapped to this RO) // Search which SSB is mapped in the RO (among all the SSBs mapped to this RO)
for (prach_config_pdu->ssb_nb_in_ro=0; prach_config_pdu->ssb_nb_in_ro<prach_occasion_info_p->nb_mapped_ssb; prach_config_pdu->ssb_nb_in_ro++) { for (prach_config_pdu->ssb_nb_in_ro=0; prach_config_pdu->ssb_nb_in_ro<prach_occasion_info_p->nb_mapped_ssb; prach_config_pdu->ssb_nb_in_ro++) {
...@@ -1912,7 +1925,7 @@ nr_ue_get_sdu(module_id_t module_idP, int CC_id, frame_t frameP, ...@@ -1912,7 +1925,7 @@ nr_ue_get_sdu(module_id_t module_idP, int CC_id, frame_t frameP,
rlc_buffer_occupancy_t lcid_buffer_occupancy_old = rlc_buffer_occupancy_t lcid_buffer_occupancy_old =
0, lcid_buffer_occupancy_new = 0; 0, lcid_buffer_occupancy_new = 0;
LOG_D(MAC, LOG_D(NR_MAC,
"[UE %d] MAC PROCESS UL TRANSPORT BLOCK at frame%d subframe %d TBS=%d\n", "[UE %d] MAC PROCESS UL TRANSPORT BLOCK at frame%d subframe %d TBS=%d\n",
module_idP, frameP, subframe, buflen); module_idP, frameP, subframe, buflen);
AssertFatal(CC_id == 0, AssertFatal(CC_id == 0,
...@@ -1930,7 +1943,7 @@ nr_ue_get_sdu(module_id_t module_idP, int CC_id, frame_t frameP, ...@@ -1930,7 +1943,7 @@ nr_ue_get_sdu(module_id_t module_idP, int CC_id, frame_t frameP,
buflen_remain = buflen_remain =
buflen - (total_rlc_pdu_header_len + sdu_length_total + MAX_RLC_SDU_SUBHEADER_SIZE); buflen - (total_rlc_pdu_header_len + sdu_length_total + MAX_RLC_SDU_SUBHEADER_SIZE);
LOG_D(MAC, LOG_I(NR_MAC,
"[UE %d] Frame %d : UL-DXCH -> ULSCH, RLC %d has %d bytes to " "[UE %d] Frame %d : UL-DXCH -> ULSCH, RLC %d has %d bytes to "
"send (Transport Block size %d SDU Length Total %d , mac header len %d, buflen_remain %d )\n", //BSR byte before Tx=%d "send (Transport Block size %d SDU Length Total %d , mac header len %d, buflen_remain %d )\n", //BSR byte before Tx=%d
module_idP, frameP, lcid, lcid_buffer_occupancy_new, module_idP, frameP, lcid, lcid_buffer_occupancy_new,
...@@ -2003,15 +2016,15 @@ nr_ue_get_sdu(module_id_t module_idP, int CC_id, frame_t frameP, ...@@ -2003,15 +2016,15 @@ nr_ue_get_sdu(module_id_t module_idP, int CC_id, frame_t frameP,
ulsch_buffer[j] = 0; ulsch_buffer[j] = 0;
} }
#if defined(ENABLE_MAC_PAYLOAD_DEBUG) //#if defined(ENABLE_MAC_PAYLOAD_DEBUG)
LOG_I(MAC, "Printing UL MAC payload UE side, payload_offset: %d \n", payload_offset); LOG_I(NR_MAC, "Printing UL MAC payload UE side, payload_offset: %d \n", payload_offset);
for (int i = 0; i < buflen ; i++) { for (int i = 0; i < buflen ; i++) {
//harq_process_ul_ue->a[i] = (unsigned char) rand(); //harq_process_ul_ue->a[i] = (unsigned char) rand();
//printf("a[%d]=0x%02x\n",i,harq_process_ul_ue->a[i]); //printf("a[%d]=0x%02x\n",i,harq_process_ul_ue->a[i]);
printf("%02x ",(unsigned char)ulsch_buffer[i]); printf("%02x ",(unsigned char)ulsch_buffer[i]);
} }
printf("\n"); printf("\n");
#endif //#endif
return 1; return 1;
} }
...@@ -862,13 +862,17 @@ void nr_schedule_ue_spec(module_id_t module_id, ...@@ -862,13 +862,17 @@ void nr_schedule_ue_spec(module_id_t module_id,
pdsch_pdu->refPoint = 0; // Point A pdsch_pdu->refPoint = 0; // Point A
// DMRS // DMRS
pdsch_pdu->dlDmrsSymbPos = NR_PDSCH_Config_t *pdsch_Config=NULL;
fill_dmrs_mask(bwp && bwp->bwp_Dedicated && if (bwp &&
bwp->bwp_Dedicated->pdsch_Config && bwp->bwp_Dedicated &&
bwp->bwp_Dedicated->pdsch_Config->choice.setup ? bwp->bwp_Dedicated->pdsch_Config->choice.setup : NULL, bwp->bwp_Dedicated->pdsch_Config &&
scc->dmrs_TypeA_Position, bwp->bwp_Dedicated->pdsch_Config->choice.setup)
nrOfSymbols, pdsch_Config = bwp->bwp_Dedicated->pdsch_Config->choice.setup;
startSymbolIndex);
pdsch_pdu->dlDmrsSymbPos = fill_dmrs_mask(pdsch_Config,
scc->dmrs_TypeA_Position,
nrOfSymbols,
startSymbolIndex);
pdsch_pdu->dmrsConfigType = dmrsConfigType; pdsch_pdu->dmrsConfigType = dmrsConfigType;
pdsch_pdu->dlDmrsScramblingId = *scc->physCellId; pdsch_pdu->dlDmrsScramblingId = *scc->physCellId;
pdsch_pdu->SCID = 0; pdsch_pdu->SCID = 0;
...@@ -887,7 +891,7 @@ void nr_schedule_ue_spec(module_id_t module_id, ...@@ -887,7 +891,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
/* Check and validate PTRS values */ /* Check and validate PTRS values */
struct NR_SetupRelease_PTRS_DownlinkConfig *phaseTrackingRS = struct NR_SetupRelease_PTRS_DownlinkConfig *phaseTrackingRS =
bwp ? bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS : NULL; pdsch_Config ? pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS : NULL;
if (phaseTrackingRS) { if (phaseTrackingRS) {
bool valid_ptrs_setup = set_dl_ptrs_values(phaseTrackingRS->choice.setup, bool valid_ptrs_setup = set_dl_ptrs_values(phaseTrackingRS->choice.setup,
pdsch_pdu->rbSize, pdsch_pdu->rbSize,
......
...@@ -564,7 +564,7 @@ void config_uldci(const NR_BWP_Uplink_t *ubwp, ...@@ -564,7 +564,7 @@ void config_uldci(const NR_BWP_Uplink_t *ubwp,
AssertFatal(0, "Valid UL formats are 0_0 and 0_1\n"); AssertFatal(0, "Valid UL formats are 0_0 and 0_1\n");
} }
LOG_D(MAC, LOG_I(NR_MAC,
"%s() ULDCI type 0 payload: freq_alloc %d, time_alloc %d, freq_hop_flag %d, mcs %d tpc %d ndi %d rv %d\n", "%s() ULDCI type 0 payload: freq_alloc %d, time_alloc %d, freq_hop_flag %d, mcs %d tpc %d ndi %d rv %d\n",
__func__, __func__,
dci_pdu_rel15->frequency_domain_assignment.val, dci_pdu_rel15->frequency_domain_assignment.val,
...@@ -736,7 +736,7 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu, ...@@ -736,7 +736,7 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
n_set = pucch_Config->resourceSetToAddModList->list.count; n_set = pucch_Config->resourceSetToAddModList->list.count;
AssertFatal(n_set>0,"PUCCH resourceSetToAddModList is empty\n"); AssertFatal(n_set>0,"PUCCH resourceSetToAddModList is empty\n");
LOG_D(MAC, "UCI n_set= %d\n", n_set); LOG_D(NR_MAC, "UCI n_set= %d\n", n_set);
N2 = 2; N2 = 2;
// procedure to select pucch resource id from resource sets according to // procedure to select pucch resource id from resource sets according to
...@@ -995,7 +995,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc, ...@@ -995,7 +995,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1));
pos = fsize; pos = fsize;
*dci_pdu |= (((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val & ((1 << fsize) - 1)) << (dci_size - pos)); *dci_pdu |= (((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val & ((1 << fsize) - 1)) << (dci_size - pos));
LOG_D(MAC, LOG_D(NR_MAC,
"frequency-domain assignment %d (%d bits) N_RB_BWP %d=> %d (0x%lx)\n", "frequency-domain assignment %d (%d bits) N_RB_BWP %d=> %d (0x%lx)\n",
dci_pdu_rel15->frequency_domain_assignment.val, dci_pdu_rel15->frequency_domain_assignment.val,
fsize, fsize,
...@@ -1005,7 +1005,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc, ...@@ -1005,7 +1005,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
// Time domain assignment // Time domain assignment
pos += 4; pos += 4;
*dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment.val & 0xf) << (dci_size - pos)); *dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment.val & 0xf) << (dci_size - pos));
LOG_D(MAC, LOG_D(NR_MAC,
"time-domain assignment %d (3 bits)=> %d (0x%lx)\n", "time-domain assignment %d (3 bits)=> %d (0x%lx)\n",
dci_pdu_rel15->time_domain_assignment.val, dci_pdu_rel15->time_domain_assignment.val,
dci_size - pos, dci_size - pos,
...@@ -1013,7 +1013,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc, ...@@ -1013,7 +1013,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
// VRB to PRB mapping // VRB to PRB mapping
pos++; pos++;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val & 0x1) << (dci_size - pos); *dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val & 0x1) << (dci_size - pos);
LOG_D(MAC, LOG_D(NR_MAC,
"vrb to prb mapping %d (1 bits)=> %d (0x%lx)\n", "vrb to prb mapping %d (1 bits)=> %d (0x%lx)\n",
dci_pdu_rel15->vrb_to_prb_mapping.val, dci_pdu_rel15->vrb_to_prb_mapping.val,
dci_size - pos, dci_size - pos,
...@@ -1022,13 +1022,13 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc, ...@@ -1022,13 +1022,13 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
pos += 5; pos += 5;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->mcs & 0x1f) << (dci_size - pos); *dci_pdu |= ((uint64_t)dci_pdu_rel15->mcs & 0x1f) << (dci_size - pos);
#ifdef DEBUG_FILL_DCI #ifdef DEBUG_FILL_DCI
LOG_I(MAC, "mcs %d (5 bits)=> %d (0x%lx)\n", dci_pdu_rel15->mcs, dci_size - pos, *dci_pdu); LOG_I(NR_MAC, "mcs %d (5 bits)=> %d (0x%lx)\n", dci_pdu_rel15->mcs, dci_size - pos, *dci_pdu);
#endif #endif
// TB scaling // TB scaling
pos += 2; pos += 2;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->tb_scaling & 0x3) << (dci_size - pos); *dci_pdu |= ((uint64_t)dci_pdu_rel15->tb_scaling & 0x3) << (dci_size - pos);
#ifdef DEBUG_FILL_DCI #ifdef DEBUG_FILL_DCI
LOG_I(MAC, "tb_scaling %d (2 bits)=> %d (0x%lx)\n", dci_pdu_rel15->tb_scaling, dci_size - pos, *dci_pdu); LOG_I(NR_MAC, "tb_scaling %d (2 bits)=> %d (0x%lx)\n", dci_pdu_rel15->tb_scaling, dci_size - pos, *dci_pdu);
#endif #endif
break; break;
...@@ -1036,7 +1036,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc, ...@@ -1036,7 +1036,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
// indicating a DL DCI format 1bit // indicating a DL DCI format 1bit
pos++; pos++;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->format_indicator & 1) << (dci_size - pos); *dci_pdu |= ((uint64_t)dci_pdu_rel15->format_indicator & 1) << (dci_size - pos);
LOG_D(MAC, LOG_D(NR_MAC,
"Format indicator %d (%d bits) N_RB_BWP %d => %d (0x%lx)\n", "Format indicator %d (%d bits) N_RB_BWP %d => %d (0x%lx)\n",
dci_pdu_rel15->format_indicator, dci_pdu_rel15->format_indicator,
1, 1,
...@@ -1047,7 +1047,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc, ...@@ -1047,7 +1047,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); fsize = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1));
pos += fsize; pos += fsize;
*dci_pdu |= (((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val & ((1 << fsize) - 1)) << (dci_size - pos)); *dci_pdu |= (((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val & ((1 << fsize) - 1)) << (dci_size - pos));
LOG_D(MAC, LOG_D(NR_MAC,
"Freq domain assignment %d (%d bits)=> %d (0x%lx)\n", "Freq domain assignment %d (%d bits)=> %d (0x%lx)\n",
dci_pdu_rel15->frequency_domain_assignment.val, dci_pdu_rel15->frequency_domain_assignment.val,
fsize, fsize,
...@@ -1077,7 +1077,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc, ...@@ -1077,7 +1077,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
// Time domain assignment 4bit // Time domain assignment 4bit
pos += 4; pos += 4;
*dci_pdu |= ((dci_pdu_rel15->time_domain_assignment.val & 0xf) << (dci_size - pos)); *dci_pdu |= ((dci_pdu_rel15->time_domain_assignment.val & 0xf) << (dci_size - pos));
LOG_D(MAC, LOG_D(NR_MAC,
"Time domain assignment %d (%d bits)=> %d (0x%lx)\n", "Time domain assignment %d (%d bits)=> %d (0x%lx)\n",
dci_pdu_rel15->time_domain_assignment.val, dci_pdu_rel15->time_domain_assignment.val,
4, 4,
...@@ -1086,7 +1086,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc, ...@@ -1086,7 +1086,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
// VRB to PRB mapping 1bit // VRB to PRB mapping 1bit
pos++; pos++;
*dci_pdu |= (dci_pdu_rel15->vrb_to_prb_mapping.val & 1) << (dci_size - pos); *dci_pdu |= (dci_pdu_rel15->vrb_to_prb_mapping.val & 1) << (dci_size - pos);
LOG_D(MAC, LOG_D(NR_MAC,
"VRB to PRB %d (%d bits)=> %d (0x%lx)\n", "VRB to PRB %d (%d bits)=> %d (0x%lx)\n",
dci_pdu_rel15->vrb_to_prb_mapping.val, dci_pdu_rel15->vrb_to_prb_mapping.val,
1, 1,
...@@ -1095,31 +1095,31 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc, ...@@ -1095,31 +1095,31 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
// MCS 5bit //bit over 32, so dci_pdu ++ // MCS 5bit //bit over 32, so dci_pdu ++
pos += 5; pos += 5;
*dci_pdu |= (dci_pdu_rel15->mcs & 0x1f) << (dci_size - pos); *dci_pdu |= (dci_pdu_rel15->mcs & 0x1f) << (dci_size - pos);
LOG_D(MAC, "MCS %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->mcs, 5, dci_size - pos, *dci_pdu); LOG_D(NR_MAC, "MCS %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->mcs, 5, dci_size - pos, *dci_pdu);
// New data indicator 1bit // New data indicator 1bit
pos++; pos++;
*dci_pdu |= (dci_pdu_rel15->ndi & 1) << (dci_size - pos); *dci_pdu |= (dci_pdu_rel15->ndi & 1) << (dci_size - pos);
LOG_D(MAC, "NDI %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->ndi, 1, dci_size - pos, *dci_pdu); LOG_D(NR_MAC, "NDI %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->ndi, 1, dci_size - pos, *dci_pdu);
// Redundancy version 2bit // Redundancy version 2bit
pos += 2; pos += 2;
*dci_pdu |= (dci_pdu_rel15->rv & 0x3) << (dci_size - pos); *dci_pdu |= (dci_pdu_rel15->rv & 0x3) << (dci_size - pos);
LOG_D(MAC, "RV %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->rv, 2, dci_size - pos, *dci_pdu); LOG_D(NR_MAC, "RV %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->rv, 2, dci_size - pos, *dci_pdu);
// HARQ process number 4bit // HARQ process number 4bit
pos += 4; pos += 4;
*dci_pdu |= ((dci_pdu_rel15->harq_pid & 0xf) << (dci_size - pos)); *dci_pdu |= ((dci_pdu_rel15->harq_pid & 0xf) << (dci_size - pos));
LOG_D(MAC, "HARQ_PID %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->harq_pid, 4, dci_size - pos, *dci_pdu); LOG_D(NR_MAC, "HARQ_PID %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->harq_pid, 4, dci_size - pos, *dci_pdu);
// Downlink assignment index 2bit // Downlink assignment index 2bit
pos += 2; pos += 2;
*dci_pdu |= ((dci_pdu_rel15->dai[0].val & 3) << (dci_size - pos)); *dci_pdu |= ((dci_pdu_rel15->dai[0].val & 3) << (dci_size - pos));
LOG_D(MAC, "DAI %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->dai[0].val, 2, dci_size - pos, *dci_pdu); LOG_D(NR_MAC, "DAI %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->dai[0].val, 2, dci_size - pos, *dci_pdu);
// TPC command for scheduled PUCCH 2bit // TPC command for scheduled PUCCH 2bit
pos += 2; pos += 2;
*dci_pdu |= ((dci_pdu_rel15->tpc & 3) << (dci_size - pos)); *dci_pdu |= ((dci_pdu_rel15->tpc & 3) << (dci_size - pos));
LOG_D(MAC, "TPC %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->tpc, 2, dci_size - pos, *dci_pdu); LOG_D(NR_MAC, "TPC %d (%d bits)=> %d (0x%lx)\n", dci_pdu_rel15->tpc, 2, dci_size - pos, *dci_pdu);
// PUCCH resource indicator 3bit // PUCCH resource indicator 3bit
pos += 3; pos += 3;
*dci_pdu |= ((dci_pdu_rel15->pucch_resource_indicator & 0x7) << (dci_size - pos)); *dci_pdu |= ((dci_pdu_rel15->pucch_resource_indicator & 0x7) << (dci_size - pos));
LOG_D(MAC, LOG_D(NR_MAC,
"PUCCH RI %d (%d bits)=> %d (0x%lx)\n", "PUCCH RI %d (%d bits)=> %d (0x%lx)\n",
dci_pdu_rel15->pucch_resource_indicator, dci_pdu_rel15->pucch_resource_indicator,
3, 3,
...@@ -1128,7 +1128,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc, ...@@ -1128,7 +1128,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
// PDSCH-to-HARQ_feedback timing indicator 3bit // PDSCH-to-HARQ_feedback timing indicator 3bit
pos += 3; pos += 3;
*dci_pdu |= ((dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val & 0x7) << (dci_size - pos)); *dci_pdu |= ((dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val & 0x7) << (dci_size - pos));
LOG_D(MAC, LOG_D(NR_MAC,
"PDSCH to HARQ TI %d (%d bits)=> %d (0x%lx)\n", "PDSCH to HARQ TI %d (%d bits)=> %d (0x%lx)\n",
dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val, dci_pdu_rel15->pdsch_to_harq_feedback_timing_indicator.val,
3, 3,
...@@ -1487,7 +1487,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc, ...@@ -1487,7 +1487,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
pos += 1; pos += 1;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->dmrs_sequence_initialization.val & 0x1) << (dci_size - pos); *dci_pdu |= ((uint64_t)dci_pdu_rel15->dmrs_sequence_initialization.val & 0x1) << (dci_size - pos);
} }
LOG_D(MAC, "DCI has %d bits and the payload is %lx\n", dci_size, *dci_pdu); LOG_D(NR_MAC, "DCI has %d bits and the payload is %lx\n", dci_size, *dci_pdu);
} }
int get_spf(nfapi_nr_config_request_scf_t *cfg) { int get_spf(nfapi_nr_config_request_scf_t *cfg) {
...@@ -1526,7 +1526,7 @@ int extract_length(int startSymbolAndLength) { ...@@ -1526,7 +1526,7 @@ int extract_length(int startSymbolAndLength) {
void dump_nr_list(NR_list_t *listP) void dump_nr_list(NR_list_t *listP)
{ {
for (int j = listP->head; j >= 0; j = listP->next[j]) for (int j = listP->head; j >= 0; j = listP->next[j])
LOG_T(MAC, "NR list node %d => %d\n", j, listP->next[j]); LOG_T(NR_MAC, "NR list node %d => %d\n", j, listP->next[j]);
} }
/* /*
...@@ -1662,7 +1662,7 @@ int find_nr_RA_id(module_id_t mod_idP, int CC_idP, rnti_t rntiP) { ...@@ -1662,7 +1662,7 @@ int find_nr_RA_id(module_id_t mod_idP, int CC_idP, rnti_t rntiP) {
RA_t *ra = (RA_t *) &RC.nrmac[mod_idP]->common_channels[CC_idP].ra[0]; RA_t *ra = (RA_t *) &RC.nrmac[mod_idP]->common_channels[CC_idP].ra[0];
for (RA_id = 0; RA_id < NB_RA_PROC_MAX; RA_id++) { for (RA_id = 0; RA_id < NB_RA_PROC_MAX; RA_id++) {
LOG_D(MAC, "Checking RA_id %d for %x : state %d\n", LOG_D(NR_MAC, "Checking RA_id %d for %x : state %d\n",
RA_id, RA_id,
rntiP, rntiP,
ra[RA_id].state); ra[RA_id].state);
...@@ -1764,7 +1764,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *CellG ...@@ -1764,7 +1764,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *CellG
add_tail_nr_list(&sched_ctrl->available_ul_harq, harq); add_tail_nr_list(&sched_ctrl->available_ul_harq, harq);
create_nr_list(&sched_ctrl->feedback_ul_harq, 16); create_nr_list(&sched_ctrl->feedback_ul_harq, 16);
create_nr_list(&sched_ctrl->retrans_ul_harq, 16); create_nr_list(&sched_ctrl->retrans_ul_harq, 16);
LOG_I(MAC, "[gNB %d] Add NR UE_id %d : rnti %x\n", LOG_I(NR_MAC, "[gNB %d] Add NR UE_id %d : rnti %x\n",
mod_idP, mod_idP,
UE_id, UE_id,
rntiP); rntiP);
...@@ -1773,7 +1773,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *CellG ...@@ -1773,7 +1773,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *CellG
} }
// printf("MAC: cannot add new UE for rnti %x\n", rntiP); // printf("MAC: cannot add new UE for rnti %x\n", rntiP);
LOG_E(MAC, "error in add_new_ue(), could not find space in UE_info, Dumping UE list\n"); LOG_E(NR_MAC, "error in add_new_ue(), could not find space in UE_info, Dumping UE list\n");
dump_nr_list(&UE_info->list); dump_nr_list(&UE_info->list);
return -1; return -1;
} }
...@@ -1811,7 +1811,7 @@ void mac_remove_nr_ue(module_id_t mod_id, rnti_t rnti) ...@@ -1811,7 +1811,7 @@ void mac_remove_nr_ue(module_id_t mod_id, rnti_t rnti)
destroy_nr_list(&sched_ctrl->available_ul_harq); destroy_nr_list(&sched_ctrl->available_ul_harq);
destroy_nr_list(&sched_ctrl->feedback_ul_harq); destroy_nr_list(&sched_ctrl->feedback_ul_harq);
destroy_nr_list(&sched_ctrl->retrans_ul_harq); destroy_nr_list(&sched_ctrl->retrans_ul_harq);
LOG_I(MAC, "[gNB %d] Remove NR UE_id %d : rnti %x\n", LOG_I(NR_MAC, "[gNB %d] Remove NR UE_id %d : rnti %x\n",
mod_id, mod_id,
UE_id, UE_id,
rnti); rnti);
...@@ -1830,7 +1830,7 @@ void mac_remove_nr_ue(module_id_t mod_id, rnti_t rnti) ...@@ -1830,7 +1830,7 @@ void mac_remove_nr_ue(module_id_t mod_id, rnti_t rnti)
NR_COMMON_channels_t *cc = &RC.nrmac[mod_id]->common_channels[cc_id]; NR_COMMON_channels_t *cc = &RC.nrmac[mod_id]->common_channels[cc_id];
for (i = 0; i < NR_NB_RA_PROC_MAX; i++) { for (i = 0; i < NR_NB_RA_PROC_MAX; i++) {
if (cc->ra[i].rnti == rnti) { if (cc->ra[i].rnti == rnti) {
LOG_D(MAC, "free RA process %d for rnti %d\n", i, rnti); LOG_D(NR_MAC, "free RA process %d for rnti %d\n", i, rnti);
/* is it enough? */ /* is it enough? */
cc->ra[i].cfra = false; cc->ra[i].cfra = false;
cc->ra[i].rnti = 0; cc->ra[i].rnti = 0;
......
...@@ -80,7 +80,7 @@ void nr_process_mac_pdu( ...@@ -80,7 +80,7 @@ void nr_process_mac_pdu(
NR_UE_info_t *UE_info = &RC.nrmac[module_idP]->UE_info; NR_UE_info_t *UE_info = &RC.nrmac[module_idP]->UE_info;
int UE_id = find_nr_UE_id(module_idP, rnti); int UE_id = find_nr_UE_id(module_idP, rnti);
if (UE_id == -1) { if (UE_id == -1) {
LOG_E(MAC, "%s() UE_id == -1\n",__func__); LOG_E(NR_MAC, "%s() UE_id == -1\n",__func__);
return; return;
} }
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id]; NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
...@@ -115,7 +115,7 @@ void nr_process_mac_pdu( ...@@ -115,7 +115,7 @@ void nr_process_mac_pdu(
mac_sdu_len = 0; mac_sdu_len = 0;
rx_lcid = ((NR_MAC_SUBHEADER_FIXED *)pdu_ptr)->LCID; rx_lcid = ((NR_MAC_SUBHEADER_FIXED *)pdu_ptr)->LCID;
LOG_D(MAC, "LCID received at gNB side: %d \n", rx_lcid); LOG_I(NR_MAC, "LCID received at gNB side: %d \n", rx_lcid);
unsigned char *ce_ptr; unsigned char *ce_ptr;
int n_Lcg = 0; int n_Lcg = 0;
...@@ -124,7 +124,7 @@ void nr_process_mac_pdu( ...@@ -124,7 +124,7 @@ void nr_process_mac_pdu(
// MAC CE // MAC CE
/*#ifdef DEBUG_HEADER_PARSING /*#ifdef DEBUG_HEADER_PARSING
LOG_D(MAC, "[UE] LCID %d, PDU length %d\n", ((NR_MAC_SUBHEADER_FIXED *)pdu_ptr)->LCID, pdu_len); LOG_D(NR_MAC, "[UE] LCID %d, PDU length %d\n", ((NR_MAC_SUBHEADER_FIXED *)pdu_ptr)->LCID, pdu_len);
#endif*/ #endif*/
case UL_SCH_LCID_RECOMMENDED_BITRATE_QUERY: case UL_SCH_LCID_RECOMMENDED_BITRATE_QUERY:
// 38.321 Ch6.1.3.20 // 38.321 Ch6.1.3.20
...@@ -144,7 +144,7 @@ void nr_process_mac_pdu( ...@@ -144,7 +144,7 @@ void nr_process_mac_pdu(
NR_BSR_SHORT *bsr_s = (NR_BSR_SHORT *) ce_ptr; NR_BSR_SHORT *bsr_s = (NR_BSR_SHORT *) ce_ptr;
sched_ctrl->estimated_ul_buffer = 0; sched_ctrl->estimated_ul_buffer = 0;
sched_ctrl->estimated_ul_buffer = NR_SHORT_BSR_TABLE[bsr_s->Buffer_size]; sched_ctrl->estimated_ul_buffer = NR_SHORT_BSR_TABLE[bsr_s->Buffer_size];
LOG_D(MAC, "SHORT BSR, LCG ID %d, BS Index %d, BS value < %d, est buf %d\n", LOG_D(NR_MAC, "SHORT BSR, LCG ID %d, BS Index %d, BS value < %d, est buf %d\n",
bsr_s->LcgID, bsr_s->LcgID,
bsr_s->Buffer_size, bsr_s->Buffer_size,
NR_SHORT_BSR_TABLE[bsr_s->Buffer_size], NR_SHORT_BSR_TABLE[bsr_s->Buffer_size],
...@@ -169,12 +169,12 @@ void nr_process_mac_pdu( ...@@ -169,12 +169,12 @@ void nr_process_mac_pdu(
n_Lcg = bsr_l->LcgID7 + bsr_l->LcgID6 + bsr_l->LcgID5 + bsr_l->LcgID4 + n_Lcg = bsr_l->LcgID7 + bsr_l->LcgID6 + bsr_l->LcgID5 + bsr_l->LcgID4 +
bsr_l->LcgID3 + bsr_l->LcgID2 + bsr_l->LcgID1 + bsr_l->LcgID0; bsr_l->LcgID3 + bsr_l->LcgID2 + bsr_l->LcgID1 + bsr_l->LcgID0;
LOG_D(MAC, "LONG BSR, LCG ID(7-0) %d/%d/%d/%d/%d/%d/%d/%d\n", LOG_D(NR_MAC, "LONG BSR, LCG ID(7-0) %d/%d/%d/%d/%d/%d/%d/%d\n",
bsr_l->LcgID7, bsr_l->LcgID6, bsr_l->LcgID5, bsr_l->LcgID4, bsr_l->LcgID7, bsr_l->LcgID6, bsr_l->LcgID5, bsr_l->LcgID4,
bsr_l->LcgID3, bsr_l->LcgID2, bsr_l->LcgID1, bsr_l->LcgID0); bsr_l->LcgID3, bsr_l->LcgID2, bsr_l->LcgID1, bsr_l->LcgID0);
for (int n = 0; n < n_Lcg; n++){ for (int n = 0; n < n_Lcg; n++){
LOG_D(MAC, "LONG BSR, %d/%d (n/n_Lcg), BS Index %d, BS value < %d", LOG_D(NR_MAC, "LONG BSR, %d/%d (n/n_Lcg), BS Index %d, BS value < %d",
n, n_Lcg, pdu_ptr[mac_subheader_len + 1 + n], n, n_Lcg, pdu_ptr[mac_subheader_len + 1 + n],
NR_LONG_BSR_TABLE[pdu_ptr[mac_subheader_len + 1 + n]]); NR_LONG_BSR_TABLE[pdu_ptr[mac_subheader_len + 1 + n]]);
sched_ctrl->estimated_ul_buffer += sched_ctrl->estimated_ul_buffer +=
...@@ -236,7 +236,7 @@ void nr_process_mac_pdu( ...@@ -236,7 +236,7 @@ void nr_process_mac_pdu(
mac_sdu_len = (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L; mac_sdu_len = (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L;
mac_subheader_len = 2; mac_subheader_len = 2;
} }
LOG_I(MAC, "[UE %d] Frame %d : ULSCH -> UL-DCCH %d (gNB %d, %d bytes), rnti: %d \n", module_idP, frameP, rx_lcid, module_idP, mac_sdu_len, rnti); LOG_I(NR_MAC, "[UE %d] Frame %d : ULSCH -> UL-DCCH %d (gNB %d, %d bytes), rnti: %d \n", module_idP, frameP, rx_lcid, module_idP, mac_sdu_len, rnti);
mac_rlc_data_ind(module_idP, mac_rlc_data_ind(module_idP,
rnti, rnti,
module_idP, module_idP,
...@@ -307,11 +307,11 @@ void nr_process_mac_pdu( ...@@ -307,11 +307,11 @@ void nr_process_mac_pdu(
mac_subheader_len = 2; mac_subheader_len = 2;
} }
LOG_D(MAC, "[UE %d] Frame %d : ULSCH -> UL-DTCH %d (gNB %d, %d bytes)\n", module_idP, frameP, rx_lcid, module_idP, mac_sdu_len); LOG_D(NR_MAC, "[UE %d] Frame %d : ULSCH -> UL-DTCH %d (gNB %d, %d bytes)\n", module_idP, frameP, rx_lcid, module_idP, mac_sdu_len);
int UE_id = find_nr_UE_id(module_idP, rnti); int UE_id = find_nr_UE_id(module_idP, rnti);
RC.nrmac[module_idP]->UE_info.mac_stats[UE_id].lc_bytes_rx[rx_lcid] += mac_sdu_len; RC.nrmac[module_idP]->UE_info.mac_stats[UE_id].lc_bytes_rx[rx_lcid] += mac_sdu_len;
#if defined(ENABLE_MAC_PAYLOAD_DEBUG) #if defined(ENABLE_MAC_PAYLOAD_DEBUG)
log_dump(MAC, pdu_ptr + mac_subheader_len, 32, LOG_DUMP_CHAR, "\n"); log_dump(NR_MAC, pdu_ptr + mac_subheader_len, 32, LOG_DUMP_CHAR, "\n");
#endif #endif
...@@ -336,7 +336,7 @@ void nr_process_mac_pdu( ...@@ -336,7 +336,7 @@ void nr_process_mac_pdu(
break; break;
default: default:
LOG_D(MAC, "Received unknown MAC header (LCID = 0x%02x)\n", rx_lcid); LOG_D(NR_MAC, "Received unknown MAC header (LCID = 0x%02x)\n", rx_lcid);
return; return;
break; break;
} }
...@@ -344,8 +344,8 @@ void nr_process_mac_pdu( ...@@ -344,8 +344,8 @@ void nr_process_mac_pdu(
pdu_len -= ( mac_subheader_len + mac_ce_len + mac_sdu_len ); pdu_len -= ( mac_subheader_len + mac_ce_len + mac_sdu_len );
if (pdu_len < 0) { if (pdu_len < 0) {
LOG_E(MAC, "%s() residual mac pdu length < 0!, pdu_len: %d\n", __func__, pdu_len); LOG_E(NR_MAC, "%s() residual mac pdu length < 0!, pdu_len: %d\n", __func__, pdu_len);
LOG_E(MAC, "MAC PDU "); LOG_E(NR_MAC, "MAC PDU ");
for (int i = 0; i < 20; i++) // Only printf 1st - 20nd bytes for (int i = 0; i < 20; i++) // Only printf 1st - 20nd bytes
printf("%02x ", pdu_ptr[i]); printf("%02x ", pdu_ptr[i]);
printf("\n"); printf("\n");
...@@ -361,7 +361,7 @@ void handle_nr_ul_harq(module_id_t mod_id, ...@@ -361,7 +361,7 @@ void handle_nr_ul_harq(module_id_t mod_id,
{ {
int UE_id = find_nr_UE_id(mod_id, crc_pdu->rnti); int UE_id = find_nr_UE_id(mod_id, crc_pdu->rnti);
if (UE_id < 0) { if (UE_id < 0) {
LOG_E(MAC, "%s(): unknown RNTI %04x in PUSCH\n", __func__, crc_pdu->rnti); LOG_E(NR_MAC, "%s(): unknown RNTI %04x in PUSCH\n", __func__, crc_pdu->rnti);
return; return;
} }
NR_UE_info_t *UE_info = &RC.nrmac[mod_id]->UE_info; NR_UE_info_t *UE_info = &RC.nrmac[mod_id]->UE_info;
...@@ -369,7 +369,7 @@ void handle_nr_ul_harq(module_id_t mod_id, ...@@ -369,7 +369,7 @@ void handle_nr_ul_harq(module_id_t mod_id,
int8_t harq_pid = sched_ctrl->feedback_ul_harq.head; int8_t harq_pid = sched_ctrl->feedback_ul_harq.head;
while (crc_pdu->harq_id != harq_pid || harq_pid < 0) { while (crc_pdu->harq_id != harq_pid || harq_pid < 0) {
LOG_W(MAC, LOG_W(NR_MAC,
"Unexpected ULSCH HARQ PID %d (have %d) for RNTI %04x (ignore this warning for RA)\n", "Unexpected ULSCH HARQ PID %d (have %d) for RNTI %04x (ignore this warning for RA)\n",
crc_pdu->harq_id, crc_pdu->harq_id,
harq_pid, harq_pid,
...@@ -398,7 +398,7 @@ void handle_nr_ul_harq(module_id_t mod_id, ...@@ -398,7 +398,7 @@ void handle_nr_ul_harq(module_id_t mod_id,
if (!crc_pdu->tb_crc_status) { if (!crc_pdu->tb_crc_status) {
harq->ndi ^= 1; harq->ndi ^= 1;
harq->round = 0; harq->round = 0;
LOG_D(MAC, LOG_D(NR_MAC,
"Ulharq id %d crc passed for RNTI %04x\n", "Ulharq id %d crc passed for RNTI %04x\n",
harq_pid, harq_pid,
crc_pdu->rnti); crc_pdu->rnti);
...@@ -406,7 +406,7 @@ void handle_nr_ul_harq(module_id_t mod_id, ...@@ -406,7 +406,7 @@ void handle_nr_ul_harq(module_id_t mod_id,
} else if (harq->round == MAX_HARQ_ROUNDS) { } else if (harq->round == MAX_HARQ_ROUNDS) {
harq->ndi ^= 1; harq->ndi ^= 1;
harq->round = 0; harq->round = 0;
LOG_D(MAC, LOG_D(NR_MAC,
"RNTI %04x: Ulharq id %d crc failed in all rounds\n", "RNTI %04x: Ulharq id %d crc failed in all rounds\n",
crc_pdu->rnti, crc_pdu->rnti,
harq_pid); harq_pid);
...@@ -414,7 +414,7 @@ void handle_nr_ul_harq(module_id_t mod_id, ...@@ -414,7 +414,7 @@ void handle_nr_ul_harq(module_id_t mod_id,
add_tail_nr_list(&sched_ctrl->available_ul_harq, harq_pid); add_tail_nr_list(&sched_ctrl->available_ul_harq, harq_pid);
} else { } else {
harq->round++; harq->round++;
LOG_D(MAC, LOG_D(NR_MAC,
"Ulharq id %d crc failed for RNTI %04x\n", "Ulharq id %d crc failed for RNTI %04x\n",
harq_pid, harq_pid,
crc_pdu->rnti); crc_pdu->rnti);
...@@ -477,7 +477,7 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP, ...@@ -477,7 +477,7 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
#if defined(ENABLE_MAC_PAYLOAD_DEBUG) #if defined(ENABLE_MAC_PAYLOAD_DEBUG)
LOG_I(MAC, "Printing received UL MAC payload at gNB side: %d \n"); LOG_I(NR_MAC, "Printing received UL MAC payload at gNB side: %d \n");
for (int i = 0; i < sdu_lenP ; i++) { for (int i = 0; i < sdu_lenP ; i++) {
//harq_process_ul_ue->a[i] = (unsigned char) rand(); //harq_process_ul_ue->a[i] = (unsigned char) rand();
//printf("a[%d]=0x%02x\n",i,harq_process_ul_ue->a[i]); //printf("a[%d]=0x%02x\n",i,harq_process_ul_ue->a[i]);
...@@ -716,7 +716,7 @@ void pf_ul(module_id_t module_id, ...@@ -716,7 +716,7 @@ void pf_ul(module_id_t module_id,
/* Find free CCE */ /* Find free CCE */
bool freeCCE = find_free_CCE(module_id, slot, UE_id); bool freeCCE = find_free_CCE(module_id, slot, UE_id);
if (!freeCCE) { if (!freeCCE) {
LOG_D(MAC, "%4d.%2d no free CCE for retransmission UL DCI UE %04x\n", frame, slot, UE_info->rnti[UE_id]); LOG_D(NR_MAC, "%4d.%2d no free CCE for retransmission UL DCI UE %04x\n", frame, slot, UE_info->rnti[UE_id]);
continue; continue;
} }
/* reduce max_num_ue once we are sure UE can be allocated, i.e., has CCE */ /* reduce max_num_ue once we are sure UE can be allocated, i.e., has CCE */
...@@ -731,14 +731,14 @@ void pf_ul(module_id_t module_id, ...@@ -731,14 +731,14 @@ void pf_ul(module_id_t module_id,
/* Get previous PSUCH filed info */ /* Get previous PSUCH filed info */
sched_ctrl->sched_pusch = cur_harq->sched_pusch; sched_ctrl->sched_pusch = cur_harq->sched_pusch;
NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch; NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch;
LOG_D(MAC, "%4d.%2d Allocate UL retransmission UE %d/RNTI %04x sched %4d.%2d (%d RBs)\n", LOG_I(NR_MAC, "%4d.%2d Allocate UL retransmission UE %d/RNTI %04x sched %4d.%2d (%d RBs)\n",
frame, slot, UE_id, UE_info->rnti[UE_id], frame, slot, UE_id, UE_info->rnti[UE_id],
sched_pusch->frame, sched_pusch->slot, sched_pusch->frame, sched_pusch->slot,
sched_pusch->rbSize); sched_pusch->rbSize);
while (rbStart < bwpSize && !rballoc_mask[rbStart]) rbStart++; while (rbStart < bwpSize && !rballoc_mask[rbStart]) rbStart++;
if (rbStart + sched_pusch->rbSize >= bwpSize) { if (rbStart + sched_pusch->rbSize >= bwpSize) {
LOG_W(MAC, "cannot allocate UL data for UE %d/RNTI %04x: no resources (rbStart %d, sched_pusch->rbSize %d, bwpSize %d)\n", LOG_W(NR_MAC, "cannot allocate UL data for UE %d/RNTI %04x: no resources (rbStart %d, sched_pusch->rbSize %d, bwpSize %d)\n",
UE_id, UE_info->rnti[UE_id],rbStart,sched_pusch->rbSize,bwpSize); UE_id, UE_info->rnti[UE_id],rbStart,sched_pusch->rbSize,bwpSize);
return; return;
} }
...@@ -773,7 +773,7 @@ void pf_ul(module_id_t module_id, ...@@ -773,7 +773,7 @@ void pf_ul(module_id_t module_id,
/* if no data, pre-allocate 5RB */ /* if no data, pre-allocate 5RB */
bool freeCCE = find_free_CCE(module_id, slot, UE_id); bool freeCCE = find_free_CCE(module_id, slot, UE_id);
if (!freeCCE) { if (!freeCCE) {
LOG_I(MAC, "%4d.%2d no free CCE for UL DCI UE %04x (BSR 0)\n", frame, slot, UE_info->rnti[UE_id]); LOG_I(NR_MAC, "%4d.%2d no free CCE for UL DCI UE %04x (BSR 0)\n", frame, slot, UE_info->rnti[UE_id]);
continue; continue;
} }
/* reduce max_num_ue once we are sure UE can be allocated, i.e., has CCE */ /* reduce max_num_ue once we are sure UE can be allocated, i.e., has CCE */
...@@ -781,9 +781,10 @@ void pf_ul(module_id_t module_id, ...@@ -781,9 +781,10 @@ void pf_ul(module_id_t module_id,
if (max_num_ue < 0) if (max_num_ue < 0)
return; return;
LOG_I(NR_MAC,"Looking for min_rb %d RBs, starting at %d\n", min_rb,rbStart);
while (rbStart < bwpSize && !rballoc_mask[rbStart]) rbStart++; while (rbStart < bwpSize && !rballoc_mask[rbStart]) rbStart++;
if (rbStart + min_rb >= bwpSize) { if (rbStart + min_rb >= bwpSize) {
LOG_W(MAC, "cannot allocate UL data for UE %d/RNTI %04x: no resources (rbStart %d, min_rb %d, bwpSize %d\n", LOG_W(NR_MAC, "cannot allocate UL data for UE %d/RNTI %04x: no resources (rbStart %d, min_rb %d, bwpSize %d\n",
UE_id, UE_info->rnti[UE_id],rbStart,min_rb,bwpSize); UE_id, UE_info->rnti[UE_id],rbStart,min_rb,bwpSize);
return; return;
} }
...@@ -821,7 +822,7 @@ void pf_ul(module_id_t module_id, ...@@ -821,7 +822,7 @@ void pf_ul(module_id_t module_id,
1 /* NrOfLayers */) 1 /* NrOfLayers */)
>> 3; >> 3;
coeff_ue[UE_id] = (float) tbs / ul_thr_ue[UE_id]; coeff_ue[UE_id] = (float) tbs / ul_thr_ue[UE_id];
LOG_D(MAC,"b %d, ul_thr_ue[%d] %f, tbs %d, coeff_ue[%d] %f\n", LOG_D(NR_MAC,"b %d, ul_thr_ue[%d] %f, tbs %d, coeff_ue[%d] %f\n",
b, UE_id, ul_thr_ue[UE_id], tbs, UE_id, coeff_ue[UE_id]); b, UE_id, ul_thr_ue[UE_id], tbs, UE_id, coeff_ue[UE_id]);
} }
...@@ -847,7 +848,7 @@ void pf_ul(module_id_t module_id, ...@@ -847,7 +848,7 @@ void pf_ul(module_id_t module_id,
bool freeCCE = find_free_CCE(module_id, slot, UE_id); bool freeCCE = find_free_CCE(module_id, slot, UE_id);
if (!freeCCE) { if (!freeCCE) {
LOG_D(MAC, "%4d.%2d no free CCE for UL DCI UE %04x\n", frame, slot, UE_info->rnti[UE_id]); LOG_D(NR_MAC, "%4d.%2d no free CCE for UL DCI UE %04x\n", frame, slot, UE_info->rnti[UE_id]);
continue; continue;
} }
...@@ -866,7 +867,7 @@ void pf_ul(module_id_t module_id, ...@@ -866,7 +867,7 @@ void pf_ul(module_id_t module_id,
while (rbStart < bwpSize && !rballoc_mask[rbStart]) rbStart++; while (rbStart < bwpSize && !rballoc_mask[rbStart]) rbStart++;
sched_pusch->rbStart = rbStart; sched_pusch->rbStart = rbStart;
if (rbStart + min_rb >= bwpSize) { if (rbStart + min_rb >= bwpSize) {
LOG_W(MAC, "cannot allocate UL data for UE %d/RNTI %04x: no resources (rbStart %d, min_rb %d, bwpSize %d\n", LOG_W(NR_MAC, "cannot allocate UL data for UE %d/RNTI %04x: no resources (rbStart %d, min_rb %d, bwpSize %d\n",
UE_id, UE_info->rnti[UE_id],rbStart,min_rb,bwpSize); UE_id, UE_info->rnti[UE_id],rbStart,min_rb,bwpSize);
return; return;
} }
...@@ -888,7 +889,7 @@ void pf_ul(module_id_t module_id, ...@@ -888,7 +889,7 @@ void pf_ul(module_id_t module_id,
>> 3; >> 3;
} while (rbStart + rbSize < bwpSize && rballoc_mask[rbStart+rbSize] && } while (rbStart + rbSize < bwpSize && rballoc_mask[rbStart+rbSize] &&
sched_pusch->tb_size < B); sched_pusch->tb_size < B);
LOG_D(MAC,"rbSize %d, TBS %d, est buf %d, sched_ul %d, B %d\n", LOG_D(NR_MAC,"rbSize %d, TBS %d, est buf %d, sched_ul %d, B %d\n",
rbSize, sched_pusch->tb_size, sched_ctrl->estimated_ul_buffer, sched_ctrl->sched_ul_bytes, B); rbSize, sched_pusch->tb_size, sched_ctrl->estimated_ul_buffer, sched_ctrl->sched_ul_bytes, B);
/* Mark the corresponding RBs as used */ /* Mark the corresponding RBs as used */
...@@ -953,12 +954,13 @@ bool nr_simple_ulsch_preprocessor(module_id_t module_id, ...@@ -953,12 +954,13 @@ bool nr_simple_ulsch_preprocessor(module_id_t module_id,
sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth: sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth:
scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth,
MAX_BWP_SIZE); MAX_BWP_SIZE);
int st = 0, e = 0, len = 0; int st = 0, e = 0, len = 0;
for (int i = 0; i < bwpSize; i++) { for (int i = 0; i < bwpSize; i++) {
while (vrb_map_UL[i] == 1) while (vrb_map_UL[i] == 1 && i<bwpSize)
i++; i++;
st = i; st = i;
while (vrb_map_UL[i] == 0) while (vrb_map_UL[i] == 0 && i<bwpSize)
i++; i++;
if (i - st > len) { if (i - st > len) {
len = i - st; len = i - st;
...@@ -994,7 +996,7 @@ void nr_schedule_ulsch(module_id_t module_id, ...@@ -994,7 +996,7 @@ void nr_schedule_ulsch(module_id_t module_id,
/* Uplink data ONLY can be scheduled when the current slot is downlink slot, /* Uplink data ONLY can be scheduled when the current slot is downlink slot,
* because we have to schedule the DCI0 first before schedule uplink data */ * because we have to schedule the DCI0 first before schedule uplink data */
if (is_xlsch_in_slot(ulsch_in_slot_bitmap, slot)) { if (is_xlsch_in_slot(ulsch_in_slot_bitmap, slot)) {
LOG_D(MAC, "Current slot %d is NOT DL slot, cannot schedule DCI0 for UL data\n", slot); LOG_D(NR_MAC, "Current slot %d is NOT DL slot, cannot schedule DCI0 for UL data\n", slot);
return; return;
} }
bool do_sched = RC.nrmac[module_id]->pre_processor_ul( bool do_sched = RC.nrmac[module_id]->pre_processor_ul(
...@@ -1020,7 +1022,7 @@ void nr_schedule_ulsch(module_id_t module_id, ...@@ -1020,7 +1022,7 @@ void nr_schedule_ulsch(module_id_t module_id,
/* dynamic PUSCH values (RB alloc, MCS, hence R, Qm, TBS) that change in /* dynamic PUSCH values (RB alloc, MCS, hence R, Qm, TBS) that change in
* every TTI are pre-populated by the preprocessor and used below */ * every TTI are pre-populated by the preprocessor and used below */
NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch; NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch;
LOG_D(MAC,"UE %x : sched_pusch->rbSize %d\n",UE_info->rnti[UE_id],sched_pusch->rbSize); LOG_I(NR_MAC,"UE %x : sched_pusch->rbSize %d\n",UE_info->rnti[UE_id],sched_pusch->rbSize);
if (sched_pusch->rbSize <= 0) if (sched_pusch->rbSize <= 0)
continue; continue;
...@@ -1066,7 +1068,7 @@ void nr_schedule_ulsch(module_id_t module_id, ...@@ -1066,7 +1068,7 @@ void nr_schedule_ulsch(module_id_t module_id,
cur_harq->sched_pusch = *sched_pusch; cur_harq->sched_pusch = *sched_pusch;
sched_ctrl->sched_ul_bytes += sched_pusch->tb_size; sched_ctrl->sched_ul_bytes += sched_pusch->tb_size;
} else { } else {
LOG_D(MAC, LOG_I(NR_MAC,
"%d.%2d UL retransmission RNTI %04x sched %d.%2d HARQ PID %d round %d NDI %d\n", "%d.%2d UL retransmission RNTI %04x sched %d.%2d HARQ PID %d round %d NDI %d\n",
frame, frame,
slot, slot,
...@@ -1079,7 +1081,7 @@ void nr_schedule_ulsch(module_id_t module_id, ...@@ -1079,7 +1081,7 @@ void nr_schedule_ulsch(module_id_t module_id,
} }
UE_info->mac_stats[UE_id].ulsch_current_bytes = sched_pusch->tb_size; UE_info->mac_stats[UE_id].ulsch_current_bytes = sched_pusch->tb_size;
LOG_D(MAC, LOG_I(NR_MAC,
"%4d.%2d RNTI %04x UL sched %4d.%2d start %d RBS %d MCS %d TBS %d HARQ PID %d round %d NDI %d\n", "%4d.%2d RNTI %04x UL sched %4d.%2d start %d RBS %d MCS %d TBS %d HARQ PID %d round %d NDI %d\n",
frame, frame,
slot, slot,
...@@ -1110,7 +1112,7 @@ void nr_schedule_ulsch(module_id_t module_id, ...@@ -1110,7 +1112,7 @@ void nr_schedule_ulsch(module_id_t module_id,
memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t)); memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t));
future_ul_tti_req->n_pdus += 1; future_ul_tti_req->n_pdus += 1;
LOG_I(MAC, "%4d.%2d Scheduling UE specific PUSCH for sched %d.%d, ul_tto_req %d.%d\n", frame, slot, LOG_I(NR_MAC, "%4d.%2d Scheduling UE specific PUSCH for sched %d.%d, ul_tto_req %d.%d\n", frame, slot,
sched_pusch->frame,sched_pusch->slot,future_ul_tti_req->SFN,future_ul_tti_req->Slot); sched_pusch->frame,sched_pusch->slot,future_ul_tti_req->SFN,future_ul_tti_req->Slot);
pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA; pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA;
...@@ -1237,7 +1239,7 @@ void nr_schedule_ulsch(module_id_t module_id, ...@@ -1237,7 +1239,7 @@ void nr_schedule_ulsch(module_id_t module_id,
pdcch_pdu_bwp_coreset[bwpid][coresetid] = pdcch_pdu; pdcch_pdu_bwp_coreset[bwpid][coresetid] = pdcch_pdu;
} }
LOG_D(MAC,"Configuring ULDCI/PDCCH in %d.%d\n", frame,slot); LOG_D(NR_MAC,"Configuring ULDCI/PDCCH in %d.%d\n", frame,slot);
/* Fill PDCCH DL DCI PDU */ /* Fill PDCCH DL DCI PDU */
nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu->dci_pdu[pdcch_pdu->numDlDci]; nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu->dci_pdu[pdcch_pdu->numDlDci];
......
...@@ -1113,7 +1113,7 @@ void fill_initial_cellGroupConfig(rnti_t rnti, ...@@ -1113,7 +1113,7 @@ void fill_initial_cellGroupConfig(rnti_t rnti,
cellGroupConfig->physicalCellGroupConfig = physicalCellGroupConfig; cellGroupConfig->physicalCellGroupConfig = physicalCellGroupConfig;
cellGroupConfig->spCellConfig = malloc(sizeof(*cellGroupConfig->spCellConfig)); cellGroupConfig->spCellConfig = calloc(1,sizeof(*cellGroupConfig->spCellConfig));
fill_initial_SpCellConfig(rnti,cellGroupConfig->spCellConfig,scc); fill_initial_SpCellConfig(rnti,cellGroupConfig->spCellConfig,scc);
......
...@@ -1323,6 +1323,14 @@ static void rrc_ue_generate_RRCSetupComplete( ...@@ -1323,6 +1323,14 @@ static void rrc_ue_generate_RRCSetupComplete(
uint8_t size; uint8_t size;
const char *nas_msg; const char *nas_msg;
int nas_msg_length; int nas_msg_length;
NR_UE_MAC_INST_t *mac = get_mac_inst(0);
if (mac->cg &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->csi_MeasConfig)
AssertFatal(1==0,"2 > csi_MeasConfig is not null\n");
if (AMF_MODE_ENABLED) { if (AMF_MODE_ENABLED) {
#if defined(ITTI_SIM) || defined(RFSIM_NAS) #if defined(ITTI_SIM) || defined(RFSIM_NAS)
as_nas_info_t initialNasMsg; as_nas_info_t initialNasMsg;
...@@ -1352,6 +1360,11 @@ static void rrc_ue_generate_RRCSetupComplete( ...@@ -1352,6 +1360,11 @@ static void rrc_ue_generate_RRCSetupComplete(
size, size,
buffer, buffer,
PDCP_TRANSMISSION_MODE_CONTROL); PDCP_TRANSMISSION_MODE_CONTROL);
if (mac->cg &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->csi_MeasConfig)
AssertFatal(1==0,"2 > csi_MeasConfig is not null\n");
#ifdef ITTI_SIM #ifdef ITTI_SIM
MessageDef *message_p; MessageDef *message_p;
uint8_t *message_buffer; uint8_t *message_buffer;
......
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