Commit 347e2b69 authored by Cuda-Chen's avatar Cuda-Chen Committed by Michael R. Crusoe

arm 32 bits: native def fixes; workarounds for gcc

Co-authored-by: default avatarMichael R. Crusoe <crusoe@debian.org>
parent 61d1addc
...@@ -1742,7 +1742,7 @@ simde_vcvta_u64_f64(simde_float64x1_t a) { ...@@ -1742,7 +1742,7 @@ simde_vcvta_u64_f64(simde_float64x1_t a) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_int32x2_t simde_int32x2_t
simde_vcvta_s32_f32(simde_float32x2_t a) { simde_vcvta_s32_f32(simde_float32x2_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vcvta_s32_f32(a); return vcvta_s32_f32(a);
#else #else
simde_float32x2_private a_ = simde_float32x2_to_private(a); simde_float32x2_private a_ = simde_float32x2_to_private(a);
...@@ -1756,7 +1756,7 @@ simde_vcvta_s32_f32(simde_float32x2_t a) { ...@@ -1756,7 +1756,7 @@ simde_vcvta_s32_f32(simde_float32x2_t a) {
return simde_int32x2_from_private(r_); return simde_int32x2_from_private(r_);
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvta_s32_f32 #undef vcvta_s32_f32
#define vcvta_s32_f32(a) simde_vcvta_s32_f32(a) #define vcvta_s32_f32(a) simde_vcvta_s32_f32(a)
#endif #endif
...@@ -1811,7 +1811,7 @@ simde_vcvtaq_u16_f16(simde_float16x8_t a) { ...@@ -1811,7 +1811,7 @@ simde_vcvtaq_u16_f16(simde_float16x8_t a) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_int32x4_t simde_int32x4_t
simde_vcvtaq_s32_f32(simde_float32x4_t a) { simde_vcvtaq_s32_f32(simde_float32x4_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vcvtaq_s32_f32(a); return vcvtaq_s32_f32(a);
#else #else
simde_float32x4_private a_ = simde_float32x4_to_private(a); simde_float32x4_private a_ = simde_float32x4_to_private(a);
...@@ -1825,7 +1825,7 @@ simde_vcvtaq_s32_f32(simde_float32x4_t a) { ...@@ -1825,7 +1825,7 @@ simde_vcvtaq_s32_f32(simde_float32x4_t a) {
return simde_int32x4_from_private(r_); return simde_int32x4_from_private(r_);
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvtaq_s32_f32 #undef vcvtaq_s32_f32
#define vcvtaq_s32_f32(a) simde_vcvtaq_s32_f32(a) #define vcvtaq_s32_f32(a) simde_vcvtaq_s32_f32(a)
#endif #endif
...@@ -1878,7 +1878,7 @@ simde_vcvtaq_u64_f64(simde_float64x2_t a) { ...@@ -1878,7 +1878,7 @@ simde_vcvtaq_u64_f64(simde_float64x2_t a) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_uint32x2_t simde_uint32x2_t
simde_vcvta_u32_f32(simde_float32x2_t a) { simde_vcvta_u32_f32(simde_float32x2_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vcvta_u32_f32(a); return vcvta_u32_f32(a);
#else #else
simde_float32x2_private a_ = simde_float32x2_to_private(a); simde_float32x2_private a_ = simde_float32x2_to_private(a);
...@@ -1892,7 +1892,7 @@ simde_vcvta_u32_f32(simde_float32x2_t a) { ...@@ -1892,7 +1892,7 @@ simde_vcvta_u32_f32(simde_float32x2_t a) {
return simde_uint32x2_from_private(r_); return simde_uint32x2_from_private(r_);
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvta_u32_f32 #undef vcvta_u32_f32
#define vcvta_u32_f32(a) simde_vcvta_u32_f32(a) #define vcvta_u32_f32(a) simde_vcvta_u32_f32(a)
#endif #endif
...@@ -1900,7 +1900,7 @@ simde_vcvta_u32_f32(simde_float32x2_t a) { ...@@ -1900,7 +1900,7 @@ simde_vcvta_u32_f32(simde_float32x2_t a) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_uint32x4_t simde_uint32x4_t
simde_vcvtaq_u32_f32(simde_float32x4_t a) { simde_vcvtaq_u32_f32(simde_float32x4_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vcvtaq_u32_f32(a); return vcvtaq_u32_f32(a);
#else #else
simde_float32x4_private a_ = simde_float32x4_to_private(a); simde_float32x4_private a_ = simde_float32x4_to_private(a);
...@@ -1914,7 +1914,7 @@ simde_vcvtaq_u32_f32(simde_float32x4_t a) { ...@@ -1914,7 +1914,7 @@ simde_vcvtaq_u32_f32(simde_float32x4_t a) {
return simde_uint32x4_from_private(r_); return simde_uint32x4_from_private(r_);
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvtaq_u32_f32 #undef vcvtaq_u32_f32
#define vcvtaq_u32_f32(a) simde_vcvtaq_u32_f32(a) #define vcvtaq_u32_f32(a) simde_vcvtaq_u32_f32(a)
#endif #endif
......
...@@ -396,7 +396,7 @@ simde_vcvtmq_u16_f16(simde_float16x8_t a) { ...@@ -396,7 +396,7 @@ simde_vcvtmq_u16_f16(simde_float16x8_t a) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_uint32x4_t simde_uint32x4_t
simde_vcvtmq_u32_f32(simde_float32x4_t a) { simde_vcvtmq_u32_f32(simde_float32x4_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && !defined(SIMDE_BUG_CLANG_46844) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_46844)
return vcvtmq_u32_f32(a); return vcvtmq_u32_f32(a);
#else #else
simde_float32x4_private a_ = simde_float32x4_to_private(a); simde_float32x4_private a_ = simde_float32x4_to_private(a);
...@@ -422,7 +422,7 @@ simde_vcvtmq_u32_f32(simde_float32x4_t a) { ...@@ -422,7 +422,7 @@ simde_vcvtmq_u32_f32(simde_float32x4_t a) {
return simde_uint32x4_from_private(r_); return simde_uint32x4_from_private(r_);
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvtmq_u32_f32 #undef vcvtmq_u32_f32
#define vcvtmq_u32_f32(a) simde_vcvtmq_u32_f32(a) #define vcvtmq_u32_f32(a) simde_vcvtmq_u32_f32(a)
#endif #endif
...@@ -512,7 +512,7 @@ simde_vcvtm_u16_f16(simde_float16x4_t a) { ...@@ -512,7 +512,7 @@ simde_vcvtm_u16_f16(simde_float16x4_t a) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_uint32x2_t simde_uint32x2_t
simde_vcvtm_u32_f32(simde_float32x2_t a) { simde_vcvtm_u32_f32(simde_float32x2_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vcvtm_u32_f32(a); return vcvtm_u32_f32(a);
#else #else
simde_float32x2_private a_ = simde_float32x2_to_private(a); simde_float32x2_private a_ = simde_float32x2_to_private(a);
...@@ -526,7 +526,7 @@ simde_vcvtm_u32_f32(simde_float32x2_t a) { ...@@ -526,7 +526,7 @@ simde_vcvtm_u32_f32(simde_float32x2_t a) {
return simde_uint32x2_from_private(r_); return simde_uint32x2_from_private(r_);
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvtm_u32_f32 #undef vcvtm_u32_f32
#define vcvtm_u32_f32(a) simde_vcvtm_u32_f32(a) #define vcvtm_u32_f32(a) simde_vcvtm_u32_f32(a)
#endif #endif
......
...@@ -40,7 +40,7 @@ SIMDE_BEGIN_DECLS_ ...@@ -40,7 +40,7 @@ SIMDE_BEGIN_DECLS_
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_int32x4_t simde_int32x4_t
simde_vcvtnq_s32_f32(simde_float32x4_t a) { simde_vcvtnq_s32_f32(simde_float32x4_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vcvtnq_s32_f32(a); return vcvtnq_s32_f32(a);
#else #else
simde_float32x4_private a_ = simde_float32x4_to_private(a); simde_float32x4_private a_ = simde_float32x4_to_private(a);
...@@ -65,7 +65,7 @@ simde_vcvtnq_s32_f32(simde_float32x4_t a) { ...@@ -65,7 +65,7 @@ simde_vcvtnq_s32_f32(simde_float32x4_t a) {
return simde_int32x4_from_private(r_); return simde_int32x4_from_private(r_);
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvtnq_s32_f32 #undef vcvtnq_s32_f32
#define vcvtnq_s32_f32(a) simde_vcvtnq_s32_f32(a) #define vcvtnq_s32_f32(a) simde_vcvtnq_s32_f32(a)
#endif #endif
...@@ -307,7 +307,7 @@ simde_vcvtns_u32_f32(simde_float32 a) { ...@@ -307,7 +307,7 @@ simde_vcvtns_u32_f32(simde_float32 a) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_uint32x4_t simde_uint32x4_t
simde_vcvtnq_u32_f32(simde_float32x4_t a) { simde_vcvtnq_u32_f32(simde_float32x4_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && !defined(SIMDE_BUG_CLANG_46844) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_46844)
return vcvtnq_u32_f32(a); return vcvtnq_u32_f32(a);
#else #else
simde_float32x4_private a_ = simde_float32x4_to_private(a); simde_float32x4_private a_ = simde_float32x4_to_private(a);
...@@ -333,7 +333,7 @@ simde_vcvtnq_u32_f32(simde_float32x4_t a) { ...@@ -333,7 +333,7 @@ simde_vcvtnq_u32_f32(simde_float32x4_t a) {
return simde_uint32x4_from_private(r_); return simde_uint32x4_from_private(r_);
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvtnq_u32_f32 #undef vcvtnq_u32_f32
#define vcvtnq_u32_f32(a) simde_vcvtnq_u32_f32(a) #define vcvtnq_u32_f32(a) simde_vcvtnq_u32_f32(a)
#endif #endif
...@@ -514,7 +514,7 @@ simde_vcvtn_u16_f16(simde_float16x4_t a) { ...@@ -514,7 +514,7 @@ simde_vcvtn_u16_f16(simde_float16x4_t a) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_uint32x2_t simde_uint32x2_t
simde_vcvtn_u32_f32(simde_float32x2_t a) { simde_vcvtn_u32_f32(simde_float32x2_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vcvtn_u32_f32(a); return vcvtn_u32_f32(a);
#else #else
simde_float32x2_private a_ = simde_float32x2_to_private(a); simde_float32x2_private a_ = simde_float32x2_to_private(a);
...@@ -528,7 +528,7 @@ simde_vcvtn_u32_f32(simde_float32x2_t a) { ...@@ -528,7 +528,7 @@ simde_vcvtn_u32_f32(simde_float32x2_t a) {
return simde_uint32x2_from_private(r_); return simde_uint32x2_from_private(r_);
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvtn_u32_f32 #undef vcvtn_u32_f32
#define vcvtn_u32_f32(a) simde_vcvtn_u32_f32(a) #define vcvtn_u32_f32(a) simde_vcvtn_u32_f32(a)
#endif #endif
...@@ -536,7 +536,7 @@ simde_vcvtn_u32_f32(simde_float32x2_t a) { ...@@ -536,7 +536,7 @@ simde_vcvtn_u32_f32(simde_float32x2_t a) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_int32x2_t simde_int32x2_t
simde_vcvtn_s32_f32(simde_float32x2_t a) { simde_vcvtn_s32_f32(simde_float32x2_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vcvtn_s32_f32(a); return vcvtn_s32_f32(a);
#else #else
simde_float32x2_private a_ = simde_float32x2_to_private(a); simde_float32x2_private a_ = simde_float32x2_to_private(a);
...@@ -550,7 +550,7 @@ simde_vcvtn_s32_f32(simde_float32x2_t a) { ...@@ -550,7 +550,7 @@ simde_vcvtn_s32_f32(simde_float32x2_t a) {
return simde_int32x2_from_private(r_); return simde_int32x2_from_private(r_);
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvtn_s32_f32 #undef vcvtn_s32_f32
#define vcvtn_s32_f32(a) simde_vcvtn_s32_f32(a) #define vcvtn_s32_f32(a) simde_vcvtn_s32_f32(a)
#endif #endif
......
...@@ -396,7 +396,7 @@ simde_vcvtpq_u16_f16(simde_float16x8_t a) { ...@@ -396,7 +396,7 @@ simde_vcvtpq_u16_f16(simde_float16x8_t a) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_uint32x4_t simde_uint32x4_t
simde_vcvtpq_u32_f32(simde_float32x4_t a) { simde_vcvtpq_u32_f32(simde_float32x4_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && !defined(SIMDE_BUG_CLANG_46844) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_46844)
return vcvtpq_u32_f32(a); return vcvtpq_u32_f32(a);
#else #else
simde_float32x4_private a_ = simde_float32x4_to_private(a); simde_float32x4_private a_ = simde_float32x4_to_private(a);
...@@ -422,7 +422,7 @@ simde_vcvtpq_u32_f32(simde_float32x4_t a) { ...@@ -422,7 +422,7 @@ simde_vcvtpq_u32_f32(simde_float32x4_t a) {
return simde_uint32x4_from_private(r_); return simde_uint32x4_from_private(r_);
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvtpq_u32_f32 #undef vcvtpq_u32_f32
#define vcvtpq_u32_f32(a) simde_vcvtpq_u32_f32(a) #define vcvtpq_u32_f32(a) simde_vcvtpq_u32_f32(a)
#endif #endif
...@@ -512,7 +512,7 @@ simde_vcvtp_u16_f16(simde_float16x4_t a) { ...@@ -512,7 +512,7 @@ simde_vcvtp_u16_f16(simde_float16x4_t a) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_uint32x2_t simde_uint32x2_t
simde_vcvtp_u32_f32(simde_float32x2_t a) { simde_vcvtp_u32_f32(simde_float32x2_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vcvtp_u32_f32(a); return vcvtp_u32_f32(a);
#else #else
simde_float32x2_private a_ = simde_float32x2_to_private(a); simde_float32x2_private a_ = simde_float32x2_to_private(a);
...@@ -526,7 +526,7 @@ simde_vcvtp_u32_f32(simde_float32x2_t a) { ...@@ -526,7 +526,7 @@ simde_vcvtp_u32_f32(simde_float32x2_t a) {
return simde_uint32x2_from_private(r_); return simde_uint32x2_from_private(r_);
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vcvtp_u32_f32 #undef vcvtp_u32_f32
#define vcvtp_u32_f32(a) simde_vcvtp_u32_f32(a) #define vcvtp_u32_f32(a) simde_vcvtp_u32_f32(a)
#endif #endif
......
...@@ -1237,7 +1237,7 @@ simde_vld2q_p16(simde_poly16_t const ptr[HEDLEY_ARRAY_PARAM(16)]) { ...@@ -1237,7 +1237,7 @@ simde_vld2q_p16(simde_poly16_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_poly64x2x2_t simde_poly64x2x2_t
simde_vld2q_p64(simde_poly64_t const ptr[HEDLEY_ARRAY_PARAM(4)]) { simde_vld2q_p64(simde_poly64_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld2q_p64(ptr); return vld2q_p64(ptr);
#else #else
simde_poly64x2_private r_[2]; simde_poly64x2_private r_[2];
...@@ -1262,7 +1262,7 @@ simde_vld2q_p64(simde_poly64_t const ptr[HEDLEY_ARRAY_PARAM(4)]) { ...@@ -1262,7 +1262,7 @@ simde_vld2q_p64(simde_poly64_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld2q_p64 #undef vld2q_p64
#define vld2q_p64(a) simde_vld2q_p64((a)) #define vld2q_p64(a) simde_vld2q_p64((a))
#endif #endif
......
...@@ -265,7 +265,7 @@ simde_vld2q_dup_f16(simde_float16_t const * ptr) { ...@@ -265,7 +265,7 @@ simde_vld2q_dup_f16(simde_float16_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_float32x4x2_t simde_float32x4x2_t
simde_vld2q_dup_f32(simde_float32 const * ptr) { simde_vld2q_dup_f32(simde_float32 const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld2q_dup_f32(ptr); return vld2q_dup_f32(ptr);
#else #else
simde_float32x4x2_t r; simde_float32x4x2_t r;
...@@ -276,7 +276,7 @@ simde_vld2q_dup_f32(simde_float32 const * ptr) { ...@@ -276,7 +276,7 @@ simde_vld2q_dup_f32(simde_float32 const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld2q_dup_f32 #undef vld2q_dup_f32
#define vld2q_dup_f32(a) simde_vld2q_dup_f32((a)) #define vld2q_dup_f32(a) simde_vld2q_dup_f32((a))
#endif #endif
...@@ -303,7 +303,7 @@ simde_vld2q_dup_f64(simde_float64 const * ptr) { ...@@ -303,7 +303,7 @@ simde_vld2q_dup_f64(simde_float64 const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_int8x16x2_t simde_int8x16x2_t
simde_vld2q_dup_s8(int8_t const * ptr) { simde_vld2q_dup_s8(int8_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld2q_dup_s8(ptr); return vld2q_dup_s8(ptr);
#else #else
simde_int8x16x2_t r; simde_int8x16x2_t r;
...@@ -314,7 +314,7 @@ simde_vld2q_dup_s8(int8_t const * ptr) { ...@@ -314,7 +314,7 @@ simde_vld2q_dup_s8(int8_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld2q_dup_s8 #undef vld2q_dup_s8
#define vld2q_dup_s8(a) simde_vld2q_dup_s8((a)) #define vld2q_dup_s8(a) simde_vld2q_dup_s8((a))
#endif #endif
...@@ -322,7 +322,7 @@ simde_vld2q_dup_s8(int8_t const * ptr) { ...@@ -322,7 +322,7 @@ simde_vld2q_dup_s8(int8_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_int16x8x2_t simde_int16x8x2_t
simde_vld2q_dup_s16(int16_t const * ptr) { simde_vld2q_dup_s16(int16_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld2q_dup_s16(ptr); return vld2q_dup_s16(ptr);
#else #else
simde_int16x8x2_t r; simde_int16x8x2_t r;
...@@ -333,7 +333,7 @@ simde_vld2q_dup_s16(int16_t const * ptr) { ...@@ -333,7 +333,7 @@ simde_vld2q_dup_s16(int16_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld2q_dup_s16 #undef vld2q_dup_s16
#define vld2q_dup_s16(a) simde_vld2q_dup_s16((a)) #define vld2q_dup_s16(a) simde_vld2q_dup_s16((a))
#endif #endif
...@@ -341,7 +341,7 @@ simde_vld2q_dup_s16(int16_t const * ptr) { ...@@ -341,7 +341,7 @@ simde_vld2q_dup_s16(int16_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_int32x4x2_t simde_int32x4x2_t
simde_vld2q_dup_s32(int32_t const * ptr) { simde_vld2q_dup_s32(int32_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld2q_dup_s32(ptr); return vld2q_dup_s32(ptr);
#else #else
simde_int32x4x2_t r; simde_int32x4x2_t r;
...@@ -352,7 +352,7 @@ simde_vld2q_dup_s32(int32_t const * ptr) { ...@@ -352,7 +352,7 @@ simde_vld2q_dup_s32(int32_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld2q_dup_s32 #undef vld2q_dup_s32
#define vld2q_dup_s32(a) simde_vld2q_dup_s32((a)) #define vld2q_dup_s32(a) simde_vld2q_dup_s32((a))
#endif #endif
...@@ -360,7 +360,7 @@ simde_vld2q_dup_s32(int32_t const * ptr) { ...@@ -360,7 +360,7 @@ simde_vld2q_dup_s32(int32_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_int64x2x2_t simde_int64x2x2_t
simde_vld2q_dup_s64(int64_t const * ptr) { simde_vld2q_dup_s64(int64_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld2q_dup_s64(ptr); return vld2q_dup_s64(ptr);
#else #else
simde_int64x2x2_t r; simde_int64x2x2_t r;
...@@ -371,7 +371,7 @@ simde_vld2q_dup_s64(int64_t const * ptr) { ...@@ -371,7 +371,7 @@ simde_vld2q_dup_s64(int64_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld2q_dup_s64 #undef vld2q_dup_s64
#define vld2q_dup_s64(a) simde_vld2q_dup_s64((a)) #define vld2q_dup_s64(a) simde_vld2q_dup_s64((a))
#endif #endif
...@@ -379,7 +379,7 @@ simde_vld2q_dup_s64(int64_t const * ptr) { ...@@ -379,7 +379,7 @@ simde_vld2q_dup_s64(int64_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_uint8x16x2_t simde_uint8x16x2_t
simde_vld2q_dup_u8(uint8_t const * ptr) { simde_vld2q_dup_u8(uint8_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld2q_dup_u8(ptr); return vld2q_dup_u8(ptr);
#else #else
simde_uint8x16x2_t r; simde_uint8x16x2_t r;
...@@ -390,7 +390,7 @@ simde_vld2q_dup_u8(uint8_t const * ptr) { ...@@ -390,7 +390,7 @@ simde_vld2q_dup_u8(uint8_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld2q_dup_u8 #undef vld2q_dup_u8
#define vld2q_dup_u8(a) simde_vld2q_dup_u8((a)) #define vld2q_dup_u8(a) simde_vld2q_dup_u8((a))
#endif #endif
...@@ -398,7 +398,7 @@ simde_vld2q_dup_u8(uint8_t const * ptr) { ...@@ -398,7 +398,7 @@ simde_vld2q_dup_u8(uint8_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_uint16x8x2_t simde_uint16x8x2_t
simde_vld2q_dup_u16(uint16_t const * ptr) { simde_vld2q_dup_u16(uint16_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld2q_dup_u16(ptr); return vld2q_dup_u16(ptr);
#else #else
simde_uint16x8x2_t r; simde_uint16x8x2_t r;
...@@ -409,7 +409,7 @@ simde_vld2q_dup_u16(uint16_t const * ptr) { ...@@ -409,7 +409,7 @@ simde_vld2q_dup_u16(uint16_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld2q_dup_u16 #undef vld2q_dup_u16
#define vld2q_dup_u16(a) simde_vld2q_dup_u16((a)) #define vld2q_dup_u16(a) simde_vld2q_dup_u16((a))
#endif #endif
...@@ -417,7 +417,7 @@ simde_vld2q_dup_u16(uint16_t const * ptr) { ...@@ -417,7 +417,7 @@ simde_vld2q_dup_u16(uint16_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_uint32x4x2_t simde_uint32x4x2_t
simde_vld2q_dup_u32(uint32_t const * ptr) { simde_vld2q_dup_u32(uint32_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld2q_dup_u32(ptr); return vld2q_dup_u32(ptr);
#else #else
simde_uint32x4x2_t r; simde_uint32x4x2_t r;
...@@ -428,7 +428,7 @@ simde_vld2q_dup_u32(uint32_t const * ptr) { ...@@ -428,7 +428,7 @@ simde_vld2q_dup_u32(uint32_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld2q_dup_u32 #undef vld2q_dup_u32
#define vld2q_dup_u32(a) simde_vld2q_dup_u32((a)) #define vld2q_dup_u32(a) simde_vld2q_dup_u32((a))
#endif #endif
...@@ -436,7 +436,7 @@ simde_vld2q_dup_u32(uint32_t const * ptr) { ...@@ -436,7 +436,7 @@ simde_vld2q_dup_u32(uint32_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_uint64x2x2_t simde_uint64x2x2_t
simde_vld2q_dup_u64(uint64_t const * ptr) { simde_vld2q_dup_u64(uint64_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld2q_dup_u64(ptr); return vld2q_dup_u64(ptr);
#else #else
simde_uint64x2x2_t r; simde_uint64x2x2_t r;
...@@ -447,7 +447,7 @@ simde_vld2q_dup_u64(uint64_t const * ptr) { ...@@ -447,7 +447,7 @@ simde_vld2q_dup_u64(uint64_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld2q_dup_u64 #undef vld2q_dup_u64
#define vld2q_dup_u64(a) simde_vld2q_dup_u64((a)) #define vld2q_dup_u64(a) simde_vld2q_dup_u64((a))
#endif #endif
......
...@@ -1017,7 +1017,7 @@ simde_vld3q_p16(simde_poly16_t const *ptr) { ...@@ -1017,7 +1017,7 @@ simde_vld3q_p16(simde_poly16_t const *ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_poly64x2x3_t simde_poly64x2x3_t
simde_vld3q_p64(simde_poly64_t const *ptr) { simde_vld3q_p64(simde_poly64_t const *ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld3q_p64(ptr); return vld3q_p64(ptr);
#else #else
simde_poly64x2_private r_[3]; simde_poly64x2_private r_[3];
...@@ -1044,7 +1044,7 @@ simde_vld3q_p64(simde_poly64_t const *ptr) { ...@@ -1044,7 +1044,7 @@ simde_vld3q_p64(simde_poly64_t const *ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld3q_p64 #undef vld3q_p64
#define vld3q_p64(a) simde_vld3q_p64((a)) #define vld3q_p64(a) simde_vld3q_p64((a))
#endif #endif
......
...@@ -265,7 +265,7 @@ simde_vld3q_dup_f16(simde_float16_t const * ptr) { ...@@ -265,7 +265,7 @@ simde_vld3q_dup_f16(simde_float16_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_float32x4x3_t simde_float32x4x3_t
simde_vld3q_dup_f32(simde_float32 const * ptr) { simde_vld3q_dup_f32(simde_float32 const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld3q_dup_f32(ptr); return vld3q_dup_f32(ptr);
#else #else
simde_float32x4x3_t r; simde_float32x4x3_t r;
...@@ -276,7 +276,7 @@ simde_vld3q_dup_f32(simde_float32 const * ptr) { ...@@ -276,7 +276,7 @@ simde_vld3q_dup_f32(simde_float32 const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld3q_dup_f32 #undef vld3q_dup_f32
#define vld3q_dup_f32(a) simde_vld3q_dup_f32((a)) #define vld3q_dup_f32(a) simde_vld3q_dup_f32((a))
#endif #endif
...@@ -303,7 +303,7 @@ simde_vld3q_dup_f64(simde_float64 const * ptr) { ...@@ -303,7 +303,7 @@ simde_vld3q_dup_f64(simde_float64 const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_int8x16x3_t simde_int8x16x3_t
simde_vld3q_dup_s8(int8_t const * ptr) { simde_vld3q_dup_s8(int8_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld3q_dup_s8(ptr); return vld3q_dup_s8(ptr);
#else #else
simde_int8x16x3_t r; simde_int8x16x3_t r;
...@@ -314,7 +314,7 @@ simde_vld3q_dup_s8(int8_t const * ptr) { ...@@ -314,7 +314,7 @@ simde_vld3q_dup_s8(int8_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld3q_dup_s8 #undef vld3q_dup_s8
#define vld3q_dup_s8(a) simde_vld3q_dup_s8((a)) #define vld3q_dup_s8(a) simde_vld3q_dup_s8((a))
#endif #endif
...@@ -322,7 +322,7 @@ simde_vld3q_dup_s8(int8_t const * ptr) { ...@@ -322,7 +322,7 @@ simde_vld3q_dup_s8(int8_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_int16x8x3_t simde_int16x8x3_t
simde_vld3q_dup_s16(int16_t const * ptr) { simde_vld3q_dup_s16(int16_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld3q_dup_s16(ptr); return vld3q_dup_s16(ptr);
#else #else
simde_int16x8x3_t r; simde_int16x8x3_t r;
...@@ -333,7 +333,7 @@ simde_vld3q_dup_s16(int16_t const * ptr) { ...@@ -333,7 +333,7 @@ simde_vld3q_dup_s16(int16_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld3q_dup_s16 #undef vld3q_dup_s16
#define vld3q_dup_s16(a) simde_vld3q_dup_s16((a)) #define vld3q_dup_s16(a) simde_vld3q_dup_s16((a))
#endif #endif
...@@ -341,7 +341,7 @@ simde_vld3q_dup_s16(int16_t const * ptr) { ...@@ -341,7 +341,7 @@ simde_vld3q_dup_s16(int16_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_int32x4x3_t simde_int32x4x3_t
simde_vld3q_dup_s32(int32_t const * ptr) { simde_vld3q_dup_s32(int32_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld3q_dup_s32(ptr); return vld3q_dup_s32(ptr);
#else #else
simde_int32x4x3_t r; simde_int32x4x3_t r;
...@@ -352,7 +352,7 @@ simde_vld3q_dup_s32(int32_t const * ptr) { ...@@ -352,7 +352,7 @@ simde_vld3q_dup_s32(int32_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld3q_dup_s32 #undef vld3q_dup_s32
#define vld3q_dup_s32(a) simde_vld3q_dup_s32((a)) #define vld3q_dup_s32(a) simde_vld3q_dup_s32((a))
#endif #endif
...@@ -360,7 +360,7 @@ simde_vld3q_dup_s32(int32_t const * ptr) { ...@@ -360,7 +360,7 @@ simde_vld3q_dup_s32(int32_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_int64x2x3_t simde_int64x2x3_t
simde_vld3q_dup_s64(int64_t const * ptr) { simde_vld3q_dup_s64(int64_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld3q_dup_s64(ptr); return vld3q_dup_s64(ptr);
#else #else
simde_int64x2x3_t r; simde_int64x2x3_t r;
...@@ -371,7 +371,7 @@ simde_vld3q_dup_s64(int64_t const * ptr) { ...@@ -371,7 +371,7 @@ simde_vld3q_dup_s64(int64_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld3q_dup_s64 #undef vld3q_dup_s64
#define vld3q_dup_s64(a) simde_vld3q_dup_s64((a)) #define vld3q_dup_s64(a) simde_vld3q_dup_s64((a))
#endif #endif
...@@ -379,7 +379,7 @@ simde_vld3q_dup_s64(int64_t const * ptr) { ...@@ -379,7 +379,7 @@ simde_vld3q_dup_s64(int64_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_uint8x16x3_t simde_uint8x16x3_t
simde_vld3q_dup_u8(uint8_t const * ptr) { simde_vld3q_dup_u8(uint8_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld3q_dup_u8(ptr); return vld3q_dup_u8(ptr);
#else #else
simde_uint8x16x3_t r; simde_uint8x16x3_t r;
...@@ -390,7 +390,7 @@ simde_vld3q_dup_u8(uint8_t const * ptr) { ...@@ -390,7 +390,7 @@ simde_vld3q_dup_u8(uint8_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld3q_dup_u8 #undef vld3q_dup_u8
#define vld3q_dup_u8(a) simde_vld3q_dup_u8((a)) #define vld3q_dup_u8(a) simde_vld3q_dup_u8((a))
#endif #endif
...@@ -398,7 +398,7 @@ simde_vld3q_dup_u8(uint8_t const * ptr) { ...@@ -398,7 +398,7 @@ simde_vld3q_dup_u8(uint8_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_uint16x8x3_t simde_uint16x8x3_t
simde_vld3q_dup_u16(uint16_t const * ptr) { simde_vld3q_dup_u16(uint16_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld3q_dup_u16(ptr); return vld3q_dup_u16(ptr);
#else #else
simde_uint16x8x3_t r; simde_uint16x8x3_t r;
...@@ -409,7 +409,7 @@ simde_vld3q_dup_u16(uint16_t const * ptr) { ...@@ -409,7 +409,7 @@ simde_vld3q_dup_u16(uint16_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld3q_dup_u16 #undef vld3q_dup_u16
#define vld3q_dup_u16(a) simde_vld3q_dup_u16((a)) #define vld3q_dup_u16(a) simde_vld3q_dup_u16((a))
#endif #endif
...@@ -417,7 +417,7 @@ simde_vld3q_dup_u16(uint16_t const * ptr) { ...@@ -417,7 +417,7 @@ simde_vld3q_dup_u16(uint16_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_uint32x4x3_t simde_uint32x4x3_t
simde_vld3q_dup_u32(uint32_t const * ptr) { simde_vld3q_dup_u32(uint32_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld3q_dup_u32(ptr); return vld3q_dup_u32(ptr);
#else #else
simde_uint32x4x3_t r; simde_uint32x4x3_t r;
...@@ -428,7 +428,7 @@ simde_vld3q_dup_u32(uint32_t const * ptr) { ...@@ -428,7 +428,7 @@ simde_vld3q_dup_u32(uint32_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld3q_dup_u32 #undef vld3q_dup_u32
#define vld3q_dup_u32(a) simde_vld3q_dup_u32((a)) #define vld3q_dup_u32(a) simde_vld3q_dup_u32((a))
#endif #endif
...@@ -436,7 +436,7 @@ simde_vld3q_dup_u32(uint32_t const * ptr) { ...@@ -436,7 +436,7 @@ simde_vld3q_dup_u32(uint32_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_uint64x2x3_t simde_uint64x2x3_t
simde_vld3q_dup_u64(uint64_t const * ptr) { simde_vld3q_dup_u64(uint64_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld3q_dup_u64(ptr); return vld3q_dup_u64(ptr);
#else #else
simde_uint64x2x3_t r; simde_uint64x2x3_t r;
...@@ -447,7 +447,7 @@ simde_vld3q_dup_u64(uint64_t const * ptr) { ...@@ -447,7 +447,7 @@ simde_vld3q_dup_u64(uint64_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld3q_dup_u64 #undef vld3q_dup_u64
#define vld3q_dup_u64(a) simde_vld3q_dup_u64((a)) #define vld3q_dup_u64(a) simde_vld3q_dup_u64((a))
#endif #endif
...@@ -550,7 +550,7 @@ simde_vld3q_dup_p16(simde_poly16_t const * ptr) { ...@@ -550,7 +550,7 @@ simde_vld3q_dup_p16(simde_poly16_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_poly64x2x3_t simde_poly64x2x3_t
simde_vld3q_dup_p64(simde_poly64_t const * ptr) { simde_vld3q_dup_p64(simde_poly64_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld3q_dup_p64(ptr); return vld3q_dup_p64(ptr);
#else #else
simde_poly64x2x3_t r; simde_poly64x2x3_t r;
...@@ -561,7 +561,7 @@ simde_vld3q_dup_p64(simde_poly64_t const * ptr) { ...@@ -561,7 +561,7 @@ simde_vld3q_dup_p64(simde_poly64_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld3q_dup_p64 #undef vld3q_dup_p64
#define vld3q_dup_p64(a) simde_vld3q_dup_p64((a)) #define vld3q_dup_p64(a) simde_vld3q_dup_p64((a))
#endif #endif
......
...@@ -265,7 +265,7 @@ simde_vld4q_dup_f16(simde_float16_t const * ptr) { ...@@ -265,7 +265,7 @@ simde_vld4q_dup_f16(simde_float16_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_float32x4x4_t simde_float32x4x4_t
simde_vld4q_dup_f32(simde_float32 const * ptr) { simde_vld4q_dup_f32(simde_float32 const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld4q_dup_f32(ptr); return vld4q_dup_f32(ptr);
#else #else
simde_float32x4x4_t r; simde_float32x4x4_t r;
...@@ -276,7 +276,7 @@ simde_vld4q_dup_f32(simde_float32 const * ptr) { ...@@ -276,7 +276,7 @@ simde_vld4q_dup_f32(simde_float32 const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld4q_dup_f32 #undef vld4q_dup_f32
#define vld4q_dup_f32(a) simde_vld4q_dup_f32((a)) #define vld4q_dup_f32(a) simde_vld4q_dup_f32((a))
#endif #endif
...@@ -303,7 +303,7 @@ simde_vld4q_dup_f64(simde_float64 const * ptr) { ...@@ -303,7 +303,7 @@ simde_vld4q_dup_f64(simde_float64 const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_int8x16x4_t simde_int8x16x4_t
simde_vld4q_dup_s8(int8_t const * ptr) { simde_vld4q_dup_s8(int8_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld4q_dup_s8(ptr); return vld4q_dup_s8(ptr);
#else #else
simde_int8x16x4_t r; simde_int8x16x4_t r;
...@@ -314,7 +314,7 @@ simde_vld4q_dup_s8(int8_t const * ptr) { ...@@ -314,7 +314,7 @@ simde_vld4q_dup_s8(int8_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld4q_dup_s8 #undef vld4q_dup_s8
#define vld4q_dup_s8(a) simde_vld4q_dup_s8((a)) #define vld4q_dup_s8(a) simde_vld4q_dup_s8((a))
#endif #endif
...@@ -322,7 +322,7 @@ simde_vld4q_dup_s8(int8_t const * ptr) { ...@@ -322,7 +322,7 @@ simde_vld4q_dup_s8(int8_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_int16x8x4_t simde_int16x8x4_t
simde_vld4q_dup_s16(int16_t const * ptr) { simde_vld4q_dup_s16(int16_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld4q_dup_s16(ptr); return vld4q_dup_s16(ptr);
#else #else
simde_int16x8x4_t r; simde_int16x8x4_t r;
...@@ -333,7 +333,7 @@ simde_vld4q_dup_s16(int16_t const * ptr) { ...@@ -333,7 +333,7 @@ simde_vld4q_dup_s16(int16_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld4q_dup_s16 #undef vld4q_dup_s16
#define vld4q_dup_s16(a) simde_vld4q_dup_s16((a)) #define vld4q_dup_s16(a) simde_vld4q_dup_s16((a))
#endif #endif
...@@ -341,7 +341,7 @@ simde_vld4q_dup_s16(int16_t const * ptr) { ...@@ -341,7 +341,7 @@ simde_vld4q_dup_s16(int16_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_int32x4x4_t simde_int32x4x4_t
simde_vld4q_dup_s32(int32_t const * ptr) { simde_vld4q_dup_s32(int32_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld4q_dup_s32(ptr); return vld4q_dup_s32(ptr);
#else #else
simde_int32x4x4_t r; simde_int32x4x4_t r;
...@@ -352,7 +352,7 @@ simde_vld4q_dup_s32(int32_t const * ptr) { ...@@ -352,7 +352,7 @@ simde_vld4q_dup_s32(int32_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld4q_dup_s32 #undef vld4q_dup_s32
#define vld4q_dup_s32(a) simde_vld4q_dup_s32((a)) #define vld4q_dup_s32(a) simde_vld4q_dup_s32((a))
#endif #endif
...@@ -360,7 +360,7 @@ simde_vld4q_dup_s32(int32_t const * ptr) { ...@@ -360,7 +360,7 @@ simde_vld4q_dup_s32(int32_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_int64x2x4_t simde_int64x2x4_t
simde_vld4q_dup_s64(int64_t const * ptr) { simde_vld4q_dup_s64(int64_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld4q_dup_s64(ptr); return vld4q_dup_s64(ptr);
#else #else
simde_int64x2x4_t r; simde_int64x2x4_t r;
...@@ -371,7 +371,7 @@ simde_vld4q_dup_s64(int64_t const * ptr) { ...@@ -371,7 +371,7 @@ simde_vld4q_dup_s64(int64_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld4q_dup_s64 #undef vld4q_dup_s64
#define vld4q_dup_s64(a) simde_vld4q_dup_s64((a)) #define vld4q_dup_s64(a) simde_vld4q_dup_s64((a))
#endif #endif
...@@ -379,7 +379,7 @@ simde_vld4q_dup_s64(int64_t const * ptr) { ...@@ -379,7 +379,7 @@ simde_vld4q_dup_s64(int64_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_uint8x16x4_t simde_uint8x16x4_t
simde_vld4q_dup_u8(uint8_t const * ptr) { simde_vld4q_dup_u8(uint8_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld4q_dup_u8(ptr); return vld4q_dup_u8(ptr);
#else #else
simde_uint8x16x4_t r; simde_uint8x16x4_t r;
...@@ -390,7 +390,7 @@ simde_vld4q_dup_u8(uint8_t const * ptr) { ...@@ -390,7 +390,7 @@ simde_vld4q_dup_u8(uint8_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld4q_dup_u8 #undef vld4q_dup_u8
#define vld4q_dup_u8(a) simde_vld4q_dup_u8((a)) #define vld4q_dup_u8(a) simde_vld4q_dup_u8((a))
#endif #endif
...@@ -398,7 +398,7 @@ simde_vld4q_dup_u8(uint8_t const * ptr) { ...@@ -398,7 +398,7 @@ simde_vld4q_dup_u8(uint8_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_uint16x8x4_t simde_uint16x8x4_t
simde_vld4q_dup_u16(uint16_t const * ptr) { simde_vld4q_dup_u16(uint16_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld4q_dup_u16(ptr); return vld4q_dup_u16(ptr);
#else #else
simde_uint16x8x4_t r; simde_uint16x8x4_t r;
...@@ -409,7 +409,7 @@ simde_vld4q_dup_u16(uint16_t const * ptr) { ...@@ -409,7 +409,7 @@ simde_vld4q_dup_u16(uint16_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld4q_dup_u16 #undef vld4q_dup_u16
#define vld4q_dup_u16(a) simde_vld4q_dup_u16((a)) #define vld4q_dup_u16(a) simde_vld4q_dup_u16((a))
#endif #endif
...@@ -417,7 +417,7 @@ simde_vld4q_dup_u16(uint16_t const * ptr) { ...@@ -417,7 +417,7 @@ simde_vld4q_dup_u16(uint16_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_uint32x4x4_t simde_uint32x4x4_t
simde_vld4q_dup_u32(uint32_t const * ptr) { simde_vld4q_dup_u32(uint32_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld4q_dup_u32(ptr); return vld4q_dup_u32(ptr);
#else #else
simde_uint32x4x4_t r; simde_uint32x4x4_t r;
...@@ -428,7 +428,7 @@ simde_vld4q_dup_u32(uint32_t const * ptr) { ...@@ -428,7 +428,7 @@ simde_vld4q_dup_u32(uint32_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld4q_dup_u32 #undef vld4q_dup_u32
#define vld4q_dup_u32(a) simde_vld4q_dup_u32((a)) #define vld4q_dup_u32(a) simde_vld4q_dup_u32((a))
#endif #endif
...@@ -436,7 +436,7 @@ simde_vld4q_dup_u32(uint32_t const * ptr) { ...@@ -436,7 +436,7 @@ simde_vld4q_dup_u32(uint32_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_uint64x2x4_t simde_uint64x2x4_t
simde_vld4q_dup_u64(uint64_t const * ptr) { simde_vld4q_dup_u64(uint64_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld4q_dup_u64(ptr); return vld4q_dup_u64(ptr);
#else #else
simde_uint64x2x4_t r; simde_uint64x2x4_t r;
...@@ -447,7 +447,7 @@ simde_vld4q_dup_u64(uint64_t const * ptr) { ...@@ -447,7 +447,7 @@ simde_vld4q_dup_u64(uint64_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld4q_dup_u64 #undef vld4q_dup_u64
#define vld4q_dup_u64(a) simde_vld4q_dup_u64((a)) #define vld4q_dup_u64(a) simde_vld4q_dup_u64((a))
#endif #endif
...@@ -550,7 +550,7 @@ simde_vld4q_dup_p16(simde_poly16_t const * ptr) { ...@@ -550,7 +550,7 @@ simde_vld4q_dup_p16(simde_poly16_t const * ptr) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_poly64x2x4_t simde_poly64x2x4_t
simde_vld4q_dup_p64(simde_poly64_t const * ptr) { simde_vld4q_dup_p64(simde_poly64_t const * ptr) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
return vld4q_dup_p64(ptr); return vld4q_dup_p64(ptr);
#else #else
simde_poly64x2x4_t r; simde_poly64x2x4_t r;
...@@ -561,7 +561,7 @@ simde_vld4q_dup_p64(simde_poly64_t const * ptr) { ...@@ -561,7 +561,7 @@ simde_vld4q_dup_p64(simde_poly64_t const * ptr) {
return r; return r;
#endif #endif
} }
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
#undef vld4q_dup_p64 #undef vld4q_dup_p64
#define vld4q_dup_p64(a) simde_vld4q_dup_p64((a)) #define vld4q_dup_p64(a) simde_vld4q_dup_p64((a))
#endif #endif
......
...@@ -6382,7 +6382,7 @@ simde_vreinterpretq_p128_f32(simde_float32x4_t a) { ...@@ -6382,7 +6382,7 @@ simde_vreinterpretq_p128_f32(simde_float32x4_t a) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_poly128_t simde_poly128_t
simde_vreinterpretq_p128_f64(simde_float64x2_t a) { simde_vreinterpretq_p128_f64(simde_float64x2_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
return vreinterpretq_p128_f64(a); return vreinterpretq_p128_f64(a);
#else #else
simde_poly128_t r_; simde_poly128_t r_;
...@@ -6586,7 +6586,7 @@ simde_vreinterpretq_f16_p128(simde_poly128_t a) { ...@@ -6586,7 +6586,7 @@ simde_vreinterpretq_f16_p128(simde_poly128_t a) {
SIMDE_FUNCTION_ATTRIBUTES SIMDE_FUNCTION_ATTRIBUTES
simde_float64x2_t simde_float64x2_t
simde_vreinterpretq_f64_p128(simde_poly128_t a) { simde_vreinterpretq_f64_p128(simde_poly128_t a) {
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
return vreinterpretq_f64_p128(a); return vreinterpretq_f64_p128(a);
#else #else
simde_float64x2_private r_; simde_float64x2_private r_;
......
...@@ -211,7 +211,7 @@ typedef union { ...@@ -211,7 +211,7 @@ typedef union {
#if defined(SIMDE_X86_SSE2_NATIVE) #if defined(SIMDE_X86_SSE2_NATIVE)
__m128d m128d; __m128d m128d;
#endif #endif
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
float64x2_t neon; float64x2_t neon;
#endif #endif
#if defined(SIMDE_WASM_SIMD128_NATIVE) #if defined(SIMDE_WASM_SIMD128_NATIVE)
......
...@@ -32,7 +32,8 @@ ...@@ -32,7 +32,8 @@
HEDLEY_DIAGNOSTIC_PUSH HEDLEY_DIAGNOSTIC_PUSH
SIMDE_DISABLE_UNWANTED_DIAGNOSTICS SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
#if !(defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)) #if !(defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_AES) && \
defined(SIMDE_ARM_NEON_A32V7_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO))
/* /*
* Number of columns (32-bit words) comprising the State. For this * Number of columns (32-bit words) comprising the State. For this
......
...@@ -1037,17 +1037,23 @@ HEDLEY_DIAGNOSTIC_POP ...@@ -1037,17 +1037,23 @@ HEDLEY_DIAGNOSTIC_POP
# define SIMDE_BUG_GCC_95399 # define SIMDE_BUG_GCC_95399
# define SIMDE_BUG_GCC_95471 # define SIMDE_BUG_GCC_95471
# define SIMDE_BUG_GCC_111609 # define SIMDE_BUG_GCC_111609
# elif defined(SIMDE_ARCH_POWER) # if SIMDE_ARCH_ARM_CHECK(8,0)
# define SIMDE_BUG_GCC_113065
# endif
# endif
# if defined(SIMDE_ARCH_POWER)
# define SIMDE_BUG_GCC_95227 # define SIMDE_BUG_GCC_95227
# define SIMDE_BUG_GCC_95782 # define SIMDE_BUG_GCC_95782
# if !HEDLEY_GCC_VERSION_CHECK(12,0,0) # if !HEDLEY_GCC_VERSION_CHECK(12,0,0)
# define SIMDE_BUG_VEC_CPSGN_REVERSED_ARGS # define SIMDE_BUG_VEC_CPSGN_REVERSED_ARGS
# endif # endif
# elif defined(SIMDE_ARCH_X86) || defined(SIMDE_ARCH_AMD64) # endif
# if defined(SIMDE_ARCH_X86) || defined(SIMDE_ARCH_AMD64)
# if !HEDLEY_GCC_VERSION_CHECK(10,2,0) && !defined(__OPTIMIZE__) # if !HEDLEY_GCC_VERSION_CHECK(10,2,0) && !defined(__OPTIMIZE__)
# define SIMDE_BUG_GCC_96174 # define SIMDE_BUG_GCC_96174
# endif # endif
# elif defined(SIMDE_ARCH_ZARCH) # endif
# if defined(SIMDE_ARCH_ZARCH)
# define SIMDE_BUG_GCC_95782 # define SIMDE_BUG_GCC_95782
# if HEDLEY_GCC_VERSION_CHECK(10,0,0) # if HEDLEY_GCC_VERSION_CHECK(10,0,0)
# define SIMDE_BUG_GCC_101614 # define SIMDE_BUG_GCC_101614
......
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