neon/st1{,q}_*_x{2,3,4}: initial implementation (#1082)

Co-authored-by: Décio Luiz Gazzoni Filho <decio@decpp.net>
Co-authored-by: Michael R. Crusoe <michael.crusoe@gmail.com>

arm/neon.h

@@ -231,6 +231,12 @@
 #include "neon/sri_n.h"
 #include "neon/st1.h"
 #include "neon/st1_lane.h"
+#include "neon/st1_x2.h"
+#include "neon/st1_x3.h"
+#include "neon/st1_x4.h"
+#include "neon/st1q_x2.h"
+#include "neon/st1q_x3.h"
+#include "neon/st1q_x4.h"
 #include "neon/st2.h"
 #include "neon/st2_lane.h"
 #include "neon/st3.h"

arm/neon/st1_x2.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2020      Evan Nemerson <evan@nemerson.com>
+ *   2021      Décio Luiz Gazzoni Filho <decio@decpp.net>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_ST1_X2_H)
+#define SIMDE_ARM_NEON_ST1_X2_H
+
+#include "types.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+#if !defined(SIMDE_BUG_INTEL_857088)
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_f32_x2(simde_float32 ptr[HEDLEY_ARRAY_PARAM(4)], simde_float32x2x2_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_f32_x2(ptr, val);
+  #else
+    simde_vst1_f32(ptr, val.val[0]);
+    simde_vst1_f32(ptr+2, val.val[1]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_f32_x2
+  #define vst1_f32_x2(ptr, val) simde_vst1_f32_x2((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_f64_x2(simde_float64 ptr[HEDLEY_ARRAY_PARAM(2)], simde_float64x1x2_t val) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    vst1_f64_x2(ptr, val);
+  #else
+    simde_vst1_f64(ptr, val.val[0]);
+    simde_vst1_f64(ptr+1, val.val[1]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vst1_f64_x2
+  #define vst1_f64_x2(ptr, val) simde_vst1_f64_x2((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_s8_x2(int8_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_int8x8x2_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_s8_x2(ptr, val);
+  #else
+    simde_vst1_s8(ptr, val.val[0]);
+    simde_vst1_s8(ptr+8, val.val[1]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_s8_x2
+  #define vst1_s8_x2(ptr, val) simde_vst1_s8_x2((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_s16_x2(int16_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_int16x4x2_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_s16_x2(ptr, val);
+  #else
+    simde_vst1_s16(ptr, val.val[0]);
+    simde_vst1_s16(ptr+4, val.val[1]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_s16_x2
+  #define vst1_s16_x2(ptr, val) simde_vst1_s16_x2((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_s32_x2(int32_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_int32x2x2_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_s32_x2(ptr, val);
+  #else
+    simde_vst1_s32(ptr, val.val[0]);
+    simde_vst1_s32(ptr+2, val.val[1]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_s32_x2
+  #define vst1_s32_x2(ptr, val) simde_vst1_s32_x2((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_s64_x2(int64_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_int64x1x2_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_s64_x2(ptr, val);
+  #else
+    simde_vst1_s64(ptr, val.val[0]);
+    simde_vst1_s64(ptr+1, val.val[1]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_s64_x2
+  #define vst1_s64_x2(ptr, val) simde_vst1_s64_x2((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_u8_x2(uint8_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_uint8x8x2_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_u8_x2(ptr, val);
+  #else
+    simde_vst1_u8(ptr, val.val[0]);
+    simde_vst1_u8(ptr+8, val.val[1]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_u8_x2
+  #define vst1_u8_x2(ptr, val) simde_vst1_u8_x2((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_u16_x2(uint16_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_uint16x4x2_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_u16_x2(ptr, val);
+  #else
+    simde_vst1_u16(ptr, val.val[0]);
+    simde_vst1_u16(ptr+4, val.val[1]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_u16_x2
+  #define vst1_u16_x2(ptr, val) simde_vst1_u16_x2((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_u32_x2(uint32_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint32x2x2_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_u32_x2(ptr, val);
+  #else
+    simde_vst1_u32(ptr, val.val[0]);
+    simde_vst1_u32(ptr+2, val.val[1]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_u32_x2
+  #define vst1_u32_x2(ptr, val) simde_vst1_u32_x2((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_u64_x2(uint64_t ptr[HEDLEY_ARRAY_PARAM(2)], simde_uint64x1x2_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_u64_x2(ptr, val);
+  #else
+    simde_vst1_u64(ptr, val.val[0]);
+    simde_vst1_u64(ptr+1, val.val[1]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_u64_x2
+  #define vst1_u64_x2(ptr, val) simde_vst1_u64_x2((ptr), (val))
+#endif
+
+#endif /* !defined(SIMDE_BUG_INTEL_857088) */
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_ST1_X2_H) */

arm/neon/st1_x3.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2020      Evan Nemerson <evan@nemerson.com>
+ *   2021      Décio Luiz Gazzoni Filho <decio@decpp.net>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_ST1_X3_H)
+#define SIMDE_ARM_NEON_ST1_X3_H
+
+#include "types.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+#if !defined(SIMDE_BUG_INTEL_857088)
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_f32_x3(simde_float32 ptr[HEDLEY_ARRAY_PARAM(6)], simde_float32x2x3_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_f32_x3(ptr, val);
+  #else
+    simde_vst1_f32(ptr, val.val[0]);
+    simde_vst1_f32(ptr+2, val.val[1]);
+    simde_vst1_f32(ptr+4, val.val[2]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_f32_x3
+  #define vst1_f32_x3(ptr, val) simde_vst1_f32_x3((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_f64_x3(simde_float64 ptr[HEDLEY_ARRAY_PARAM(3)], simde_float64x1x3_t val) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    vst1_f64_x3(ptr, val);
+  #else
+    simde_vst1_f64(ptr, val.val[0]);
+    simde_vst1_f64(ptr+1, val.val[1]);
+    simde_vst1_f64(ptr+2, val.val[2]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vst1_f64_x3
+  #define vst1_f64_x3(ptr, val) simde_vst1_f64_x3((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_s8_x3(int8_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_int8x8x3_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_s8_x3(ptr, val);
+  #else
+    simde_vst1_s8(ptr, val.val[0]);
+    simde_vst1_s8(ptr+8, val.val[1]);
+    simde_vst1_s8(ptr+16, val.val[2]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_s8_x3
+  #define vst1_s8_x3(ptr, val) simde_vst1_s8_x3((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_s16_x3(int16_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_int16x4x3_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_s16_x3(ptr, val);
+  #else
+    simde_vst1_s16(ptr, val.val[0]);
+    simde_vst1_s16(ptr+4, val.val[1]);
+    simde_vst1_s16(ptr+8, val.val[2]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_s16_x3
+  #define vst1_s16_x3(ptr, val) simde_vst1_s16_x3((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_s32_x3(int32_t ptr[HEDLEY_ARRAY_PARAM(6)], simde_int32x2x3_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_s32_x3(ptr, val);
+  #else
+    simde_vst1_s32(ptr, val.val[0]);
+    simde_vst1_s32(ptr+2, val.val[1]);
+    simde_vst1_s32(ptr+4, val.val[2]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_s32_x3
+  #define vst1_s32_x3(ptr, val) simde_vst1_s32_x3((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_s64_x3(int64_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_int64x1x3_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_s64_x3(ptr, val);
+  #else
+    simde_vst1_s64(ptr, val.val[0]);
+    simde_vst1_s64(ptr+1, val.val[1]);
+    simde_vst1_s64(ptr+2, val.val[2]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_s64_x3
+  #define vst1_s64_x3(ptr, val) simde_vst1_s64_x3((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_u8_x3(uint8_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_uint8x8x3_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_u8_x3(ptr, val);
+  #else
+    simde_vst1_u8(ptr, val.val[0]);
+    simde_vst1_u8(ptr+8, val.val[1]);
+    simde_vst1_u8(ptr+16, val.val[2]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_u8_x3
+  #define vst1_u8_x3(ptr, val) simde_vst1_u8_x3((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_u16_x3(uint16_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_uint16x4x3_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_u16_x3(ptr, val);
+  #else
+    simde_vst1_u16(ptr, val.val[0]);
+    simde_vst1_u16(ptr+4, val.val[1]);
+    simde_vst1_u16(ptr+8, val.val[2]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_u16_x3
+  #define vst1_u16_x3(ptr, val) simde_vst1_u16_x3((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_u32_x3(uint32_t ptr[HEDLEY_ARRAY_PARAM(6)], simde_uint32x2x3_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_u32_x3(ptr, val);
+  #else
+    simde_vst1_u32(ptr, val.val[0]);
+    simde_vst1_u32(ptr+2, val.val[1]);
+    simde_vst1_u32(ptr+4, val.val[2]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_u32_x3
+  #define vst1_u32_x3(ptr, val) simde_vst1_u32_x3((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_u64_x3(uint64_t ptr[HEDLEY_ARRAY_PARAM(3)], simde_uint64x1x3_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_u64_x3(ptr, val);
+  #else
+    simde_vst1_u64(ptr, val.val[0]);
+    simde_vst1_u64(ptr+1, val.val[1]);
+    simde_vst1_u64(ptr+2, val.val[2]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_u64_x3
+  #define vst1_u64_x3(ptr, val) simde_vst1_u64_x3((ptr), (val))
+#endif
+
+#endif /* !defined(SIMDE_BUG_INTEL_857088) */
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_ST1_X3_H) */

arm/neon/st1_x4.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2020      Evan Nemerson <evan@nemerson.com>
+ *   2021      Décio Luiz Gazzoni Filho <decio@decpp.net>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_ST1_X4_H)
+#define SIMDE_ARM_NEON_ST1_X4_H
+
+#include "types.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+#if !defined(SIMDE_BUG_INTEL_857088)
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_f32_x4(simde_float32 ptr[HEDLEY_ARRAY_PARAM(8)], simde_float32x2x4_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_f32_x4(ptr, val);
+  #else
+    simde_vst1_f32(ptr, val.val[0]);
+    simde_vst1_f32(ptr+2, val.val[1]);
+    simde_vst1_f32(ptr+4, val.val[2]);
+    simde_vst1_f32(ptr+6, val.val[3]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_f32_x4
+  #define vst1_f32_x4(ptr, val) simde_vst1_f32_x4((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_f64_x4(simde_float64 ptr[HEDLEY_ARRAY_PARAM(4)], simde_float64x1x4_t val) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    vst1_f64_x4(ptr, val);
+  #else
+    simde_vst1_f64(ptr, val.val[0]);
+    simde_vst1_f64(ptr+1, val.val[1]);
+    simde_vst1_f64(ptr+2, val.val[2]);
+    simde_vst1_f64(ptr+3, val.val[3]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vst1_f64_x4
+  #define vst1_f64_x4(ptr, val) simde_vst1_f64_x4((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_s8_x4(int8_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_int8x8x4_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_s8_x4(ptr, val);
+  #else
+    simde_vst1_s8(ptr, val.val[0]);
+    simde_vst1_s8(ptr+8, val.val[1]);
+    simde_vst1_s8(ptr+16, val.val[2]);
+    simde_vst1_s8(ptr+24, val.val[3]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_s8_x4
+  #define vst1_s8_x4(ptr, val) simde_vst1_s8_x4((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_s16_x4(int16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_int16x4x4_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_s16_x4(ptr, val);
+  #else
+    simde_vst1_s16(ptr, val.val[0]);
+    simde_vst1_s16(ptr+4, val.val[1]);
+    simde_vst1_s16(ptr+8, val.val[2]);
+    simde_vst1_s16(ptr+12, val.val[3]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_s16_x4
+  #define vst1_s16_x4(ptr, val) simde_vst1_s16_x4((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_s32_x4(int32_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_int32x2x4_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_s32_x4(ptr, val);
+  #else
+    simde_vst1_s32(ptr, val.val[0]);
+    simde_vst1_s32(ptr+2, val.val[1]);
+    simde_vst1_s32(ptr+4, val.val[2]);
+    simde_vst1_s32(ptr+6, val.val[3]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_s32_x4
+  #define vst1_s32_x4(ptr, val) simde_vst1_s32_x4((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_s64_x4(int64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_int64x1x4_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_s64_x4(ptr, val);
+  #else
+    simde_vst1_s64(ptr, val.val[0]);
+    simde_vst1_s64(ptr+1, val.val[1]);
+    simde_vst1_s64(ptr+2, val.val[2]);
+    simde_vst1_s64(ptr+3, val.val[3]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_s64_x4
+  #define vst1_s64_x4(ptr, val) simde_vst1_s64_x4((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_u8_x4(uint8_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_uint8x8x4_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_u8_x4(ptr, val);
+  #else
+    simde_vst1_u8(ptr, val.val[0]);
+    simde_vst1_u8(ptr+8, val.val[1]);
+    simde_vst1_u8(ptr+16, val.val[2]);
+    simde_vst1_u8(ptr+24, val.val[3]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_u8_x4
+  #define vst1_u8_x4(ptr, val) simde_vst1_u8_x4((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_u16_x4(uint16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_uint16x4x4_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_u16_x4(ptr, val);
+  #else
+    simde_vst1_u16(ptr, val.val[0]);
+    simde_vst1_u16(ptr+4, val.val[1]);
+    simde_vst1_u16(ptr+8, val.val[2]);
+    simde_vst1_u16(ptr+12, val.val[3]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_u16_x4
+  #define vst1_u16_x4(ptr, val) simde_vst1_u16_x4((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_u32_x4(uint32_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_uint32x2x4_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_u32_x4(ptr, val);
+  #else
+    simde_vst1_u32(ptr, val.val[0]);
+    simde_vst1_u32(ptr+2, val.val[1]);
+    simde_vst1_u32(ptr+4, val.val[2]);
+    simde_vst1_u32(ptr+6, val.val[3]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_u32_x4
+  #define vst1_u32_x4(ptr, val) simde_vst1_u32_x4((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1_u64_x4(uint64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint64x1x4_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1_u64_x4(ptr, val);
+  #else
+    simde_vst1_u64(ptr, val.val[0]);
+    simde_vst1_u64(ptr+1, val.val[1]);
+    simde_vst1_u64(ptr+2, val.val[2]);
+    simde_vst1_u64(ptr+3, val.val[3]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1_u64_x4
+  #define vst1_u64_x4(ptr, val) simde_vst1_u64_x4((ptr), (val))
+#endif
+
+#endif /* !defined(SIMDE_BUG_INTEL_857088) */
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_ST1_X4_H) */

arm/neon/st1q_x2.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2020      Evan Nemerson <evan@nemerson.com>
+ *   2021      Décio Luiz Gazzoni Filho <decio@decpp.net>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_ST1Q_X2_H)
+#define SIMDE_ARM_NEON_ST1Q_X2_H
+
+#include "types.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+#if !defined(SIMDE_BUG_INTEL_857088)
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_f32_x2(simde_float32 ptr[HEDLEY_ARRAY_PARAM(8)], simde_float32x4x2_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_f32_x2(ptr, val);
+  #else
+    simde_vst1q_f32(ptr, val.val[0]);
+    simde_vst1q_f32(ptr+4, val.val[1]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_f32_x2
+  #define vst1q_f32_x2(ptr, val) simde_vst1q_f32_x2((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_f64_x2(simde_float64 ptr[HEDLEY_ARRAY_PARAM(4)], simde_float64x2x2_t val) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    vst1q_f64_x2(ptr, val);
+  #else
+    simde_vst1q_f64(ptr, val.val[0]);
+    simde_vst1q_f64(ptr+2, val.val[1]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_f64_x2
+  #define vst1q_f64_x2(ptr, val) simde_vst1q_f64_x2((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_s8_x2(int8_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_int8x16x2_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_s8_x2(ptr, val);
+  #else
+    simde_vst1q_s8(ptr, val.val[0]);
+    simde_vst1q_s8(ptr+16, val.val[1]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_s8_x2
+  #define vst1q_s8_x2(ptr, val) simde_vst1q_s8_x2((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_s16_x2(int16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_int16x8x2_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_s16_x2(ptr, val);
+  #else
+    simde_vst1q_s16(ptr, val.val[0]);
+    simde_vst1q_s16(ptr+8, val.val[1]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_s16_x2
+  #define vst1q_s16_x2(ptr, val) simde_vst1q_s16_x2((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_s32_x2(int32_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_int32x4x2_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_s32_x2(ptr, val);
+  #else
+    simde_vst1q_s32(ptr, val.val[0]);
+    simde_vst1q_s32(ptr+4, val.val[1]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_s32_x2
+  #define vst1q_s32_x2(ptr, val) simde_vst1q_s32_x2((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_s64_x2(int64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_int64x2x2_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_s64_x2(ptr, val);
+  #else
+    simde_vst1q_s64(ptr, val.val[0]);
+    simde_vst1q_s64(ptr+2, val.val[1]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_s64_x2
+  #define vst1q_s64_x2(ptr, val) simde_vst1q_s64_x2((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_u8_x2(uint8_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_uint8x16x2_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_u8_x2(ptr, val);
+  #else
+    simde_vst1q_u8(ptr, val.val[0]);
+    simde_vst1q_u8(ptr+16, val.val[1]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_u8_x2
+  #define vst1q_u8_x2(ptr, val) simde_vst1q_u8_x2((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_u16_x2(uint16_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_uint16x8x2_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_u16_x2(ptr, val);
+  #else
+    simde_vst1q_u16(ptr, val.val[0]);
+    simde_vst1q_u16(ptr+8, val.val[1]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_u16_x2
+  #define vst1q_u16_x2(ptr, val) simde_vst1q_u16_x2((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_u32_x2(uint32_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_uint32x4x2_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_u32_x2(ptr, val);
+  #else
+    simde_vst1q_u32(ptr, val.val[0]);
+    simde_vst1q_u32(ptr+4, val.val[1]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_u32_x2
+  #define vst1q_u32_x2(ptr, val) simde_vst1q_u32_x2((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_u64_x2(uint64_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_uint64x2x2_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_u64_x2(ptr, val);
+  #else
+    simde_vst1q_u64(ptr, val.val[0]);
+    simde_vst1q_u64(ptr+2, val.val[1]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_u64_x2
+  #define vst1q_u64_x2(ptr, val) simde_vst1q_u64_x2((ptr), (val))
+#endif
+
+#endif /* !defined(SIMDE_BUG_INTEL_857088) */
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_ST1Q_X2_H) */

arm/neon/st1q_x3.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2020      Evan Nemerson <evan@nemerson.com>
+ *   2021      Décio Luiz Gazzoni Filho <decio@decpp.net>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_ST1Q_X3_H)
+#define SIMDE_ARM_NEON_ST1Q_X3_H
+
+#include "types.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+#if !defined(SIMDE_BUG_INTEL_857088)
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_f32_x3(simde_float32 ptr[HEDLEY_ARRAY_PARAM(12)], simde_float32x4x3_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_f32_x3(ptr, val);
+  #else
+    simde_vst1q_f32(ptr, val.val[0]);
+    simde_vst1q_f32(ptr+4, val.val[1]);
+    simde_vst1q_f32(ptr+8, val.val[2]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_f32_x3
+  #define vst1q_f32_x3(ptr, val) simde_vst1q_f32_x3((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_f64_x3(simde_float64 ptr[HEDLEY_ARRAY_PARAM(6)], simde_float64x2x3_t val) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    vst1q_f64_x3(ptr, val);
+  #else
+    simde_vst1q_f64(ptr, val.val[0]);
+    simde_vst1q_f64(ptr+2, val.val[1]);
+    simde_vst1q_f64(ptr+4, val.val[2]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_f64_x3
+  #define vst1q_f64_x3(ptr, val) simde_vst1q_f64_x3((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_s8_x3(int8_t ptr[HEDLEY_ARRAY_PARAM(48)], simde_int8x16x3_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_s8_x3(ptr, val);
+  #else
+    simde_vst1q_s8(ptr, val.val[0]);
+    simde_vst1q_s8(ptr+16, val.val[1]);
+    simde_vst1q_s8(ptr+32, val.val[2]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_s8_x3
+  #define vst1q_s8_x3(ptr, val) simde_vst1q_s8_x3((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_s16_x3(int16_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_int16x8x3_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_s16_x3(ptr, val);
+  #else
+    simde_vst1q_s16(ptr, val.val[0]);
+    simde_vst1q_s16(ptr+8, val.val[1]);
+    simde_vst1q_s16(ptr+16, val.val[2]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_s16_x3
+  #define vst1q_s16_x3(ptr, val) simde_vst1q_s16_x3((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_s32_x3(int32_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_int32x4x3_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_s32_x3(ptr, val);
+  #else
+    simde_vst1q_s32(ptr, val.val[0]);
+    simde_vst1q_s32(ptr+4, val.val[1]);
+    simde_vst1q_s32(ptr+8, val.val[2]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_s32_x3
+  #define vst1q_s32_x3(ptr, val) simde_vst1q_s32_x3((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_s64_x3(int64_t ptr[HEDLEY_ARRAY_PARAM(6)], simde_int64x2x3_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_s64_x3(ptr, val);
+  #else
+    simde_vst1q_s64(ptr, val.val[0]);
+    simde_vst1q_s64(ptr+2, val.val[1]);
+    simde_vst1q_s64(ptr+4, val.val[2]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_s64_x3
+  #define vst1q_s64_x3(ptr, val) simde_vst1q_s64_x3((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_u8_x3(uint8_t ptr[HEDLEY_ARRAY_PARAM(48)], simde_uint8x16x3_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_u8_x3(ptr, val);
+  #else
+    simde_vst1q_u8(ptr, val.val[0]);
+    simde_vst1q_u8(ptr+16, val.val[1]);
+    simde_vst1q_u8(ptr+32, val.val[2]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_u8_x3
+  #define vst1q_u8_x3(ptr, val) simde_vst1q_u8_x3((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_u16_x3(uint16_t ptr[HEDLEY_ARRAY_PARAM(24)], simde_uint16x8x3_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_u16_x3(ptr, val);
+  #else
+    simde_vst1q_u16(ptr, val.val[0]);
+    simde_vst1q_u16(ptr+8, val.val[1]);
+    simde_vst1q_u16(ptr+16, val.val[2]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_u16_x3
+  #define vst1q_u16_x3(ptr, val) simde_vst1q_u16_x3((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_u32_x3(uint32_t ptr[HEDLEY_ARRAY_PARAM(12)], simde_uint32x4x3_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_u32_x3(ptr, val);
+  #else
+    simde_vst1q_u32(ptr, val.val[0]);
+    simde_vst1q_u32(ptr+4, val.val[1]);
+    simde_vst1q_u32(ptr+8, val.val[2]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_u32_x3
+  #define vst1q_u32_x3(ptr, val) simde_vst1q_u32_x3((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_u64_x3(uint64_t ptr[HEDLEY_ARRAY_PARAM(6)], simde_uint64x2x3_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_u64_x3(ptr, val);
+  #else
+    simde_vst1q_u64(ptr, val.val[0]);
+    simde_vst1q_u64(ptr+2, val.val[1]);
+    simde_vst1q_u64(ptr+4, val.val[2]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_u64_x3
+  #define vst1q_u64_x3(ptr, val) simde_vst1q_u64_x3((ptr), (val))
+#endif
+
+#endif /* !defined(SIMDE_BUG_INTEL_857088) */
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_ST1Q_X3_H) */

arm/neon/st1q_x4.h

+/* SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Copyright:
+ *   2020      Evan Nemerson <evan@nemerson.com>
+ *   2021      Décio Luiz Gazzoni Filho <decio@decpp.net>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
+ */
+
+#if !defined(SIMDE_ARM_NEON_ST1Q_X4_H)
+#define SIMDE_ARM_NEON_ST1Q_X4_H
+
+#include "types.h"
+
+HEDLEY_DIAGNOSTIC_PUSH
+SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+SIMDE_BEGIN_DECLS_
+
+#if !defined(SIMDE_BUG_INTEL_857088)
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_f32_x4(simde_float32 ptr[HEDLEY_ARRAY_PARAM(16)], simde_float32x4x4_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_f32_x4(ptr, val);
+  #else
+    simde_vst1q_f32(ptr, val.val[0]);
+    simde_vst1q_f32(ptr+4, val.val[1]);
+    simde_vst1q_f32(ptr+8, val.val[2]);
+    simde_vst1q_f32(ptr+12, val.val[3]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_f32_x4
+  #define vst1q_f32_x4(ptr, val) simde_vst1q_f32_x4((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_f64_x4(simde_float64 ptr[HEDLEY_ARRAY_PARAM(8)], simde_float64x2x4_t val) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    vst1q_f64_x4(ptr, val);
+  #else
+    simde_vst1q_f64(ptr, val.val[0]);
+    simde_vst1q_f64(ptr+2, val.val[1]);
+    simde_vst1q_f64(ptr+4, val.val[2]);
+    simde_vst1q_f64(ptr+6, val.val[3]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_f64_x4
+  #define vst1q_f64_x4(ptr, val) simde_vst1q_f64_x4((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_s8_x4(int8_t ptr[HEDLEY_ARRAY_PARAM(64)], simde_int8x16x4_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_s8_x4(ptr, val);
+  #else
+    simde_vst1q_s8(ptr, val.val[0]);
+    simde_vst1q_s8(ptr+16, val.val[1]);
+    simde_vst1q_s8(ptr+32, val.val[2]);
+    simde_vst1q_s8(ptr+48, val.val[3]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_s8_x4
+  #define vst1q_s8_x4(ptr, val) simde_vst1q_s8_x4((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_s16_x4(int16_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_int16x8x4_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_s16_x4(ptr, val);
+  #else
+    simde_vst1q_s16(ptr, val.val[0]);
+    simde_vst1q_s16(ptr+8, val.val[1]);
+    simde_vst1q_s16(ptr+16, val.val[2]);
+    simde_vst1q_s16(ptr+24, val.val[3]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_s16_x4
+  #define vst1q_s16_x4(ptr, val) simde_vst1q_s16_x4((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_s32_x4(int32_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_int32x4x4_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_s32_x4(ptr, val);
+  #else
+    simde_vst1q_s32(ptr, val.val[0]);
+    simde_vst1q_s32(ptr+4, val.val[1]);
+    simde_vst1q_s32(ptr+8, val.val[2]);
+    simde_vst1q_s32(ptr+12, val.val[3]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_s32_x4
+  #define vst1q_s32_x4(ptr, val) simde_vst1q_s32_x4((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_s64_x4(int64_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_int64x2x4_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_s64_x4(ptr, val);
+  #else
+    simde_vst1q_s64(ptr, val.val[0]);
+    simde_vst1q_s64(ptr+2, val.val[1]);
+    simde_vst1q_s64(ptr+4, val.val[2]);
+    simde_vst1q_s64(ptr+6, val.val[3]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_s64_x4
+  #define vst1q_s64_x4(ptr, val) simde_vst1q_s64_x4((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_u8_x4(uint8_t ptr[HEDLEY_ARRAY_PARAM(64)], simde_uint8x16x4_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_u8_x4(ptr, val);
+  #else
+    simde_vst1q_u8(ptr, val.val[0]);
+    simde_vst1q_u8(ptr+16, val.val[1]);
+    simde_vst1q_u8(ptr+32, val.val[2]);
+    simde_vst1q_u8(ptr+48, val.val[3]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_u8_x4
+  #define vst1q_u8_x4(ptr, val) simde_vst1q_u8_x4((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_u16_x4(uint16_t ptr[HEDLEY_ARRAY_PARAM(32)], simde_uint16x8x4_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_u16_x4(ptr, val);
+  #else
+    simde_vst1q_u16(ptr, val.val[0]);
+    simde_vst1q_u16(ptr+8, val.val[1]);
+    simde_vst1q_u16(ptr+16, val.val[2]);
+    simde_vst1q_u16(ptr+24, val.val[3]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_u16_x4
+  #define vst1q_u16_x4(ptr, val) simde_vst1q_u16_x4((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_u32_x4(uint32_t ptr[HEDLEY_ARRAY_PARAM(16)], simde_uint32x4x4_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_u32_x4(ptr, val);
+  #else
+    simde_vst1q_u32(ptr, val.val[0]);
+    simde_vst1q_u32(ptr+4, val.val[1]);
+    simde_vst1q_u32(ptr+8, val.val[2]);
+    simde_vst1q_u32(ptr+12, val.val[3]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_u32_x4
+  #define vst1q_u32_x4(ptr, val) simde_vst1q_u32_x4((ptr), (val))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+void
+simde_vst1q_u64_x4(uint64_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_uint64x2x4_t val) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_REV_260989)
+    vst1q_u64_x4(ptr, val);
+  #else
+    simde_vst1q_u64(ptr, val.val[0]);
+    simde_vst1q_u64(ptr+2, val.val[1]);
+    simde_vst1q_u64(ptr+4, val.val[2]);
+    simde_vst1q_u64(ptr+6, val.val[3]);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vst1q_u64_x4
+  #define vst1q_u64_x4(ptr, val) simde_vst1q_u64_x4((ptr), (val))
+#endif
+
+#endif /* !defined(SIMDE_BUG_INTEL_857088) */
+
+SIMDE_END_DECLS_
+HEDLEY_DIAGNOSTIC_POP
+
+#endif /* !defined(SIMDE_ARM_NEON_ST1Q_X4_H) */

simde-common.h

@@ -974,6 +974,9 @@ HEDLEY_DIAGNOSTIC_POP
 #    if !HEDLEY_GCC_VERSION_CHECK(9,1,0) && defined(SIMDE_ARCH_AARCH64)
 #      define SIMDE_BUG_GCC_REV_264019
 #    endif
+#    if (!HEDLEY_GCC_VERSION_CHECK(9,0,0) && !defined(SIMDE_ARCH_AARCH64)) || (!defined(SIMDE_ARCH_AARCH64) && defined(SIMDE_ARCH_ARM))
+#      define SIMDE_BUG_GCC_REV_260989
+#    endif
 #    if defined(SIMDE_ARCH_ARM)
 #      define SIMDE_BUG_GCC_95399
 #      define SIMDE_BUG_GCC_95471