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Libraries
simde
Commits
f2e82c96
Commit
f2e82c96
authored
Oct 26, 2023
by
Michael R. Crusoe
Committed by
Michael R. Crusoe
Oct 27, 2023
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x86 pclmul: fix natives, some require VPCLMULQDQ
Fixes:
https://github.com/simd-everywhere/simde/issues/1094
parent
0adef454
Changes
1
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1 changed file
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38 additions
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61 deletions
+38
-61
x86/clmul.h
x86/clmul.h
+38
-61
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x86/clmul.h
View file @
f2e82c96
...
@@ -224,28 +224,6 @@ simde_mm256_clmulepi64_epi128 (simde__m256i a, simde__m256i b, const int imm8)
...
@@ -224,28 +224,6 @@ simde_mm256_clmulepi64_epi128 (simde__m256i a, simde__m256i b, const int imm8)
b_
=
simde__m256i_to_private
(
b
),
b_
=
simde__m256i_to_private
(
b
),
r_
;
r_
;
#if defined(SIMDE_X86_PCLMUL_NATIVE)
SIMDE_LCC_DISABLE_DEPRECATED_WARNINGS
switch
(
imm8
&
0x11
)
{
case
0x00
:
r_
.
m128i
[
0
]
=
_mm_clmulepi64_si128
(
a_
.
m128i
[
0
],
b_
.
m128i
[
0
],
0x00
);
r_
.
m128i
[
1
]
=
_mm_clmulepi64_si128
(
a_
.
m128i
[
1
],
b_
.
m128i
[
1
],
0x00
);
break
;
case
0x01
:
r_
.
m128i
[
0
]
=
_mm_clmulepi64_si128
(
a_
.
m128i
[
0
],
b_
.
m128i
[
0
],
0x01
);
r_
.
m128i
[
1
]
=
_mm_clmulepi64_si128
(
a_
.
m128i
[
1
],
b_
.
m128i
[
1
],
0x01
);
break
;
case
0x10
:
r_
.
m128i
[
0
]
=
_mm_clmulepi64_si128
(
a_
.
m128i
[
0
],
b_
.
m128i
[
0
],
0x10
);
r_
.
m128i
[
1
]
=
_mm_clmulepi64_si128
(
a_
.
m128i
[
1
],
b_
.
m128i
[
1
],
0x10
);
break
;
case
0x11
:
r_
.
m128i
[
0
]
=
_mm_clmulepi64_si128
(
a_
.
m128i
[
0
],
b_
.
m128i
[
0
],
0x11
);
r_
.
m128i
[
1
]
=
_mm_clmulepi64_si128
(
a_
.
m128i
[
1
],
b_
.
m128i
[
1
],
0x11
);
break
;
}
SIMDE_LCC_REVERT_DEPRECATED_WARNINGS
#else
simde__m128i_private
a_lo_
,
b_lo_
,
r_lo_
,
a_hi_
,
b_hi_
,
r_hi_
;
simde__m128i_private
a_lo_
,
b_lo_
,
r_lo_
,
a_hi_
,
b_hi_
,
r_hi_
;
#if HEDLEY_HAS_BUILTIN(__builtin_shufflevector) && !defined(HEDLEY_IBM_VERSION)
#if HEDLEY_HAS_BUILTIN(__builtin_shufflevector) && !defined(HEDLEY_IBM_VERSION)
...
@@ -294,14 +272,13 @@ simde_mm256_clmulepi64_epi128 (simde__m256i a, simde__m256i b, const int imm8)
...
@@ -294,14 +272,13 @@ simde_mm256_clmulepi64_epi128 (simde__m256i a, simde__m256i b, const int imm8)
r_
.
u64
[
2
]
=
r_lo_
.
u64
[
1
];
r_
.
u64
[
2
]
=
r_lo_
.
u64
[
1
];
r_
.
u64
[
3
]
=
r_hi_
.
u64
[
1
];
r_
.
u64
[
3
]
=
r_hi_
.
u64
[
1
];
#endif
#endif
#endif
return
simde__m256i_from_private
(
r_
);
return
simde__m256i_from_private
(
r_
);
}
}
#if defined(SIMDE_X86_VPCLMULQDQ_NATIVE) && defined(SIMDE_X86_AVX_NATIVE)
#if defined(SIMDE_X86_VPCLMULQDQ_NATIVE) && defined(SIMDE_X86_AVX
512VL
_NATIVE)
#define simde_mm256_clmulepi64_epi128(a, b, imm8) _mm256_clmulepi64_epi128(a, b, imm8)
#define simde_mm256_clmulepi64_epi128(a, b, imm8) _mm256_clmulepi64_epi128(a, b, imm8)
#endif
#endif
#if defined(SIMDE_X86_VPCLMULQDQ_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_X86_VPCLMULQDQ_ENABLE_NATIVE_ALIASES)
&& defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES)
#undef _mm256_clmulepi64_epi128
#undef _mm256_clmulepi64_epi128
#define _mm256_clmulepi64_epi128(a, b, imm8) simde_mm256_clmulepi64_epi128(a, b, imm8)
#define _mm256_clmulepi64_epi128(a, b, imm8) simde_mm256_clmulepi64_epi128(a, b, imm8)
#endif
#endif
...
@@ -398,7 +375,7 @@ simde_mm512_clmulepi64_epi128 (simde__m512i a, simde__m512i b, const int imm8)
...
@@ -398,7 +375,7 @@ simde_mm512_clmulepi64_epi128 (simde__m512i a, simde__m512i b, const int imm8)
#if defined(SIMDE_X86_VPCLMULQDQ_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
#if defined(SIMDE_X86_VPCLMULQDQ_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
#define simde_mm512_clmulepi64_epi128(a, b, imm8) _mm512_clmulepi64_epi128(a, b, imm8)
#define simde_mm512_clmulepi64_epi128(a, b, imm8) _mm512_clmulepi64_epi128(a, b, imm8)
#endif
#endif
#if defined(SIMDE_X86_VPCLMULQDQ_ENABLE_NATIVE_ALIASES)
#if defined(SIMDE_X86_VPCLMULQDQ_ENABLE_NATIVE_ALIASES)
&& defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
#undef _mm512_clmulepi64_epi128
#undef _mm512_clmulepi64_epi128
#define _mm512_clmulepi64_epi128(a, b, imm8) simde_mm512_clmulepi64_epi128(a, b, imm8)
#define _mm512_clmulepi64_epi128(a, b, imm8) simde_mm512_clmulepi64_epi128(a, b, imm8)
#endif
#endif
...
...
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