Commit 66e28109 authored by francescomani's avatar francescomani

moving few parameters from pusch_semistatic to BWP

parent 40049db9
...@@ -701,14 +701,11 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t ...@@ -701,14 +701,11 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
NR_BWP_Uplink_t *ubwp = NULL; NR_BWP_Uplink_t *ubwp = NULL;
NR_BWP_UplinkDedicated_t *ubwpd = NULL; NR_BWP_UplinkDedicated_t *ubwpd = NULL;
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL; NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = UL_BWP->tdaList;
if(ra->CellGroup) { if(ra->CellGroup) {
ubwp = ra->CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[UL_BWP->bwp_id-1]; ubwp = ra->CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[UL_BWP->bwp_id-1];
ubwpd = ra->CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP; ubwpd = ra->CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP;
pusch_TimeDomainAllocationList = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; }
} else
pusch_TimeDomainAllocationList = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
int mu = UL_BWP->scs; int mu = UL_BWP->scs;
uint8_t K2 = *pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->k2; uint8_t K2 = *pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->k2;
const int sched_frame = frame + (slot + K2 >= nr_slots_per_frame[mu]); const int sched_frame = frame + (slot + K2 >= nr_slots_per_frame[mu]);
...@@ -732,10 +729,10 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t ...@@ -732,10 +729,10 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
} }
int fh = 0; int fh = 0;
int startSymbolAndLength = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->startSymbolAndLength; int startSymbolAndLength = pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->startSymbolAndLength;
int StartSymbolIndex, NrOfSymbols; int StartSymbolIndex, NrOfSymbols;
SLIV2SL(startSymbolAndLength, &StartSymbolIndex, &NrOfSymbols); SLIV2SL(startSymbolAndLength, &StartSymbolIndex, &NrOfSymbols);
int mappingtype = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->mappingType; int mappingtype = pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->mappingType;
uint16_t *vrb_map_UL = &RC.nrmac[module_idP]->common_channels[CC_id].vrb_map_UL[sched_slot * MAX_BWP_SIZE]; uint16_t *vrb_map_UL = &RC.nrmac[module_idP]->common_channels[CC_id].vrb_map_UL[sched_slot * MAX_BWP_SIZE];
...@@ -842,7 +839,6 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t ...@@ -842,7 +839,6 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
scc, scc,
pusch_pdu, pusch_pdu,
&uldci_payload, &uldci_payload,
NR_UL_DCI_FORMAT_0_0,
ra->Msg3_tda_id, ra->Msg3_tda_id,
ra->msg3_TPC, ra->msg3_TPC,
0, // not used in format 0_0 0, // not used in format 0_0
...@@ -903,9 +899,7 @@ void nr_get_Msg3alloc(module_id_t module_id, ...@@ -903,9 +899,7 @@ void nr_get_Msg3alloc(module_id_t module_id,
int temp_slot = 0; int temp_slot = 0;
ra->Msg3_tda_id = 16; // initialization to a value above limit ra->Msg3_tda_id = 16; // initialization to a value above limit
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList= ubwp ? NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = UL_BWP->tdaList;
ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList:
scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
const int n_slots_frame = nr_slots_per_frame[mu]; const int n_slots_frame = nr_slots_per_frame[mu];
...@@ -1115,17 +1109,9 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t ...@@ -1115,17 +1109,9 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t
int ibwp_size = NRRIV2BW(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); int ibwp_size = NRRIV2BW(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
int scs = UL_BWP->scs; int scs = UL_BWP->scs;
int fh = 0; int fh = (UL_BWP->pusch_Config && UL_BWP->pusch_Config->frequencyHopping) ? 1 : 0;
int startSymbolAndLength = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->startSymbolAndLength; int startSymbolAndLength = UL_BWP->tdaList->list.array[ra->Msg3_tda_id]->startSymbolAndLength;
int mappingtype = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->mappingType; int mappingtype = UL_BWP->tdaList->list.array[ra->Msg3_tda_id]->mappingType;
if (ra->CellGroup) {
NR_BWP_Uplink_t *ubwp = ra->CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[UL_BWP->bwp_id - 1];
startSymbolAndLength = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->startSymbolAndLength;
mappingtype = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->mappingType;
fh = ubwp->bwp_Dedicated->pusch_Config->choice.setup->frequencyHopping ? 1 : 0;
}
LOG_D(NR_MAC, "Frame %d, Slot %d Adding Msg3 UL Config Request for (%d,%d) : (%d,%d,%d) for rnti: %d\n", LOG_D(NR_MAC, "Frame %d, Slot %d Adding Msg3 UL Config Request for (%d,%d) : (%d,%d,%d) for rnti: %d\n",
frameP, frameP,
......
...@@ -355,8 +355,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ ...@@ -355,8 +355,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
NR_UE_UL_BWP_t *BWP = &UE->current_UL_BWP; NR_UE_UL_BWP_t *BWP = &UE->current_UL_BWP;
const int mu = BWP->scs; const int mu = BWP->scs;
const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = BWP->tdaList;
sched_ctrl->active_ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
const int temp_tda = get_ul_tda(nr_mac, scc, slot); const int temp_tda = get_ul_tda(nr_mac, scc, slot);
if (temp_tda < 0) if (temp_tda < 0)
return false; return false;
...@@ -364,7 +363,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ ...@@ -364,7 +363,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
"time domain assignment %d >= %d\n", "time domain assignment %d >= %d\n",
temp_tda, temp_tda,
tdaList->list.count); tdaList->list.count);
int K2 = get_K2(scc,NULL,sched_ctrl->active_ubwp, temp_tda, mu); int K2 = get_K2(BWP->tdaList, temp_tda, mu);
const int sched_frame = frame + (slot + K2 >= nr_slots_per_frame[mu]); const int sched_frame = frame + (slot + K2 >= nr_slots_per_frame[mu]);
const int sched_slot = (slot + K2) % nr_slots_per_frame[mu]; const int sched_slot = (slot + K2) % nr_slots_per_frame[mu];
const int tda = get_ul_tda(nr_mac, scc, sched_slot); const int tda = get_ul_tda(nr_mac, scc, sched_slot);
...@@ -380,22 +379,18 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ ...@@ -380,22 +379,18 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
if (!is_xlsch_in_slot(ulsch_slot_bitmap, sched_slot)) if (!is_xlsch_in_slot(ulsch_slot_bitmap, sched_slot))
return false; return false;
const long f = (sched_ctrl->search_space->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_ue_Specific) ?
sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0;
const int dci_format = f ? NR_UL_DCI_FORMAT_0_1 : NR_UL_DCI_FORMAT_0_0;
uint8_t num_dmrs_cdm_grps_no_data = 1; uint8_t num_dmrs_cdm_grps_no_data = 1;
if ((target_ul_Nl==4)||(target_ul_Nl==3)) if ((target_ul_Nl==4)||(target_ul_Nl==3))
num_dmrs_cdm_grps_no_data = 2; num_dmrs_cdm_grps_no_data = 2;
/* we want to avoid a lengthy deduction of DMRS and other parameters in /* we want to avoid a lengthy deduction of DMRS and other parameters in
* every TTI if we can save it, so check whether dci_format, TDA, or * every TTI if we can save it, so check whether TDA, or
* num_dmrs_cdm_grps_no_data has changed and only then recompute */ * num_dmrs_cdm_grps_no_data has changed and only then recompute */
NR_pusch_semi_static_t *ps = &sched_ctrl->pusch_semi_static; NR_pusch_semi_static_t *ps = &sched_ctrl->pusch_semi_static;
if (ps->time_domain_allocation != tda if (ps->time_domain_allocation != tda
|| ps->dci_format != dci_format
|| ps->nrOfLayers != target_ul_Nl || ps->nrOfLayers != target_ul_Nl
|| ps->num_dmrs_cdm_grps_no_data != num_dmrs_cdm_grps_no_data) || ps->num_dmrs_cdm_grps_no_data != num_dmrs_cdm_grps_no_data)
nr_set_pusch_semi_static(NULL, scc, sched_ctrl->active_ubwp, NULL,dci_format, tda, num_dmrs_cdm_grps_no_data,target_ul_Nl,ps); nr_set_pusch_semi_static(BWP, scc, sched_ctrl->active_ubwp, NULL, tda, num_dmrs_cdm_grps_no_data,target_ul_Nl,ps);
uint16_t rbStart = 0; uint16_t rbStart = 0;
uint16_t rbSize; uint16_t rbSize;
...@@ -465,10 +460,10 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ ...@@ -465,10 +460,10 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
/* Calculate TBS from MCS */ /* Calculate TBS from MCS */
ps->nrOfLayers = target_ul_Nl; ps->nrOfLayers = target_ul_Nl;
sched_pusch->R = nr_get_code_rate_ul(mcs, ps->mcs_table); sched_pusch->R = nr_get_code_rate_ul(mcs, BWP->mcs_table);
sched_pusch->Qm = nr_get_Qm_ul(mcs, ps->mcs_table); sched_pusch->Qm = nr_get_Qm_ul(mcs, BWP->mcs_table);
if (ps->pusch_Config->tp_pi2BPSK if (BWP->pusch_Config->tp_pi2BPSK
&& ((ps->mcs_table == 3 && mcs < 2) || (ps->mcs_table == 4 && mcs < 6))) { && ((BWP->mcs_table == 3 && mcs < 2) || (BWP->mcs_table == 4 && mcs < 6))) {
sched_pusch->R >>= 1; sched_pusch->R >>= 1;
sched_pusch->Qm <<= 1; sched_pusch->Qm <<= 1;
} }
......
...@@ -593,66 +593,31 @@ void nr_set_pdsch_semi_static(const NR_UE_DL_BWP_t *BWP, ...@@ -593,66 +593,31 @@ void nr_set_pdsch_semi_static(const NR_UE_DL_BWP_t *BWP,
LOG_D(NR_MAC,"Filling dmrs info, ps->N_PRB_DMRS %d, ps->dl_dmrs_symb_pos %x, ps->N_DMRS_SLOT %d\n",ps->N_PRB_DMRS,ps->dl_dmrs_symb_pos,ps->N_DMRS_SLOT); LOG_D(NR_MAC,"Filling dmrs info, ps->N_PRB_DMRS %d, ps->dl_dmrs_symb_pos %x, ps->N_DMRS_SLOT %d\n",ps->N_PRB_DMRS,ps->dl_dmrs_symb_pos,ps->N_DMRS_SLOT);
} }
void nr_set_pusch_semi_static(const NR_SIB1_t *sib1, void nr_set_pusch_semi_static(const NR_UE_UL_BWP_t *BWP,
const NR_ServingCellConfigCommon_t *scc, const NR_ServingCellConfigCommon_t *scc,
const NR_BWP_Uplink_t *ubwp, const NR_BWP_Uplink_t *ubwp,
const NR_BWP_UplinkDedicated_t *ubwpd, const NR_BWP_UplinkDedicated_t *ubwpd,
long dci_format,
int tda, int tda,
uint8_t num_dmrs_cdm_grps_no_data, uint8_t num_dmrs_cdm_grps_no_data,
uint8_t nrOfLayers, uint8_t nrOfLayers,
NR_pusch_semi_static_t *ps) { NR_pusch_semi_static_t *ps) {
ps->dci_format = dci_format;
ps->time_domain_allocation = tda; ps->time_domain_allocation = tda;
NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList = NULL; const int startSymbolAndLength = BWP->tdaList->list.array[tda]->startSymbolAndLength;
if(ubwp) {
tdaList = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
} else if(scc) {
tdaList = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
} else {
tdaList = sib1->servingCellConfigCommon->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
}
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, SLIV2SL(startSymbolAndLength,
&ps->startSymbolIndex, &ps->startSymbolIndex,
&ps->nrOfSymbols); &ps->nrOfSymbols);
ps->pusch_Config = ubwp && ubwp->bwp_Dedicated && ubwp->bwp_Dedicated->pusch_Config ?
ubwp->bwp_Dedicated->pusch_Config->choice.setup : (ubwpd ? ubwpd->pusch_Config->choice.setup : NULL);
if (ps->pusch_Config == NULL || !ps->pusch_Config->transformPrecoder)
ps->transform_precoding = !scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder;
else
ps->transform_precoding = *ps->pusch_Config->transformPrecoder;
const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
if (ps->transform_precoding)
ps->mcs_table = get_pusch_mcs_table(ps->pusch_Config ? ps->pusch_Config->mcs_Table : NULL,
0,
ps->dci_format,
NR_RNTI_C,
target_ss,
false);
else {
ps->mcs_table = get_pusch_mcs_table(ps->pusch_Config ? ps->pusch_Config->mcs_TableTransformPrecoder : NULL,
1,
ps->dci_format,
NR_RNTI_C,
target_ss,
false);
num_dmrs_cdm_grps_no_data = 2; // in case of transform precoding - no Data sent in DMRS symbol
}
ps->nrOfLayers = nrOfLayers; ps->nrOfLayers = nrOfLayers;
ps->num_dmrs_cdm_grps_no_data = num_dmrs_cdm_grps_no_data; ps->num_dmrs_cdm_grps_no_data = BWP->transform_precoding ? num_dmrs_cdm_grps_no_data : 2;
/* DMRS calculations */ /* DMRS calculations */
ps->mapping_type = tdaList->list.array[tda]->mappingType; ps->mapping_type = BWP->tdaList->list.array[tda]->mappingType;
ps->NR_DMRS_UplinkConfig = ps->pusch_Config ? ps->NR_DMRS_UplinkConfig = BWP->pusch_Config ?
(ps->mapping_type == NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA ? (ps->mapping_type == NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA ?
ps->pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup : BWP->pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup :
ps->pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup) : NULL; BWP->pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup) : NULL;
ps->dmrs_config_type = ps->NR_DMRS_UplinkConfig ? ((ps->NR_DMRS_UplinkConfig->dmrs_Type == NULL ? 0 : 1)) : 0; ps->dmrs_config_type = ps->NR_DMRS_UplinkConfig ? ((ps->NR_DMRS_UplinkConfig->dmrs_Type == NULL ? 0 : 1)) : 0;
const pusch_dmrs_AdditionalPosition_t additional_pos = const pusch_dmrs_AdditionalPosition_t additional_pos =
ps->NR_DMRS_UplinkConfig ? (ps->NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == NULL ps->NR_DMRS_UplinkConfig ? (ps->NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == NULL
...@@ -947,13 +912,13 @@ void config_uldci(const NR_SIB1_t *sib1, ...@@ -947,13 +912,13 @@ void config_uldci(const NR_SIB1_t *sib1,
const NR_ServingCellConfigCommon_t *scc, const NR_ServingCellConfigCommon_t *scc,
const nfapi_nr_pusch_pdu_t *pusch_pdu, const nfapi_nr_pusch_pdu_t *pusch_pdu,
dci_pdu_rel15_t *dci_pdu_rel15, dci_pdu_rel15_t *dci_pdu_rel15,
int dci_format,
int time_domain_assignment, int time_domain_assignment,
uint8_t tpc, uint8_t tpc,
int n_ubwp, int n_ubwp,
NR_UE_UL_BWP_t *UBWP) { NR_UE_UL_BWP_t *UBWP) {
int bwp_id = UBWP->bwp_id; int bwp_id = UBWP->bwp_id;
nr_dci_format_t dci_format = UBWP->dci_format;
dci_pdu_rel15->frequency_domain_assignment.val = dci_pdu_rel15->frequency_domain_assignment.val =
PRBalloc_to_locationandbandwidth0(pusch_pdu->rb_size, pusch_pdu->rb_start, UBWP->BWPSize); PRBalloc_to_locationandbandwidth0(pusch_pdu->rb_size, pusch_pdu->rb_start, UBWP->BWPSize);
...@@ -964,9 +929,9 @@ void config_uldci(const NR_SIB1_t *sib1, ...@@ -964,9 +929,9 @@ void config_uldci(const NR_SIB1_t *sib1,
dci_pdu_rel15->rv = pusch_pdu->pusch_data.rv_index; dci_pdu_rel15->rv = pusch_pdu->pusch_data.rv_index;
dci_pdu_rel15->harq_pid = pusch_pdu->pusch_data.harq_process_id; dci_pdu_rel15->harq_pid = pusch_pdu->pusch_data.harq_process_id;
dci_pdu_rel15->tpc = tpc; dci_pdu_rel15->tpc = tpc;
const NR_BWP_UplinkDedicated_t *ubwpd2 = (ubwp) ? ubwp->bwp_Dedicated : ubwpd; NR_PUSCH_Config_t *pusch_Config = UBWP->pusch_Config;
if (ubwpd2) AssertFatal(ubwpd2->pusch_Config->choice.setup->resourceAllocation == NR_PUSCH_Config__resourceAllocation_resourceAllocationType1, if (pusch_Config) AssertFatal(pusch_Config->resourceAllocation == NR_PUSCH_Config__resourceAllocation_resourceAllocationType1,
"Only frequency resource allocation type 1 is currently supported\n"); "Only frequency resource allocation type 1 is currently supported\n");
switch (dci_format) { switch (dci_format) {
case NR_UL_DCI_FORMAT_0_0: case NR_UL_DCI_FORMAT_0_0:
...@@ -978,11 +943,9 @@ void config_uldci(const NR_SIB1_t *sib1, ...@@ -978,11 +943,9 @@ void config_uldci(const NR_SIB1_t *sib1,
// bwp indicator as per table 7.3.1.1.2-1 in 38.212 // bwp indicator as per table 7.3.1.1.2-1 in 38.212
dci_pdu_rel15->bwp_indicator.val = n_ubwp < 4 ? bwp_id : bwp_id - 1; dci_pdu_rel15->bwp_indicator.val = n_ubwp < 4 ? bwp_id : bwp_id - 1;
// SRS resource indicator // SRS resource indicator
if (ubwpd2 && if (pusch_Config &&
ubwpd2->pusch_Config && pusch_Config->txConfig != NULL) {
ubwpd2->pusch_Config->choice.setup && AssertFatal(*pusch_Config->txConfig == NR_PUSCH_Config__txConfig_codebook,
ubwpd2->pusch_Config->choice.setup->txConfig != NULL) {
AssertFatal(*ubwpd2->pusch_Config->choice.setup->txConfig == NR_PUSCH_Config__txConfig_codebook,
"Non Codebook configuration non supported\n"); "Non Codebook configuration non supported\n");
dci_pdu_rel15->srs_resource_indicator.val = 0; // taking resource 0 for SRS dci_pdu_rel15->srs_resource_indicator.val = 0; // taking resource 0 for SRS
} }
...@@ -1102,6 +1065,7 @@ void nr_configure_pucch(const NR_SIB1_t *sib1, ...@@ -1102,6 +1065,7 @@ void nr_configure_pucch(const NR_SIB1_t *sib1,
NR_PUCCH_FormatConfig_t *pucchfmt; NR_PUCCH_FormatConfig_t *pucchfmt;
NR_PUCCH_ResourceId_t *resource_id = NULL; NR_PUCCH_ResourceId_t *resource_id = NULL;
NR_BWP_Uplink_t *bwp = UE->UE_sched_ctrl.active_ubwp; NR_BWP_Uplink_t *bwp = UE->UE_sched_ctrl.active_ubwp;
NR_UE_UL_BWP_t *BWP = &UE->current_UL_BWP;
long *id0 = NULL; long *id0 = NULL;
int n_list, n_set; int n_list, n_set;
...@@ -1113,12 +1077,7 @@ void nr_configure_pucch(const NR_SIB1_t *sib1, ...@@ -1113,12 +1077,7 @@ void nr_configure_pucch(const NR_SIB1_t *sib1,
uint16_t O_uci = O_csi + O_ack; uint16_t O_uci = O_csi + O_ack;
NR_PUSCH_Config_t *pusch_Config = NULL; NR_PUSCH_Config_t *pusch_Config = BWP->pusch_Config;
if(bwp && bwp->bwp_Dedicated && bwp->bwp_Dedicated->pusch_Config) {
pusch_Config = bwp->bwp_Dedicated->pusch_Config->choice.setup;
} else if(bwpd && bwpd->pusch_Config) {
pusch_Config = bwpd->pusch_Config->choice.setup;
}
long *pusch_id = pusch_Config ? pusch_Config->dataScramblingIdentityPUSCH : NULL; long *pusch_id = pusch_Config ? pusch_Config->dataScramblingIdentityPUSCH : NULL;
...@@ -1163,8 +1122,6 @@ void nr_configure_pucch(const NR_SIB1_t *sib1, ...@@ -1163,8 +1122,6 @@ void nr_configure_pucch(const NR_SIB1_t *sib1,
else else
pucch_pdu->hopping_id = *scc->physCellId; pucch_pdu->hopping_id = *scc->physCellId;
NR_UE_UL_BWP_t *BWP = &UE->current_UL_BWP;
pucch_pdu->bwp_size = BWP->BWPSize; pucch_pdu->bwp_size = BWP->BWPSize;
pucch_pdu->bwp_start = BWP->BWPStart; pucch_pdu->bwp_start = BWP->BWPStart;
pucch_pdu->subcarrier_spacing = BWP->scs; pucch_pdu->subcarrier_spacing = BWP->scs;
...@@ -2289,6 +2246,7 @@ void delete_nr_ue_data(NR_UE_info_t *UE, NR_COMMON_channels_t *ccPtr) ...@@ -2289,6 +2246,7 @@ void delete_nr_ue_data(NR_UE_info_t *UE, NR_COMMON_channels_t *ccPtr)
} }
} }
// main function to configure parameters of current BWP
void configure_UE_BWP(gNB_MAC_INST *nr_mac, void configure_UE_BWP(gNB_MAC_INST *nr_mac,
NR_ServingCellConfigCommon_t *scc, NR_ServingCellConfigCommon_t *scc,
NR_UE_sched_ctrl_t *sched_ctrl, NR_UE_sched_ctrl_t *sched_ctrl,
...@@ -2366,22 +2324,30 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac, ...@@ -2366,22 +2324,30 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
ubwpd = servingCellConfig->uplinkConfig->initialUplinkBWP; ubwpd = servingCellConfig->uplinkConfig->initialUplinkBWP;
DL_BWP->pdsch_Config = bwpd->pdsch_Config->choice.setup; DL_BWP->pdsch_Config = bwpd->pdsch_Config->choice.setup;
UL_BWP->pusch_Config = ubwpd->pusch_Config->choice.setup;
} }
else { else {
DL_BWP->bwp_id = 0; DL_BWP->bwp_id = 0;
DL_BWP->bwp_id = 0; DL_BWP->bwp_id = 0;
target_ss = NR_SearchSpace__searchSpaceType_PR_common; target_ss = NR_SearchSpace__searchSpaceType_PR_common;
DL_BWP->pdsch_Config = NULL; DL_BWP->pdsch_Config = NULL;
UL_BWP->pusch_Config = NULL;
} }
if (old_dl_bwp_id != DL_BWP->bwp_id) if (old_dl_bwp_id != DL_BWP->bwp_id)
LOG_I(NR_MAC, "Switching to DL-BWP %li\n", DL_BWP->bwp_id); LOG_I(NR_MAC, "Switching to DL-BWP %li\n", DL_BWP->bwp_id);
// TDA lists
if (DL_BWP->bwp_id>0) if (DL_BWP->bwp_id>0)
DL_BWP->tdaList = dl_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; DL_BWP->tdaList = dl_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
else else
DL_BWP->tdaList = scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; DL_BWP->tdaList = scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
if(UL_BWP->bwp_id>0)
UL_BWP->tdaList = ul_bwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
else
UL_BWP->tdaList = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
// setting generic parameters // setting generic parameters
NR_BWP_t dl_genericParameters = (DL_BWP->bwp_id>0 && dl_bwp) ? NR_BWP_t dl_genericParameters = (DL_BWP->bwp_id>0 && dl_bwp) ?
dl_bwp->bwp_Common->genericParameters: dl_bwp->bwp_Common->genericParameters:
...@@ -2410,7 +2376,12 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac, ...@@ -2410,7 +2376,12 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
DL_BWP->mcsTableIdx = 2; DL_BWP->mcsTableIdx = 2;
} else } else
DL_BWP->mcsTableIdx = 0; DL_BWP->mcsTableIdx = 0;
LOG_D(NR_MAC,"MCS Table Index: %d\n",DL_BWP->mcsTableIdx); LOG_D(NR_MAC,"DL MCS Table Index: %d\n",DL_BWP->mcsTableIdx);
if (UL_BWP->pusch_Config == NULL || !UL_BWP->pusch_Config->transformPrecoder)
UL_BWP->transform_precoding = !scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder;
else
UL_BWP->transform_precoding = *UL_BWP->pusch_Config->transformPrecoder;
if(UE) { if(UE) {
// setting PDCCH related structures for sched_ctrl // setting PDCCH related structures for sched_ctrl
...@@ -2429,6 +2400,14 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac, ...@@ -2429,6 +2400,14 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
scc, scc,
&dl_genericParameters, &dl_genericParameters,
nr_mac->type0_PDCCH_CSS_config); nr_mac->type0_PDCCH_CSS_config);
// set UL DCI format
UL_BWP->dci_format = (sched_ctrl->search_space->searchSpaceType &&
sched_ctrl->search_space->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_ue_Specific) ?
(sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats == NR_SearchSpace__searchSpaceType__ue_Specific__dci_Formats_formats0_1_And_1_1 ?
NR_UL_DCI_FORMAT_0_1 : NR_UL_DCI_FORMAT_0_0) :
NR_UL_DCI_FORMAT_0_0;
} }
if(ra) { if(ra) {
...@@ -2457,7 +2436,23 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac, ...@@ -2457,7 +2436,23 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
scc, scc,
&dl_genericParameters, &dl_genericParameters,
&nr_mac->type0_PDCCH_CSS_config[ra->beam_id]); &nr_mac->type0_PDCCH_CSS_config[ra->beam_id]);
UL_BWP->dci_format = NR_UL_DCI_FORMAT_0_0;
} }
// Set uplink MCS table
long *mcs_Table = NULL;
if (UL_BWP->pusch_Config)
mcs_Table = UL_BWP->transform_precoding ?
UL_BWP->pusch_Config->mcs_Table :
UL_BWP->pusch_Config->mcs_TableTransformPrecoder;
UL_BWP->mcs_table = get_pusch_mcs_table(mcs_Table,
UL_BWP->transform_precoding ? 0 : 1,
UL_BWP->dci_format,
NR_RNTI_C,
target_ss,
false);
} }
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------
...@@ -2951,8 +2946,8 @@ void nr_csirs_scheduling(int Mod_idP, ...@@ -2951,8 +2946,8 @@ void nr_csirs_scheduling(int Mod_idP,
void nr_mac_update_timers(module_id_t module_id, void nr_mac_update_timers(module_id_t module_id,
frame_t frame, frame_t frame,
sub_frame_t slot) { sub_frame_t slot) {
NR_UEs_t *UE_info = &RC.nrmac[module_id]->UE_info;
NR_UEs_t *UE_info = &RC.nrmac[module_id]->UE_info;
UE_iterator(UE_info->list, UE) { UE_iterator(UE_info->list, UE) {
NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl; NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
if (sched_ctrl->rrc_processing_timer > 0) { if (sched_ctrl->rrc_processing_timer > 0) {
...@@ -2960,8 +2955,6 @@ void nr_mac_update_timers(module_id_t module_id, ...@@ -2960,8 +2955,6 @@ void nr_mac_update_timers(module_id_t module_id,
if (sched_ctrl->rrc_processing_timer == 0) { if (sched_ctrl->rrc_processing_timer == 0) {
LOG_I(NR_MAC, "(%d.%d) De-activating RRC processing timer for UE %04x\n", frame, slot, UE->rnti); LOG_I(NR_MAC, "(%d.%d) De-activating RRC processing timer for UE %04x\n", frame, slot, UE->rnti);
const NR_SIB1_t *sib1 = RC.nrmac[module_id]->common_channels[0].sib1 ? RC.nrmac[module_id]->common_channels[0].sib1->message.choice.c1->choice.systemInformationBlockType1 : NULL;
NR_CellGroupConfig_t *cg = NULL; NR_CellGroupConfig_t *cg = NULL;
uper_decode(NULL, uper_decode(NULL,
&asn_DEF_NR_CellGroupConfig, //might be added prefix later &asn_DEF_NR_CellGroupConfig, //might be added prefix later
...@@ -3034,16 +3027,14 @@ void nr_mac_update_timers(module_id_t module_id, ...@@ -3034,16 +3027,14 @@ void nr_mac_update_timers(module_id_t module_id,
} }
NR_pusch_semi_static_t *ups = &sched_ctrl->pusch_semi_static; NR_pusch_semi_static_t *ups = &sched_ctrl->pusch_semi_static;
int dci_format = get_dci_format(sched_ctrl);
const uint8_t num_dmrs_cdm_grps_no_data = (ubwp || ubwpd) ? 1 : 2; const uint8_t num_dmrs_cdm_grps_no_data = (ubwp || ubwpd) ? 1 : 2;
const uint8_t nrOfLayers = 1; const uint8_t nrOfLayers = 1;
const int utda = get_ul_tda(RC.nrmac[module_id], scc, slot); const int utda = get_ul_tda(RC.nrmac[module_id], scc, slot);
nr_set_pusch_semi_static(sib1, nr_set_pusch_semi_static(&UE->current_UL_BWP,
scc, scc,
ubwp, ubwp,
ubwpd, ubwpd,
dci_format,
utda, utda,
num_dmrs_cdm_grps_no_data, num_dmrs_cdm_grps_no_data,
nrOfLayers, nrOfLayers,
......
...@@ -37,15 +37,6 @@ ...@@ -37,15 +37,6 @@
#include "LAYER2/NR_MAC_COMMON/nr_mac_extern.h" #include "LAYER2/NR_MAC_COMMON/nr_mac_extern.h"
int get_dci_format(NR_UE_sched_ctrl_t *sched_ctrl) {
int dci_format = sched_ctrl->search_space && sched_ctrl->search_space->searchSpaceType &&
sched_ctrl->search_space->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_ue_Specific ?
NR_UL_DCI_FORMAT_0_1 : NR_UL_DCI_FORMAT_0_0;
return(dci_format);
}
const int get_ul_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot) { const int get_ul_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot) {
/* there is a mixed slot only when in TDD */ /* there is a mixed slot only when in TDD */
...@@ -760,23 +751,14 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP, ...@@ -760,23 +751,14 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
} }
} }
long get_K2(NR_ServingCellConfigCommon_t *scc, long get_K2(NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList,
NR_ServingCellConfigCommonSIB_t *scc_sib1,
NR_BWP_Uplink_t *ubwp,
int time_domain_assignment, int time_domain_assignment,
int mu) { int mu) {
NR_PUSCH_TimeDomainResourceAllocation_t *tda_list = NULL; NR_PUSCH_TimeDomainResourceAllocation_t *tda = tdaList->list.array[time_domain_assignment];
if(ubwp) {
tda_list = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[time_domain_assignment];
} else if(scc) {
tda_list = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[time_domain_assignment];
} else if(scc_sib1) {
tda_list = scc_sib1->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[time_domain_assignment];
}
if (tda_list->k2) if (tda->k2)
return *tda_list->k2; return *tda->k2;
else if (mu < 2) else if (mu < 2)
return 1; return 1;
else if (mu == 2) else if (mu == 2)
...@@ -857,17 +839,13 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac, ...@@ -857,17 +839,13 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac,
* (re-)transmission */ * (re-)transmission */
NR_pusch_semi_static_t *ps = &sched_ctrl->pusch_semi_static; NR_pusch_semi_static_t *ps = &sched_ctrl->pusch_semi_static;
int dci_format = get_dci_format(sched_ctrl);
if (ps->time_domain_allocation != tda if (ps->time_domain_allocation != tda
|| ps->dci_format != dci_format
|| ps->nrOfLayers != nrOfLayers || ps->nrOfLayers != nrOfLayers
|| ps->num_dmrs_cdm_grps_no_data != num_dmrs_cdm_grps_no_data) { || ps->num_dmrs_cdm_grps_no_data != num_dmrs_cdm_grps_no_data) {
nr_set_pusch_semi_static(sib1, nr_set_pusch_semi_static(&UE->current_UL_BWP,
scc, scc,
sched_ctrl->active_ubwp, sched_ctrl->active_ubwp,
ubwpd, ubwpd,
dci_format,
tda, tda,
num_dmrs_cdm_grps_no_data, num_dmrs_cdm_grps_no_data,
nrOfLayers, nrOfLayers,
...@@ -885,12 +863,10 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac, ...@@ -885,12 +863,10 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac,
LOG_D(NR_MAC, "%s(): retransmission keeping TDA %d and TBS %d\n", __func__, tda, retInfo->tb_size); LOG_D(NR_MAC, "%s(): retransmission keeping TDA %d and TBS %d\n", __func__, tda, retInfo->tb_size);
} else { } else {
NR_pusch_semi_static_t temp_ps; NR_pusch_semi_static_t temp_ps;
int dci_format = get_dci_format(sched_ctrl); nr_set_pusch_semi_static(&UE->current_UL_BWP,
nr_set_pusch_semi_static(sib1,
scc, scc,
sched_ctrl->active_ubwp, sched_ctrl->active_ubwp,
ubwpd, ubwpd,
dci_format,
tda, tda,
num_dmrs_cdm_grps_no_data, num_dmrs_cdm_grps_no_data,
nrOfLayers, nrOfLayers,
...@@ -988,13 +964,13 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac, ...@@ -988,13 +964,13 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac,
return true; return true;
} }
void update_ul_ue_R_Qm(NR_sched_pusch_t *sched_pusch, const NR_pusch_semi_static_t *ps) void update_ul_ue_R_Qm(NR_sched_pusch_t *sched_pusch, const NR_PUSCH_Config_t *pusch_Config, const int mcs_table) {
{
const int mcs = sched_pusch->mcs; const int mcs = sched_pusch->mcs;
sched_pusch->R = nr_get_code_rate_ul(mcs, ps->mcs_table); sched_pusch->R = nr_get_code_rate_ul(mcs, mcs_table);
sched_pusch->Qm = nr_get_Qm_ul(mcs, ps->mcs_table); sched_pusch->Qm = nr_get_Qm_ul(mcs, mcs_table);
if (ps->pusch_Config && ps->pusch_Config->tp_pi2BPSK && ((ps->mcs_table == 3 && mcs < 2) || (ps->mcs_table == 4 && mcs < 6))) { if (pusch_Config && pusch_Config->tp_pi2BPSK && ((mcs_table == 3 && mcs < 2) || (mcs_table == 4 && mcs < 6))) {
sched_pusch->R >>= 1; sched_pusch->R >>= 1;
sched_pusch->Qm <<= 1; sched_pusch->Qm <<= 1;
} }
...@@ -1127,21 +1103,18 @@ void pf_ul(module_id_t module_id, ...@@ -1127,21 +1103,18 @@ void pf_ul(module_id_t module_id,
/* Save PUSCH field */ /* Save PUSCH field */
/* we want to avoid a lengthy deduction of DMRS and other parameters in /* we want to avoid a lengthy deduction of DMRS and other parameters in
* every TTI if we can save it, so check whether dci_format, TDA, or * every TTI if we can save it, so check whether TDA, or
* num_dmrs_cdm_grps_no_data has changed and only then recompute */ * num_dmrs_cdm_grps_no_data has changed and only then recompute */
const uint8_t nrOfLayers = 1; const uint8_t nrOfLayers = 1;
const uint8_t num_dmrs_cdm_grps_no_data = (sched_ctrl->active_ubwp || ubwpd) ? 1 : 2; const uint8_t num_dmrs_cdm_grps_no_data = (sched_ctrl->active_ubwp || ubwpd) ? 1 : 2;
int dci_format = get_dci_format(sched_ctrl);
const int tda = get_ul_tda(nrmac, scc, sched_pusch->slot); const int tda = get_ul_tda(nrmac, scc, sched_pusch->slot);
if (ps->time_domain_allocation != tda if (ps->time_domain_allocation != tda
|| ps->dci_format != dci_format
|| ps->nrOfLayers != nrOfLayers || ps->nrOfLayers != nrOfLayers
|| ps->num_dmrs_cdm_grps_no_data != num_dmrs_cdm_grps_no_data) { || ps->num_dmrs_cdm_grps_no_data != num_dmrs_cdm_grps_no_data) {
nr_set_pusch_semi_static(sib1, nr_set_pusch_semi_static(BWP,
scc, scc,
sched_ctrl->active_ubwp, sched_ctrl->active_ubwp,
ubwpd, ubwpd,
dci_format,
tda, tda,
num_dmrs_cdm_grps_no_data, num_dmrs_cdm_grps_no_data,
nrOfLayers, nrOfLayers,
...@@ -1168,7 +1141,7 @@ void pf_ul(module_id_t module_id, ...@@ -1168,7 +1141,7 @@ void pf_ul(module_id_t module_id,
NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch; NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch;
sched_pusch->mcs = min(nrmac->min_grant_mcs, sched_pusch->mcs); sched_pusch->mcs = min(nrmac->min_grant_mcs, sched_pusch->mcs);
update_ul_ue_R_Qm(sched_pusch, ps); update_ul_ue_R_Qm(sched_pusch, BWP->pusch_Config, BWP->mcs_table);
sched_pusch->rbStart = rbStart; sched_pusch->rbStart = rbStart;
sched_pusch->rbSize = min_rb; sched_pusch->rbSize = min_rb;
sched_pusch->tb_size = nr_compute_tbs(sched_pusch->Qm, sched_pusch->tb_size = nr_compute_tbs(sched_pusch->Qm,
...@@ -1191,7 +1164,7 @@ void pf_ul(module_id_t module_id, ...@@ -1191,7 +1164,7 @@ void pf_ul(module_id_t module_id,
/* Create UE_sched for UEs eligibale for new data transmission*/ /* Create UE_sched for UEs eligibale for new data transmission*/
/* Calculate coefficient*/ /* Calculate coefficient*/
const uint32_t tbs = ul_pf_tbs[ps->mcs_table][sched_pusch->mcs]; const uint32_t tbs = ul_pf_tbs[BWP->mcs_table][sched_pusch->mcs];
float coeff_ue = (float) tbs / UE->ul_thr_ue; float coeff_ue = (float) tbs / UE->ul_thr_ue;
LOG_D(NR_MAC,"rnti %04x b %d, ul_thr_ue %f, tbs %d, coeff_ue %f\n", LOG_D(NR_MAC,"rnti %04x b %d, ul_thr_ue %f, tbs %d, coeff_ue %f\n",
UE->rnti, b, UE->ul_thr_ue, tbs, coeff_ue); UE->rnti, b, UE->ul_thr_ue, tbs, coeff_ue);
...@@ -1249,27 +1222,24 @@ void pf_ul(module_id_t module_id, ...@@ -1249,27 +1222,24 @@ void pf_ul(module_id_t module_id,
/* Save PUSCH field */ /* Save PUSCH field */
/* we want to avoid a lengthy deduction of DMRS and other parameters in /* we want to avoid a lengthy deduction of DMRS and other parameters in
* every TTI if we can save it, so check whether dci_format, TDA, or * every TTI if we can save it, so check whether TDA, or
* num_dmrs_cdm_grps_no_data has changed and only then recompute */ * num_dmrs_cdm_grps_no_data has changed and only then recompute */
const uint8_t nrOfLayers = 1; const uint8_t nrOfLayers = 1;
const uint8_t num_dmrs_cdm_grps_no_data = (sched_ctrl->active_ubwp || ubwpd) ? 1 : 2; const uint8_t num_dmrs_cdm_grps_no_data = (sched_ctrl->active_ubwp || ubwpd) ? 1 : 2;
int dci_format = get_dci_format(sched_ctrl);
const int tda = get_ul_tda(nrmac, scc, sched_pusch->slot); const int tda = get_ul_tda(nrmac, scc, sched_pusch->slot);
if (ps->time_domain_allocation != tda if (ps->time_domain_allocation != tda
|| ps->dci_format != dci_format
|| ps->nrOfLayers != nrOfLayers || ps->nrOfLayers != nrOfLayers
|| ps->num_dmrs_cdm_grps_no_data != num_dmrs_cdm_grps_no_data) { || ps->num_dmrs_cdm_grps_no_data != num_dmrs_cdm_grps_no_data) {
nr_set_pusch_semi_static(sib1, nr_set_pusch_semi_static(BWP,
scc, scc,
sched_ctrl->active_ubwp, sched_ctrl->active_ubwp,
ubwpd, ubwpd,
dci_format,
tda, tda,
num_dmrs_cdm_grps_no_data, num_dmrs_cdm_grps_no_data,
nrOfLayers, nrOfLayers,
ps); ps);
} }
update_ul_ue_R_Qm(sched_pusch, ps); update_ul_ue_R_Qm(sched_pusch, BWP->pusch_Config, BWP->mcs_table);
const uint16_t slbitmap = SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols); const uint16_t slbitmap = SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
while (rbStart < bwpSize && (rballoc_mask[rbStart] & slbitmap) != slbitmap) while (rbStart < bwpSize && (rballoc_mask[rbStart] & slbitmap) != slbitmap)
...@@ -1350,13 +1320,13 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t ...@@ -1350,13 +1320,13 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
NR_UE_UL_BWP_t *BWP = &nr_mac->UE_info.list[0]->current_UL_BWP; NR_UE_UL_BWP_t *BWP = &nr_mac->UE_info.list[0]->current_UL_BWP;
int mu = BWP->scs; int mu = BWP->scs;
const int temp_tda = get_ul_tda(nr_mac, scc, slot); const int temp_tda = get_ul_tda(nr_mac, scc, slot);
int K2 = get_K2(scc, scc_sib1, sched_ctrl->active_ubwp, temp_tda, mu); int K2 = get_K2(BWP->tdaList, temp_tda, mu);
const int sched_frame = (frame + (slot + K2 >= nr_slots_per_frame[mu])) & 1023; const int sched_frame = (frame + (slot + K2 >= nr_slots_per_frame[mu])) & 1023;
const int sched_slot = (slot + K2) % nr_slots_per_frame[mu]; const int sched_slot = (slot + K2) % nr_slots_per_frame[mu];
const int tda = get_ul_tda(nr_mac, scc, sched_slot); const int tda = get_ul_tda(nr_mac, scc, sched_slot);
if (tda < 0) if (tda < 0)
return false; return false;
DevAssert(K2 == get_K2(scc, scc_sib1, sched_ctrl->active_ubwp, tda, mu)); DevAssert(K2 == get_K2(BWP->tdaList, tda, mu));
if (!is_xlsch_in_slot(nr_mac->ulsch_slot_bitmap[sched_slot / 64], sched_slot)) if (!is_xlsch_in_slot(nr_mac->ulsch_slot_bitmap[sched_slot / 64], sched_slot))
return false; return false;
...@@ -1385,9 +1355,9 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t ...@@ -1385,9 +1355,9 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
sched_ctrl->sched_pusch.frame = sched_frame; sched_ctrl->sched_pusch.frame = sched_frame;
UE_iterator(nr_mac->UE_info.list, UE2) { UE_iterator(nr_mac->UE_info.list, UE2) {
NR_UE_sched_ctrl_t *sched_ctrl = &UE2->UE_sched_ctrl; NR_UE_sched_ctrl_t *sched_ctrl = &UE2->UE_sched_ctrl;
AssertFatal(K2 == get_K2(scc,scc_sib1,sched_ctrl->active_ubwp, tda, mu), AssertFatal(K2 == get_K2(BWP->tdaList, tda, mu),
"Different K2, %d(UE%d) != %ld(UE%04x)\n", "Different K2, %d(UE%d) != %ld(UE%04x)\n",
K2, 0, get_K2(scc,scc_sib1,sched_ctrl->active_ubwp, tda, mu), UE2->rnti); K2, 0, get_K2(BWP->tdaList, tda, mu), UE2->rnti);
sched_ctrl->sched_pusch.slot = sched_slot; sched_ctrl->sched_pusch.slot = sched_slot;
sched_ctrl->sched_pusch.frame = sched_frame; sched_ctrl->sched_pusch.frame = sched_frame;
} }
...@@ -1401,17 +1371,7 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t ...@@ -1401,17 +1371,7 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
const uint16_t bwpSize = BWP->BWPSize; const uint16_t bwpSize = BWP->BWPSize;
const uint16_t bwpStart = BWP->BWPStart; const uint16_t bwpStart = BWP->BWPStart;
NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList = NULL; const int startSymbolAndLength = BWP->tdaList->list.array[tda]->startSymbolAndLength;
if (sched_ctrl->active_ubwp) {
tdaList = sched_ctrl->active_ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
} else if (scc) {
tdaList = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
} else {
NR_SIB1_t *sib1 = RC.nrmac[module_id]->common_channels[0].sib1->message.choice.c1->choice.systemInformationBlockType1;
tdaList = sib1->servingCellConfigCommon->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
}
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
int startSymbolIndex, nrOfSymbols; int startSymbolIndex, nrOfSymbols;
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols); SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
const uint16_t symb = SL_to_bitmap(startSymbolIndex, nrOfSymbols); const uint16_t symb = SL_to_bitmap(startSymbolIndex, nrOfSymbols);
...@@ -1651,10 +1611,10 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot) ...@@ -1651,10 +1611,10 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
pusch_pdu->target_code_rate = sched_pusch->R; pusch_pdu->target_code_rate = sched_pusch->R;
pusch_pdu->qam_mod_order = sched_pusch->Qm; pusch_pdu->qam_mod_order = sched_pusch->Qm;
pusch_pdu->mcs_index = sched_pusch->mcs; pusch_pdu->mcs_index = sched_pusch->mcs;
pusch_pdu->mcs_table = ps->mcs_table; pusch_pdu->mcs_table = current_BWP->mcs_table;
pusch_pdu->transform_precoding = ps->transform_precoding; pusch_pdu->transform_precoding = current_BWP->transform_precoding;
if (ps->pusch_Config && ps->pusch_Config->dataScramblingIdentityPUSCH) if (current_BWP->pusch_Config && current_BWP->pusch_Config->dataScramblingIdentityPUSCH)
pusch_pdu->data_scrambling_id = *ps->pusch_Config->dataScramblingIdentityPUSCH; pusch_pdu->data_scrambling_id = *current_BWP->pusch_Config->dataScramblingIdentityPUSCH;
else else
pusch_pdu->data_scrambling_id = *scc->physCellId; pusch_pdu->data_scrambling_id = *scc->physCellId;
pusch_pdu->nrOfLayers = ps->nrOfLayers; pusch_pdu->nrOfLayers = ps->nrOfLayers;
...@@ -1690,7 +1650,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot) ...@@ -1690,7 +1650,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
pusch_pdu->rb_start = sched_pusch->rbStart; pusch_pdu->rb_start = sched_pusch->rbStart;
pusch_pdu->rb_size = sched_pusch->rbSize; pusch_pdu->rb_size = sched_pusch->rbSize;
pusch_pdu->vrb_to_prb_mapping = 0; pusch_pdu->vrb_to_prb_mapping = 0;
if (ps->pusch_Config==NULL || ps->pusch_Config->frequencyHopping==NULL) if (current_BWP->pusch_Config==NULL || current_BWP->pusch_Config->frequencyHopping==NULL)
pusch_pdu->frequency_hopping = 0; pusch_pdu->frequency_hopping = 0;
else else
pusch_pdu->frequency_hopping = 1; pusch_pdu->frequency_hopping = 1;
...@@ -1724,7 +1684,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot) ...@@ -1724,7 +1684,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
else else
AssertFatal(1==0,"SequenceGroupHopping or sequenceHopping are NOT Supported\n"); AssertFatal(1==0,"SequenceGroupHopping or sequenceHopping are NOT Supported\n");
LOG_D(NR_MAC,"TRANSFORM PRECODING IS ENABLED. CDM groups: %d, U: %d MCS table: %d\n", pusch_pdu->num_dmrs_cdm_grps_no_data, pusch_pdu->dfts_ofdm.low_papr_group_number, ps->mcs_table); LOG_D(NR_MAC,"TRANSFORM PRECODING IS ENABLED. CDM groups: %d, U: %d MCS table: %d\n", pusch_pdu->num_dmrs_cdm_grps_no_data, pusch_pdu->dfts_ofdm.low_papr_group_number, current_BWP->mcs_table);
} }
/*-----------------------------------------------------------------------------*/ /*-----------------------------------------------------------------------------*/
...@@ -1799,7 +1759,6 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot) ...@@ -1799,7 +1759,6 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
scc, scc,
pusch_pdu, pusch_pdu,
&uldci_payload, &uldci_payload,
ps->dci_format,
ps->time_domain_allocation, ps->time_domain_allocation,
UE->UE_sched_ctrl.tpc0, UE->UE_sched_ctrl.tpc0,
n_ubwp, n_ubwp,
...@@ -1809,7 +1768,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot) ...@@ -1809,7 +1768,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
&UE->current_DL_BWP, &UE->current_DL_BWP,
dci_pdu, dci_pdu,
&uldci_payload, &uldci_payload,
ps->dci_format, current_BWP->dci_format,
rnti_types[0], rnti_types[0],
pusch_pdu->bwp_size, pusch_pdu->bwp_size,
current_BWP->bwp_id, current_BWP->bwp_id,
......
...@@ -197,7 +197,6 @@ void config_uldci(const NR_SIB1_t *sib1, ...@@ -197,7 +197,6 @@ void config_uldci(const NR_SIB1_t *sib1,
const NR_ServingCellConfigCommon_t *scc, const NR_ServingCellConfigCommon_t *scc,
const nfapi_nr_pusch_pdu_t *pusch_pdu, const nfapi_nr_pusch_pdu_t *pusch_pdu,
dci_pdu_rel15_t *dci_pdu_rel15, dci_pdu_rel15_t *dci_pdu_rel15,
int dci_format,
int time_domain_assignment, int time_domain_assignment,
uint8_t tpc, uint8_t tpc,
int n_ubwp, int n_ubwp,
...@@ -333,9 +332,7 @@ NR_SearchSpace_t *get_searchspace(NR_ServingCellConfigCommon_t *scc, ...@@ -333,9 +332,7 @@ NR_SearchSpace_t *get_searchspace(NR_ServingCellConfigCommon_t *scc,
NR_BWP_DownlinkDedicated_t *bwp_Dedicated, NR_BWP_DownlinkDedicated_t *bwp_Dedicated,
NR_SearchSpace__searchSpaceType_PR target_ss); NR_SearchSpace__searchSpaceType_PR target_ss);
long get_K2(NR_ServingCellConfigCommon_t *scc, long get_K2(NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList,
NR_ServingCellConfigCommonSIB_t *scc_sib1,
NR_BWP_Uplink_t *ubwp,
int time_domain_assignment, int time_domain_assignment,
int mu); int mu);
...@@ -347,11 +344,10 @@ void nr_set_pdsch_semi_static(const NR_UE_DL_BWP_t *BWP, ...@@ -347,11 +344,10 @@ void nr_set_pdsch_semi_static(const NR_UE_DL_BWP_t *BWP,
NR_UE_sched_ctrl_t *sched_ctrl, NR_UE_sched_ctrl_t *sched_ctrl,
NR_pdsch_semi_static_t *ps); NR_pdsch_semi_static_t *ps);
void nr_set_pusch_semi_static(const NR_SIB1_t *sib1, void nr_set_pusch_semi_static(const NR_UE_UL_BWP_t *BWP,
const NR_ServingCellConfigCommon_t *scc, const NR_ServingCellConfigCommon_t *scc,
const NR_BWP_Uplink_t *ubwp, const NR_BWP_Uplink_t *ubwp,
const NR_BWP_UplinkDedicated_t *ubwpd, const NR_BWP_UplinkDedicated_t *ubwpd,
long dci_format,
int tda, int tda,
uint8_t num_dmrs_cdm_grps_no_data, uint8_t num_dmrs_cdm_grps_no_data,
uint8_t nrOfLayers, uint8_t nrOfLayers,
...@@ -499,7 +495,6 @@ uint8_t get_mcs_from_cqi(int mcs_table, int cqi_table, int cqi_idx); ...@@ -499,7 +495,6 @@ uint8_t get_mcs_from_cqi(int mcs_table, int cqi_table, int cqi_idx);
uint8_t set_dl_nrOfLayers(NR_UE_sched_ctrl_t *sched_ctrl); uint8_t set_dl_nrOfLayers(NR_UE_sched_ctrl_t *sched_ctrl);
int get_dci_format(NR_UE_sched_ctrl_t *sched_ctrl);
const int get_dl_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot); const int get_dl_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot);
const int get_ul_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot); const int get_ul_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot);
......
...@@ -109,6 +109,11 @@ typedef struct NR_UE_UL_BWP { ...@@ -109,6 +109,11 @@ typedef struct NR_UE_UL_BWP {
long *cyclicprefix; long *cyclicprefix;
uint16_t BWPSize; uint16_t BWPSize;
uint16_t BWPStart; uint16_t BWPStart;
NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList;
NR_PUSCH_Config_t *pusch_Config;
uint8_t transform_precoding;
uint8_t mcs_table;
nr_dci_format_t dci_format;
} NR_UE_UL_BWP_t; } NR_UE_UL_BWP_t;
typedef enum { typedef enum {
...@@ -364,18 +369,11 @@ typedef struct NR_sched_pucch { ...@@ -364,18 +369,11 @@ typedef struct NR_sched_pucch {
* recalculate all S/L, MCS table, or DMRS-related parameters over and over * recalculate all S/L, MCS table, or DMRS-related parameters over and over
* again. Hence, we store them in this struct for easy reference. */ * again. Hence, we store them in this struct for easy reference. */
typedef struct NR_pusch_semi_static_t { typedef struct NR_pusch_semi_static_t {
int dci_format;
int time_domain_allocation; int time_domain_allocation;
uint8_t nrOfLayers; uint8_t nrOfLayers;
uint8_t num_dmrs_cdm_grps_no_data; uint8_t num_dmrs_cdm_grps_no_data;
int startSymbolIndex; int startSymbolIndex;
int nrOfSymbols; int nrOfSymbols;
NR_PUSCH_Config_t *pusch_Config;
uint8_t transform_precoding;
uint8_t mcs_table;
long mapping_type; long mapping_type;
NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig; NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig;
uint16_t dmrs_config_type; uint16_t dmrs_config_type;
......
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