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littleBu
OpenXG-RAN
Commits
b4398164
Commit
b4398164
authored
Feb 06, 2025
by
francescomani
Browse files
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Plain Diff
use frame structure parameter for slots per frame
parent
ff58b5e1
Changes
11
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Showing
11 changed files
with
150 additions
and
179 deletions
+150
-179
openair2/LAYER2/NR_MAC_gNB/config.c
openair2/LAYER2/NR_MAC_gNB/config.c
+1
-1
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+10
-15
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+38
-38
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
+7
-8
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+8
-34
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+6
-8
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+4
-4
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c
+15
-18
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
+26
-14
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+32
-34
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+3
-5
No files found.
openair2/LAYER2/NR_MAC_gNB/config.c
View file @
b4398164
...
...
@@ -519,7 +519,7 @@ void config_frame_structure(int mu,
}
else
{
// FDD
fs
->
is_tdd
=
false
;
fs
->
numb_period_frame
=
1
;
fs
->
numb_slots_period
=
nr_slots_per_frame
[
mu
]
;
fs
->
numb_slots_period
=
fs
->
numb_slots_frame
;
}
AssertFatal
(
fs
->
numb_period_frame
>
0
,
"Frame configuration cannot be configured!
\n
"
);
}
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
View file @
b4398164
...
...
@@ -64,10 +64,7 @@ void clear_nr_nfapi_information(gNB_MAC_INST *gNB,
nfapi_nr_ul_dci_request_t
*
UL_dci_req
)
{
/* called below and in simulators, so we assume a lock but don't require it */
NR_ServingCellConfigCommon_t
*
scc
=
gNB
->
common_channels
->
ServingCellConfigCommon
;
const
int
num_slots
=
nr_slots_per_frame
[
*
scc
->
ssbSubcarrierSpacing
];
const
int
num_slots
=
gNB
->
frame_structure
.
numb_slots_frame
;
UL_tti_req_ahead_initialization
(
gNB
,
num_slots
,
CC_idP
,
frameP
,
slotP
);
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
**
pdcch
=
(
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
**
)
gNB
->
pdcch_pdu_idx
[
CC_idP
];
...
...
@@ -103,14 +100,13 @@ void clear_nr_nfapi_information(gNB_MAC_INST *gNB,
TX_req
[
CC_idP
].
Number_of_PDUs
=
0
;
}
void
clear_beam_information
(
NR_beam_info_t
*
beam_info
,
int
frame
,
int
slot
,
int
mu
)
static
void
clear_beam_information
(
NR_beam_info_t
*
beam_info
,
int
frame
,
int
slot
,
int
slots_per_frame
)
{
// for now we use the same logic of UL_tti_req_ahead
// reset after 1 frame with the exception of 15kHz
if
(
!
beam_info
->
beam_allocation
)
return
;
// initialization done only once
const
int
slots_per_frame
=
nr_slots_per_frame
[
mu
];
AssertFatal
(
beam_info
->
beam_allocation_size
>=
0
,
"Beam information not initialized
\n
"
);
int
idx_to_clear
=
(
frame
*
slots_per_frame
+
slot
)
/
beam_info
->
beam_duration
;
idx_to_clear
=
(
idx_to_clear
+
beam_info
->
beam_allocation_size
-
1
)
%
beam_info
->
beam_allocation_size
;
...
...
@@ -215,8 +211,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frame, sub_frame_
NR_ServingCellConfigCommon_t
*
scc
=
cc
->
ServingCellConfigCommon
;
NR_SCHED_LOCK
(
&
gNB
->
sched_lock
);
clear_beam_information
(
&
gNB
->
beam_info
,
frame
,
slot
,
*
scc
->
ssbSubcarrierSpacing
);
int
slots_frame
=
gNB
->
frame_structure
.
numb_slots_frame
;
clear_beam_information
(
&
gNB
->
beam_info
,
frame
,
slot
,
slots_frame
);
gNB
->
frame
=
frame
;
start_meas
(
&
gNB
->
eNB_scheduler
);
...
...
@@ -240,9 +236,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frame, sub_frame_
for
(
int
i
=
0
;
i
<
num_beams
;
i
++
)
memset
(
cc
[
CC_id
].
vrb_map
[
i
],
0
,
sizeof
(
uint16_t
)
*
MAX_BWP_SIZE
);
// clear last scheduled slot's content (only)!
const
int
num_slots
=
nr_slots_per_frame
[
*
scc
->
ssbSubcarrierSpacing
];
const
int
size
=
gNB
->
vrb_map_UL_size
;
const
int
prev_slot
=
frame
*
num_slots
+
slot
+
size
-
1
;
const
int
prev_slot
=
frame
*
slots_frame
+
slot
+
size
-
1
;
for
(
int
i
=
0
;
i
<
num_beams
;
i
++
)
{
uint16_t
*
vrb_map_UL
=
cc
[
CC_id
].
vrb_map_UL
[
i
];
memcpy
(
&
vrb_map_UL
[
prev_slot
%
size
*
MAX_BWP_SIZE
],
&
gNB
->
ulprbbl
,
sizeof
(
uint16_t
)
*
MAX_BWP_SIZE
);
...
...
@@ -277,14 +272,14 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frame, sub_frame_
slot, because otherwise we would allocate the current slot in
UL_tti_req_ahead), but be aware that, e.g., K2 is allowed to be larger
(schedule_nr_prach will assert if resources are not free). */
const
sub_frame_t
n_slots_ahead
=
nr_slots_per_frame
[
*
scc
->
ssbSubcarrierSpacing
]
-
1
+
get_NTN_Koffset
(
scc
);
const
frame_t
f
=
(
frame
+
(
slot
+
n_slots_ahead
)
/
nr_slots_per_frame
[
*
scc
->
ssbSubcarrierSpacing
]
)
%
1024
;
const
sub_frame_t
s
=
(
slot
+
n_slots_ahead
)
%
nr_slots_per_frame
[
*
scc
->
ssbSubcarrierSpacing
]
;
const
sub_frame_t
n_slots_ahead
=
slots_frame
-
1
+
get_NTN_Koffset
(
scc
);
const
frame_t
f
=
(
frame
+
(
slot
+
n_slots_ahead
)
/
slots_frame
)
%
1024
;
const
sub_frame_t
s
=
(
slot
+
n_slots_ahead
)
%
slots_frame
;
schedule_nr_prach
(
module_idP
,
f
,
s
);
}
// Schedule CSI-RS transmission
nr_csirs_scheduling
(
module_idP
,
frame
,
slot
,
nr_slots_per_frame
[
*
scc
->
ssbSubcarrierSpacing
],
&
sched_info
->
DL_req
);
nr_csirs_scheduling
(
module_idP
,
frame
,
slot
,
&
sched_info
->
DL_req
);
// Schedule CSI measurement reporting
nr_csi_meas_reporting
(
module_idP
,
frame
,
slot
);
...
...
@@ -313,7 +308,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frame, sub_frame_
* is more than 1 CC supported?
*/
AssertFatal
(
MAX_NUM_CCs
==
1
,
"only 1 CC supported
\n
"
);
const
int
current_index
=
ul_buffer_index
(
frame
,
slot
,
*
scc
->
ssbSubcarrierSpacing
,
gNB
->
UL_tti_req_ahead_size
);
const
int
current_index
=
ul_buffer_index
(
frame
,
slot
,
slots_frame
,
gNB
->
UL_tti_req_ahead_size
);
copy_ul_tti_req
(
&
sched_info
->
UL_tti_req
,
&
gNB
->
UL_tti_req_ahead
[
0
][
current_index
]);
stop_meas
(
&
gNB
->
eNB_scheduler
);
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
View file @
b4398164
...
...
@@ -264,14 +264,11 @@ static void schedule_nr_MsgA_pusch(NR_UplinkConfigCommon_t *uplinkConfigCommon,
NR_MsgA_PUSCH_Resource_r16_t
*
msgA_PUSCH_Resource
=
uplinkConfigCommon
->
initialUplinkBWP
->
ext1
->
msgA_ConfigCommon_r16
->
choice
.
setup
->
msgA_PUSCH_Config_r16
->
msgA_PUSCH_ResourceGroupA_r16
;
int
mu
=
nr_get_prach_mu
(
uplinkConfigCommon
->
initialUplinkBWP
->
ext1
->
msgA_ConfigCommon_r16
->
choice
.
setup
,
uplinkConfigCommon
->
initialUplinkBWP
->
rach_ConfigCommon
->
choice
.
setup
);
const
int
n_slots_frame
=
nr_slots_per_frame
[
mu
];
const
int
n_slots_frame
=
nr_mac
->
frame_structure
.
numb_slots_frame
;
slot_t
msgA_pusch_slot
=
(
slotP
+
msgA_PUSCH_Resource
->
msgA_PUSCH_TimeDomainOffset_r16
)
%
n_slots_frame
;
frame_t
msgA_pusch_frame
=
(
frameP
+
((
slotP
+
msgA_PUSCH_Resource
->
msgA_PUSCH_TimeDomainOffset_r16
)
/
n_slots_frame
))
%
1024
;
int
index
=
ul_buffer_index
((
int
)
msgA_pusch_frame
,
(
int
)
msgA_pusch_slot
,
mu
,
nr_mac
->
UL_tti_req_ahead_size
);
int
index
=
ul_buffer_index
((
int
)
msgA_pusch_frame
,
(
int
)
msgA_pusch_slot
,
n_slots_frame
,
nr_mac
->
UL_tti_req_ahead_size
);
nfapi_nr_ul_tti_request_t
*
UL_tti_req
=
&
nr_mac
[
module_idP
].
UL_tti_req_ahead
[
0
][
index
];
UL_tti_req
->
SFN
=
msgA_pusch_frame
;
...
...
@@ -370,7 +367,8 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
if
(
scc
->
uplinkConfigCommon
->
initialUplinkBWP
->
ext1
&&
scc
->
uplinkConfigCommon
->
initialUplinkBWP
->
ext1
->
msgA_ConfigCommon_r16
)
msgacc
=
scc
->
uplinkConfigCommon
->
initialUplinkBWP
->
ext1
->
msgA_ConfigCommon_r16
->
choice
.
setup
;
int
mu
=
nr_get_prach_mu
(
msgacc
,
rach_ConfigCommon
);
int
index
=
ul_buffer_index
(
frameP
,
slotP
,
mu
,
gNB
->
UL_tti_req_ahead_size
);
int
slots_frame
=
gNB
->
frame_structure
.
numb_slots_frame
;
int
index
=
ul_buffer_index
(
frameP
,
slotP
,
slots_frame
,
gNB
->
UL_tti_req_ahead_size
);
nfapi_nr_ul_tti_request_t
*
UL_tti_req
=
&
RC
.
nrmac
[
module_idP
]
->
UL_tti_req_ahead
[
0
][
index
];
nfapi_nr_config_request_scf_t
*
cfg
=
&
RC
.
nrmac
[
module_idP
]
->
config
[
0
];
...
...
@@ -435,7 +433,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
// fapi beam index
beam_index
=
get_fapi_beamforming_index
(
gNB
,
cc
->
ssb_index
[
n_ssb
]);
// multi-beam allocation structure
beam
=
beam_allocation_procedure
(
&
gNB
->
beam_info
,
frameP
,
slotP
,
beam_index
,
nr_slots_per_frame
[
mu
]
);
beam
=
beam_allocation_procedure
(
&
gNB
->
beam_info
,
frameP
,
slotP
,
beam_index
,
slots_frame
);
AssertFatal
(
beam
.
idx
>=
0
,
"Cannot allocate PRACH corresponding to %d SSB transmitted in any available beam
\n
"
,
n_ssb
+
1
);
}
else
{
...
...
@@ -444,7 +442,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
// fapi beam index
beam_index
=
get_fapi_beamforming_index
(
gNB
,
cc
->
ssb_index
[
j
]);
// multi-beam allocation structure
beam
=
beam_allocation_procedure
(
&
gNB
->
beam_info
,
frameP
,
slotP
,
beam_index
,
nr_slots_per_frame
[
mu
]
);
beam
=
beam_allocation_procedure
(
&
gNB
->
beam_info
,
frameP
,
slotP
,
beam_index
,
slots_frame
);
AssertFatal
(
beam
.
idx
>=
0
,
"Cannot allocate PRACH corresponding to SSB %d in any available beam
\n
"
,
j
);
}
}
...
...
@@ -556,7 +554,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
// block resources in vrb_map_UL
const
int
mu_pusch
=
scc
->
uplinkConfigCommon
->
frequencyInfoUL
->
scs_SpecificCarrierList
.
list
.
array
[
0
]
->
subcarrierSpacing
;
const
int16_t
n_ra_rb
=
get_N_RA_RB
(
cfg
->
prach_config
.
prach_sub_c_spacing
.
value
,
mu_pusch
);
index
=
ul_buffer_index
(
frameP
,
slotP
,
mu
,
gNB
->
vrb_map_UL_size
);
index
=
ul_buffer_index
(
frameP
,
slotP
,
slots_frame
,
gNB
->
vrb_map_UL_size
);
uint16_t
*
vrb_map_UL
=
&
cc
->
vrb_map_UL
[
beam
.
idx
][
index
*
MAX_BWP_SIZE
];
for
(
int
i
=
0
;
i
<
n_ra_rb
*
fdm
;
++
i
)
{
AssertFatal
(
...
...
@@ -781,18 +779,18 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
NR_PUSCH_TimeDomainResourceAllocationList_t
*
pusch_TimeDomainAllocationList
=
ul_bwp
->
tdaList_Common
;
int
mu
=
ul_bwp
->
scs
;
int
slots_frame
=
nr_mac
->
frame_structure
.
numb_slots_frame
;
uint16_t
K2
=
*
pusch_TimeDomainAllocationList
->
list
.
array
[
ra
->
Msg3_tda_id
]
->
k2
+
get_NTN_Koffset
(
scc
);
const
int
sched_frame
=
(
frame
+
(
slot
+
K2
)
/
nr_slots_per_frame
[
mu
]
)
%
MAX_FRAME_NUMBER
;
const
int
sched_slot
=
(
slot
+
K2
)
%
nr_slots_per_frame
[
mu
]
;
const
int
sched_frame
=
(
frame
+
(
slot
+
K2
)
/
slots_frame
)
%
MAX_FRAME_NUMBER
;
const
int
sched_slot
=
(
slot
+
K2
)
%
slots_frame
;
if
(
is_ul_slot
(
sched_slot
,
&
nr_mac
->
frame_structure
))
{
const
int
n_slots_frame
=
nr_slots_per_frame
[
mu
];
NR_beam_alloc_t
beam_ul
=
beam_allocation_procedure
(
&
nr_mac
->
beam_info
,
sched_frame
,
sched_slot
,
ra
->
beam_id
,
n_slots_frame
);
NR_beam_alloc_t
beam_ul
=
beam_allocation_procedure
(
&
nr_mac
->
beam_info
,
sched_frame
,
sched_slot
,
ra
->
beam_id
,
slots_frame
);
if
(
beam_ul
.
idx
<
0
)
return
;
NR_beam_alloc_t
beam_dci
=
beam_allocation_procedure
(
&
nr_mac
->
beam_info
,
frame
,
slot
,
ra
->
beam_id
,
n_
slots_frame
);
NR_beam_alloc_t
beam_dci
=
beam_allocation_procedure
(
&
nr_mac
->
beam_info
,
frame
,
slot
,
ra
->
beam_id
,
slots_frame
);
if
(
beam_dci
.
idx
<
0
)
{
reset_beam_status
(
&
nr_mac
->
beam_info
,
sched_frame
,
sched_slot
,
ra
->
beam_id
,
n_
slots_frame
,
beam_ul
.
new_beam
);
reset_beam_status
(
&
nr_mac
->
beam_info
,
sched_frame
,
sched_slot
,
ra
->
beam_id
,
slots_frame
,
beam_ul
.
new_beam
);
return
;
}
int
fh
=
0
;
...
...
@@ -801,7 +799,7 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
SLIV2SL
(
startSymbolAndLength
,
&
StartSymbolIndex
,
&
NrOfSymbols
);
int
mappingtype
=
pusch_TimeDomainAllocationList
->
list
.
array
[
ra
->
Msg3_tda_id
]
->
mappingType
;
int
buffer_index
=
ul_buffer_index
(
sched_frame
,
sched_slot
,
mu
,
nr_mac
->
vrb_map_UL_size
);
int
buffer_index
=
ul_buffer_index
(
sched_frame
,
sched_slot
,
slots_frame
,
nr_mac
->
vrb_map_UL_size
);
uint16_t
*
vrb_map_UL
=
&
nr_mac
->
common_channels
[
CC_id
].
vrb_map_UL
[
beam_ul
.
idx
][
buffer_index
*
MAX_BWP_SIZE
];
const
int
BWPSize
=
sc_info
->
initial_ul_BWPSize
;
...
...
@@ -828,7 +826,7 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
sched_frame
,
sched_slot
);
buffer_index
=
ul_buffer_index
(
sched_frame
,
sched_slot
,
mu
,
nr_mac
->
UL_tti_req_ahead_size
);
buffer_index
=
ul_buffer_index
(
sched_frame
,
sched_slot
,
slots_frame
,
nr_mac
->
UL_tti_req_ahead_size
);
nfapi_nr_ul_tti_request_t
*
future_ul_tti_req
=
&
nr_mac
->
UL_tti_req_ahead
[
CC_id
][
buffer_index
];
AssertFatal
(
future_ul_tti_req
->
SFN
==
sched_frame
&&
future_ul_tti_req
->
Slot
==
sched_slot
,
...
...
@@ -1023,7 +1021,6 @@ static bool nr_get_Msg3alloc(gNB_MAC_INST *mac, int CC_id, int current_slot, fra
NR_UE_ServingCell_Info_t
*
sc_info
=
&
ra
->
sc_info
;
const
NR_PUSCH_TimeDomainResourceAllocationList_t
*
pusch_TimeDomainAllocationList
=
ul_bwp
->
tdaList_Common
;
int
mu
=
ul_bwp
->
scs
;
int
startSymbolAndLength
=
pusch_TimeDomainAllocationList
->
list
.
array
[
ra
->
Msg3_tda_id
]
->
startSymbolAndLength
;
SLIV2SL
(
startSymbolAndLength
,
&
ra
->
msg3_startsymb
,
&
ra
->
msg3_nbSymb
);
...
...
@@ -1036,7 +1033,10 @@ static bool nr_get_Msg3alloc(gNB_MAC_INST *mac, int CC_id, int current_slot, fra
current_frame
,
current_slot
,
ra
->
Msg3_tda_id
);
const
int
buffer_index
=
ul_buffer_index
(
ra
->
Msg3_frame
,
ra
->
Msg3_slot
,
mu
,
mac
->
vrb_map_UL_size
);
const
int
buffer_index
=
ul_buffer_index
(
ra
->
Msg3_frame
,
ra
->
Msg3_slot
,
mac
->
frame_structure
.
numb_slots_frame
,
mac
->
vrb_map_UL_size
);
uint16_t
*
vrb_map_UL
=
&
mac
->
common_channels
[
CC_id
].
vrb_map_UL
[
ra
->
Msg3_beam
.
idx
][
buffer_index
*
MAX_BWP_SIZE
];
int
bwpSize
=
sc_info
->
initial_ul_BWPSize
;
...
...
@@ -1180,9 +1180,9 @@ static void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_f
return
;
}
const
int
scs
=
ul_bwp
->
scs
;
const
uint16_t
mask
=
SL_to_bitmap
(
ra
->
msg3_startsymb
,
ra
->
msg3_nbSymb
);
int
buffer_index
=
ul_buffer_index
(
ra
->
Msg3_frame
,
ra
->
Msg3_slot
,
scs
,
mac
->
vrb_map_UL_size
);
int
slots_frame
=
mac
->
frame_structure
.
numb_slots_frame
;
int
buffer_index
=
ul_buffer_index
(
ra
->
Msg3_frame
,
ra
->
Msg3_slot
,
slots_frame
,
mac
->
vrb_map_UL_size
);
uint16_t
*
vrb_map_UL
=
&
RC
.
nrmac
[
module_idP
]
->
common_channels
[
CC_id
].
vrb_map_UL
[
ra
->
Msg3_beam
.
idx
][
buffer_index
*
MAX_BWP_SIZE
];
for
(
int
i
=
0
;
i
<
ra
->
msg3_nb_rb
;
++
i
)
{
AssertFatal
(
!
(
vrb_map_UL
[
i
+
ra
->
msg3_first_rb
+
ra
->
msg3_bwp_start
]
&
mask
),
...
...
@@ -1194,7 +1194,7 @@ static void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_f
}
LOG_D
(
NR_MAC
,
"UE %04x: %d.%d RA is active, Msg3 in (%d,%d)
\n
"
,
ra
->
rnti
,
frameP
,
slotP
,
ra
->
Msg3_frame
,
ra
->
Msg3_slot
);
buffer_index
=
ul_buffer_index
(
ra
->
Msg3_frame
,
ra
->
Msg3_slot
,
s
cs
,
mac
->
UL_tti_req_ahead_size
);
buffer_index
=
ul_buffer_index
(
ra
->
Msg3_frame
,
ra
->
Msg3_slot
,
s
lots_frame
,
mac
->
UL_tti_req_ahead_size
);
nfapi_nr_ul_tti_request_t
*
future_ul_tti_req
=
&
RC
.
nrmac
[
module_idP
]
->
UL_tti_req_ahead
[
CC_id
][
buffer_index
];
AssertFatal
(
future_ul_tti_req
->
SFN
==
ra
->
Msg3_frame
&&
future_ul_tti_req
->
Slot
==
ra
->
Msg3_slot
,
...
...
@@ -1224,7 +1224,7 @@ static void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_f
ra
->
msg3_first_rb
,
ra
->
msg3_round
);
fill_msg3_pusch_pdu
(
pusch_pdu
,
scc
,
ra
,
startSymbolAndLength
,
scs
,
ibwp_size
,
ra
->
msg3_bwp_start
,
mappingtype
,
fh
);
fill_msg3_pusch_pdu
(
pusch_pdu
,
scc
,
ra
,
startSymbolAndLength
,
ul_bwp
->
scs
,
ibwp_size
,
ra
->
msg3_bwp_start
,
mappingtype
,
fh
);
future_ul_tti_req
->
n_pdus
+=
1
;
// calling function to fill rar message
...
...
@@ -1301,14 +1301,12 @@ static void find_monitoring_periodicity_offset_common(const NR_SearchSpace_t *ss
}
}
static
bool
check_msg2_monitoring
(
const
NR_RA_t
*
ra
,
int
mu
,
int
current_frame
,
int
current_slot
)
static
bool
check_msg2_monitoring
(
const
NR_RA_t
*
ra
,
int
slots_per_frame
,
int
current_frame
,
int
current_slot
)
{
int
n
=
nr_slots_per_frame
[
mu
];
// check if the slot is not among the PDCCH monitored ones (38.213 10.1)
uint16_t
monitoring_slot_period
,
monitoring_offset
;
find_monitoring_periodicity_offset_common
(
ra
->
ra_ss
,
&
monitoring_slot_period
,
&
monitoring_offset
);
if
((
current_frame
*
n
+
current_slot
-
monitoring_offset
)
%
monitoring_slot_period
!=
0
)
if
((
current_frame
*
slots_per_frame
+
current_slot
-
monitoring_offset
)
%
monitoring_slot_period
!=
0
)
return
false
;
return
true
;
}
...
...
@@ -1347,14 +1345,17 @@ static int get_response_window(e_NR_RACH_ConfigGeneric__ra_ResponseWindow respon
return
slots
;
}
static
bool
msg2_in_response_window
(
int
rach_frame
,
int
rach_slot
,
int
mu
,
long
rrc_ra_ResponseWindow
,
int
current_frame
,
int
current_slot
)
static
bool
msg2_in_response_window
(
int
rach_frame
,
int
rach_slot
,
int
n_slots_frame
,
long
rrc_ra_ResponseWindow
,
int
current_frame
,
int
current_slot
)
{
int
window_slots
=
get_response_window
(
rrc_ra_ResponseWindow
);
int
n
=
nr_slots_per_frame
[
mu
];
int
abs_rach
=
n
*
rach_frame
+
rach_slot
;
int
abs_now
=
n
*
current_frame
+
current_slot
;
int
diff
=
(
n
*
1024
+
abs_now
-
abs_rach
)
%
(
n
*
1024
);
int
abs_rach
=
n_slots_frame
*
rach_frame
+
rach_slot
;
int
abs_now
=
n_slots_frame
*
current_frame
+
current_slot
;
int
diff
=
(
n_slots_frame
*
1024
+
abs_now
-
abs_rach
)
%
(
n_slots_frame
*
1024
);
bool
in_window
=
diff
<=
window_slots
;
if
(
!
in_window
)
{
...
...
@@ -1393,18 +1394,17 @@ static void nr_generate_Msg2(module_id_t module_idP,
long
rrc_ra_ResponseWindow
=
scc
->
uplinkConfigCommon
->
initialUplinkBWP
->
rach_ConfigCommon
->
choice
.
setup
->
rach_ConfigGeneric
.
ra_ResponseWindow
;
if
(
!
msg2_in_response_window
(
ra
->
preamble_frame
,
ra
->
preamble_slot
,
dl_bwp
->
scs
,
rrc_ra_ResponseWindow
,
frameP
,
slotP
))
{
const
int
n_slots_frame
=
nr_mac
->
frame_structure
.
numb_slots_frame
;
if
(
!
msg2_in_response_window
(
ra
->
preamble_frame
,
ra
->
preamble_slot
,
n_slots_frame
,
rrc_ra_ResponseWindow
,
frameP
,
slotP
))
{
LOG_E
(
NR_MAC
,
"UE RA-RNTI %04x TC-RNTI %04x: exceeded RA window, cannot schedule Msg2
\n
"
,
ra
->
RA_rnti
,
ra
->
rnti
);
nr_clear_ra_proc
(
ra
);
return
;
}
if
(
!
check_msg2_monitoring
(
ra
,
dl_bwp
->
scs
,
frameP
,
slotP
))
{
if
(
!
check_msg2_monitoring
(
ra
,
n_slots_frame
,
frameP
,
slotP
))
{
LOG_E
(
NR_MAC
,
"UE RA-RNTI %04x TC-RNTI %04x: Msg2 not monitored by UE
\n
"
,
ra
->
RA_rnti
,
ra
->
rnti
);
return
;
}
const
int
n_slots_frame
=
nr_slots_per_frame
[
dl_bwp
->
scs
];
NR_beam_alloc_t
beam
=
beam_allocation_procedure
(
&
nr_mac
->
beam_info
,
frameP
,
slotP
,
ra
->
beam_id
,
n_slots_frame
);
if
(
beam
.
idx
<
0
)
return
;
...
...
@@ -1980,7 +1980,7 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
mac_sdu_length
=
srb_status
.
bytes_in_buffer
;
}
const
int
n_slots_frame
=
nr_
slots_per_frame
[
dl_bwp
->
scs
]
;
const
int
n_slots_frame
=
nr_
mac
->
frame_structure
.
numb_slots_frame
;
NR_beam_alloc_t
beam
=
beam_allocation_procedure
(
&
nr_mac
->
beam_info
,
frameP
,
slotP
,
ra
->
beam_id
,
n_slots_frame
);
if
(
beam
.
idx
<
0
)
return
;
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
View file @
b4398164
...
...
@@ -125,7 +125,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP,
NR_COMMON_channels_t
*
cc
=
&
gNB
->
common_channels
[
CC_id
];
const
NR_MIB_t
*
mib
=
cc
->
mib
->
message
.
choice
.
mib
;
NR_ServingCellConfigCommon_t
*
scc
=
cc
->
ServingCellConfigCommon
;
const
int
slots_per_frame
=
nr_slots_per_frame
[
*
scc
->
ssbSubcarrierSpacing
]
;
const
int
slots_per_frame
=
gNB
->
frame_structure
.
numb_slots_frame
;
dl_req
=
&
DL_req
->
dl_tti_request_body
;
// get MIB every 8 frames
...
...
@@ -170,7 +170,6 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP,
const
BIT_STRING_t
*
mediumBitmap
=
&
scc
->
ssb_PositionsInBurst
->
choice
.
mediumBitmap
;
const
BIT_STRING_t
*
longBitmap
=
&
scc
->
ssb_PositionsInBurst
->
choice
.
longBitmap
;
const
int
n_slots_frame
=
nr_slots_per_frame
[
scs
];
switch
(
scc
->
ssb_PositionsInBurst
->
present
)
{
case
1
:
// short bitmap (<3GHz) max 4 SSBs
...
...
@@ -180,7 +179,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP,
// if start symbol is in current slot, schedule current SSB, fill VRB map and call get_type0_PDCCH_CSS_config_parameters
if
((
ssb_start_symbol
/
14
)
==
rel_slot
)
{
int
beam_index
=
get_fapi_beamforming_index
(
gNB
,
i_ssb
);
NR_beam_alloc_t
beam
=
beam_allocation_procedure
(
&
gNB
->
beam_info
,
frameP
,
slotP
,
beam_index
,
n_slots
_frame
);
NR_beam_alloc_t
beam
=
beam_allocation_procedure
(
&
gNB
->
beam_info
,
frameP
,
slotP
,
beam_index
,
slots_per
_frame
);
AssertFatal
(
beam
.
idx
>=
0
,
"Cannot allocate SSB %d in any available beam
\n
"
,
i_ssb
);
const
int
prb_offset
=
offset_pointa
>>
scs
;
schedule_ssb
(
frameP
,
slotP
,
scc
,
dl_req
,
i_ssb
,
beam_index
,
ssbSubcarrierOffset
,
offset_pointa
,
mib_pdu
);
...
...
@@ -212,7 +211,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP,
// if start symbol is in current slot, schedule current SSB, fill VRB map and call get_type0_PDCCH_CSS_config_parameters
if
((
ssb_start_symbol
/
14
)
==
rel_slot
)
{
int
beam_index
=
get_fapi_beamforming_index
(
gNB
,
i_ssb
);
NR_beam_alloc_t
beam
=
beam_allocation_procedure
(
&
gNB
->
beam_info
,
frameP
,
slotP
,
beam_index
,
n_slots
_frame
);
NR_beam_alloc_t
beam
=
beam_allocation_procedure
(
&
gNB
->
beam_info
,
frameP
,
slotP
,
beam_index
,
slots_per
_frame
);
AssertFatal
(
beam
.
idx
>=
0
,
"Cannot allocate SSB %d in any available beam
\n
"
,
i_ssb
);
const
int
prb_offset
=
offset_pointa
>>
scs
;
schedule_ssb
(
frameP
,
slotP
,
scc
,
dl_req
,
i_ssb
,
beam_index
,
ssbSubcarrierOffset
,
offset_pointa
,
mib_pdu
);
...
...
@@ -244,7 +243,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP,
// if start symbol is in current slot, schedule current SSB, fill VRB map and call get_type0_PDCCH_CSS_config_parameters
if
((
ssb_start_symbol
/
14
)
==
rel_slot
)
{
int
beam_index
=
get_fapi_beamforming_index
(
gNB
,
i_ssb
);
NR_beam_alloc_t
beam
=
beam_allocation_procedure
(
&
gNB
->
beam_info
,
frameP
,
slotP
,
beam_index
,
n_slots
_frame
);
NR_beam_alloc_t
beam
=
beam_allocation_procedure
(
&
gNB
->
beam_info
,
frameP
,
slotP
,
beam_index
,
slots_per
_frame
);
AssertFatal
(
beam
.
idx
>=
0
,
"Cannot allocate SSB %d in any available beam
\n
"
,
i_ssb
);
const
int
prb_offset
=
offset_pointa
>>
(
scs
-
2
);
// reference 60kHz
schedule_ssb
(
frameP
,
slotP
,
scc
,
dl_req
,
i_ssb
,
beam_index
,
ssbSubcarrierOffset
,
offset_pointa
,
mib_pdu
);
...
...
@@ -366,7 +365,7 @@ static uint32_t schedule_control_sib1(module_id_t module_id,
gNB_mac
->
sched_ctrlCommon
->
search_space
=
calloc
(
1
,
sizeof
(
*
gNB_mac
->
sched_ctrlCommon
->
search_space
));
gNB_mac
->
sched_ctrlCommon
->
coreset
=
calloc
(
1
,
sizeof
(
*
gNB_mac
->
sched_ctrlCommon
->
coreset
));
fill_searchSpaceZero
(
gNB_mac
->
sched_ctrlCommon
->
search_space
,
nr_slots_per_frame
[
*
scc
->
ssbSubcarrierSpacing
]
,
gNB_mac
->
frame_structure
.
numb_slots_frame
,
type0_PDCCH_CSS_config
);
fill_coresetZero
(
gNB_mac
->
sched_ctrlCommon
->
coreset
,
type0_PDCCH_CSS_config
);
gNB_mac
->
cset0_bwp_start
=
type0_PDCCH_CSS_config
->
cset_start_rb
;
...
...
@@ -698,7 +697,7 @@ void schedule_nr_sib1(module_id_t module_idP,
(
type0_PDCCH_CSS_config
->
num_rbs
>
0
)
&&
(
type0_PDCCH_CSS_config
->
active
==
true
))
{
const
int
n_slots_frame
=
nr_slots_per_frame
[
*
scc
->
ssbSubcarrierSpacing
]
;
const
int
n_slots_frame
=
gNB_mac
->
frame_structure
.
numb_slots_frame
;
int
beam_index
=
get_fapi_beamforming_index
(
gNB_mac
,
i
);
NR_beam_alloc_t
beam
=
beam_allocation_procedure
(
&
gNB_mac
->
beam_info
,
frameP
,
slotP
,
beam_index
,
n_slots_frame
);
AssertFatal
(
beam
.
idx
>=
0
,
"Cannot allocate SIB1 corresponding to SSB %d in any available beam
\n
"
,
i
);
...
...
@@ -846,7 +845,7 @@ void schedule_nr_sib19(module_id_t module_idP,
(
slotP
==
((
sib19_sched_info
->
si_WindowPosition_r17
%
window_length
)
-
1
))
&&
(
type0_PDCCH_CSS_config
->
num_rbs
>
0
))
{
const
int
n_slots_frame
=
nr_slots_per_frame
[
*
scc
->
ssbSubcarrierSpacing
]
;
const
int
n_slots_frame
=
gNB_mac
->
frame_structure
.
numb_slots_frame
;
int
beam_index
=
get_fapi_beamforming_index
(
gNB_mac
,
i
);
NR_beam_alloc_t
beam
=
beam_allocation_procedure
(
&
gNB_mac
->
beam_info
,
frameP
,
slotP
,
beam_index
,
n_slots_frame
);
AssertFatal
(
beam
.
idx
>=
0
,
"Cannot allocate SIB19 corresponding to SSB %d in any available beam
\n
"
,
i
);
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
View file @
b4398164
...
...
@@ -614,6 +614,7 @@ static void pf_dl(module_id_t module_id,
remainUEs
[
i
]
=
max_num_ue
;
int
curUE
=
0
;
int
CC_id
=
0
;
int
slots_per_frame
=
mac
->
frame_structure
.
numb_slots_frame
;
/* Loop UE_info->list to check retransmission */
UE_iterator
(
UE_list
,
UE
)
{
...
...
@@ -643,18 +644,14 @@ static void pf_dl(module_id_t module_id,
/* retransmission */
if
(
sched_pdsch
->
dl_harq_pid
>=
0
)
{
NR_beam_alloc_t
beam
=
beam_allocation_procedure
(
&
mac
->
beam_info
,
frame
,
slot
,
UE
->
UE_beam_index
,
nr_slots_per_frame
[
current_BWP
->
scs
]);
NR_beam_alloc_t
beam
=
beam_allocation_procedure
(
&
mac
->
beam_info
,
frame
,
slot
,
UE
->
UE_beam_index
,
slots_per_frame
);
bool
sch_ret
=
beam
.
idx
>=
0
;
/* Allocate retransmission */
if
(
sch_ret
)
sch_ret
=
allocate_dl_retransmission
(
module_id
,
frame
,
slot
,
&
n_rb_sched
[
beam
.
idx
],
UE
,
beam
.
idx
,
sched_pdsch
->
dl_harq_pid
);
if
(
!
sch_ret
)
{
LOG_D
(
NR_MAC
,
"[UE %04x][%4d.%2d] DL retransmission could not be allocated
\n
"
,
UE
->
rnti
,
frame
,
slot
);
reset_beam_status
(
&
mac
->
beam_info
,
frame
,
slot
,
UE
->
UE_beam_index
,
nr_slots_per_frame
[
current_BWP
->
scs
]
,
beam
.
new_beam
);
reset_beam_status
(
&
mac
->
beam_info
,
frame
,
slot
,
UE
->
UE_beam_index
,
slots_per_frame
,
beam
.
new_beam
);
continue
;
}
/* reduce max_num_ue once we are sure UE can be allocated, i.e., has CCE */
...
...
@@ -737,11 +734,7 @@ static void pf_dl(module_id_t module_id,
continue
;
}
NR_beam_alloc_t
beam
=
beam_allocation_procedure
(
&
mac
->
beam_info
,
frame
,
slot
,
iterator
->
UE
->
UE_beam_index
,
nr_slots_per_frame
[
dl_bwp
->
scs
]);
NR_beam_alloc_t
beam
=
beam_allocation_procedure
(
&
mac
->
beam_info
,
frame
,
slot
,
iterator
->
UE
->
UE_beam_index
,
slots_per_frame
);
if
(
beam
.
idx
<
0
)
{
// no available beam
...
...
@@ -749,12 +742,7 @@ static void pf_dl(module_id_t module_id,
continue
;
}
if
(
remainUEs
[
beam
.
idx
]
==
0
||
n_rb_sched
[
beam
.
idx
]
<
min_rbSize
)
{
reset_beam_status
(
&
mac
->
beam_info
,
frame
,
slot
,
iterator
->
UE
->
UE_beam_index
,
nr_slots_per_frame
[
dl_bwp
->
scs
],
beam
.
new_beam
);
reset_beam_status
(
&
mac
->
beam_info
,
frame
,
slot
,
iterator
->
UE
->
UE_beam_index
,
slots_per_frame
,
beam
.
new_beam
);
iterator
++
;
continue
;
}
...
...
@@ -820,12 +808,7 @@ static void pf_dl(module_id_t module_id,
false
);
if
(
CCEIndex
<
0
)
{
LOG_D
(
NR_MAC
,
"[UE %04x][%4d.%2d] could not find free CCE for DL DCI
\n
"
,
rnti
,
frame
,
slot
);
reset_beam_status
(
&
mac
->
beam_info
,
frame
,
slot
,
iterator
->
UE
->
UE_beam_index
,
nr_slots_per_frame
[
dl_bwp
->
scs
],
beam
.
new_beam
);
reset_beam_status
(
&
mac
->
beam_info
,
frame
,
slot
,
iterator
->
UE
->
UE_beam_index
,
slots_per_frame
,
beam
.
new_beam
);
iterator
++
;
continue
;
}
...
...
@@ -839,12 +822,7 @@ static void pf_dl(module_id_t module_id,
alloc
=
nr_acknack_scheduling
(
mac
,
iterator
->
UE
,
frame
,
slot
,
iterator
->
UE
->
UE_beam_index
,
r_pucch
,
0
);
if
(
alloc
<
0
)
{
LOG_D
(
NR_MAC
,
"[UE %04x][%4d.%2d] could not find PUCCH for DL DCI
\n
"
,
rnti
,
frame
,
slot
);
reset_beam_status
(
&
mac
->
beam_info
,
frame
,
slot
,
iterator
->
UE
->
UE_beam_index
,
nr_slots_per_frame
[
dl_bwp
->
scs
],
beam
.
new_beam
);
reset_beam_status
(
&
mac
->
beam_info
,
frame
,
slot
,
iterator
->
UE
->
UE_beam_index
,
slots_per_frame
,
beam
.
new_beam
);
iterator
++
;
continue
;
}
...
...
@@ -1414,11 +1392,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
if
(
sched_ctrl
->
ta_apply
)
{
sched_ctrl
->
ta_apply
=
false
;
sched_ctrl
->
ta_frame
=
frame
;
LOG_D
(
NR_MAC
,
"%d.%2d UE %04x TA scheduled, resetting TA frame
\n
"
,
frame
,
slot
,
UE
->
rnti
);
LOG_D
(
NR_MAC
,
"%d.%2d UE %04x TA scheduled, resetting TA frame
\n
"
,
frame
,
slot
,
UE
->
rnti
);
}
T
(
T_GNB_MAC_DL_PDU_WITH_DATA
,
T_INT
(
module_id
),
T_INT
(
CC_id
),
T_INT
(
rnti
),
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @
b4398164
...
...
@@ -233,7 +233,6 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE
->
UE_sched_ctrl
;
NR_UE_UL_BWP_t
*
ul_bwp
=
&
UE
->
current_UL_BWP
;
const
int
mu
=
ul_bwp
->
scs
;
/* return if all UL HARQ processes wait for feedback */
if
(
sched_ctrl
->
retrans_ul_harq
.
head
==
-
1
&&
sched_ctrl
->
available_ul_harq
.
head
==
-
1
)
{
...
...
@@ -248,13 +247,12 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
const
int
temp_tda
=
get_ul_tda
(
nr_mac
,
frame
,
slot
);
if
(
temp_tda
<
0
)
return
false
;
AssertFatal
(
temp_tda
<
tdaList
->
list
.
count
,
"time domain assignment %d >= %d
\n
"
,
temp_tda
,
tdaList
->
list
.
count
);
AssertFatal
(
temp_tda
<
tdaList
->
list
.
count
,
"time domain assignment %d >= %d
\n
"
,
temp_tda
,
tdaList
->
list
.
count
);
const
int
mu
=
ul_bwp
->
scs
;
int
K2
=
get_K2
(
tdaList
,
temp_tda
,
mu
,
scc
);
const
int
sched_frame
=
(
frame
+
(
slot
+
K2
)
/
nr_slots_per_frame
[
mu
])
%
MAX_FRAME_NUMBER
;
const
int
sched_slot
=
(
slot
+
K2
)
%
nr_slots_per_frame
[
mu
];
int
slots_frame
=
nr_mac
->
frame_structure
.
numb_slots_frame
;
const
int
sched_frame
=
(
frame
+
(
slot
+
K2
)
/
slots_frame
)
%
MAX_FRAME_NUMBER
;
const
int
sched_slot
=
(
slot
+
K2
)
%
slots_frame
;
const
int
tda
=
get_ul_tda
(
nr_mac
,
sched_frame
,
sched_slot
);
if
(
tda
<
0
)
return
false
;
...
...
@@ -293,7 +291,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
// TODO implement beam procedures for phy-test mode
int
beam
=
0
;
const
int
buffer_index
=
ul_buffer_index
(
sched_frame
,
sched_slot
,
mu
,
nr_mac
->
vrb_map_UL_size
);
const
int
buffer_index
=
ul_buffer_index
(
sched_frame
,
sched_slot
,
slots_frame
,
nr_mac
->
vrb_map_UL_size
);
uint16_t
*
vrb_map_UL
=
&
nr_mac
->
common_channels
[
CC_id
].
vrb_map_UL
[
beam
][
buffer_index
*
MAX_BWP_SIZE
];
for
(
int
i
=
rbStart
;
i
<
rbStart
+
rbSize
;
++
i
)
{
if
((
vrb_map_UL
[
i
+
BWPStart
]
&
SL_to_bitmap
(
tda_info
.
startSymbolIndex
,
tda_info
.
nrOfSymbols
))
!=
0
)
{
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @
b4398164
...
...
@@ -2770,12 +2770,12 @@ int get_pdsch_to_harq_feedback(NR_PUCCH_Config_t *pucch_Config,
}
}
void
nr_csirs_scheduling
(
int
Mod_idP
,
frame_t
frame
,
sub_frame_t
slot
,
int
n_slots_frame
,
nfapi_nr_dl_tti_request_t
*
DL_req
)
void
nr_csirs_scheduling
(
int
Mod_idP
,
frame_t
frame
,
sub_frame_t
slot
,
nfapi_nr_dl_tti_request_t
*
DL_req
)
{
int
CC_id
=
0
;
NR_UEs_t
*
UE_info
=
&
RC
.
nrmac
[
Mod_idP
]
->
UE_info
;
gNB_MAC_INST
*
gNB_mac
=
RC
.
nrmac
[
Mod_idP
];
int
n_slots_frame
=
gNB_mac
->
frame_structure
.
numb_slots_frame
;
NR_SCHED_ENSURE_LOCKED
(
&
gNB_mac
->
sched_lock
);
UE_info
->
sched_csirs
=
0
;
...
...
@@ -3171,9 +3171,9 @@ void nr_mac_update_timers(module_id_t module_id,
}
}
int
ul_buffer_index
(
int
frame
,
int
slot
,
int
s
cs
,
int
size
)
int
ul_buffer_index
(
int
frame
,
int
slot
,
int
s
lots_per_frame
,
int
size
)
{
const
int
abs_slot
=
frame
*
nr_slots_per_frame
[
scs
]
+
slot
;
const
int
abs_slot
=
frame
*
slots_per_frame
+
slot
;
return
abs_slot
%
size
;
}
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c
View file @
b4398164
...
...
@@ -407,15 +407,16 @@ void nr_srs_ri_computation(const nfapi_nr_srs_normalized_channel_iq_matrix_t *nr
}
}
static
void
nr_configure_srs
(
nfapi_nr_srs_pdu_t
*
srs_pdu
,
static
void
nr_configure_srs
(
gNB_MAC_INST
*
nrmac
,
nfapi_nr_srs_pdu_t
*
srs_pdu
,
int
frame
,
int
slot
,
int
module_id
,
int
CC_id
,
NR_UE_info_t
*
UE
,
NR_SRS_ResourceSet_t
*
srs_resource_set
,
NR_SRS_Resource_t
*
srs_resource
,
int
buffer_index
)
int
buffer_index
,
int
slots_per_frame
)
{
NR_UE_UL_BWP_t
*
current_BWP
=
&
UE
->
current_UL_BWP
;
...
...
@@ -461,26 +462,22 @@ static void nr_configure_srs(nfapi_nr_srs_pdu_t *srs_pdu,
srs_pdu
->
srs_parameters_v4
.
report_type
[
0
]
=
1
;
srs_pdu
->
srs_parameters_v4
.
iq_representation
=
1
;
srs_pdu
->
srs_parameters_v4
.
prg_size
=
1
;
srs_pdu
->
srs_parameters_v4
.
num_total_ue_antennas
=
1
<<
srs_pdu
->
num_ant_ports
;
srs_pdu
->
srs_parameters_v4
.
num_total_ue_antennas
=
1
<<
srs_pdu
->
num_ant_ports
;
if
(
srs_resource_set
->
usage
==
NR_SRS_ResourceSet__usage_beamManagement
)
{
srs_pdu
->
beamforming
.
trp_scheme
=
0
;
srs_pdu
->
beamforming
.
num_prgs
=
m_SRS
[
srs_pdu
->
config_index
];
srs_pdu
->
beamforming
.
prg_size
=
1
;
}
srs_pdu
->
beamforming
.
prgs_list
[
0
].
dig_bf_interface_list
[
0
].
beam_idx
=
UE
->
UE_beam_index
;
NR_beam_alloc_t
beam
=
beam_allocation_procedure
(
&
RC
.
nrmac
[
module_id
]
->
beam_info
,
frame
,
slot
,
UE
->
UE_beam_index
,
nr_slots_per_frame
[
current_BWP
->
scs
]);
NR_beam_alloc_t
beam
=
beam_allocation_procedure
(
&
nrmac
->
beam_info
,
frame
,
slot
,
UE
->
UE_beam_index
,
slots_per_frame
);
AssertFatal
(
beam
.
idx
>=
0
,
"Cannot allocate SRS in any available beam
\n
"
);
uint16_t
*
vrb_map_UL
=
&
RC
.
nrmac
[
module_id
]
->
common_channels
[
CC_id
].
vrb_map_UL
[
beam
.
idx
][
buffer_index
*
MAX_BWP_SIZE
];
uint16_t
*
vrb_map_UL
=
&
nrmac
->
common_channels
[
CC_id
].
vrb_map_UL
[
beam
.
idx
][
buffer_index
*
MAX_BWP_SIZE
];
uint64_t
mask
=
SL_to_bitmap
(
srs_pdu
->
time_start_position
,
srs_pdu
->
num_symbols
);
for
(
int
i
=
0
;
i
<
srs_pdu
->
bwp_size
;
++
i
)
vrb_map_UL
[
i
+
srs_pdu
->
bwp_start
]
|=
mask
;
}
static
void
nr_fill_nfapi_srs
(
int
module_id
,
static
void
nr_fill_nfapi_srs
(
gNB_MAC_INST
*
nrmac
,
int
CC_id
,
NR_UE_info_t
*
UE
,
int
frame
,
...
...
@@ -488,9 +485,9 @@ static void nr_fill_nfapi_srs(int module_id,
NR_SRS_ResourceSet_t
*
srs_resource_set
,
NR_SRS_Resource_t
*
srs_resource
)
{
int
index
=
ul_buffer_index
(
frame
,
slot
,
UE
->
current_UL_BWP
.
scs
,
RC
.
nrmac
[
module_id
]
->
UL_tti_req_ahead_size
);
nfapi_nr_ul_tti_request_t
*
future_ul_tti_req
=
&
RC
.
nrmac
[
module_id
]
->
UL_tti_req_ahead
[
0
][
index
];
int
slots_frame
=
nrmac
->
frame_structure
.
numb_slots_frame
;
int
index
=
ul_buffer_index
(
frame
,
slot
,
slots_frame
,
nrmac
->
UL_tti_req_ahead_size
);
nfapi_nr_ul_tti_request_t
*
future_ul_tti_req
=
&
nrmac
->
UL_tti_req_ahead
[
0
][
index
];
AssertFatal
(
future_ul_tti_req
->
n_pdus
<
sizeof
(
future_ul_tti_req
->
pdus_list
)
/
sizeof
(
future_ul_tti_req
->
pdus_list
[
0
]),
"Invalid future_ul_tti_req->n_pdus %d
\n
"
,
future_ul_tti_req
->
n_pdus
);
...
...
@@ -499,8 +496,8 @@ static void nr_fill_nfapi_srs(int module_id,
nfapi_nr_srs_pdu_t
*
srs_pdu
=
&
future_ul_tti_req
->
pdus_list
[
future_ul_tti_req
->
n_pdus
].
srs_pdu
;
memset
(
srs_pdu
,
0
,
sizeof
(
nfapi_nr_srs_pdu_t
));
future_ul_tti_req
->
n_pdus
+=
1
;
index
=
ul_buffer_index
(
frame
,
slot
,
UE
->
current_UL_BWP
.
scs
,
RC
.
nrmac
[
module_id
]
->
vrb_map_UL_size
);
nr_configure_srs
(
srs_pdu
,
frame
,
slot
,
module_id
,
CC_id
,
UE
,
srs_resource_set
,
srs_resource
,
index
);
index
=
ul_buffer_index
(
frame
,
slot
,
slots_frame
,
nrmac
->
vrb_map_UL_size
);
nr_configure_srs
(
nrmac
,
srs_pdu
,
frame
,
slot
,
CC_id
,
UE
,
srs_resource_set
,
srs_resource
,
index
,
slots_frame
);
}
/*******************************************************************
...
...
@@ -583,7 +580,7 @@ void nr_schedule_srs(int module_id, frame_t frame, int slot)
}
// we are sheduling SRS max_k2 slot in advance for the presence of SRS to be taken into account when scheduling PUSCH
const
int
n_slots_frame
=
nr
_slots_per_frame
[
current_BWP
->
scs
]
;
const
int
n_slots_frame
=
nr
mac
->
frame_structure
.
numb_slots_frame
;
const
int
sched_slot
=
(
slot
+
max_k2
)
%
n_slots_frame
;
const
int
sched_frame
=
(
frame
+
(
slot
+
max_k2
)
/
n_slots_frame
)
%
MAX_FRAME_NUMBER
;
...
...
@@ -593,7 +590,7 @@ void nr_schedule_srs(int module_id, frame_t frame, int slot)
// Check if UE will transmit the SRS in this frame
if
((
sched_frame
*
n_slots_frame
+
sched_slot
-
offset
)
%
period
==
0
)
{
LOG_D
(
NR_MAC
,
" %d.%d Scheduling SRS reception for %d.%d
\n
"
,
frame
,
slot
,
sched_frame
,
sched_slot
);
nr_fill_nfapi_srs
(
module_id
,
CC_id
,
UE
,
sched_frame
,
sched_slot
,
srs_resource_set
,
srs_resource
);
nr_fill_nfapi_srs
(
nrmac
,
CC_id
,
UE
,
sched_frame
,
sched_slot
,
srs_resource_set
,
srs_resource
);
sched_ctrl
->
sched_srs
.
frame
=
sched_frame
;
sched_ctrl
->
sched_srs
.
slot
=
sched_slot
;
sched_ctrl
->
sched_srs
.
srs_scheduled
=
true
;
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
View file @
b4398164
...
...
@@ -40,10 +40,13 @@ static void nr_fill_nfapi_pucch(gNB_MAC_INST *nrmac,
NR_UE_info_t
*
UE
)
{
const
int
index
=
ul_buffer_index
(
pucch
->
frame
,
pucch
->
ul_slot
,
UE
->
current_UL_BWP
.
scs
,
nrmac
->
UL_tti_req_ahead_size
);
const
int
index
=
ul_buffer_index
(
pucch
->
frame
,
pucch
->
ul_slot
,
nrmac
->
frame_structure
.
numb_slots_frame
,
nrmac
->
UL_tti_req_ahead_size
);
nfapi_nr_ul_tti_request_t
*
future_ul_tti_req
=
&
nrmac
->
UL_tti_req_ahead
[
0
][
index
];
if
(
future_ul_tti_req
->
SFN
!=
pucch
->
frame
||
future_ul_tti_req
->
Slot
!=
pucch
->
ul_slot
)
LOG_W
(
MAC
,
LOG_W
(
NR_
MAC
,
"Current %d.%d : future UL_tti_req's frame.slot %4d.%2d does not match PUCCH %4d.%2d
\n
"
,
frame
,
slot
,
future_ul_tti_req
->
SFN
,
...
...
@@ -53,8 +56,11 @@ static void nr_fill_nfapi_pucch(gNB_MAC_INST *nrmac,
// n_pdus is number of pdus, so, in the array, it is the index of the next free element
if
(
future_ul_tti_req
->
n_pdus
>=
sizeofArray
(
future_ul_tti_req
->
pdus_list
)
)
{
LOG_E
(
NR_MAC
,
"future_ul_tti_req->n_pdus %d is full, slot: %d, sr flag %d dropping request
\n
"
,
future_ul_tti_req
->
n_pdus
,
pucch
->
ul_slot
,
pucch
->
sr_flag
);
LOG_E
(
NR_MAC
,
"future_ul_tti_req->n_pdus %d is full, slot: %d, sr flag %d dropping request
\n
"
,
future_ul_tti_req
->
n_pdus
,
pucch
->
ul_slot
,
pucch
->
sr_flag
);
return
;
}
future_ul_tti_req
->
pdus_list
[
future_ul_tti_req
->
n_pdus
].
pdu_type
=
NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE
;
...
...
@@ -77,8 +83,14 @@ static void nr_fill_nfapi_pucch(gNB_MAC_INST *nrmac,
NR_COMMON_channels_t
*
common_ch
=
nrmac
->
common_channels
;
NR_ServingCellConfigCommon_t
*
scc
=
common_ch
->
ServingCellConfigCommon
;
LOG_D
(
NR_MAC
,
"%4d.%2d Calling nr_configure_pucch (pucch_Config %p,r_pucch %d) pucch to be scheduled in %4d.%2d
\n
"
,
frame
,
slot
,
UE
->
current_UL_BWP
.
pucch_Config
,
pucch
->
r_pucch
,
pucch
->
frame
,
pucch
->
ul_slot
);
LOG_D
(
NR_MAC
,
"%4d.%2d Calling nr_configure_pucch (pucch_Config %p,r_pucch %d) pucch to be scheduled in %4d.%2d
\n
"
,
frame
,
slot
,
UE
->
current_UL_BWP
.
pucch_Config
,
pucch
->
r_pucch
,
pucch
->
frame
,
pucch
->
ul_slot
);
nr_configure_pucch
(
pucch_pdu
,
scc
,
...
...
@@ -213,7 +225,7 @@ void nr_csi_meas_reporting(int Mod_idP,frame_t frame, sub_frame_t slot)
UE_iterator
(
nrmac
->
UE_info
.
list
,
UE
)
{
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE
->
UE_sched_ctrl
;
NR_UE_UL_BWP_t
*
ul_bwp
=
&
UE
->
current_UL_BWP
;
const
int
n_slots_frame
=
nr
_slots_per_frame
[
ul_bwp
->
scs
]
;
const
int
n_slots_frame
=
nr
mac
->
frame_structure
.
numb_slots_frame
;
if
(
nr_timer_is_active
(
&
sched_ctrl
->
transm_interrupt
)
||
(
sched_ctrl
->
ul_failure
&&
!
get_softmodem_params
()
->
phy_test
))
{
continue
;
}
...
...
@@ -270,7 +282,7 @@ void nr_csi_meas_reporting(int Mod_idP,frame_t frame, sub_frame_t slot)
// going through the list of PUCCH resources to find the one indexed by resource_id
NR_beam_alloc_t
beam
=
beam_allocation_procedure
(
&
nrmac
->
beam_info
,
sched_frame
,
sched_slot
,
UE
->
UE_beam_index
,
n_slots_frame
);
AssertFatal
(
beam
.
idx
>=
0
,
"Cannot allocate CSI measurements on PUCCH in any available beam
\n
"
);
const
int
index
=
ul_buffer_index
(
sched_frame
,
sched_slot
,
ul_bwp
->
scs
,
nrmac
->
vrb_map_UL_size
);
const
int
index
=
ul_buffer_index
(
sched_frame
,
sched_slot
,
n_slots_frame
,
nrmac
->
vrb_map_UL_size
);
uint16_t
*
vrb_map_UL
=
&
nrmac
->
common_channels
[
0
].
vrb_map_UL
[
beam
.
idx
][
index
*
MAX_BWP_SIZE
];
const
int
m
=
pucch_Config
->
resourceToAddModList
->
list
.
count
;
for
(
int
j
=
0
;
j
<
m
;
j
++
)
{
...
...
@@ -623,10 +635,10 @@ static void extract_pucch_csi_report(NR_CSI_MeasConfig_t *csi_MeasConfig,
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE
->
UE_sched_ctrl
;
NR_UE_UL_BWP_t
*
ul_bwp
=
&
UE
->
current_UL_BWP
;
NR_UE_DL_BWP_t
*
dl_bwp
=
&
UE
->
current_DL_BWP
;
const
int
n_slots_frame
=
nr
_slots_per_frame
[
ul_bwp
->
scs
]
;
const
int
n_slots_frame
=
nr
mac
->
frame_structure
.
numb_slots_frame
;
int
cumul_bits
=
0
;
int
r_index
=
-
1
;
for
(
int
csi_report_id
=
0
;
csi_report_id
<
csi_MeasConfig
->
csi_ReportConfigToAddModList
->
list
.
count
;
csi_report_id
++
)
{
for
(
int
csi_report_id
=
0
;
csi_report_id
<
csi_MeasConfig
->
csi_ReportConfigToAddModList
->
list
.
count
;
csi_report_id
++
)
{
nr_csi_report_t
*
csi_report
=
&
UE
->
csi_report_template
[
csi_report_id
];
csi_report
->
nb_of_csi_ssb_report
=
0
;
uint8_t
cri_bitlen
=
0
;
...
...
@@ -1002,7 +1014,7 @@ int nr_acknack_scheduling(gNB_MAC_INST *mac,
const
int
minfbtime
=
mac
->
radio_config
.
minRXTXTIME
+
NTN_gNB_Koffset
;
const
NR_UE_UL_BWP_t
*
ul_bwp
=
&
UE
->
current_UL_BWP
;
const
int
n_slots_frame
=
nr_slots_per_frame
[
ul_bwp
->
scs
]
;
const
int
n_slots_frame
=
mac
->
frame_structure
.
numb_slots_frame
;
const
frame_structure_t
*
fs
=
&
mac
->
frame_structure
;
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE
->
UE_sched_ctrl
;
...
...
@@ -1089,7 +1101,7 @@ int nr_acknack_scheduling(gNB_MAC_INST *mac,
pucch_slot
);
continue
;
}
const
int
index
=
ul_buffer_index
(
pucch_frame
,
pucch_slot
,
ul_bwp
->
scs
,
mac
->
vrb_map_UL_size
);
const
int
index
=
ul_buffer_index
(
pucch_frame
,
pucch_slot
,
n_slots_frame
,
mac
->
vrb_map_UL_size
);
uint16_t
*
vrb_map_UL
=
&
mac
->
common_channels
[
CC_id
].
vrb_map_UL
[
beam
.
idx
][
index
*
MAX_BWP_SIZE
];
bool
ret
=
test_pucch0_vrb_occupation
(
curr_pucch
,
vrb_map_UL
,
bwp_start
,
bwp_size
);
if
(
!
ret
)
{
...
...
@@ -1136,7 +1148,7 @@ void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t SFN, sub_frame_t slot)
UE_iterator
(
nrmac
->
UE_info
.
list
,
UE
)
{
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE
->
UE_sched_ctrl
;
NR_UE_UL_BWP_t
*
ul_bwp
=
&
UE
->
current_UL_BWP
;
const
int
n_slots_frame
=
nr
_slots_per_frame
[
ul_bwp
->
scs
]
;
const
int
n_slots_frame
=
nr
mac
->
frame_structure
.
numb_slots_frame
;
if
(
sched_ctrl
->
ul_failure
||
nr_timer_is_active
(
&
sched_ctrl
->
transm_interrupt
))
continue
;
NR_PUCCH_Config_t
*
pucch_Config
=
ul_bwp
->
pucch_Config
;
...
...
@@ -1187,7 +1199,7 @@ void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t SFN, sub_frame_t slot)
else
{
NR_beam_alloc_t
beam
=
beam_allocation_procedure
(
&
nrmac
->
beam_info
,
SFN
,
slot
,
UE
->
UE_beam_index
,
n_slots_frame
);
AssertFatal
(
beam
.
idx
>=
0
,
"Cannot allocate SR in any available beam
\n
"
);
const
int
index
=
ul_buffer_index
(
SFN
,
slot
,
ul_bwp
->
scs
,
nrmac
->
vrb_map_UL_size
);
const
int
index
=
ul_buffer_index
(
SFN
,
slot
,
n_slots_frame
,
nrmac
->
vrb_map_UL_size
);
uint16_t
*
vrb_map_UL
=
&
nrmac
->
common_channels
[
CC_id
].
vrb_map_UL
[
beam
.
idx
][
index
*
MAX_BWP_SIZE
];
const
int
bwp_start
=
ul_bwp
->
BWPStart
;
const
int
bwp_size
=
ul_bwp
->
BWPSize
;
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
View file @
b4398164
...
...
@@ -1750,9 +1750,9 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac,
sched_ctrl
->
cce_index
=
CCEIndex
;
fill_pdcch_vrb_map
(
nrmac
,
CC_id
,
&
sched_ctrl
->
sched_pdcch
,
CCEIndex
,
sched_ctrl
->
aggregation_level
,
dci_beam_idx
);
retInfo
->
frame
=
(
frame
+
(
slot
+
tda_info
.
k2
)
/
nr_slots_per_frame
[
ul_bwp
->
scs
]
)
%
MAX_FRAME_NUMBER
;
retInfo
->
slot
=
(
slot
+
tda_info
.
k2
)
%
nr_slots_per_frame
[
ul_bwp
->
scs
]
;
int
slots_frame
=
nrmac
->
frame_structure
.
numb_slots_frame
;
retInfo
->
frame
=
(
frame
+
(
slot
+
tda_info
.
k2
)
/
slots_frame
)
%
MAX_FRAME_NUMBER
;
retInfo
->
slot
=
(
slot
+
tda_info
.
k2
)
%
slots_frame
;
/* Get previous PSUCH field info */
sched_ctrl
->
sched_pusch
=
*
retInfo
;
NR_sched_pusch_t
*
sched_pusch
=
&
sched_ctrl
->
sched_pusch
;
...
...
@@ -1799,7 +1799,7 @@ static void pf_ul(module_id_t module_id,
const
int
CC_id
=
0
;
gNB_MAC_INST
*
nrmac
=
RC
.
nrmac
[
module_id
];
NR_ServingCellConfigCommon_t
*
scc
=
nrmac
->
common_channels
[
CC_id
].
ServingCellConfigCommon
;
int
slots_per_frame
=
nrmac
->
frame_structure
.
numb_slots_frame
;
const
int
min_rb
=
nrmac
->
min_grant_prb
;
// UEs that could be scheduled
UEsched_t
UE_sched
[
MAX_MOBILES_PER_GNB
+
1
]
=
{
0
};
...
...
@@ -1832,21 +1832,19 @@ static void pf_ul(module_id_t module_id,
if
(
total_rem_ues
==
0
)
continue
;
int
n_dl
=
nr_slots_per_frame
[
UE
->
current_DL_BWP
.
scs
];
NR_beam_alloc_t
dci_beam
=
beam_allocation_procedure
(
&
nrmac
->
beam_info
,
frame
,
slot
,
UE
->
UE_beam_index
,
n_dl
);
NR_beam_alloc_t
dci_beam
=
beam_allocation_procedure
(
&
nrmac
->
beam_info
,
frame
,
slot
,
UE
->
UE_beam_index
,
slots_per_frame
);
if
(
dci_beam
.
idx
<
0
)
{
LOG_D
(
NR_MAC
,
"[UE %04x][%4d.%2d] Beam could not be allocated
\n
"
,
UE
->
rnti
,
frame
,
slot
);
continue
;
}
int
n
=
nr_slots_per_frame
[
current_BWP
->
scs
];
NR_beam_alloc_t
beam
=
beam_allocation_procedure
(
&
nrmac
->
beam_info
,
sched_frame
,
sched_slot
,
UE
->
UE_beam_index
,
n
);
NR_beam_alloc_t
beam
=
beam_allocation_procedure
(
&
nrmac
->
beam_info
,
sched_frame
,
sched_slot
,
UE
->
UE_beam_index
,
slots_per_frame
);
if
(
beam
.
idx
<
0
)
{
LOG_D
(
NR_MAC
,
"[UE %04x][%4d.%2d] Beam could not be allocated
\n
"
,
UE
->
rnti
,
frame
,
slot
);
reset_beam_status
(
&
nrmac
->
beam_info
,
frame
,
slot
,
UE
->
UE_beam_index
,
n_dl
,
dci_beam
.
new_beam
);
reset_beam_status
(
&
nrmac
->
beam_info
,
frame
,
slot
,
UE
->
UE_beam_index
,
slots_per_frame
,
dci_beam
.
new_beam
);
continue
;
}
const
int
index
=
ul_buffer_index
(
sched_frame
,
sched_slot
,
current_BWP
->
scs
,
nrmac
->
vrb_map_UL_size
);
const
int
index
=
ul_buffer_index
(
sched_frame
,
sched_slot
,
slots_per_frame
,
nrmac
->
vrb_map_UL_size
);
uint16_t
*
rballoc_mask
=
&
nrmac
->
common_channels
[
CC_id
].
vrb_map_UL
[
beam
.
idx
][
index
*
MAX_BWP_SIZE
];
/* Check if retransmission is necessary */
...
...
@@ -1867,8 +1865,8 @@ static void pf_ul(module_id_t module_id,
tda
);
if
(
!
r
)
{
LOG_D
(
NR_MAC
,
"[UE %04x][%4d.%2d] UL retransmission could not be allocated
\n
"
,
UE
->
rnti
,
frame
,
slot
);
reset_beam_status
(
&
nrmac
->
beam_info
,
sched_frame
,
sched_slot
,
UE
->
UE_beam_index
,
n
,
beam
.
new_beam
);
reset_beam_status
(
&
nrmac
->
beam_info
,
frame
,
slot
,
UE
->
UE_beam_index
,
n_dl
,
dci_beam
.
new_beam
);
reset_beam_status
(
&
nrmac
->
beam_info
,
sched_frame
,
sched_slot
,
UE
->
UE_beam_index
,
slots_per_frame
,
beam
.
new_beam
);
reset_beam_status
(
&
nrmac
->
beam_info
,
frame
,
slot
,
UE
->
UE_beam_index
,
slots_per_frame
,
dci_beam
.
new_beam
);
continue
;
}
else
...
...
@@ -1883,8 +1881,8 @@ static void pf_ul(module_id_t module_id,
* if the UE disconnected in L2sim, in which case the gNB is not notified
* (this can be considered a design flaw) */
if
(
sched_ctrl
->
available_ul_harq
.
head
<
0
)
{
reset_beam_status
(
&
nrmac
->
beam_info
,
sched_frame
,
sched_slot
,
UE
->
UE_beam_index
,
n
,
beam
.
new_beam
);
reset_beam_status
(
&
nrmac
->
beam_info
,
frame
,
slot
,
UE
->
UE_beam_index
,
n_dl
,
dci_beam
.
new_beam
);
reset_beam_status
(
&
nrmac
->
beam_info
,
sched_frame
,
sched_slot
,
UE
->
UE_beam_index
,
slots_per_frame
,
beam
.
new_beam
);
reset_beam_status
(
&
nrmac
->
beam_info
,
frame
,
slot
,
UE
->
UE_beam_index
,
slots_per_frame
,
dci_beam
.
new_beam
);
LOG_D
(
NR_MAC
,
"[UE %04x][%4d.%2d] has no free UL HARQ process, skipping
\n
"
,
UE
->
rnti
,
frame
,
slot
);
continue
;
}
...
...
@@ -1899,8 +1897,8 @@ static void pf_ul(module_id_t module_id,
LOG_D
(
NR_MAC
,
"pf_ul: do_sched UE %04x => %s
\n
"
,
UE
->
rnti
,
do_sched
?
"yes"
:
"no"
);
if
((
B
==
0
&&
!
do_sched
)
||
nr_timer_is_active
(
&
sched_ctrl
->
transm_interrupt
))
{
reset_beam_status
(
&
nrmac
->
beam_info
,
sched_frame
,
sched_slot
,
UE
->
UE_beam_index
,
n
,
beam
.
new_beam
);
reset_beam_status
(
&
nrmac
->
beam_info
,
frame
,
slot
,
UE
->
UE_beam_index
,
n_dl
,
dci_beam
.
new_beam
);
reset_beam_status
(
&
nrmac
->
beam_info
,
sched_frame
,
sched_slot
,
UE
->
UE_beam_index
,
slots_per_frame
,
beam
.
new_beam
);
reset_beam_status
(
&
nrmac
->
beam_info
,
frame
,
slot
,
UE
->
UE_beam_index
,
slots_per_frame
,
dci_beam
.
new_beam
);
continue
;
}
...
...
@@ -1929,8 +1927,8 @@ static void pf_ul(module_id_t module_id,
false
);
if
(
CCEIndex
<
0
)
{
LOG_D
(
NR_MAC
,
"[UE %04x][%4d.%2d] no free CCE for UL DCI (BSR 0)
\n
"
,
UE
->
rnti
,
frame
,
slot
);
reset_beam_status
(
&
nrmac
->
beam_info
,
sched_frame
,
sched_slot
,
UE
->
UE_beam_index
,
n
,
beam
.
new_beam
);
reset_beam_status
(
&
nrmac
->
beam_info
,
frame
,
slot
,
UE
->
UE_beam_index
,
n_dl
,
dci_beam
.
new_beam
);
reset_beam_status
(
&
nrmac
->
beam_info
,
sched_frame
,
sched_slot
,
UE
->
UE_beam_index
,
slots_per_frame
,
beam
.
new_beam
);
reset_beam_status
(
&
nrmac
->
beam_info
,
frame
,
slot
,
UE
->
UE_beam_index
,
slots_per_frame
,
dci_beam
.
new_beam
);
continue
;
}
...
...
@@ -1964,8 +1962,8 @@ static void pf_ul(module_id_t module_id,
rbStart
,
min_rb
,
bwpSize
);
reset_beam_status
(
&
nrmac
->
beam_info
,
sched_frame
,
sched_slot
,
UE
->
UE_beam_index
,
n
,
beam
.
new_beam
);
reset_beam_status
(
&
nrmac
->
beam_info
,
frame
,
slot
,
UE
->
UE_beam_index
,
n_dl
,
dci_beam
.
new_beam
);
reset_beam_status
(
&
nrmac
->
beam_info
,
sched_frame
,
sched_slot
,
UE
->
UE_beam_index
,
slots_per_frame
,
beam
.
new_beam
);
reset_beam_status
(
&
nrmac
->
beam_info
,
frame
,
slot
,
UE
->
UE_beam_index
,
slots_per_frame
,
dci_beam
.
new_beam
);
continue
;
}
...
...
@@ -2039,12 +2037,10 @@ static void pf_ul(module_id_t module_id,
/* Loop UE_sched to find max coeff and allocate transmission */
while
(
iterator
->
UE
!=
NULL
)
{
NR_UE_UL_BWP_t
*
current_BWP
=
&
iterator
->
UE
->
current_UL_BWP
;
NR_UE_DL_BWP_t
*
dl_BWP
=
&
iterator
->
UE
->
current_DL_BWP
;
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
iterator
->
UE
->
UE_sched_ctrl
;
NR_sched_pusch_t
*
sched_pusch
=
&
sched_ctrl
->
sched_pusch
;
int
n
=
nr_slots_per_frame
[
current_BWP
->
scs
];
NR_beam_alloc_t
beam
=
beam_allocation_procedure
(
&
nrmac
->
beam_info
,
sched_frame
,
sched_slot
,
iterator
->
UE
->
UE_beam_index
,
n
);
NR_beam_alloc_t
beam
=
beam_allocation_procedure
(
&
nrmac
->
beam_info
,
sched_frame
,
sched_slot
,
iterator
->
UE
->
UE_beam_index
,
slots_per_frame
);
if
(
beam
.
idx
<
0
)
{
LOG_D
(
NR_MAC
,
"[UE %04x][%4d.%2d] Beam could not be allocated
\n
"
,
iterator
->
UE
->
rnti
,
frame
,
slot
);
iterator
++
;
...
...
@@ -2052,16 +2048,15 @@ static void pf_ul(module_id_t module_id,
}
if
(
remainUEs
[
beam
.
idx
]
==
0
||
n_rb_sched
[
beam
.
idx
]
<
min_rb
)
{
reset_beam_status
(
&
nrmac
->
beam_info
,
sched_frame
,
sched_slot
,
iterator
->
UE
->
UE_beam_index
,
n
,
beam
.
new_beam
);
reset_beam_status
(
&
nrmac
->
beam_info
,
sched_frame
,
sched_slot
,
iterator
->
UE
->
UE_beam_index
,
slots_per_frame
,
beam
.
new_beam
);
iterator
++
;
continue
;
}
int
n_dl
=
nr_slots_per_frame
[
dl_BWP
->
scs
];
NR_beam_alloc_t
dci_beam
=
beam_allocation_procedure
(
&
nrmac
->
beam_info
,
frame
,
slot
,
iterator
->
UE
->
UE_beam_index
,
n_dl
);
NR_beam_alloc_t
dci_beam
=
beam_allocation_procedure
(
&
nrmac
->
beam_info
,
frame
,
slot
,
iterator
->
UE
->
UE_beam_index
,
slots_per_frame
);
if
(
dci_beam
.
idx
<
0
)
{
LOG_D
(
NR_MAC
,
"[UE %04x][%4d.%2d] Beam could not be allocated
\n
"
,
iterator
->
UE
->
rnti
,
frame
,
slot
);
reset_beam_status
(
&
nrmac
->
beam_info
,
sched_frame
,
sched_slot
,
iterator
->
UE
->
UE_beam_index
,
n
,
beam
.
new_beam
);
reset_beam_status
(
&
nrmac
->
beam_info
,
sched_frame
,
sched_slot
,
iterator
->
UE
->
UE_beam_index
,
slots_per_frame
,
beam
.
new_beam
);
iterator
++
;
continue
;
}
...
...
@@ -2076,8 +2071,8 @@ static void pf_ul(module_id_t module_id,
false
);
if
(
CCEIndex
<
0
)
{
reset_beam_status
(
&
nrmac
->
beam_info
,
frame
,
slot
,
iterator
->
UE
->
UE_beam_index
,
n_dl
,
dci_beam
.
new_beam
);
reset_beam_status
(
&
nrmac
->
beam_info
,
sched_frame
,
sched_slot
,
iterator
->
UE
->
UE_beam_index
,
n
,
beam
.
new_beam
);
reset_beam_status
(
&
nrmac
->
beam_info
,
frame
,
slot
,
iterator
->
UE
->
UE_beam_index
,
slots_per_frame
,
dci_beam
.
new_beam
);
reset_beam_status
(
&
nrmac
->
beam_info
,
sched_frame
,
sched_slot
,
iterator
->
UE
->
UE_beam_index
,
slots_per_frame
,
beam
.
new_beam
);
LOG_D
(
NR_MAC
,
"[UE %04x][%4d.%2d] no free CCE for UL DCI
\n
"
,
iterator
->
UE
->
rnti
,
frame
,
slot
);
iterator
++
;
continue
;
...
...
@@ -2097,7 +2092,7 @@ static void pf_ul(module_id_t module_id,
AssertFatal
(
sched_pusch
->
tda_info
.
valid_tda
,
"Invalid TDA from get_ul_tda_info
\n
"
);
sched_pusch
->
dmrs_info
=
get_ul_dmrs_params
(
scc
,
current_BWP
,
&
sched_pusch
->
tda_info
,
sched_pusch
->
nrOfLayers
);
const
int
index
=
ul_buffer_index
(
sched_frame
,
sched_slot
,
current_BWP
->
scs
,
nrmac
->
vrb_map_UL_size
);
const
int
index
=
ul_buffer_index
(
sched_frame
,
sched_slot
,
slots_per_frame
,
nrmac
->
vrb_map_UL_size
);
uint16_t
*
rballoc_mask
=
&
nrmac
->
common_channels
[
CC_id
].
vrb_map_UL
[
beam
.
idx
][
index
*
MAX_BWP_SIZE
];
int
rbStart
=
0
;
...
...
@@ -2112,8 +2107,8 @@ static void pf_ul(module_id_t module_id,
max_rbSize
++
;
if
(
rbStart
+
min_rb
>=
bwpSize
||
max_rbSize
<
min_rb
)
{
reset_beam_status
(
&
nrmac
->
beam_info
,
frame
,
slot
,
iterator
->
UE
->
UE_beam_index
,
n_dl
,
dci_beam
.
new_beam
);
reset_beam_status
(
&
nrmac
->
beam_info
,
sched_frame
,
sched_slot
,
iterator
->
UE
->
UE_beam_index
,
n
,
beam
.
new_beam
);
reset_beam_status
(
&
nrmac
->
beam_info
,
frame
,
slot
,
iterator
->
UE
->
UE_beam_index
,
slots_per_frame
,
dci_beam
.
new_beam
);
reset_beam_status
(
&
nrmac
->
beam_info
,
sched_frame
,
sched_slot
,
iterator
->
UE
->
UE_beam_index
,
slots_per_frame
,
beam
.
new_beam
);
LOG_D
(
NR_MAC
,
"[UE %04x][%4d.%2d] could not allocate UL data: no resources (rbStart %d, min_rb %d, bwpSize %d)
\n
"
,
iterator
->
UE
->
rnti
,
frame
,
...
...
@@ -2212,7 +2207,7 @@ static bool nr_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_fram
const
NR_SIB1_t
*
sib1
=
nr_mac
->
common_channels
[
0
].
sib1
?
nr_mac
->
common_channels
[
0
].
sib1
->
message
.
choice
.
c1
->
choice
.
systemInformationBlockType1
:
NULL
;
NR_ServingCellConfigCommonSIB_t
*
scc_sib1
=
sib1
?
sib1
->
servingCellConfigCommon
:
NULL
;
AssertFatal
(
scc
||
scc_sib1
,
"We need one serving cell config common
\n
"
);
const
int
slots_frame
=
nr_
slots_per_frame
[
*
scc
->
ssbSubcarrierSpacing
]
;
const
int
slots_frame
=
nr_
mac
->
frame_structure
.
numb_slots_frame
;
// TODO we assume the same K2 for all UEs
const
int
K2
=
nr_mac
->
radio_config
.
minRXTXTIME
+
get_NTN_Koffset
(
scc
);
const
int
sched_frame
=
(
frame
+
(
slot
+
K2
)
/
slots_frame
)
%
MAX_FRAME_NUMBER
;
...
...
@@ -2405,7 +2400,10 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
sched_ctrl
->
tpc0
);
/* PUSCH in a later slot, but corresponding DCI now! */
const
int
index
=
ul_buffer_index
(
sched_pusch
->
frame
,
sched_pusch
->
slot
,
current_BWP
->
scs
,
nr_mac
->
UL_tti_req_ahead_size
);
const
int
index
=
ul_buffer_index
(
sched_pusch
->
frame
,
sched_pusch
->
slot
,
nr_mac
->
frame_structure
.
numb_slots_frame
,
nr_mac
->
UL_tti_req_ahead_size
);
nfapi_nr_ul_tti_request_t
*
future_ul_tti_req
=
&
nr_mac
->
UL_tti_req_ahead
[
0
][
index
];
if
(
future_ul_tti_req
->
SFN
!=
sched_pusch
->
frame
||
future_ul_tti_req
->
Slot
!=
sched_pusch
->
slot
)
LOG_W
(
NR_MAC
,
...
...
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
View file @
b4398164
...
...
@@ -191,11 +191,9 @@ int get_pucch_resourceid(NR_PUCCH_Config_t *pucch_Config, int O_uci, int pucch_r
void
nr_schedule_srs
(
int
module_id
,
frame_t
frame
,
int
slot
);
void
nr_csirs_scheduling
(
int
Mod_idP
,
frame_t
frame
,
sub_frame_t
slot
,
int
n_slots_frame
,
nfapi_nr_dl_tti_request_t
*
DL_req
);
void
nr_csirs_scheduling
(
int
Mod_idP
,
frame_t
frame
,
sub_frame_t
slot
,
nfapi_nr_dl_tti_request_t
*
DL_req
);
void
nr_csi_meas_reporting
(
int
Mod_idP
,
frame_t
frameP
,
sub_frame_t
slotP
);
void
nr_csi_meas_reporting
(
int
Mod_idP
,
frame_t
frameP
,
sub_frame_t
slotP
);
int
nr_acknack_scheduling
(
gNB_MAC_INST
*
mac
,
NR_UE_info_t
*
UE
,
...
...
@@ -453,7 +451,7 @@ int get_mcs_from_bler(const NR_bler_options_t *bler_options,
int
max_mcs
,
frame_t
frame
);
int
ul_buffer_index
(
int
frame
,
int
slot
,
int
s
cs
,
int
size
);
int
ul_buffer_index
(
int
frame
,
int
slot
,
int
s
lots_per_frame
,
int
size
);
void
UL_tti_req_ahead_initialization
(
gNB_MAC_INST
*
gNB
,
int
n
,
int
CCid
,
frame_t
frameP
,
int
slotP
);
void
fapi_beam_index_allocation
(
NR_ServingCellConfigCommon_t
*
scc
,
gNB_MAC_INST
*
mac
);
...
...
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