Commit c66a625d authored by rmagueta's avatar rmagueta

If the ul_ri of srs_feedback changes between a UL 1st transmission and a...

If the ul_ri of srs_feedback changes between a UL 1st transmission and a retransmission, we use the TPMI of 1st transmission
parent 5bd2eb86
...@@ -2822,6 +2822,7 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config, ...@@ -2822,6 +2822,7 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config,
dci_field_t srs_resource_indicator, dci_field_t srs_resource_indicator,
nr_srs_feedback_t *srs_feedback, nr_srs_feedback_t *srs_feedback,
const uint8_t *nrOfLayers, const uint8_t *nrOfLayers,
int *tpmi,
uint32_t *val) uint32_t *val)
{ {
// It is only applicable to codebook based transmission. This field occupies 0 bits for non-codebook based // It is only applicable to codebook based transmission. This field occupies 0 bits for non-codebook based
...@@ -2841,6 +2842,7 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config, ...@@ -2841,6 +2842,7 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config,
long max_rank = *pusch_Config->maxRank; long max_rank = *pusch_Config->maxRank;
long *ul_FullPowerTransmission = pusch_Config->ext1 ? pusch_Config->ext1->ul_FullPowerTransmission_r16 : NULL; long *ul_FullPowerTransmission = pusch_Config->ext1 ? pusch_Config->ext1->ul_FullPowerTransmission_r16 : NULL;
long *codebookSubset = pusch_Config->codebookSubset; long *codebookSubset = pusch_Config->codebookSubset;
int ul_tpmi = tpmi ? *tpmi : srs_feedback ? srs_feedback->tpmi : -1;
if (pusch_antenna_ports == 2) { if (pusch_antenna_ports == 2) {
...@@ -2854,21 +2856,21 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config, ...@@ -2854,21 +2856,21 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config,
if (ul_FullPowerTransmission && *ul_FullPowerTransmission == NR_PUSCH_Config__ext1__ul_FullPowerTransmission_r16_fullpowerMode1) { if (ul_FullPowerTransmission && *ul_FullPowerTransmission == NR_PUSCH_Config__ext1__ul_FullPowerTransmission_r16_fullpowerMode1) {
nbits = 2; nbits = 2;
if (val && srs_feedback) { if (val && srs_feedback) {
AssertFatal(srs_feedback->tpmi <= 2,"TPMI %d is invalid!\n", srs_feedback->tpmi); AssertFatal(ul_tpmi <= 2,"TPMI %d is invalid!\n", ul_tpmi);
*val = srs_feedback->tpmi; *val = ul_tpmi;
} }
} else { } else {
if (codebookSubset && *codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent) { if (codebookSubset && *codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent) {
nbits = 1; nbits = 1;
if (val && srs_feedback) { if (val && srs_feedback) {
AssertFatal(srs_feedback->tpmi <= 1,"TPMI %d is invalid!\n", srs_feedback->tpmi); AssertFatal(ul_tpmi <= 1,"TPMI %d is invalid!\n", ul_tpmi);
*val = srs_feedback->tpmi; *val = ul_tpmi;
} }
} else { } else {
nbits = 3; nbits = 3;
if (val && srs_feedback) { if (val && srs_feedback) {
AssertFatal(srs_feedback->tpmi <= 5,"TPMI %d is invalid!\n", srs_feedback->tpmi); AssertFatal(ul_tpmi <= 5,"TPMI %d is invalid!\n", ul_tpmi);
*val = srs_feedback->tpmi; *val = ul_tpmi;
} }
} }
} }
...@@ -2881,25 +2883,25 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config, ...@@ -2881,25 +2883,25 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config,
if (ul_FullPowerTransmission && *ul_FullPowerTransmission == NR_PUSCH_Config__ext1__ul_FullPowerTransmission_r16_fullpowerMode1) { if (ul_FullPowerTransmission && *ul_FullPowerTransmission == NR_PUSCH_Config__ext1__ul_FullPowerTransmission_r16_fullpowerMode1) {
nbits = 2; nbits = 2;
if (val && srs_feedback) { if (val && srs_feedback) {
AssertFatal((*nrOfLayers==1 && srs_feedback->tpmi <= 2) || (*nrOfLayers==2 && srs_feedback->tpmi == 0), AssertFatal((*nrOfLayers==1 && ul_tpmi <= 2) || (*nrOfLayers==2 && ul_tpmi == 0),
"TPMI %d is invalid!\n", srs_feedback->tpmi); "TPMI %d is invalid!\n", ul_tpmi);
*val = *nrOfLayers==1 ? table_7_3_1_1_2_4A_1layer[srs_feedback->tpmi] : 2; *val = *nrOfLayers==1 ? table_7_3_1_1_2_4A_1layer[ul_tpmi] : 2;
} }
} else { } else {
if (codebookSubset && *codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent) { if (codebookSubset && *codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent) {
nbits = 2; nbits = 2;
if (val && srs_feedback) { if (val && srs_feedback) {
AssertFatal((*nrOfLayers==1 && srs_feedback->tpmi <= 1) || (*nrOfLayers==2 && srs_feedback->tpmi == 0), AssertFatal((*nrOfLayers==1 && ul_tpmi <= 1) || (*nrOfLayers==2 && ul_tpmi == 0),
"TPMI %d is invalid!\n", srs_feedback->tpmi); "TPMI %d is invalid!\n", ul_tpmi);
*val = *nrOfLayers==1 ? srs_feedback->tpmi : 2; *val = *nrOfLayers==1 ? ul_tpmi : 2;
} }
} else { } else {
nbits = 4; nbits = 4;
if (val && srs_feedback) { if (val && srs_feedback) {
AssertFatal((*nrOfLayers==1 && srs_feedback->tpmi <= 5) || (*nrOfLayers==2 && srs_feedback->tpmi <= 2), AssertFatal((*nrOfLayers==1 && ul_tpmi <= 5) || (*nrOfLayers==2 && ul_tpmi <= 2),
"TPMI %d is invalid!\n", srs_feedback->tpmi); "TPMI %d is invalid!\n", ul_tpmi);
*val = *nrOfLayers==1 ? table_7_3_1_1_2_4_1layer_fullyAndPartialAndNonCoherent[srs_feedback->tpmi] : *val = *nrOfLayers==1 ? table_7_3_1_1_2_4_1layer_fullyAndPartialAndNonCoherent[ul_tpmi] :
table_7_3_1_1_2_4_2layers_fullyAndPartialAndNonCoherent[srs_feedback->tpmi]; table_7_3_1_1_2_4_2layers_fullyAndPartialAndNonCoherent[ul_tpmi];
} }
} }
} }
...@@ -2918,36 +2920,36 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config, ...@@ -2918,36 +2920,36 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config,
if (codebookSubset && *codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent) { if (codebookSubset && *codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent) {
nbits = 3; nbits = 3;
if (val && srs_feedback) { if (val && srs_feedback) {
AssertFatal(srs_feedback->tpmi <= 3 || srs_feedback->tpmi == 13, "TPMI %d is invalid!\n", srs_feedback->tpmi); AssertFatal(ul_tpmi <= 3 || ul_tpmi == 13, "TPMI %d is invalid!\n", ul_tpmi);
} }
} else { } else {
nbits = 4; nbits = 4;
if (val && srs_feedback) { if (val && srs_feedback) {
AssertFatal(srs_feedback->tpmi <= 15, "TPMI %d is invalid!\n", srs_feedback->tpmi); AssertFatal(ul_tpmi <= 15, "TPMI %d is invalid!\n", ul_tpmi);
} }
} }
if (val && srs_feedback) { if (val && srs_feedback) {
*val = table_7_3_1_1_2_3A[srs_feedback->tpmi]; *val = table_7_3_1_1_2_3A[ul_tpmi];
} }
} else { } else {
if (codebookSubset && *codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent) { if (codebookSubset && *codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent) {
nbits = 2; nbits = 2;
if (val && srs_feedback) { if (val && srs_feedback) {
AssertFatal(srs_feedback->tpmi <= 3, "TPMI %d is invalid!\n", srs_feedback->tpmi); AssertFatal(ul_tpmi <= 3, "TPMI %d is invalid!\n", ul_tpmi);
} }
} else if (codebookSubset && *codebookSubset == NR_PUSCH_Config__codebookSubset_partialAndNonCoherent) { } else if (codebookSubset && *codebookSubset == NR_PUSCH_Config__codebookSubset_partialAndNonCoherent) {
nbits = 4; nbits = 4;
if (val && srs_feedback) { if (val && srs_feedback) {
AssertFatal(srs_feedback->tpmi <= 11, "TPMI %d is invalid!\n", srs_feedback->tpmi); AssertFatal(ul_tpmi <= 11, "TPMI %d is invalid!\n", ul_tpmi);
} }
} else { } else {
nbits = 5; nbits = 5;
if (val && srs_feedback) { if (val && srs_feedback) {
AssertFatal(srs_feedback->tpmi <= 27, "TPMI %d is invalid!\n", srs_feedback->tpmi); AssertFatal(ul_tpmi <= 27, "TPMI %d is invalid!\n", ul_tpmi);
} }
} }
if (val && srs_feedback) { if (val && srs_feedback) {
*val = srs_feedback->tpmi; *val = ul_tpmi;
} }
} }
} else { } else {
...@@ -2965,48 +2967,48 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config, ...@@ -2965,48 +2967,48 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config,
if (codebookSubset && *codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent) { if (codebookSubset && *codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent) {
nbits = 4; nbits = 4;
if (val && srs_feedback) { if (val && srs_feedback) {
AssertFatal((*nrOfLayers==1 && (srs_feedback->tpmi <= 3 || srs_feedback->tpmi==13)) || (*nrOfLayers==2 && srs_feedback->tpmi <= 6), AssertFatal((*nrOfLayers==1 && (ul_tpmi <= 3 || ul_tpmi==13)) || (*nrOfLayers==2 && ul_tpmi <= 6),
"TPMI %d is invalid!\n", srs_feedback->tpmi); "TPMI %d is invalid!\n", ul_tpmi);
} }
} else { } else {
nbits = 5; nbits = 5;
if (val && srs_feedback) { if (val && srs_feedback) {
AssertFatal((*nrOfLayers==1 && srs_feedback->tpmi <= 15) || (*nrOfLayers==2 && srs_feedback->tpmi <= 13), AssertFatal((*nrOfLayers==1 && ul_tpmi <= 15) || (*nrOfLayers==2 && ul_tpmi <= 13),
"TPMI %d is invalid!\n", srs_feedback->tpmi); "TPMI %d is invalid!\n", ul_tpmi);
} }
} }
if (val && srs_feedback) { if (val && srs_feedback) {
*val = *nrOfLayers==1 ? table_7_3_1_1_2_2A_1layer[srs_feedback->tpmi] : table_7_3_1_1_2_2A_2layers[srs_feedback->tpmi]; *val = *nrOfLayers==1 ? table_7_3_1_1_2_2A_1layer[ul_tpmi] : table_7_3_1_1_2_2A_2layers[ul_tpmi];
} }
} else { } else {
if (codebookSubset && *codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent) { if (codebookSubset && *codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent) {
nbits = 4; nbits = 4;
if (val && srs_feedback) { if (val && srs_feedback) {
AssertFatal((*nrOfLayers==1 && (srs_feedback->tpmi <= 3 || srs_feedback->tpmi == 13)) || (*nrOfLayers==2 && srs_feedback->tpmi <= 6) || AssertFatal((*nrOfLayers==1 && (ul_tpmi <= 3 || ul_tpmi == 13)) || (*nrOfLayers==2 && ul_tpmi <= 6) ||
(*nrOfLayers==3 && srs_feedback->tpmi <= 1) || (*nrOfLayers==4 && srs_feedback->tpmi == 0), (*nrOfLayers==3 && ul_tpmi <= 1) || (*nrOfLayers==4 && ul_tpmi == 0),
"TPMI %d is invalid!\n", srs_feedback->tpmi); "TPMI %d is invalid!\n", ul_tpmi);
} }
} else { } else {
nbits = 6; nbits = 6;
if (val && srs_feedback) { if (val && srs_feedback) {
AssertFatal((*nrOfLayers==1 && srs_feedback->tpmi <= 15) || (*nrOfLayers==2 && srs_feedback->tpmi <= 13) || AssertFatal((*nrOfLayers==1 && ul_tpmi <= 15) || (*nrOfLayers==2 && ul_tpmi <= 13) ||
(*nrOfLayers==3 && srs_feedback->tpmi <= 2) || (*nrOfLayers==4 && srs_feedback->tpmi <= 2), (*nrOfLayers==3 && ul_tpmi <= 2) || (*nrOfLayers==4 && ul_tpmi <= 2),
"TPMI %d is invalid!\n", srs_feedback->tpmi); "TPMI %d is invalid!\n", ul_tpmi);
} }
} }
if (val && srs_feedback) { if (val && srs_feedback) {
switch (*nrOfLayers) { switch (*nrOfLayers) {
case 1: case 1:
*val = table_7_3_1_1_2_2B_1layer[srs_feedback->tpmi]; *val = table_7_3_1_1_2_2B_1layer[ul_tpmi];
break; break;
case 2: case 2:
*val = table_7_3_1_1_2_2B_2layers[srs_feedback->tpmi]; *val = table_7_3_1_1_2_2B_2layers[ul_tpmi];
break; break;
case 3: case 3:
*val = table_7_3_1_1_2_2B_3layers[srs_feedback->tpmi]; *val = table_7_3_1_1_2_2B_3layers[ul_tpmi];
break; break;
case 4: case 4:
*val = table_7_3_1_1_2_2B_4layers[srs_feedback->tpmi]; *val = table_7_3_1_1_2_2B_4layers[ul_tpmi];
break; break;
default: default:
LOG_E(NR_MAC,"Number of layers %d is invalid!\n", *nrOfLayers); LOG_E(NR_MAC,"Number of layers %d is invalid!\n", *nrOfLayers);
...@@ -3017,38 +3019,38 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config, ...@@ -3017,38 +3019,38 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config,
if (codebookSubset && *codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent) { if (codebookSubset && *codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent) {
nbits = 4; nbits = 4;
if (val && srs_feedback) { if (val && srs_feedback) {
AssertFatal((*nrOfLayers==1 && srs_feedback->tpmi <= 3) || (*nrOfLayers==2 && srs_feedback->tpmi <= 5) || AssertFatal((*nrOfLayers==1 && ul_tpmi <= 3) || (*nrOfLayers==2 && ul_tpmi <= 5) ||
(*nrOfLayers==3 && srs_feedback->tpmi == 0) || (*nrOfLayers==4 && srs_feedback->tpmi == 0), (*nrOfLayers==3 && ul_tpmi == 0) || (*nrOfLayers==4 && ul_tpmi == 0),
"TPMI %d is invalid!\n", srs_feedback->tpmi); "TPMI %d is invalid!\n", ul_tpmi);
} }
} else if (codebookSubset && *codebookSubset == NR_PUSCH_Config__codebookSubset_partialAndNonCoherent) { } else if (codebookSubset && *codebookSubset == NR_PUSCH_Config__codebookSubset_partialAndNonCoherent) {
nbits = 5; nbits = 5;
if (val && srs_feedback) { if (val && srs_feedback) {
AssertFatal((*nrOfLayers==1 && srs_feedback->tpmi <= 11) || (*nrOfLayers==2 && srs_feedback->tpmi <= 13) || AssertFatal((*nrOfLayers==1 && ul_tpmi <= 11) || (*nrOfLayers==2 && ul_tpmi <= 13) ||
(*nrOfLayers==3 && srs_feedback->tpmi <= 2) || (*nrOfLayers==4 && srs_feedback->tpmi <= 2), (*nrOfLayers==3 && ul_tpmi <= 2) || (*nrOfLayers==4 && ul_tpmi <= 2),
"TPMI %d is invalid!\n", srs_feedback->tpmi); "TPMI %d is invalid!\n", ul_tpmi);
} }
} else { } else {
nbits = 6; nbits = 6;
if (val && srs_feedback) { if (val && srs_feedback) {
AssertFatal((*nrOfLayers==1 && srs_feedback->tpmi <= 28) || (*nrOfLayers==2 && srs_feedback->tpmi <= 22) || AssertFatal((*nrOfLayers==1 && ul_tpmi <= 28) || (*nrOfLayers==2 && ul_tpmi <= 22) ||
(*nrOfLayers==3 && srs_feedback->tpmi <= 7) || (*nrOfLayers==4 && srs_feedback->tpmi <= 5), (*nrOfLayers==3 && ul_tpmi <= 7) || (*nrOfLayers==4 && ul_tpmi <= 5),
"TPMI %d is invalid!\n", srs_feedback->tpmi); "TPMI %d is invalid!\n", ul_tpmi);
} }
} }
if (val && srs_feedback) { if (val && srs_feedback) {
switch (*nrOfLayers) { switch (*nrOfLayers) {
case 1: case 1:
*val = table_7_3_1_1_2_2_1layer[srs_feedback->tpmi]; *val = table_7_3_1_1_2_2_1layer[ul_tpmi];
break; break;
case 2: case 2:
*val = table_7_3_1_1_2_2_2layers[srs_feedback->tpmi]; *val = table_7_3_1_1_2_2_2layers[ul_tpmi];
break; break;
case 3: case 3:
*val = table_7_3_1_1_2_2_3layers[srs_feedback->tpmi]; *val = table_7_3_1_1_2_2_3layers[ul_tpmi];
break; break;
case 4: case 4:
*val = table_7_3_1_1_2_2_4layers[srs_feedback->tpmi]; *val = table_7_3_1_1_2_2_4layers[ul_tpmi];
break; break;
default: default:
LOG_E(NR_MAC,"Number of layers %d is invalid!\n", *nrOfLayers); LOG_E(NR_MAC,"Number of layers %d is invalid!\n", *nrOfLayers);
...@@ -3299,7 +3301,8 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP, ...@@ -3299,7 +3301,8 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
size += dci_pdu->srs_resource_indicator.nbits; size += dci_pdu->srs_resource_indicator.nbits;
LOG_D(NR_MAC, "dci_pdu->srs_resource_indicator.nbits %d\n", dci_pdu->srs_resource_indicator.nbits); LOG_D(NR_MAC, "dci_pdu->srs_resource_indicator.nbits %d\n", dci_pdu->srs_resource_indicator.nbits);
// Precoding info and number of layers // Precoding info and number of layers
dci_pdu->precoding_information.nbits = compute_precoding_information(pusch_Config, srs_config, dci_pdu->srs_resource_indicator, NULL, NULL, NULL); dci_pdu->precoding_information.nbits =
compute_precoding_information(pusch_Config, srs_config, dci_pdu->srs_resource_indicator, NULL, NULL, NULL, NULL);
size += dci_pdu->precoding_information.nbits; size += dci_pdu->precoding_information.nbits;
LOG_D(NR_MAC, "dci_pdu->precoding_informaiton.nbits=%d\n", dci_pdu->precoding_information.nbits); LOG_D(NR_MAC, "dci_pdu->precoding_informaiton.nbits=%d\n", dci_pdu->precoding_information.nbits);
// Antenna ports // Antenna ports
......
...@@ -79,6 +79,7 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config, ...@@ -79,6 +79,7 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config,
dci_field_t srs_resource_indicator, dci_field_t srs_resource_indicator,
nr_srs_feedback_t *srs_feedback, nr_srs_feedback_t *srs_feedback,
const uint8_t *nrOfLayers, const uint8_t *nrOfLayers,
int *tpmi,
uint32_t *val); uint32_t *val);
NR_PDSCH_TimeDomainResourceAllocationList_t *get_dl_tdalist(const NR_UE_DL_BWP_t *DL_BWP, NR_PDSCH_TimeDomainResourceAllocationList_t *get_dl_tdalist(const NR_UE_DL_BWP_t *DL_BWP,
......
...@@ -894,6 +894,7 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP, ...@@ -894,6 +894,7 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
pusch_pdu, pusch_pdu,
&uldci_payload, &uldci_payload,
NULL, NULL,
NULL,
ra->Msg3_tda_id, ra->Msg3_tda_id,
ra->msg3_TPC, ra->msg3_TPC,
1, // Not toggling NDI in msg3 retransmissions 1, // Not toggling NDI in msg3 retransmissions
......
...@@ -782,6 +782,7 @@ void config_uldci(const NR_UE_ServingCell_Info_t *sc_info, ...@@ -782,6 +782,7 @@ void config_uldci(const NR_UE_ServingCell_Info_t *sc_info,
const nfapi_nr_pusch_pdu_t *pusch_pdu, const nfapi_nr_pusch_pdu_t *pusch_pdu,
dci_pdu_rel15_t *dci_pdu_rel15, dci_pdu_rel15_t *dci_pdu_rel15,
nr_srs_feedback_t *srs_feedback, nr_srs_feedback_t *srs_feedback,
int *tpmi,
int time_domain_assignment, int time_domain_assignment,
uint8_t tpc, uint8_t tpc,
uint8_t ndi, uint8_t ndi,
...@@ -830,6 +831,7 @@ void config_uldci(const NR_UE_ServingCell_Info_t *sc_info, ...@@ -830,6 +831,7 @@ void config_uldci(const NR_UE_ServingCell_Info_t *sc_info,
dci_pdu_rel15->srs_resource_indicator, dci_pdu_rel15->srs_resource_indicator,
srs_feedback, srs_feedback,
&pusch_pdu->nrOfLayers, &pusch_pdu->nrOfLayers,
tpmi,
&dci_pdu_rel15->precoding_information.val); &dci_pdu_rel15->precoding_information.val);
// antenna_ports.val = 0 for transform precoder is disabled, dmrs-Type=1, maxLength=1, Rank=1/2/3/4 // antenna_ports.val = 0 for transform precoder is disabled, dmrs-Type=1, maxLength=1, Rank=1/2/3/4
......
...@@ -2256,6 +2256,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n ...@@ -2256,6 +2256,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
uint16_t rnti = UE->rnti; uint16_t rnti = UE->rnti;
sched_ctrl->SR = false; sched_ctrl->SR = false;
int *tpmi = NULL;
int8_t harq_id = sched_pusch->ul_harq_pid; int8_t harq_id = sched_pusch->ul_harq_pid;
if (harq_id < 0) { if (harq_id < 0) {
...@@ -2297,6 +2298,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n ...@@ -2297,6 +2298,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
* retransmissions */ * retransmissions */
cur_harq->sched_pusch.time_domain_allocation = sched_pusch->time_domain_allocation; cur_harq->sched_pusch.time_domain_allocation = sched_pusch->time_domain_allocation;
cur_harq->sched_pusch.nrOfLayers = sched_pusch->nrOfLayers; cur_harq->sched_pusch.nrOfLayers = sched_pusch->nrOfLayers;
cur_harq->sched_pusch.tpmi = sched_pusch->tpmi;
sched_ctrl->sched_ul_bytes += sched_pusch->tb_size; sched_ctrl->sched_ul_bytes += sched_pusch->tb_size;
UE->mac_stats.ul.total_rbs += sched_pusch->rbSize; UE->mac_stats.ul.total_rbs += sched_pusch->rbSize;
...@@ -2397,6 +2399,10 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n ...@@ -2397,6 +2399,10 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
else else
pusch_pdu->data_scrambling_id = *scc->physCellId; pusch_pdu->data_scrambling_id = *scc->physCellId;
pusch_pdu->nrOfLayers = sched_pusch->nrOfLayers; pusch_pdu->nrOfLayers = sched_pusch->nrOfLayers;
// If nrOfLayers is the same as in srs_feedback, we use the best TPMI, i.e. the one in srs_feedback.
// Otherwise, we use the valid TPMI that we saved in the first transmission.
if (pusch_pdu->nrOfLayers != (sched_ctrl->srs_feedback.ul_ri + 1))
tpmi = &sched_pusch->tpmi;
pusch_pdu->num_dmrs_cdm_grps_no_data = sched_pusch->dmrs_info.num_dmrs_cdm_grps_no_data; pusch_pdu->num_dmrs_cdm_grps_no_data = sched_pusch->dmrs_info.num_dmrs_cdm_grps_no_data;
/* FAPI: DMRS */ /* FAPI: DMRS */
...@@ -2572,6 +2578,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n ...@@ -2572,6 +2578,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
pusch_pdu, pusch_pdu,
&uldci_payload, &uldci_payload,
&sched_ctrl->srs_feedback, &sched_ctrl->srs_feedback,
tpmi,
sched_pusch->time_domain_allocation, sched_pusch->time_domain_allocation,
UE->UE_sched_ctrl.tpc0, UE->UE_sched_ctrl.tpc0,
cur_harq->ndi, cur_harq->ndi,
......
...@@ -163,6 +163,7 @@ void config_uldci(const NR_UE_ServingCell_Info_t *sc_info, ...@@ -163,6 +163,7 @@ void config_uldci(const NR_UE_ServingCell_Info_t *sc_info,
const nfapi_nr_pusch_pdu_t *pusch_pdu, const nfapi_nr_pusch_pdu_t *pusch_pdu,
dci_pdu_rel15_t *dci_pdu_rel15, dci_pdu_rel15_t *dci_pdu_rel15,
nr_srs_feedback_t *srs_feedback, nr_srs_feedback_t *srs_feedback,
int *tpmi,
int time_domain_assignment, int time_domain_assignment,
uint8_t tpc, uint8_t tpc,
uint8_t ndi, uint8_t ndi,
......
...@@ -422,6 +422,8 @@ typedef struct NR_sched_pusch { ...@@ -422,6 +422,8 @@ typedef struct NR_sched_pusch {
int8_t ul_harq_pid; int8_t ul_harq_pid;
uint8_t nrOfLayers; uint8_t nrOfLayers;
int tpmi;
// time_domain_allocation is the index of a list of tda // time_domain_allocation is the index of a list of tda
int time_domain_allocation; int time_domain_allocation;
NR_tda_info_t tda_info; NR_tda_info_t tda_info;
......
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