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Michael Black
OpenXG UE
Commits
46724578
Commit
46724578
authored
Aug 07, 2018
by
Guy De Souza
Browse files
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Plain Diff
Payload generation fix
parent
bc82f3eb
Changes
4
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4 changed files
with
14 additions
and
11 deletions
+14
-11
nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
+1
-1
openair1/PHY/NR_TRANSPORT/nr_dci.c
openair1/PHY/NR_TRANSPORT/nr_dci.c
+2
-2
openair1/PHY/NR_TRANSPORT/nr_dci_tools.c
openair1/PHY/NR_TRANSPORT/nr_dci_tools.c
+8
-7
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+3
-1
No files found.
nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
View file @
46724578
...
@@ -305,7 +305,7 @@ typedef struct {
...
@@ -305,7 +305,7 @@ typedef struct {
nfapi_tl_t
tl
;
nfapi_tl_t
tl
;
uint8_t
format_indicator
;
//1 bit
uint8_t
format_indicator
;
//1 bit
uint16_t
frequency_domain_assignment
;
//up to
9
bits
uint16_t
frequency_domain_assignment
;
//up to
16
bits
uint8_t
time_domain_assignment
;
// 4 bits
uint8_t
time_domain_assignment
;
// 4 bits
uint8_t
frequency_hopping_flag
;
//1 bit
uint8_t
frequency_hopping_flag
;
//1 bit
...
...
openair1/PHY/NR_TRANSPORT/nr_dci.c
View file @
46724578
...
@@ -32,8 +32,8 @@
...
@@ -32,8 +32,8 @@
#include "nr_dci.h"
#include "nr_dci.h"
#define DEBUG_PDCCH_DMRS
//
#define DEBUG_PDCCH_DMRS
#define DEBUG_DCI
//
#define DEBUG_DCI
extern
short
nr_mod_table
[
NR_MOD_TABLE_SIZE_SHORT
];
extern
short
nr_mod_table
[
NR_MOD_TABLE_SIZE_SHORT
];
...
...
openair1/PHY/NR_TRANSPORT/nr_dci_tools.c
View file @
46724578
...
@@ -42,6 +42,7 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
...
@@ -42,6 +42,7 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
{
{
NR_DL_FRAME_PARMS
*
fp
=
&
gNB
->
frame_parms
;
NR_DL_FRAME_PARMS
*
fp
=
&
gNB
->
frame_parms
;
uint32_t
*
dci_pdu
=
dci_alloc
->
dci_pdu
;
uint32_t
*
dci_pdu
=
dci_alloc
->
dci_pdu
;
memset
((
void
*
)
dci_pdu
,
0
,
4
*
sizeof
(
uint32_t
));
nfapi_nr_dl_config_dci_dl_pdu_rel15_t
*
pdu_rel15
=
&
pdu
->
dci_dl_pdu
.
dci_dl_pdu_rel15
;
nfapi_nr_dl_config_dci_dl_pdu_rel15_t
*
pdu_rel15
=
&
pdu
->
dci_dl_pdu
.
dci_dl_pdu_rel15
;
nfapi_nr_dl_config_pdcch_parameters_rel15_t
*
params_rel15
=
&
pdu
->
dci_dl_pdu
.
pdcch_params_rel15
;
nfapi_nr_dl_config_pdcch_parameters_rel15_t
*
params_rel15
=
&
pdu
->
dci_dl_pdu
.
pdcch_params_rel15
;
nfapi_nr_config_request_t
*
cfg
=
&
gNB
->
gNB_config
;
nfapi_nr_config_request_t
*
cfg
=
&
gNB
->
gNB_config
;
...
@@ -58,22 +59,22 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
...
@@ -58,22 +59,22 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
// Freq domain assignment
// Freq domain assignment
fsize
=
(
int
)
ceil
(
log2
(
(
N_RB
*
(
N_RB
+
1
))
>>
1
)
);
fsize
=
(
int
)
ceil
(
log2
(
(
N_RB
*
(
N_RB
+
1
))
>>
1
)
);
for
(
int
i
=
0
;
i
<
fsize
;
i
++
)
for
(
int
i
=
0
;
i
<
fsize
;
i
++
)
*
dci_pdu
|=
((
pdu_rel15
->
frequency_domain_assignment
>>
(
fsize
-
i
))
&
1
)
<<
i
;
*
dci_pdu
|=
((
pdu_rel15
->
frequency_domain_assignment
>>
(
fsize
-
i
-
1
))
&
1
)
<<
i
;
pos
+=
fsize
;
pos
+=
fsize
;
// VRB to PRB mapping
*
dci_pdu
|=
(
pdu_rel15
->
vrb_to_prb_mapping
&
1
)
<<
pos
;
pos
++
;
// Time domain assignment
// Time domain assignment
for
(
int
i
=
0
;
i
<
4
;
i
++
)
for
(
int
i
=
0
;
i
<
4
;
i
++
)
*
dci_pdu
|=
((
pdu_rel15
->
time_domain_assignment
>>
(
4
-
i
))
&
1
)
<<
(
pos
+
i
);
*
dci_pdu
|=
((
pdu_rel15
->
time_domain_assignment
>>
(
3
-
i
))
&
1
)
<<
(
pos
+
i
);
pos
+=
4
;
pos
+=
4
;
// VRB to PRB mapping
*
dci_pdu
|=
(
pdu_rel15
->
vrb_to_prb_mapping
&
1
)
<<
pos
;
pos
++
;
//MCS
//MCS
for
(
int
i
=
0
;
i
<
5
;
i
++
)
for
(
int
i
=
0
;
i
<
5
;
i
++
)
*
dci_pdu
|=
((
pdu_rel15
->
mcs
>>
(
5
-
i
))
&
1
)
<<
(
pos
+
i
);
*
dci_pdu
|=
((
pdu_rel15
->
mcs
>>
(
4
-
i
))
&
1
)
<<
(
pos
+
i
);
pos
+=
5
;
pos
+=
5
;
// TB scaling
// TB scaling
for
(
int
i
=
0
;
i
<
2
;
i
++
)
for
(
int
i
=
0
;
i
<
2
;
i
++
)
*
dci_pdu
|=
((
pdu_rel15
->
tb_scaling
>>
(
2
-
i
))
&
1
)
<<
(
pos
+
i
);
*
dci_pdu
|=
((
pdu_rel15
->
tb_scaling
>>
(
1
-
i
))
&
1
)
<<
(
pos
+
i
);
break
;
break
;
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @
46724578
...
@@ -73,11 +73,13 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
...
@@ -73,11 +73,13 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
pdu_rel15
->
frequency_domain_assignment
=
5
;
pdu_rel15
->
frequency_domain_assignment
=
5
;
pdu_rel15
->
time_domain_assignment
=
2
;
pdu_rel15
->
time_domain_assignment
=
2
;
pdu_rel15
->
vrb_to_prb_mapping
=
0
;
pdu_rel15
->
vrb_to_prb_mapping
=
0
;
pdu_rel15
->
mcs
=
12
;
pdu_rel15
->
tb_scaling
=
1
;
pdu_rel15
->
tb_scaling
=
1
;
LOG_I
(
MAC
,
"[gNB scheduler phytest] DCI type 1 payload: freq_alloc %d, time_alloc %d, vrb to prb %d, tb_scaling %d
\n
"
,
LOG_I
(
MAC
,
"[gNB scheduler phytest] DCI type 1 payload: freq_alloc %d, time_alloc %d, vrb to prb %d,
mcs %d
tb_scaling %d
\n
"
,
pdu_rel15
->
frequency_domain_assignment
,
pdu_rel15
->
frequency_domain_assignment
,
pdu_rel15
->
time_domain_assignment
,
pdu_rel15
->
time_domain_assignment
,
pdu_rel15
->
vrb_to_prb_mapping
,
pdu_rel15
->
vrb_to_prb_mapping
,
pdu_rel15
->
mcs
,
pdu_rel15
->
tb_scaling
);
pdu_rel15
->
tb_scaling
);
params_rel15
->
rnti
=
0x03
;
params_rel15
->
rnti
=
0x03
;
...
...
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