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Michael Black
OpenXG UE
Commits
9f8164b4
Commit
9f8164b4
authored
Jul 26, 2018
by
Calvin HSU
Browse files
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Plain Diff
UE: Add Type0-PDCCH common search space & coreset calculation.
parent
6a56e185
Changes
3
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Showing
3 changed files
with
177 additions
and
77 deletions
+177
-77
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
+16
-3
openair2/LAYER2/NR_MAC_UE/mac_defs.h
openair2/LAYER2/NR_MAC_UE/mac_defs.h
+6
-5
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+155
-69
No files found.
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
View file @
9f8164b4
...
...
@@ -144,14 +144,27 @@ typedef struct {
uint32_t
sr
;
}
fapi_nr_uci_pdu_rel15_t
;
typedef
enum
{
CCE_REG_MAPPING_TYPE_INTERLEAVED
,
CCE_REG_MAPPING_TYPE_NON_INTERLEAVED
,
}
coreset_cce_reg_mapping_type_t
;
typedef
enum
{
PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE
,
PRECODER_GRANULARITY_ALL_CONTIGUOUS_RBS
}
coreset_precoder_granularity_t
;
typedef
struct
{
uint32_t
frequency_domain_resource
;
/// frequency_domain_resource;
uint32_t
rb_start
;
uint32_t
rb_end
;
uint8_t
duration
;
uint8
_t
cce_reg_mapping_type
;
// interleaved or noninterleaved
coreset_cce_reg_mapping_type
_t
cce_reg_mapping_type
;
// interleaved or noninterleaved
uint8_t
cce_reg_interleaved_reg_bundle_size
;
// valid if CCE to REG mapping type is interleaved type
uint8_t
cce_reg_interleaved_interleaver_size
;
// valid if CCE to REG mapping type is interleaved type
uint8_t
cce_reg_interleaved_shift_index
;
// valid if CCE to REG mapping type is interleaved type
uint8
_t
precoder_granularity
;
coreset_precoder_granularity
_t
precoder_granularity
;
uint8_t
tci_state_pdcch
;
uint8_t
tci_present_in_dci
;
...
...
openair2/LAYER2/NR_MAC_UE/mac_defs.h
View file @
9f8164b4
...
...
@@ -72,11 +72,12 @@ typedef struct {
NR_MIB_t
*
mib
;
/// Type0-PDCCH seach space coreset
uint32_t
num_rbs
;
uint32_t
num_symbols
;
uint32_t
rb_offset
;
fapi_nr_search_space_t
type0_pdcch_ss
;
uint32_t
type0_pdcch_ss_mux_pattern
;
float
type0_pdcch_ss_big_o
;
uint32_t
type0_pdcch_ss_number_of_search_space_per_slot
;
float
type0_pdcch_ss_big_m
;
uint32_t
type0_pdcch_ss_first_symbol_index
;
/// Type0-PDCCH seach space
...
...
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @
9f8164b4
...
...
@@ -86,7 +86,7 @@ int8_t nr_ue_decode_mib(
uint32_t
ssb_subcarrier_offset
=
mac
->
mib
->
ssb_SubcarrierOffset
;
uint32_t
ssb_index
=
0
;
uint32_t
ssb_index
=
0
;
// TODO: ssb_index should obtain from L1 in case Lssb != 64
frame
=
frame
<<
4
;
frame
=
frame
|
frame_number_4lsb
;
...
...
@@ -115,117 +115,121 @@ int8_t nr_ue_decode_mib(
subcarrier_spacing_t
scs_ssb
=
scs_15kHz
;
// default for testing
subcarrier_spacing_t
scs_pdcch
=
scs_15kHz
;
// default for testing
channel_bandwidth_t
min_channel_bw
=
bw_5MHz
;
// deafult for testing
uint32_t
ssb_coreset_multiplexing_pattern
;
uint32_t
is_condition_A
=
1
;
frequency_range_t
frequency_range
=
FR1
;
uint32_t
index_4msb
=
(
mac
->
mib
->
pdcch_ConfigSIB1
>>
4
)
&
0xf
;
uint32_t
index_4lsb
=
(
mac
->
mib
->
pdcch_ConfigSIB1
&
0xf
);
int32_t
num_rbs
=
-
1
;
int32_t
num_symbols
=
-
1
;
int32_t
rb_offset
=
-
1
;
// type0-pdcch coreset
switch
(
(
scs_ssb
<<
5
)
|
scs_pdcch
){
case
(
scs_15kHz
<<
5
)
|
scs_15kHz
:
AssertFatal
(
index_4msb
<
15
,
"38.213 Table 13-1 4 MSB out of range
\n
"
);
ssb_coreset_multiplexing
_pattern
=
1
;
mac
->
num_rbs
=
table_38213_13_1_c2
[
index_4msb
];
mac
->
num_symbols
=
table_38213_13_1_c3
[
index_4msb
];
mac
->
rb_offset
=
table_38213_13_1_c4
[
index_4msb
];
mac
->
type0_pdcch_ss_mux
_pattern
=
1
;
num_rbs
=
table_38213_13_1_c2
[
index_4msb
];
num_symbols
=
table_38213_13_1_c3
[
index_4msb
];
rb_offset
=
table_38213_13_1_c4
[
index_4msb
];
break
;
case
(
scs_15kHz
<<
5
)
|
scs_30kHz
:
AssertFatal
(
index_4msb
<
14
,
"38.213 Table 13-2 4 MSB out of range
\n
"
);
ssb_coreset_multiplexing
_pattern
=
1
;
mac
->
num_rbs
=
table_38213_13_2_c2
[
index_4msb
];
mac
->
num_symbols
=
table_38213_13_2_c3
[
index_4msb
];
mac
->
rb_offset
=
table_38213_13_2_c4
[
index_4msb
];
mac
->
type0_pdcch_ss_mux
_pattern
=
1
;
num_rbs
=
table_38213_13_2_c2
[
index_4msb
];
num_symbols
=
table_38213_13_2_c3
[
index_4msb
];
rb_offset
=
table_38213_13_2_c4
[
index_4msb
];
break
;
case
(
scs_30kHz
<<
5
)
|
scs_15kHz
:
if
((
min_channel_bw
&
bw_5MHz
)
|
(
min_channel_bw
&
bw_10MHz
)){
AssertFatal
(
index_4msb
<
9
,
"38.213 Table 13-3 4 MSB out of range
\n
"
);
ssb_coreset_multiplexing
_pattern
=
1
;
mac
->
num_rbs
=
table_38213_13_3_c2
[
index_4msb
];
mac
->
num_symbols
=
table_38213_13_3_c3
[
index_4msb
];
mac
->
rb_offset
=
table_38213_13_3_c4
[
index_4msb
];
mac
->
type0_pdcch_ss_mux
_pattern
=
1
;
num_rbs
=
table_38213_13_3_c2
[
index_4msb
];
num_symbols
=
table_38213_13_3_c3
[
index_4msb
];
rb_offset
=
table_38213_13_3_c4
[
index_4msb
];
}
else
if
(
min_channel_bw
&
bw_40MHz
){
AssertFatal
(
index_4msb
<
9
,
"38.213 Table 13-5 4 MSB out of range
\n
"
);
ssb_coreset_multiplexing
_pattern
=
1
;
mac
->
num_rbs
=
table_38213_13_5_c2
[
index_4msb
];
mac
->
num_symbols
=
table_38213_13_5_c3
[
index_4msb
];
mac
->
rb_offset
=
table_38213_13_5_c4
[
index_4msb
];
mac
->
type0_pdcch_ss_mux
_pattern
=
1
;
num_rbs
=
table_38213_13_5_c2
[
index_4msb
];
num_symbols
=
table_38213_13_5_c3
[
index_4msb
];
rb_offset
=
table_38213_13_5_c4
[
index_4msb
];
}
else
{
;
}
break
;
case
(
scs_30kHz
<<
5
)
|
scs_30kHz
:
if
((
min_channel_bw
&
bw_5MHz
)
|
(
min_channel_bw
&
bw_10MHz
)){
ssb_coreset_multiplexing
_pattern
=
1
;
mac
->
num_rbs
=
table_38213_13_4_c2
[
index_4msb
];
mac
->
num_symbols
=
table_38213_13_4_c3
[
index_4msb
];
mac
->
rb_offset
=
table_38213_13_4_c4
[
index_4msb
];
mac
->
type0_pdcch_ss_mux
_pattern
=
1
;
num_rbs
=
table_38213_13_4_c2
[
index_4msb
];
num_symbols
=
table_38213_13_4_c3
[
index_4msb
];
rb_offset
=
table_38213_13_4_c4
[
index_4msb
];
}
else
if
(
min_channel_bw
&
bw_40MHz
){
AssertFatal
(
index_4msb
<
10
,
"38.213 Table 13-6 4 MSB out of range
\n
"
);
ssb_coreset_multiplexing
_pattern
=
1
;
mac
->
num_rbs
=
table_38213_13_6_c2
[
index_4msb
];
mac
->
num_symbols
=
table_38213_13_6_c3
[
index_4msb
];
mac
->
rb_offset
=
table_38213_13_6_c4
[
index_4msb
];
mac
->
type0_pdcch_ss_mux
_pattern
=
1
;
num_rbs
=
table_38213_13_6_c2
[
index_4msb
];
num_symbols
=
table_38213_13_6_c3
[
index_4msb
];
rb_offset
=
table_38213_13_6_c4
[
index_4msb
];
}
else
{
;
}
break
;
case
(
scs_120kHz
<<
5
)
|
scs_60kHz
:
AssertFatal
(
index_4msb
<
12
,
"38.213 Table 13-7 4 MSB out of range
\n
"
);
if
(
index_4msb
&
0x7
){
ssb_coreset_multiplexing
_pattern
=
1
;
mac
->
type0_pdcch_ss_mux
_pattern
=
1
;
}
else
if
(
index_4msb
&
0x18
){
ssb_coreset_multiplexing
_pattern
=
2
;
mac
->
type0_pdcch_ss_mux
_pattern
=
2
;
}
else
{
;
}
mac
->
num_rbs
=
table_38213_13_7_c2
[
index_4msb
];
mac
->
num_symbols
=
table_38213_13_7_c3
[
index_4msb
];
num_rbs
=
table_38213_13_7_c2
[
index_4msb
];
num_symbols
=
table_38213_13_7_c3
[
index_4msb
];
if
(
!
is_condition_A
&&
(
index_4msb
==
8
||
index_4msb
==
10
)){
mac
->
rb_offset
=
table_38213_13_7_c4
[
index_4msb
]
-
1
;
rb_offset
=
table_38213_13_7_c4
[
index_4msb
]
-
1
;
}
else
{
mac
->
rb_offset
=
table_38213_13_7_c4
[
index_4msb
];
rb_offset
=
table_38213_13_7_c4
[
index_4msb
];
}
break
;
case
(
scs_120kHz
<<
5
)
|
scs_120kHz
:
AssertFatal
(
index_4msb
<
8
,
"38.213 Table 13-8 4 MSB out of range
\n
"
);
if
(
index_4msb
&
0x3
){
ssb_coreset_multiplexing
_pattern
=
1
;
mac
->
type0_pdcch_ss_mux
_pattern
=
1
;
}
else
if
(
index_4msb
&
0x0c
){
ssb_coreset_multiplexing
_pattern
=
3
;
mac
->
type0_pdcch_ss_mux
_pattern
=
3
;
}
mac
->
num_rbs
=
table_38213_13_8_c2
[
index_4msb
];
mac
->
num_symbols
=
table_38213_13_8_c3
[
index_4msb
];
num_rbs
=
table_38213_13_8_c2
[
index_4msb
];
num_symbols
=
table_38213_13_8_c3
[
index_4msb
];
if
(
!
is_condition_A
&&
(
index_4msb
==
4
||
index_4msb
==
6
)){
mac
->
rb_offset
=
table_38213_13_8_c4
[
index_4msb
]
-
1
;
rb_offset
=
table_38213_13_8_c4
[
index_4msb
]
-
1
;
}
else
{
mac
->
rb_offset
=
table_38213_13_8_c4
[
index_4msb
];
rb_offset
=
table_38213_13_8_c4
[
index_4msb
];
}
break
;
case
(
scs_240kHz
<<
5
)
|
scs_60kHz
:
AssertFatal
(
index_4msb
<
4
,
"38.213 Table 13-9 4 MSB out of range
\n
"
);
ssb_coreset_multiplexing
_pattern
=
1
;
mac
->
num_rbs
=
table_38213_13_9_c2
[
index_4msb
];
mac
->
num_symbols
=
table_38213_13_9_c3
[
index_4msb
];
mac
->
rb_offset
=
table_38213_13_9_c4
[
index_4msb
];
mac
->
type0_pdcch_ss_mux
_pattern
=
1
;
num_rbs
=
table_38213_13_9_c2
[
index_4msb
];
num_symbols
=
table_38213_13_9_c3
[
index_4msb
];
rb_offset
=
table_38213_13_9_c4
[
index_4msb
];
break
;
case
(
scs_240kHz
<<
5
)
|
scs_120kHz
:
AssertFatal
(
index_4msb
<
8
,
"38.213 Table 13-10 4 MSB out of range
\n
"
);
if
(
index_4msb
&
0x3
){
ssb_coreset_multiplexing
_pattern
=
1
;
mac
->
type0_pdcch_ss_mux
_pattern
=
1
;
}
else
if
(
index_4msb
&
0x0c
){
ssb_coreset_multiplexing
_pattern
=
2
;
mac
->
type0_pdcch_ss_mux
_pattern
=
2
;
}
mac
->
num_rbs
=
table_38213_13_10_c2
[
index_4msb
];
mac
->
num_symbols
=
table_38213_13_10_c3
[
index_4msb
];
num_rbs
=
table_38213_13_10_c2
[
index_4msb
];
num_symbols
=
table_38213_13_10_c3
[
index_4msb
];
if
(
!
is_condition_A
&&
(
index_4msb
==
4
||
index_4msb
==
6
)){
mac
->
rb_offset
=
table_38213_13_10_c4
[
index_4msb
]
-
1
;
rb_offset
=
table_38213_13_10_c4
[
index_4msb
]
-
1
;
}
else
{
mac
->
rb_offset
=
table_38213_13_10_c4
[
index_4msb
];
rb_offset
=
table_38213_13_10_c4
[
index_4msb
];
}
break
;
...
...
@@ -234,67 +238,149 @@ int8_t nr_ue_decode_mib(
break
;
}
AssertFatal
(
num_rbs
!=
-
1
,
"Type0 PDCCH coreset num_rbs undefined"
);
AssertFatal
(
num_symbols
!=
-
1
,
"Type0 PDCCH coreset num_symbols undefined"
);
AssertFatal
(
rb_offset
!=
-
1
,
"Type0 PDCCH coreset rb_offset undefined"
);
uint32_t
cell_id
=
0
;
// obtain from L1 later
mac
->
type0_pdcch_ss
.
coreset
.
rb_start
=
rb_offset
;
mac
->
type0_pdcch_ss
.
coreset
.
rb_end
=
rb_offset
+
num_rbs
-
1
;
mac
->
type0_pdcch_ss
.
coreset
.
duration
=
num_symbols
;
mac
->
type0_pdcch_ss
.
coreset
.
cce_reg_mapping_type
=
CCE_REG_MAPPING_TYPE_INTERLEAVED
;
mac
->
type0_pdcch_ss
.
coreset
.
cce_reg_interleaved_reg_bundle_size
=
6
;
// L
mac
->
type0_pdcch_ss
.
coreset
.
cce_reg_interleaved_interleaver_size
=
2
;
// R
mac
->
type0_pdcch_ss
.
coreset
.
cce_reg_interleaved_shift_index
=
cell_id
;
mac
->
type0_pdcch_ss
.
coreset
.
precoder_granularity
=
PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE
;
mac
->
type0_pdcch_ss
.
coreset
.
pdcch_dmrs_scrambling_id
=
cell_id
;
// type0-pdcch search space
float
big_o
;
uint32_t
number_of_search_space_per_slot
;
float
big_m
;
uint32_t
first_symbol_index
;
const
uint32_t
num_symbols_coreset
=
0
;
// check after
uint32_t
ii
=
0
;
// check later
uint32_t
kk
=
0
;
if
(
ssb_coreset_multiplexing_pattern
==
1
&&
frequency_range
==
FR1
){
/// MUX PATTERN 1
if
(
mac
->
type0_pdcch_ss_mux_pattern
==
1
&&
frequency_range
==
FR1
){
big_o
=
table_38213_13_11_c1
[
index_4lsb
];
number_of_search_space_per_slot
=
table_38213_13_11_c2
[
index_4lsb
];
big_m
=
table_38213_13_11_c3
[
index_4lsb
];
if
((
index_4lsb
==
1
||
index_4lsb
==
3
||
index_4lsb
==
5
||
index_4lsb
==
7
)
&&
(
ii
&
1
)){
first_symbol_index
=
num_symbols
_coreset
;
if
((
index_4lsb
==
1
||
index_4lsb
==
3
||
index_4lsb
==
5
||
index_4lsb
==
7
)
&&
(
ssb_index
&
1
)){
first_symbol_index
=
num_symbols
;
}
else
{
first_symbol_index
=
table_38213_13_11_c4
[
index_4lsb
];
}
}
if
(
ssb_coreset_multiplexing
_pattern
==
1
&&
frequency_range
==
FR2
){
if
(
mac
->
type0_pdcch_ss_mux
_pattern
==
1
&&
frequency_range
==
FR2
){
big_o
=
table_38213_13_12_c1
[
index_4lsb
];
number_of_search_space_per_slot
=
table_38213_13_11_c2
[
index_4lsb
];
big_m
=
table_38213_13_12_c3
[
index_4lsb
];
if
((
index_4lsb
==
1
||
index_4lsb
==
3
||
index_4lsb
==
5
||
index_4lsb
==
10
)
&&
(
ii
&
1
)){
if
((
index_4lsb
==
1
||
index_4lsb
==
3
||
index_4lsb
==
5
||
index_4lsb
==
10
)
&&
(
ssb_index
&
1
)){
first_symbol_index
=
7
;
}
else
if
((
index_4lsb
==
6
||
index_4lsb
==
7
||
index_4lsb
==
8
||
index_4lsb
==
11
)
&&
(
ii
&
1
)){
first_symbol_index
=
num_symbols
_coreset
;
}
else
if
((
index_4lsb
==
6
||
index_4lsb
==
7
||
index_4lsb
==
8
||
index_4lsb
==
11
)
&&
(
ssb_index
&
1
)){
first_symbol_index
=
num_symbols
;
}
else
{
first_symbol_index
=
0
;
}
}
if
(
ssb_coreset_multiplexing_pattern
==
2
){
/// MUX PATTERN 2
if
(
mac
->
type0_pdcch_ss_mux_pattern
==
2
){
if
((
scs_ssb
==
scs_120kHz
)
&&
(
scs_pdcch
==
scs_60kHz
)){
// 38.213 Table 13-13
AssertFatal
(
index_4lsb
==
0
,
"38.213 Table 13-13 4 LSB out of range
\n
"
);
// TODO check PDCCH monitoring occasions (SFN and slot number)
// TODO check first symbol index
//first_symbol_index =
// PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot
// TODO Type0SS_frame = SSB_frame
// TODO Type0SS_slot = SSB_slot
switch
(
ssb_index
&
0x3
){
// ssb_index(i) mod 4
case
0
:
first_symbol_index
=
0
;
break
;
case
1
:
first_symbol_index
=
1
;
break
;
case
2
:
first_symbol_index
=
6
;
break
;
case
3
:
first_symbol_index
=
7
;
break
;
default:
break
;
}
}
else
if
((
scs_ssb
==
scs_240kHz
)
&&
(
scs_pdcch
==
scs_120kHz
)){
// 38.213 Table 13-14
AssertFatal
(
index_4lsb
==
0
,
"38.213 Table 13-14 4 LSB out of range
\n
"
);
// TODO check PDCCH monitoring occasions (SFN and slot number)
// TODO check first symbol index
//first_symbol_index =
// PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot
// TODO Type0SS_frame = SSB_frame
switch
(
ssb_index
&
0x7
){
// ssb_index(i) mod 8
case
0
:
first_symbol_index
=
0
;
break
;
case
1
:
first_symbol_index
=
1
;
break
;
case
2
:
first_symbol_index
=
2
;
break
;
case
3
:
first_symbol_index
=
3
;
break
;
case
4
:
first_symbol_index
=
12
;
// TODO Type0SS_slot = SSB_slot - 1
break
;
case
5
:
first_symbol_index
=
13
;
// TODO Type0SS_slot = SSB_slot - 1
break
;
case
6
:
first_symbol_index
=
0
;
break
;
case
7
:
first_symbol_index
=
1
;
break
;
default:
break
;
}
}
else
{
;
}
}
if
(
ssb_coreset_multiplexing_pattern
==
3
){
/// MUX PATTERN 3
if
(
mac
->
type0_pdcch_ss_mux_pattern
==
3
){
if
((
scs_ssb
==
scs_120kHz
)
&&
(
scs_pdcch
==
scs_120kHz
)){
// 38.213 Table 13-15
AssertFatal
(
index_4lsb
==
0
,
"38.213 Table 13-15 4 LSB out of range
\n
"
);
// TODO check PDCCH monitoring occasions (SFN and slot number)
// TODO check first symbol index
//first_symbol_index =
// PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot
// TODO Type0SS_frame = SSB_frame
// TODO Type0SS_slot = SSB_slot
switch
(
ssb_index
&
0x3
){
// ssb_index(i) mod 4
case
0
:
first_symbol_index
=
4
;
break
;
case
1
:
first_symbol_index
=
8
;
break
;
case
2
:
first_symbol_index
=
2
;
break
;
case
3
:
first_symbol_index
=
6
;
break
;
default:
break
;
}
}
else
{
;
}
}
mac
->
type0_pdcch_ss_big_o
=
big_o
;
mac
->
type0_pdcch_ss_number_of_search_space_per_slot
=
number_of_search_space_per_slot
;
mac
->
type0_pdcch_ss_big_m
=
big_m
;
mac
->
type0_pdcch_ss_first_symbol_index
=
first_symbol_index
;
// fill in the elements in config request inside P5 message
mac
->
phy_config
.
config_req
.
pbch_config
.
system_frame_number
=
frame
;
// after calculation
mac
->
phy_config
.
config_req
.
pbch_config
.
subcarrier_spacing_common
=
mac
->
mib
->
subCarrierSpacingCommon
;
...
...
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