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Michael Black
OpenXG UE
Commits
ac07f693
Commit
ac07f693
authored
Jun 26, 2018
by
Robert Schmidt
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Plain Diff
Iterate over actual number of CC, not NFAPI_CC_MAX
parent
4d6be349
Changes
3
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Side-by-side
Showing
3 changed files
with
15 additions
and
17 deletions
+15
-17
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
+8
-8
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
+4
-6
openair2/LAYER2/MAC/pre_processor.c
openair2/LAYER2/MAC/pre_processor.c
+3
-3
No files found.
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
View file @
ac07f693
...
...
@@ -510,7 +510,7 @@ schedule_ue_spec(module_id_t module_idP, int slice_idxP,
}
//weight = get_ue_weight(module_idP,UE_id);
aggregation
=
2
;
for
(
CC_id
=
0
;
CC_id
<
NFAPI_CC_MAX
;
CC_id
++
)
{
for
(
CC_id
=
0
;
CC_id
<
RC
.
nb_mac_CC
[
module_idP
]
;
CC_id
++
)
{
N_RB_DL
[
CC_id
]
=
to_prb
(
cc
[
CC_id
].
mib
->
message
.
dl_Bandwidth
);
min_rb_unit
[
CC_id
]
=
get_min_rb_unit
(
module_idP
,
CC_id
);
// get number of PRBs less those used by common channels
...
...
@@ -559,7 +559,7 @@ schedule_ue_spec(module_id_t module_idP, int slice_idxP,
sort_UEs
(
module_idP
,
slice_idxP
,
frameP
,
subframeP
);
}
for
(
CC_id
=
0
;
CC_id
<
NFAPI_CC_MAX
;
CC_id
++
)
{
for
(
CC_id
=
0
;
CC_id
<
RC
.
nb_mac_CC
[
module_idP
]
;
CC_id
++
)
{
LOG_D
(
MAC
,
"doing schedule_ue_spec for CC_id %d
\n
"
,
CC_id
);
dl_req
=
&
eNB
->
DL_req
[
CC_id
].
dl_config_request_body
;
...
...
@@ -1464,7 +1464,7 @@ void dlsch_scheduler_interslice_multiplexing(module_id_t Mod_id,
// otherwise it contains the id of the slice it belongs to.
// (Information about slicing must be retained to deal with isolation).
// FIXME: This method does not consider RBGs that are free and belong to no slices
for
(
CC_id
=
0
;
CC_id
<
NFAPI_CC_MAX
;
++
CC_id
)
{
for
(
CC_id
=
0
;
CC_id
<
RC
.
nb_mac_CC
[
Mod_id
]
;
++
CC_id
)
{
cc
=
&
RC
.
mac
[
Mod_id
]
->
common_channels
[
CC_id
];
N_RBG
[
CC_id
]
=
to_rbg
(
cc
->
mib
->
message
.
dl_Bandwidth
);
for
(
rbg
=
0
;
rbg
<
N_RBG
[
CC_id
];
++
rbg
)
{
...
...
@@ -1481,7 +1481,7 @@ void dlsch_scheduler_interslice_multiplexing(module_id_t Mod_id,
// Find out which slices need other resources.
// FIXME: I don't think is really needed since we check nb_rbs_remaining later
for
(
CC_id
=
0
;
CC_id
<
NFAPI_CC_MAX
;
++
CC_id
)
{
for
(
CC_id
=
0
;
CC_id
<
RC
.
nb_mac_CC
[
Mod_id
]
;
++
CC_id
)
{
for
(
i
=
0
;
i
<
sli
->
n_dl
;
++
i
)
{
has_traffic
[
CC_id
][
i
]
=
0
;
for
(
UE_id
=
0
;
UE_id
<
MAX_MOBILES_PER_ENB
;
++
UE_id
)
{
...
...
@@ -1497,7 +1497,7 @@ void dlsch_scheduler_interslice_multiplexing(module_id_t Mod_id,
// MULTIPLEXING
// This part is an adaptation of dlsch_scheduler_pre_processor_allocate() code
for
(
CC_id
=
0
;
CC_id
<
NFAPI_CC_MAX
;
++
CC_id
)
{
for
(
CC_id
=
0
;
CC_id
<
RC
.
nb_mac_CC
[
Mod_id
]
;
++
CC_id
)
{
N_RB_DL
=
to_prb
(
RC
.
mac
[
Mod_id
]
->
common_channels
[
CC_id
].
mib
->
message
.
dl_Bandwidth
);
min_rb_unit
=
get_min_rb_unit
(
Mod_id
,
CC_id
);
...
...
@@ -1589,7 +1589,7 @@ void dlsch_scheduler_qos_multiplexing(module_id_t Mod_id, int frameP, sub_frame_
slice_info_t
*
sli
=
&
RC
.
mac
[
Mod_id
]
->
slice_info
;
//UE_sched_ctrl *ue_sched_ctl;
for
(
CC_id
=
0
;
CC_id
<
NFAPI_CC_MAX
;
++
CC_id
)
{
for
(
CC_id
=
0
;
CC_id
<
RC
.
nb_mac_CC
[
Mod_id
]
;
++
CC_id
)
{
for
(
i
=
0
;
i
<
sli
->
n_dl
;
++
i
)
{
// Sort UE again
...
...
@@ -1636,7 +1636,7 @@ fill_DLSCH_dci(module_id_t module_idP,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_FILL_DLSCH_DCI
,
VCD_FUNCTION_IN
);
for
(
CC_id
=
0
;
CC_id
<
NFAPI_CC_MAX
;
CC_id
++
)
{
for
(
CC_id
=
0
;
CC_id
<
RC
.
nb_mac_CC
[
module_idP
]
;
CC_id
++
)
{
LOG_D
(
MAC
,
"Doing fill DCI for CC_id %d
\n
"
,
CC_id
);
if
(
mbsfn_flagP
[
CC_id
]
>
0
)
...
...
@@ -1866,7 +1866,7 @@ void schedule_PCH(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP)
start_meas
(
&
eNB
->
schedule_pch
);
for
(
CC_id
=
0
;
CC_id
<
NFAPI_CC_MAX
;
CC_id
++
)
{
for
(
CC_id
=
0
;
CC_id
<
RC
.
nb_mac_CC
[
module_idP
]
;
CC_id
++
)
{
cc
=
&
eNB
->
common_channels
[
CC_id
];
vrb_map
=
(
void
*
)
&
cc
->
vrb_map
;
n_rb_dl
=
to_prb
(
cc
->
mib
->
message
.
dl_Bandwidth
);
...
...
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
View file @
ac07f693
...
...
@@ -1006,12 +1006,10 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP,
break
;
}
}
if
(
sched_subframe
<
subframeP
)
sched_frame
++
;
for
(
CC_id
=
0
;
CC_id
<
NFAPI_CC_MAX
;
CC_id
++
)
{
if
(
sched_subframe
<
subframeP
)
sched_frame
++
;
for
(
CC_id
=
0
;
CC_id
<
RC
.
nb_mac_CC
[
module_idP
];
CC_id
++
)
{
//leave out first RB for PUCCH
first_rb
[
CC_id
]
=
1
;
...
...
@@ -1090,7 +1088,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
nfapi_ul_config_request_body_t
*
ul_req_tmp_body
=
&
ul_req_tmp
->
ul_config_request_body
;
nfapi_ul_config_ulsch_harq_information
*
ulsch_harq_information
;
for
(
CC_id
=
0
;
CC_id
<
NFAPI_CC_MAX
;
++
CC_id
)
{
for
(
CC_id
=
0
;
CC_id
<
RC
.
nb_mac_CC
[
module_idP
]
;
++
CC_id
)
{
N_RB_UL
=
to_prb
(
cc
[
CC_id
].
ul_Bandwidth
);
UE_list
->
first_rb_offset
[
CC_id
][
slice_idx
]
=
cmin
(
N_RB_UL
,
sli
->
ul
[
slice_idx
].
first_rb
);
}
...
...
@@ -1098,7 +1096,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
//LOG_D(MAC, "entering ulsch preprocesor\n");
ulsch_scheduler_pre_processor
(
module_idP
,
slice_idx
,
frameP
,
subframeP
,
sched_subframeP
,
first_rb
);
for
(
CC_id
=
0
;
CC_id
<
NFAPI_CC_MAX
;
++
CC_id
)
{
for
(
CC_id
=
0
;
CC_id
<
RC
.
nb_mac_CC
[
module_idP
]
;
++
CC_id
)
{
first_rb_slice
[
CC_id
]
=
first_rb
[
CC_id
]
+
UE_list
->
first_rb_offset
[
CC_id
][
slice_idx
];
}
//LOG_D(MAC, "exiting ulsch preprocesor\n");
...
...
openair2/LAYER2/MAC/pre_processor.c
View file @
ac07f693
...
...
@@ -450,7 +450,7 @@ void decode_slice_positioning(module_id_t Mod_idP,
int
RBG
,
start_frequency
,
end_frequency
;
// Init slice_alloc_mask
for
(
CC_id
=
0
;
CC_id
<
NFAPI_CC_MAX
;
++
CC_id
)
{
for
(
CC_id
=
0
;
CC_id
<
RC
.
nb_mac_CC
[
Mod_idP
]
;
++
CC_id
)
{
for
(
RBG
=
0
;
RBG
<
N_RBG_MAX
;
++
RBG
)
{
slice_allocation_mask
[
CC_id
][
RBG
]
=
0
;
}
...
...
@@ -458,7 +458,7 @@ void decode_slice_positioning(module_id_t Mod_idP,
start_frequency
=
RC
.
mac
[
Mod_idP
]
->
slice_info
.
dl
[
slice_idx
].
pos_low
;
end_frequency
=
RC
.
mac
[
Mod_idP
]
->
slice_info
.
dl
[
slice_idx
].
pos_high
;
for
(
CC_id
=
0
;
CC_id
<
NFAPI_CC_MAX
;
++
CC_id
)
{
for
(
CC_id
=
0
;
CC_id
<
RC
.
nb_mac_CC
[
Mod_idP
]
;
++
CC_id
)
{
for
(
RBG
=
start_frequency
;
RBG
<=
end_frequency
;
++
RBG
)
{
slice_allocation_mask
[
CC_id
][
RBG
]
=
1
;
}
...
...
@@ -1418,7 +1418,7 @@ dlsch_scheduler_pre_processor_reset(module_id_t module_idP,
uint8_t
*
vrb_map
;
COMMON_channels_t
*
cc
;
//
for
(
CC_id
=
0
;
CC_id
<
NFAPI_CC_MAX
;
CC_id
++
)
{
for
(
CC_id
=
0
;
CC_id
<
RC
.
nb_mac_CC
[
module_idP
]
;
CC_id
++
)
{
LOG_D
(
MAC
,
"Running preprocessor for UE %d (%x)
\n
"
,
UE_id
,(
int
)(
UE_RNTI
(
module_idP
,
UE_id
)));
// initialize harq_pid and round
...
...
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