From c4228f6c9b02404f34865a8da1b63bb2c8a91d3f Mon Sep 17 00:00:00 2001 From: ChiehChun <chiehchun80348@gmail.com> Date: Fri, 11 Dec 2020 14:57:12 +0100 Subject: [PATCH] Change pre_precessor_ul type to bool - To check the current slot is the scheduled slot(UL slot - K2) and only execute the post processor in scheduled slot. --- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c | 11 ++++++----- openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c | 13 ++++++++----- openair2/LAYER2/NR_MAC_gNB/mac_proto.h | 4 ++-- openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h | 2 +- 4 files changed, 17 insertions(+), 13 deletions(-) diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c index 983db0af07..40a8aa9e21 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c @@ -370,7 +370,7 @@ void nr_preprocessor_phytest(module_id_t module_id, vrb_map[rb + sched_ctrl->rbStart] = 1; } -void nr_ul_preprocessor_phytest(module_id_t module_id, +bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_t slot, int num_slots_per_tdd, @@ -386,7 +386,7 @@ void nr_ul_preprocessor_phytest(module_id_t module_id, __func__, UE_info->num_UEs); if (UE_info->num_UEs == 0) - return; + return false; const int UE_id = 0; const int CC_id = 0; @@ -407,7 +407,7 @@ void nr_ul_preprocessor_phytest(module_id_t module_id, * limitations). Note that if K2 or the TDD configuration is changed, below * conditions might exclude each other and never be true */ if (!(is_xlsch_in_slot(ulsch_in_slot_bitmap, sched_slot) && sched_slot == 8)) - return; + return false; const int bw = NRRIV2BW(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth, 275); uint16_t rbStart = 0; @@ -425,7 +425,7 @@ void nr_ul_preprocessor_phytest(module_id_t module_id, frame, slot, i); - return; + return false; } } @@ -452,7 +452,7 @@ void nr_ul_preprocessor_phytest(module_id_t module_id, nr_of_candidates); if (sched_ctrl->cce_index < 0) { LOG_E(MAC, "%s(): CCE list not empty, couldn't schedule PUSCH\n", __func__); - return; + return false; } UE_info->num_pdcch_cand[UE_id][cid]++; @@ -503,4 +503,5 @@ void nr_ul_preprocessor_phytest(module_id_t module_id, /* mark the corresponding RBs as used */ for (int rb = rbStart; rb < rbStart + rbSize; rb++) vrb_map_UL[rb] = 1; + return true; } diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c index 201c7ca7e6..fcecad540b 100644 --- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c +++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c @@ -504,7 +504,7 @@ long get_K2(NR_BWP_Uplink_t *ubwp, int time_domain_assignment, int mu) { return 3; } -void nr_simple_ulsch_preprocessor(module_id_t module_id, +bool nr_simple_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t slot, int num_slots_per_tdd, @@ -520,7 +520,7 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id, __func__, UE_info->num_UEs); if (UE_info->num_UEs == 0) - return; + return false; const int UE_id = 0; const int CC_id = 0; @@ -537,7 +537,7 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id, const int sched_frame = frame + (slot + K2 >= num_slots_per_tdd); const int sched_slot = (slot + K2) % num_slots_per_tdd; if (!is_xlsch_in_slot(ulsch_in_slot_bitmap, sched_slot)) - return; + return false; sched_ctrl->sched_pusch.slot = sched_slot; sched_ctrl->sched_pusch.frame = sched_frame; @@ -564,7 +564,7 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id, nr_of_candidates); if (sched_ctrl->cce_index < 0) { LOG_D(MAC, "%s(): CCE list not empty, couldn't schedule PUSCH\n", __func__); - return; + return false; } UE_info->num_pdcch_cand[UE_id][cid]++; @@ -631,6 +631,7 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id, /* mark the corresponding RBs as used */ for (int rb = 0; rb < sched_ctrl->sched_pusch.rbSize; rb++) vrb_map_UL[rb + sched_ctrl->sched_pusch.rbStart] = 1; + return true; } void nr_schedule_ulsch(module_id_t module_id, @@ -645,8 +646,10 @@ void nr_schedule_ulsch(module_id_t module_id, LOG_D(MAC, "Current slot %d is NOT DL slot, cannot schedule DCI0 for UL data\n", slot); return; } - RC.nrmac[module_id]->pre_processor_ul( + bool do_sched = RC.nrmac[module_id]->pre_processor_ul( module_id, frame, slot, num_slots_per_tdd, ulsch_in_slot_bitmap); + if (!do_sched) + return; const int CC_id = 0; nfapi_nr_ul_dci_request_t *ul_dci_req = &RC.nrmac[module_id]->UL_dci_req[CC_id]; diff --git a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h index b88b5abec7..aec3f68544 100644 --- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h +++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h @@ -92,7 +92,7 @@ void nr_schedule_ulsch(module_id_t module_id, int ul_slots, uint64_t ulsch_in_slot_bitmap); -void nr_simple_ulsch_preprocessor(module_id_t module_id, +bool nr_simple_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t slot, int num_slots_per_tdd, @@ -149,7 +149,7 @@ void nr_preprocessor_phytest(module_id_t module_id, sub_frame_t slot); /* \brief UL preprocessor for phytest: schedules UE_id 0 with fixed MCS on a * fixed set of resources */ -void nr_ul_preprocessor_phytest(module_id_t module_id, +bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_t slot, int num_slots_per_tdd, diff --git a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h index 846283eba0..ad45b54b82 100644 --- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h +++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h @@ -513,7 +513,7 @@ typedef struct { typedef void (*nr_pp_impl_dl)(module_id_t mod_id, frame_t frame, sub_frame_t slot); -typedef void (*nr_pp_impl_ul)(module_id_t mod_id, +typedef bool (*nr_pp_impl_ul)(module_id_t mod_id, frame_t frame, sub_frame_t slot, int num_slots_per_tdd, -- 2.26.2