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Michael Black
OpenXG UE
Commits
c7f144a1
Commit
c7f144a1
authored
Dec 03, 2018
by
Guy De Souza
Browse files
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Plain Diff
more DCI changes
parent
a9582c06
Changes
4
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Showing
4 changed files
with
104 additions
and
115 deletions
+104
-115
openair1/PHY/NR_TRANSPORT/nr_dci.c
openair1/PHY/NR_TRANSPORT/nr_dci.c
+2
-3
openair1/PHY/NR_TRANSPORT/nr_dci.h
openair1/PHY/NR_TRANSPORT/nr_dci.h
+1
-1
openair1/PHY/NR_TRANSPORT/nr_dci_tools.c
openair1/PHY/NR_TRANSPORT/nr_dci_tools.c
+100
-110
openair1/PHY/NR_TRANSPORT/nr_pbch.c
openair1/PHY/NR_TRANSPORT/nr_pbch.c
+1
-1
No files found.
openair1/PHY/NR_TRANSPORT/nr_dci.c
View file @
c7f144a1
...
@@ -41,11 +41,10 @@ extern short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT];
...
@@ -41,11 +41,10 @@ extern short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT];
uint16_t
nr_get_dci_size
(
nfapi_nr_dci_format_e
format
,
uint16_t
nr_get_dci_size
(
nfapi_nr_dci_format_e
format
,
nfapi_nr_rnti_type_e
rnti_type
,
nfapi_nr_rnti_type_e
rnti_type
,
NR_BWP_PARMS
*
bwp
,
uint16_t
N_RB
,
nfapi_nr_config_request_t
*
config
)
nfapi_nr_config_request_t
*
config
)
{
{
uint16_t
size
=
0
;
uint16_t
size
=
0
;
uint16_t
N_RB
=
bwp
->
N_RB
;
switch
(
format
)
{
switch
(
format
)
{
/*Only sizes for 0_0 and 1_0 are correct at the moment*/
/*Only sizes for 0_0 and 1_0 are correct at the moment*/
...
@@ -53,7 +52,7 @@ uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
...
@@ -53,7 +52,7 @@ uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
/// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20
/// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20
size
+=
20
;
size
+=
20
;
size
+=
(
uint8_t
)
ceil
(
log2
(
(
N_RB
*
(
N_RB
+
1
))
>>
1
)
);
// Freq domain assignment -- hopping scenario to be updated
size
+=
(
uint8_t
)
ceil
(
log2
(
(
N_RB
*
(
N_RB
+
1
))
>>
1
)
);
// Freq domain assignment -- hopping scenario to be updated
size
+=
nr_get_dci_size
(
NFAPI_NR_DL_DCI_FORMAT_1_0
,
rnti_type
,
bwp
,
config
)
-
size
;
// Padding to match 1_0 size
size
+=
nr_get_dci_size
(
NFAPI_NR_DL_DCI_FORMAT_1_0
,
rnti_type
,
N_RB
,
config
)
-
size
;
// Padding to match 1_0 size
// UL/SUL indicator assumed to be 0
// UL/SUL indicator assumed to be 0
break
;
break
;
...
...
openair1/PHY/NR_TRANSPORT/nr_dci.h
View file @
c7f144a1
...
@@ -29,7 +29,7 @@ typedef unsigned __int128 uint128_t;
...
@@ -29,7 +29,7 @@ typedef unsigned __int128 uint128_t;
uint16_t
nr_get_dci_size
(
nfapi_nr_dci_format_e
format
,
uint16_t
nr_get_dci_size
(
nfapi_nr_dci_format_e
format
,
nfapi_nr_rnti_type_e
rnti_type
,
nfapi_nr_rnti_type_e
rnti_type
,
NR_BWP_PARMS
*
bwp
,
uint16_t
N_RB
,
nfapi_nr_config_request_t
*
config
);
nfapi_nr_config_request_t
*
config
);
uint8_t
nr_generate_dci_top
(
NR_gNB_PDCCH
pdcch_vars
,
uint8_t
nr_generate_dci_top
(
NR_gNB_PDCCH
pdcch_vars
,
...
...
openair1/PHY/NR_TRANSPORT/nr_dci_tools.c
View file @
c7f144a1
...
@@ -120,14 +120,14 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
...
@@ -120,14 +120,14 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
nfapi_nr_dl_config_pdcch_parameters_rel15_t
*
params_rel15
=
&
pdu
->
dci_dl_pdu
.
pdcch_params_rel15
;
nfapi_nr_dl_config_pdcch_parameters_rel15_t
*
params_rel15
=
&
pdu
->
dci_dl_pdu
.
pdcch_params_rel15
;
nfapi_nr_config_request_t
*
cfg
=
&
gNB
->
gNB_config
;
nfapi_nr_config_request_t
*
cfg
=
&
gNB
->
gNB_config
;
uint16_t
N_RB
=
fp
->
initial_bwp_dl
.
N_RB
;
uint16_t
N_RB
=
params_rel15
->
n_RB_BWP
;
uint8_t
fsize
=
0
,
pos
=
0
,
cand_idx
=
0
;
uint8_t
fsize
=
0
,
pos
=
0
,
cand_idx
=
0
;
dci_alloc
->
L
=
8
;
dci_alloc
->
L
=
8
;
memcpy
((
void
*
)
&
dci_alloc
->
pdcch_params
,
(
void
*
)
params_rel15
,
sizeof
(
nfapi_nr_dl_config_pdcch_parameters_rel15_t
));
memcpy
((
void
*
)
&
dci_alloc
->
pdcch_params
,
(
void
*
)
params_rel15
,
sizeof
(
nfapi_nr_dl_config_pdcch_parameters_rel15_t
));
dci_alloc
->
size
=
nr_get_dci_size
(
dci_alloc
->
pdcch_params
.
dci_format
,
dci_alloc
->
size
=
nr_get_dci_size
(
dci_alloc
->
pdcch_params
.
dci_format
,
dci_alloc
->
pdcch_params
.
rnti_type
,
dci_alloc
->
pdcch_params
.
rnti_type
,
&
fp
->
initial_bwp_dl
,
N_RB
,
cfg
);
cfg
);
Assert_Fatal
(
dci_alloc
->
size
<=
64
,
"DCI sizes above 64 bits not yet supported"
);
Assert_Fatal
(
dci_alloc
->
size
<=
64
,
"DCI sizes above 64 bits not yet supported"
);
n_shift
=
(
dci_alloc
->
pdcch_params
.
config_type
==
NFAPI_NR_CSET_CONFIG_MIB_SIB1
)
?
n_shift
=
(
dci_alloc
->
pdcch_params
.
config_type
==
NFAPI_NR_CSET_CONFIG_MIB_SIB1
)
?
...
@@ -156,10 +156,8 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
...
@@ -156,10 +156,8 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
for
(
int
i
=
0
;
i
<
2
;
i
++
)
for
(
int
i
=
0
;
i
<
2
;
i
++
)
*
dci_pdu
|=
((
pdu_rel15
->
tb_scaling
>>
(
1
-
i
))
&
1
)
<<
(
63
-
pos
++
);
*
dci_pdu
|=
((
pdu_rel15
->
tb_scaling
>>
(
1
-
i
))
&
1
)
<<
(
63
-
pos
++
);
break
;
break
;
}
break
;
case
NFAPI_NR_RNTI_C
:
case
NFAPI_NR_RNTI_C
:
// indicating a DL DCI format 1bit
// indicating a DL DCI format 1bit
*
dci_pdu
|=
(
pdu_rel15
->
format_indicator
&
1
)
<<
(
63
-
pos
++
);
*
dci_pdu
|=
(
pdu_rel15
->
format_indicator
&
1
)
<<
(
63
-
pos
++
);
// Freq domain assignment (275rb >> fsize = 16)
// Freq domain assignment (275rb >> fsize = 16)
...
@@ -169,8 +167,6 @@ case NFAPI_NR_RNTI_C:
...
@@ -169,8 +167,6 @@ case NFAPI_NR_RNTI_C:
if
((
pdu_rel15
->
frequency_domain_assignment
+
1
)
&
1
==
0
)
//fsize are all 1 38.212 p86
if
((
pdu_rel15
->
frequency_domain_assignment
+
1
)
&
1
==
0
)
//fsize are all 1 38.212 p86
{
{
printf
(
"***************************
\n
"
);
// ra_preamble_index 6 bits
// ra_preamble_index 6 bits
for
(
int
i
=
0
;
i
<
6
;
i
++
)
for
(
int
i
=
0
;
i
<
6
;
i
++
)
*
dci_pdu
|=
((
pdu_rel15
->
ra_preamble_index
>>
(
5
-
i
))
&
1
)
<<
(
63
-
pos
++
);
*
dci_pdu
|=
((
pdu_rel15
->
ra_preamble_index
>>
(
5
-
i
))
&
1
)
<<
(
63
-
pos
++
);
...
@@ -187,9 +183,9 @@ case NFAPI_NR_RNTI_C:
...
@@ -187,9 +183,9 @@ case NFAPI_NR_RNTI_C:
*
dci_pdu
|=
((
pdu_rel15
->
prach_mask_index
>>
(
3
-
i
))
&
1
)
<<
(
63
-
pos
++
);
*
dci_pdu
|=
((
pdu_rel15
->
prach_mask_index
>>
(
3
-
i
))
&
1
)
<<
(
63
-
pos
++
);
}
//end if
}
//end if
else
{
else
{
// Time domain assignment 4bit
// Time domain assignment 4bit
for
(
int
i
=
0
;
i
<
4
;
i
++
)
for
(
int
i
=
0
;
i
<
4
;
i
++
)
*
dci_pdu
|=
((
pdu_rel15
->
time_domain_assignment
>>
(
3
-
i
))
&
1
)
<<
(
63
-
pos
++
);
*
dci_pdu
|=
((
pdu_rel15
->
time_domain_assignment
>>
(
3
-
i
))
&
1
)
<<
(
63
-
pos
++
);
...
@@ -212,7 +208,6 @@ case NFAPI_NR_RNTI_C:
...
@@ -212,7 +208,6 @@ case NFAPI_NR_RNTI_C:
for
(
int
i
=
0
;
i
<
4
;
i
++
)
for
(
int
i
=
0
;
i
<
4
;
i
++
)
*
dci_pdu
|=
((
pdu_rel15
->
harq_pid
>>
(
3
-
i
))
&
1
)
<<
(
63
-
pos
++
);
*
dci_pdu
|=
((
pdu_rel15
->
harq_pid
>>
(
3
-
i
))
&
1
)
<<
(
63
-
pos
++
);
// Downlink assignment index 2bit
// Downlink assignment index 2bit
for
(
int
i
=
0
;
i
<
2
;
i
++
)
for
(
int
i
=
0
;
i
<
2
;
i
++
)
*
dci_pdu
|=
((
pdu_rel15
->
dai
>>
(
1
-
i
))
&
1
)
<<
(
63
-
pos
++
);
*
dci_pdu
|=
((
pdu_rel15
->
dai
>>
(
1
-
i
))
&
1
)
<<
(
63
-
pos
++
);
...
@@ -230,7 +225,6 @@ case NFAPI_NR_RNTI_C:
...
@@ -230,7 +225,6 @@ case NFAPI_NR_RNTI_C:
*
dci_pdu
|=
((
pdu_rel15
->
pdsch_to_harq_feedback_timing_indicator
>>
(
2
-
i
))
&
1
)
<<
(
63
-
pos
++
);
*
dci_pdu
|=
((
pdu_rel15
->
pdsch_to_harq_feedback_timing_indicator
>>
(
2
-
i
))
&
1
)
<<
(
63
-
pos
++
);
}
//end else
}
//end else
break
;
break
;
case
NFAPI_NR_RNTI_P
:
case
NFAPI_NR_RNTI_P
:
...
@@ -319,10 +313,8 @@ case NFAPI_NR_RNTI_C:
...
@@ -319,10 +313,8 @@ case NFAPI_NR_RNTI_C:
for
(
int
i
=
0
;
i
<
3
;
i
++
)
for
(
int
i
=
0
;
i
<
3
;
i
++
)
*
dci_pdu
|=
((
pdu_rel15
->
pdsch_to_harq_feedback_timing_indicator
>>
(
2
-
i
))
&
1
)
<<
(
63
-
pos
++
);
*
dci_pdu
|=
((
pdu_rel15
->
pdsch_to_harq_feedback_timing_indicator
>>
(
2
-
i
))
&
1
)
<<
(
63
-
pos
++
);
///-----------------------------------?????????????????????------------------------
break
;
break
;
}
}
break
;
case
NFAPI_NR_UL_DCI_FORMAT_0_0
:
case
NFAPI_NR_UL_DCI_FORMAT_0_0
:
switch
(
params_rel15
->
rnti_type
)
switch
(
params_rel15
->
rnti_type
)
...
@@ -331,7 +323,7 @@ case NFAPI_NR_RNTI_C:
...
@@ -331,7 +323,7 @@ case NFAPI_NR_RNTI_C:
// indicating a DL DCI format 1bit
// indicating a DL DCI format 1bit
*
dci_pdu
|=
(
pdu_rel15
->
format_indicator
&
1
)
<<
(
63
-
pos
++
);
*
dci_pdu
|=
(
pdu_rel15
->
format_indicator
&
1
)
<<
(
63
-
pos
++
);
// Freq domain assignment max 16 bit
// Freq domain assignment max 16 bit
fsize
=
(
int
)
ceil
(
log2
(
(
N_RB
_UL
*
(
N_RB_UL
+
1
))
>>
1
)
);
fsize
=
(
int
)
ceil
(
log2
(
(
N_RB
*
(
N_RB
+
1
))
>>
1
)
);
for
(
int
i
=
0
;
i
<
fsize
;
i
++
)
for
(
int
i
=
0
;
i
<
fsize
;
i
++
)
*
dci_pdu
|=
((
pdu_rel15
->
frequency_domain_assignment
>>
(
fsize
-
i
-
1
))
&
1
)
<<
(
63
-
pos
++
);
*
dci_pdu
|=
((
pdu_rel15
->
frequency_domain_assignment
>>
(
fsize
-
i
-
1
))
&
1
)
<<
(
63
-
pos
++
);
// Time domain assignment 4bit
// Time domain assignment 4bit
...
@@ -370,7 +362,7 @@ case NFAPI_NR_RNTI_C:
...
@@ -370,7 +362,7 @@ case NFAPI_NR_RNTI_C:
// indicating a DL DCI format 1bit
// indicating a DL DCI format 1bit
*
dci_pdu
|=
(
pdu_rel15
->
format_indicator
&
1
)
<<
(
63
-
pos
++
);
*
dci_pdu
|=
(
pdu_rel15
->
format_indicator
&
1
)
<<
(
63
-
pos
++
);
// Freq domain assignment max 16 bit
// Freq domain assignment max 16 bit
fsize
=
(
int
)
ceil
(
log2
(
(
N_RB
_UL
*
(
N_RB_UL
+
1
))
>>
1
)
);
fsize
=
(
int
)
ceil
(
log2
(
(
N_RB
*
(
N_RB
+
1
))
>>
1
)
);
for
(
int
i
=
0
;
i
<
fsize
;
i
++
)
for
(
int
i
=
0
;
i
<
fsize
;
i
++
)
*
dci_pdu
|=
((
pdu_rel15
->
frequency_domain_assignment
>>
(
fsize
-
i
-
1
))
&
1
)
<<
(
63
-
pos
++
);
*
dci_pdu
|=
((
pdu_rel15
->
frequency_domain_assignment
>>
(
fsize
-
i
-
1
))
&
1
)
<<
(
63
-
pos
++
);
// Time domain assignment 4bit
// Time domain assignment 4bit
...
@@ -406,10 +398,8 @@ case NFAPI_NR_RNTI_C:
...
@@ -406,10 +398,8 @@ case NFAPI_NR_RNTI_C:
}
}
break
;
break
;
}
}
}
LOG_I
(
PHY
,
"DCI PDU: [0]->0x%08x
\t
[1]->0x%08x
\t
[2]->0x%08x
\t
[3]->0x%08x
\n
"
,
LOG_I
(
PHY
,
"DCI PDU: [0]->0x%16x
\t
[1]->0x%16x
\n
"
,
dci_pdu
[
0
],
dci_pdu
[
1
]);
dci_pdu
[
0
],
dci_pdu
[
1
],
dci_pdu
[
2
],
dci_pdu
[
3
]);
LOG_I
(
PHY
,
"DCI type %d payload (size %d) generated on candidate %d
\n
"
,
dci_alloc
->
pdcch_params
.
dci_format
,
dci_alloc
->
size
,
cand_idx
);
LOG_I
(
PHY
,
"DCI type %d payload (size %d) generated on candidate %d
\n
"
,
dci_alloc
->
pdcch_params
.
dci_format
,
dci_alloc
->
size
,
cand_idx
);
}
}
openair1/PHY/NR_TRANSPORT/nr_pbch.c
View file @
c7f144a1
...
@@ -305,7 +305,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
...
@@ -305,7 +305,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
#endif
#endif
/// CRC, coding and rate matching
/// CRC, coding and rate matching
polar_encoder_fast
((
int64_t
*
)
&
pbch
->
pbch_a_prime
,
(
uint32_t
*
)
pbch
->
pbch_e
,
0
,
polar_params
);
polar_encoder_fast
((
u
int64_t
*
)
&
pbch
->
pbch_a_prime
,
(
uint32_t
*
)
pbch
->
pbch_e
,
0
,
polar_params
);
#ifdef DEBUG_PBCH_ENCODING
#ifdef DEBUG_PBCH_ENCODING
printf
(
"Channel coding:
\n
"
);
printf
(
"Channel coding:
\n
"
);
for
(
int
i
=
0
;
i
<
NR_POLAR_PBCH_E_DWORD
;
i
++
)
for
(
int
i
=
0
;
i
<
NR_POLAR_PBCH_E_DWORD
;
i
++
)
...
...
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