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OpenXG
OpenXG UE
Commits
dcfe8097
Commit
dcfe8097
authored
Jan 28, 2019
by
Guy De Souza
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Physical channel/ Scheduling changes
parent
5ecdceeb
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9 changed files
with
299 additions
and
67 deletions
+299
-67
nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
+2
-0
openair1/PHY/NR_TRANSPORT/nr_dci.c
openair1/PHY/NR_TRANSPORT/nr_dci.c
+69
-45
openair1/PHY/NR_TRANSPORT/nr_dci_tools.c
openair1/PHY/NR_TRANSPORT/nr_dci_tools.c
+2
-1
openair1/SCHED_NR/phy_procedures_nr_gNB.c
openair1/SCHED_NR/phy_procedures_nr_gNB.c
+2
-2
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+14
-2
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+144
-0
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+26
-11
openair2/LAYER2/NR_MAC_gNB/main.c
openair2/LAYER2/NR_MAC_gNB/main.c
+36
-6
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+4
-0
No files found.
nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
View file @
dcfe8097
...
...
@@ -14,6 +14,8 @@
#define NFAPI_NR_MAX_NB_CCE_AGGREGATION_LEVELS 5
#define NFAPI_NR_MAX_NB_TCI_STATES_PDCCH 64
#define NFAPI_NR_MAX_NB_CORESETS 12
#define NFAPI_NR_MAX_NB_SEARCH_SPACES 40
// Extension to the generic structures for single tlv values
typedef
struct
{
...
...
openair1/PHY/NR_TRANSPORT/nr_dci.c
View file @
dcfe8097
...
...
@@ -20,7 +20,7 @@
*/
/*! \file PHY/NR_TRANSPORT/nr_dci.c
* \brief Implements DCI encoding and PDCCH TX procedures (38.212/38.213/38.214). V15.
2.0 2018-06
.
* \brief Implements DCI encoding and PDCCH TX procedures (38.212/38.213/38.214). V15.
4.0 2019-01
.
* \author Guy De Souza
* \date 2018
* \version 0.1
...
...
@@ -32,8 +32,8 @@
#include "nr_dci.h"
//
#define DEBUG_PDCCH_DMRS
//
#define DEBUG_DCI
#define DEBUG_PDCCH_DMRS
#define DEBUG_DCI
//#define DEBUG_CHANNEL_CODING
#define PDCCH_TEST_POLAR_TEMP_FIX
...
...
@@ -169,8 +169,10 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
{
int16_t
mod_dmrs
[
NR_MAX_CSET_DURATION
][
NR_MAX_PDCCH_DMRS_LENGTH
>>
1
];
// 3 for the max coreset duration
uint8_t
idx
=
0
;
uint16_t
a
;
uint32_t
dmrs_seq
[
NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD
];
uint16_t
dmrs_offset
=
0
;
uint16_t
cset_start_sc
;
uint8_t
cset_start_symb
,
cset_nsymb
;
int
k
,
l
,
k_prime
,
dci_idx
,
dmrs_idx
;
nr_cce_t
cce
;
nr_reg_t
reg
;
...
...
@@ -183,48 +185,69 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
uint16_t
encoded_length
=
dci_alloc
.
L
*
108
;
//2(QPSK)*9(per RB)*6(REG per CCE)
/*The coreset is initialised
* in frequency: the first subcarrier is obtained by adding the first CRB overlapping the SSB and the rb_offset
* in frequency: the first subcarrier is obtained by adding the first CRB overlapping the SSB and the rb_offset for coreset 0
* or the rb_offset for other coresets
* in time: by its first slot and its first symbol*/
uint16_t
cset_start_sc
=
frame_parms
.
first_carrier_offset
+
((
int
)
floor
(
frame_parms
.
ssb_start_subcarrier
/
NR_NB_SC_PER_RB
)
+
pdcch_params
.
rb_offset
)
*
NR_NB_SC_PER_RB
;
// uint8_t cset_start_symb = pdcch_params.first_slot*frame_parms.symbols_per_slot + pdcch_params.first_symbol;
uint8_t
cset_start_symb
=
pdcch_params
.
first_symbol
;
uint8_t
cset_nsymb
=
pdcch_params
.
n_symb
;
if
(
pdcch_params
.
config_type
==
NFAPI_NR_CSET_CONFIG_MIB_SIB1
)
cset_start_sc
=
frame_parms
.
first_carrier_offset
+
frame_parms
.
ssb_start_subcarrier
/
NR_NB_SC_PER_RB
+
pdcch_params
.
rb_offset
*
NR_NB_SC_PER_RB
;
else
cset_start_sc
=
frame_parms
.
first_carrier_offset
+
pdcch_params
.
rb_offset
*
NR_NB_SC_PER_RB
;
cset_start_symb
=
pdcch_params
.
first_symbol
;
cset_nsymb
=
pdcch_params
.
n_symb
;
dci_idx
=
0
;
LOG_I
(
PHY
,
"Coreset starting subcarrier %d on symbol %d (%d symbols)
\n
"
,
cset_start_sc
,
cset_start_symb
,
cset_nsymb
);
/// DMRS QPSK modulation
/*There is a need to shift from which index the pregenerated DMRS sequence is used
* see 38211 r15.2.0 section 7.4.1.3.2: assumption is the reference point for k refers to the DMRS sequence*/
if
(
pdcch_params
.
config_type
==
NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG
)
gold_pdcch_dmrs
+=
((
int
)
floor
(
frame_parms
.
ssb_start_subcarrier
/
NR_NB_SC_PER_RB
)
+
pdcch_params
.
rb_offset
)
*
3
/
32
;
if
(
pdcch_params
.
config_type
==
NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG
)
{
gold_pdcch_dmrs
+=
(
pdcch_params
.
rb_offset
*
3
)
>>
5
;
dmrs_offset
=
(
pdcch_params
.
rb_offset
*
3
)
&
0x1f
;
LOG_I
(
PHY
,
"PDCCH DMRS offset %d
\n
"
,
dmrs_offset
);
}
for
(
int
symb
=
cset_start_symb
;
symb
<
cset_start_symb
+
pdcch_params
.
n_symb
;
symb
++
)
{
for
(
int
i
=
0
;
i
<
dmrs_length
>>
1
;
i
++
)
{
idx
=
((((
gold_pdcch_dmrs
[
symb
][(
i
<<
1
)
>>
5
])
>>
((
i
<<
1
)
&
0x1f
))
&
1
)
<<
1
)
^
(((
gold_pdcch_dmrs
[
symb
][((
i
<<
1
)
+
1
)
>>
5
])
>>
(((
i
<<
1
)
+
1
)
&
0x1f
))
&
1
);
mod_dmrs
[
symb
][
i
<<
1
]
=
nr_mod_table
[(
NR_MOD_TABLE_QPSK_OFFSET
+
idx
)
<<
1
];
mod_dmrs
[
symb
][(
i
<<
1
)
+
1
]
=
nr_mod_table
[((
NR_MOD_TABLE_QPSK_OFFSET
+
idx
)
<<
1
)
+
1
];
#ifdef DEBUG_PDCCH_DMRS
printf
(
"symb %d i %d idx %d gold seq %u b0-b1 %d-%d mod_dmrs %d %d
\n
"
,
symb
,
i
,
idx
,
gold_pdcch_dmrs
[
symb
][(
i
<<
1
)
>>
5
],
(((
gold_pdcch_dmrs
[
symb
][(
i
<<
1
)
>>
5
])
>>
((
i
<<
1
)
&
0x1f
))
&
1
),
(((
gold_pdcch_dmrs
[
symb
][((
i
<<
1
)
+
1
)
>>
5
])
>>
(((
i
<<
1
)
+
1
)
&
0x1f
))
&
1
),
mod_dmrs
[
symb
][(
i
<<
1
)],
mod_dmrs
[
symb
][(
i
<<
1
)
+
1
]);
#endif
if
(
dmrs_offset
)
{
// a non zero offset requires the DMRS sequence to be rearranged
memset
(
dmrs_seq
,
0
,
NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD
*
sizeof
(
uint32_t
));
for
(
int
i
=
0
;
i
<
dmrs_length
;
i
++
)
{
dmrs_seq
[(
i
>>
5
)]
|=
((
gold_pdcch_dmrs
[
symb
][(
i
+
dmrs_offset
)
>>
5
]
>>
((
i
+
dmrs_offset
)
&
0x1f
))
&
1
)
<<
(
i
&
0x1f
);
#ifdef DEBUG_PDCCH_DMRS
//printf("out 0x%08x in 0x%08x \n", dmrs_seq[(i>>5)], gold_pdcch_dmrs[symb][(i+dmrs_offset)>>5]);
#endif
}
nr_modulation
(
dmrs_seq
,
dmrs_length
,
MOD_QPSK
,
mod_dmrs
[
symb
]);
}
else
nr_modulation
(
gold_pdcch_dmrs
[
symb
],
dmrs_length
,
MOD_QPSK
,
mod_dmrs
[
symb
]);
#ifdef DEBUG_PDCCH_DMRS
for
(
int
i
=
0
;
i
<
dmrs_length
>>
1
;
i
++
)
if
(
dmrs_offset
)
printf
(
"symb %d i %d gold seq 0x%08x mod_dmrs %d %d
\n
"
,
symb
,
i
,
dmrs_seq
[
i
>>
5
],
mod_dmrs
[
symb
][
i
<<
1
],
mod_dmrs
[
symb
][(
i
<<
1
)
+
1
]
);
else
printf
(
"symb %d i %d gold seq 0x%08x mod_dmrs %d %d
\n
"
,
symb
,
i
,
gold_pdcch_dmrs
[
symb
][
i
>>
5
],
mod_dmrs
[
symb
][
i
<<
1
],
mod_dmrs
[
symb
][(
i
<<
1
)
+
1
]
);
#endif
}
/// DCI payload processing
// CRC attachment + Scrambling + Channel coding + Rate matching
uint32_t
encoder_output
[
NR_MAX_DCI_SIZE_DWORD
];
uint16_t
n_RNTI
=
(
pdcch_params
.
search_space_type
==
NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC
)
?
((
pdcch_params
.
scrambling_id
)
?
pdcch_params
.
rnti
:
0
)
:
0
;
uint16_t
Nid
=
(
pdcch_params
.
search_space_type
==
NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC
)
?
pdcch_params
.
scrambling_id
:
config
.
sch_config
.
physical_cell_id
.
value
;
//#ifdef PDCCH_TEST_POLAR_TEMP_FIX
// nr_polar_init(¤tPtr, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
// t_nrPolar_paramsPtr currentPtr = nr_polar_params(*nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
//#else
uint16_t
n_RNTI
=
(
pdcch_params
.
search_space_type
==
NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC
)
?
((
pdcch_params
.
scrambling_id
)
?
pdcch_params
.
rnti
:
0
)
:
0
;
uint16_t
Nid
=
(
pdcch_params
.
search_space_type
==
NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC
)
?
pdcch_params
.
scrambling_id
:
config
.
sch_config
.
physical_cell_id
.
value
;
nr_polar_init
(
nrPolar_params
,
NR_POLAR_DCI_MESSAGE_TYPE
,
dci_alloc
.
size
,
dci_alloc
.
L
);
t_nrPolar_paramsPtr
currentPtr
=
nr_polar_params
(
*
nrPolar_params
,
NR_POLAR_DCI_MESSAGE_TYPE
,
dci_alloc
.
size
,
dci_alloc
.
L
);
//#endif
//polar_encoder_dci(dci_alloc.dci_pdu, encoder_output, currentPtr, pdcch_params.rnti);
polar_encoder_fast
(
dci_alloc
.
dci_pdu
,
encoder_output
,
pdcch_params
.
rnti
,
currentPtr
);
#ifdef DEBUG_CHANNEL_CODING
...
...
@@ -247,17 +270,13 @@ printf("scrambled output: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%0
scrambled_output
[
6
],
scrambled_output
[
7
],
scrambled_output
[
8
],
scrambled_output
[
9
],
scrambled_output
[
10
],
scrambled_output
[
11
]
);
#endif
// QPSK modulation
/
// QPSK modulation
int16_t
mod_dci
[
NR_MAX_DCI_SIZE
>>
1
];
for
(
int
i
=
0
;
i
<
encoded_length
>>
1
;
i
++
)
{
idx
=
((((
scrambled_output
[(
i
<<
1
)
>>
5
])
>>
((
i
<<
1
)
&
0x1f
))
&
1
)
<<
1
)
^
(((
scrambled_output
[((
i
<<
1
)
+
1
)
>>
5
])
>>
(((
i
<<
1
)
+
1
)
&
0x1f
))
&
1
);
mod_dci
[
i
<<
1
]
=
nr_mod_table
[(
NR_MOD_TABLE_QPSK_OFFSET
+
idx
)
<<
1
];
mod_dci
[(
i
<<
1
)
+
1
]
=
nr_mod_table
[((
NR_MOD_TABLE_QPSK_OFFSET
+
idx
)
<<
1
)
+
1
];
nr_modulation
(
scrambled_output
,
encoded_length
,
MOD_QPSK
,
mod_dci
);
#ifdef DEBUG_DCI
printf
(
"i %d idx %d b0-b1 %d-%d mod_dci %d %d
\n
"
,
i
,
idx
,
(((
scrambled_output
[(
i
<<
1
)
>>
5
])
>>
((
i
<<
1
)
&
0x1f
))
&
1
),
(((
scrambled_output
[((
i
<<
1
)
+
1
)
>>
5
])
>>
(((
i
<<
1
)
+
1
)
&
0x1f
))
&
1
),
mod_dci
[(
i
<<
1
)],
mod_dci
[(
i
<<
1
)
+
1
]
);
for
(
int
i
=
0
;
i
<
encoded_length
>>
1
;
i
++
)
printf
(
"i %d mod_dci %d %d
\n
"
,
i
,
mod_dci
[
i
<<
1
],
mod_dci
[(
i
<<
1
)
+
1
]
);
#endif
}
/// Resource mapping
...
...
@@ -289,10 +308,11 @@ printf("scrambled output: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%0
dmrs_idx
=
0
;
k
=
cset_start_sc
+
1
;
while
(
dmrs_idx
<
3
*
pdcch_params
.
n_rb
)
{
((
int16_t
*
)
txdataF
)[(
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
]
=
(
amp
*
mod_dmrs
[
l
][
dmrs_idx
<<
1
])
>>
15
;
((
int16_t
*
)
txdataF
)[((
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
)
+
1
]
=
(
amp
*
mod_dmrs
[
l
][(
dmrs_idx
<<
1
)
+
1
])
>>
15
;
((
int16_t
*
)
txdataF
)[(
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
]
=
(
(
amp
>>
1
)
*
mod_dmrs
[
l
][
dmrs_idx
<<
1
])
>>
15
;
((
int16_t
*
)
txdataF
)[((
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
)
+
1
]
=
(
(
amp
>>
1
)
*
mod_dmrs
[
l
][(
dmrs_idx
<<
1
)
+
1
])
>>
15
;
#ifdef DEBUG_PDCCH_DMRS
printf
(
"symbol %d position %d => (%d,%d)
\n
"
,
l
,
k
,((
int16_t
*
)
txdataF
[
aa
])[(
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
]
,
((
int16_t
*
)
txdataF
[
aa
])[((
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
)
+
1
]);
printf
(
"symbol %d position %d => (%d,%d)
\n
"
,
l
,
k
,((
int16_t
*
)
txdataF
)[(
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
]
,
((
int16_t
*
)
txdataF
)[((
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
)
+
1
]);
#endif
k
+=
4
;
if
(
k
>=
frame_parms
.
ofdm_symbol_size
)
...
...
@@ -315,19 +335,23 @@ printf("scrambled output: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%0
for
(
int
m
=
0
;
m
<
NR_NB_SC_PER_RB
;
m
++
)
{
if
(
m
==
(
k_prime
<<
2
)
+
1
)
{
// DMRS if not already mapped
if
(
pdcch_params
.
precoder_granularity
==
NFAPI_NR_CSET_SAME_AS_REG_BUNDLE
)
{
((
int16_t
*
)
txdataF
)[(
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
]
=
(
amp
*
mod_dmrs
[
l
][
dmrs_idx
<<
1
])
>>
15
;
((
int16_t
*
)
txdataF
)[((
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
)
+
1
]
=
(
amp
*
mod_dmrs
[
l
][(
dmrs_idx
<<
1
)
+
1
])
>>
15
;
((
int16_t
*
)
txdataF
)[(
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
]
=
(
(
amp
>>
1
)
*
mod_dmrs
[
l
][
dmrs_idx
<<
1
])
>>
15
;
((
int16_t
*
)
txdataF
)[((
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
)
+
1
]
=
(
(
amp
>>
1
)
*
mod_dmrs
[
l
][(
dmrs_idx
<<
1
)
+
1
])
>>
15
;
#ifdef DEBUG_PDCCH_DMRS
printf
(
"l %d position %d => (%d,%d)
\n
"
,
l
,
k
,((
int16_t
*
)
txdataF
[
aa
])[(
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
]
,
((
int16_t
*
)
txdataF
[
aa
])[((
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
)
+
1
]);
printf
(
"l %d position %d => (%d,%d)
\n
"
,
l
,
k
,((
int16_t
*
)
txdataF
)[(
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
]
,
((
int16_t
*
)
txdataF
)[((
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
)
+
1
]);
#endif
k_prime
++
;
dmrs_idx
++
;
}
k_prime
++
;
}
else
{
// DCI payload
((
int16_t
*
)
txdataF
)[(
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
]
=
(
amp
*
mod_dci
[
dci_idx
<<
1
])
>>
15
;
((
int16_t
*
)
txdataF
)[((
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
)
+
1
]
=
(
amp
*
mod_dci
[(
dci_idx
<<
1
)
+
1
])
>>
15
;
//printf("dci output %d %d\n",(a * mod_dci[dci_idx<<1]) >> 15, (a * mod_dci[(dci_idx<<1) + 1]) >> 15);
#ifdef DEBUG_DCI
printf
(
"l %d position %d => (%d,%d)
\n
"
,
l
,
k
,((
int16_t
*
)
txdataF
)[(
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
]
,
((
int16_t
*
)
txdataF
)[((
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
)
+
1
]);
#endif
dci_idx
++
;
}
k
++
;
...
...
openair1/PHY/NR_TRANSPORT/nr_dci_tools.c
View file @
dcfe8097
...
...
@@ -62,7 +62,8 @@ void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t* dci_alloc, uint16_t n_shift, uint8_t m
}
uint8_t
cond
=
N_reg
%
(
bsize
*
R
);
AssertFatal
(
cond
==
0
,
"CCE to REG interleaving: Invalid configuration leading to non integer C
\n
"
);
AssertFatal
(
cond
==
0
,
"CCE to REG interleaving: Invalid configuration leading to non integer C (N_reg %d, bsize %d R %d)
\n
"
,
N_reg
,
bsize
,
R
);
C
=
N_reg
/
(
bsize
*
R
);
tmp
=
L
*
((
Y
+
(
m
*
N_cce
)
/
(
L
*
M_s_max
)
+
n_CI
)
%
(
N_cce
/
L
));
...
...
openair1/SCHED_NR/phy_procedures_nr_gNB.c
View file @
dcfe8097
...
...
@@ -204,14 +204,14 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
gNB
->
nr_gold_pdcch_dmrs
[
slot
],
gNB
->
common_vars
.
txdataF
[
0
],
AMP
,
*
fp
,
*
cfg
);
if
(
num_pdsch_rnti
)
{
/*
if (num_pdsch_rnti) {
LOG_I(PHY, "PDSCH generation started (%d)\n", num_pdsch_rnti);
nr_generate_pdsch(*gNB->dlsch[0][0],
gNB->pdcch_vars.dci_alloc[0],
gNB->nr_gold_pdsch_dmrs[slot],
gNB->common_vars.txdataF,
AMP, slot, *fp, *cfg);
}
}
*/
}
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX
+
offset
,
0
);
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
View file @
dcfe8097
...
...
@@ -322,6 +322,16 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
nfapi_nr_config_request_t
*
cfg
=
&
RC
.
nrmac
[
module_idP
]
->
config
[
CC_id
];
nfapi_nr_coreset_t
coreset
=
RC
.
nrmac
[
module_idP
]
->
coreset
[
CC_id
][
1
];
nfapi_nr_search_space_t
search_space
=
RC
.
nrmac
[
module_idP
]
->
search_space
[
CC_id
][
1
];
if
(
nr_is_dci_opportunity
(
search_space
,
coreset
,
frameP
,
slotP
,
*
cfg
))
nr_schedule_uss_dlsch_phytest
(
module_idP
,
frameP
,
slotP
);
rnti
=
UE_RNTI
(
module_idP
,
i
);
CC_id
=
UE_PCCID
(
module_idP
,
i
);
int
spf
=
get_spf
(
cfg
);
...
...
@@ -424,9 +434,11 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
// Phytest scheduling/ option not activated because of pending bug
if
(
slotP
==
2
)
nr_schedule_css_dlsch_phytest
(
module_idP
,
frameP
,
slotP
);
/*
if (slotP==2)
nr_schedule_css_dlsch_phytest(module_idP, frameP, slotP);
*/
if
(
slotP
==
2
)
nr_schedule_uss_dlsch_phytest
(
module_idP
,
frameP
,
slotP
);
/*
// Allocate CCEs for good after scheduling is done
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @
dcfe8097
...
...
@@ -180,3 +180,147 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
}
}
/*Scheduling of DLSCH with associated DCI in user specific search space
* current version has only a DCI for type 1 PDCCH for C_RNTI*/
void
nr_schedule_uss_dlsch_phytest
(
module_id_t
module_idP
,
frame_t
frameP
,
sub_frame_t
slotP
)
{
uint8_t
CC_id
;
gNB_MAC_INST
*
nr_mac
=
RC
.
nrmac
[
module_idP
];
//NR_COMMON_channels_t *cc = nr_mac->common_channels;
nfapi_nr_dl_config_request_body_t
*
dl_req
;
nfapi_nr_dl_config_request_pdu_t
*
dl_config_dci_pdu
;
nfapi_nr_dl_config_request_pdu_t
*
dl_config_dlsch_pdu
;
nfapi_tx_request_pdu_t
*
TX_req
;
nfapi_nr_config_request_t
*
cfg
=
&
nr_mac
->
config
[
0
];
uint16_t
rnti
=
0x1234
;
uint16_t
sfn_sf
=
frameP
<<
7
|
slotP
;
int
dl_carrier_bandwidth
=
cfg
->
rf_config
.
dl_carrier_bandwidth
.
value
;
// everything here is hard-coded to 30 kHz
int
scs
=
get_dlscs
(
cfg
);
int
slots_per_frame
=
get_spf
(
cfg
);
for
(
CC_id
=
0
;
CC_id
<
MAX_NUM_CCs
;
CC_id
++
)
{
LOG_I
(
MAC
,
"Scheduling UE specific search space DCI type 1 for CC_id %d
\n
"
,
CC_id
);
nfapi_nr_coreset_t
*
coreset
=
&
nr_mac
->
coreset
[
CC_id
][
1
];
nfapi_nr_search_space_t
*
search_space
=
&
nr_mac
->
search_space
[
CC_id
][
1
];
dl_req
=
&
nr_mac
->
DL_req
[
CC_id
].
dl_config_request_body
;
dl_config_dci_pdu
=
&
dl_req
->
dl_config_pdu_list
[
dl_req
->
number_pdu
];
memset
((
void
*
)
dl_config_dci_pdu
,
0
,
sizeof
(
nfapi_nr_dl_config_request_pdu_t
));
dl_config_dci_pdu
->
pdu_type
=
NFAPI_NR_DL_CONFIG_DCI_DL_PDU_TYPE
;
dl_config_dci_pdu
->
pdu_size
=
(
uint8_t
)(
2
+
sizeof
(
nfapi_nr_dl_config_dci_dl_pdu
));
dl_config_dlsch_pdu
=
&
dl_req
->
dl_config_pdu_list
[
dl_req
->
number_pdu
+
1
];
memset
((
void
*
)
dl_config_dlsch_pdu
,
0
,
sizeof
(
nfapi_nr_dl_config_request_pdu_t
));
dl_config_dlsch_pdu
->
pdu_type
=
NFAPI_NR_DL_CONFIG_DLSCH_PDU_TYPE
;
dl_config_dlsch_pdu
->
pdu_size
=
(
uint8_t
)(
2
+
sizeof
(
nfapi_nr_dl_config_dlsch_pdu
));
nfapi_nr_dl_config_dci_dl_pdu_rel15_t
*
pdu_rel15
=
&
dl_config_dci_pdu
->
dci_dl_pdu
.
dci_dl_pdu_rel15
;
nfapi_nr_dl_config_pdcch_parameters_rel15_t
*
params_rel15
=
&
dl_config_dci_pdu
->
dci_dl_pdu
.
pdcch_params_rel15
;
nfapi_nr_dl_config_dlsch_pdu_rel15_t
*
dlsch_pdu_rel15
=
&
dl_config_dlsch_pdu
->
dlsch_pdu
.
dlsch_pdu_rel15
;
dlsch_pdu_rel15
->
start_prb
=
0
;
dlsch_pdu_rel15
->
n_prb
=
50
;
dlsch_pdu_rel15
->
start_symbol
=
2
;
dlsch_pdu_rel15
->
nb_symbols
=
8
;
dlsch_pdu_rel15
->
rnti
=
rnti
;
dlsch_pdu_rel15
->
nb_layers
=
1
;
dlsch_pdu_rel15
->
nb_codewords
=
1
;
dlsch_pdu_rel15
->
mcs_idx
=
9
;
dlsch_pdu_rel15
->
ndi
=
1
;
dlsch_pdu_rel15
->
redundancy_version
=
0
;
nr_configure_dci_from_pdcch_config
(
params_rel15
,
coreset
,
search_space
,
cfg
);
pdu_rel15
->
frequency_domain_assignment
=
get_RIV
(
dlsch_pdu_rel15
->
start_prb
,
dlsch_pdu_rel15
->
n_prb
,
cfg
->
rf_config
.
dl_carrier_bandwidth
.
value
);
pdu_rel15
->
time_domain_assignment
=
get_SLIV
(
dlsch_pdu_rel15
->
start_symbol
,
dlsch_pdu_rel15
->
nb_symbols
);
pdu_rel15
->
vrb_to_prb_mapping
=
1
;
pdu_rel15
->
mcs
=
9
;
pdu_rel15
->
tb_scaling
=
1
;
pdu_rel15
->
ra_preamble_index
=
25
;
pdu_rel15
->
format_indicator
=
1
;
pdu_rel15
->
ndi
=
1
;
pdu_rel15
->
rv
=
0
;
pdu_rel15
->
harq_pid
=
0
;
pdu_rel15
->
dai
=
2
;
pdu_rel15
->
tpc
=
2
;
pdu_rel15
->
pucch_resource_indicator
=
7
;
pdu_rel15
->
pdsch_to_harq_feedback_timing_indicator
=
7
;
LOG_I
(
MAC
,
"[gNB scheduler phytest] DCI type 1 payload: freq_alloc %d, time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d
\n
"
,
pdu_rel15
->
frequency_domain_assignment
,
pdu_rel15
->
time_domain_assignment
,
pdu_rel15
->
vrb_to_prb_mapping
,
pdu_rel15
->
mcs
,
pdu_rel15
->
tb_scaling
,
pdu_rel15
->
ndi
,
pdu_rel15
->
rv
);
params_rel15
->
rnti
=
rnti
;
params_rel15
->
rnti_type
=
NFAPI_NR_RNTI_C
;
params_rel15
->
dci_format
=
NFAPI_NR_DL_DCI_FORMAT_1_0
;
//params_rel15->aggregation_level = 1;
LOG_I
(
MAC
,
"DCI type 1 params: rmsi_pdcch_config %d, rnti %d, rnti_type %d, dci_format %d
\n
\
coreset params: mux_pattern %d, n_rb %d, n_symb %d, rb_offset %d
\n
\
ss params : nb_ss_sets_per_slot %d, first symb %d, nb_slots %d, sfn_mod2 %d, first slot %d
\n
"
,
0
,
params_rel15
->
rnti
,
params_rel15
->
rnti_type
,
params_rel15
->
dci_format
,
params_rel15
->
mux_pattern
,
params_rel15
->
n_rb
,
params_rel15
->
n_symb
,
params_rel15
->
rb_offset
,
params_rel15
->
nb_ss_sets_per_slot
,
params_rel15
->
first_symbol
,
params_rel15
->
nb_slots
,
params_rel15
->
sfn_mod2
,
params_rel15
->
first_slot
);
nr_get_tbs
(
&
dl_config_dlsch_pdu
->
dlsch_pdu
,
dl_config_dci_pdu
->
dci_dl_pdu
,
*
cfg
);
LOG_I
(
MAC
,
"DLSCH PDU: start PRB %d n_PRB %d start symbol %d nb_symbols %d nb_layers %d nb_codewords %d mcs %d
\n
"
,
dlsch_pdu_rel15
->
start_prb
,
dlsch_pdu_rel15
->
n_prb
,
dlsch_pdu_rel15
->
start_symbol
,
dlsch_pdu_rel15
->
nb_symbols
,
dlsch_pdu_rel15
->
nb_layers
,
dlsch_pdu_rel15
->
nb_codewords
,
dlsch_pdu_rel15
->
mcs_idx
);
dl_req
->
number_dci
++
;
dl_req
->
number_pdsch_rnti
++
;
dl_req
->
number_pdu
+=
2
;
TX_req
=
&
nr_mac
->
TX_req
[
CC_id
].
tx_request_body
.
tx_pdu_list
[
nr_mac
->
TX_req
[
CC_id
].
tx_request_body
.
number_of_pdus
];
TX_req
->
pdu_length
=
6
;
TX_req
->
pdu_index
=
nr_mac
->
pdu_index
[
CC_id
]
++
;
TX_req
->
num_segments
=
1
;
TX_req
->
segments
[
0
].
segment_length
=
8
;
nr_mac
->
TX_req
[
CC_id
].
tx_request_body
.
number_of_pdus
++
;
nr_mac
->
TX_req
[
CC_id
].
sfn_sf
=
sfn_sf
;
nr_mac
->
TX_req
[
CC_id
].
tx_request_body
.
tl
.
tag
=
NFAPI_TX_REQUEST_BODY_TAG
;
nr_mac
->
TX_req
[
CC_id
].
header
.
message_id
=
NFAPI_TX_REQUEST
;
TX_req
=
&
nr_mac
->
TX_req
[
CC_id
].
tx_request_body
.
tx_pdu_list
[
nr_mac
->
TX_req
[
CC_id
].
tx_request_body
.
number_of_pdus
+
1
];
TX_req
->
pdu_length
=
dlsch_pdu_rel15
->
transport_block_size
;
TX_req
->
pdu_index
=
nr_mac
->
pdu_index
[
CC_id
]
++
;
TX_req
->
num_segments
=
1
;
TX_req
->
segments
[
0
].
segment_length
=
8
;
nr_mac
->
TX_req
[
CC_id
].
tx_request_body
.
number_of_pdus
++
;
nr_mac
->
TX_req
[
CC_id
].
sfn_sf
=
sfn_sf
;
nr_mac
->
TX_req
[
CC_id
].
tx_request_body
.
tl
.
tag
=
NFAPI_TX_REQUEST_BODY_TAG
;
nr_mac
->
TX_req
[
CC_id
].
header
.
message_id
=
NFAPI_TX_REQUEST
;
}
}
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @
dcfe8097
...
...
@@ -351,17 +351,18 @@ void nr_configure_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel1
/// coreset
//ControlResourceSetId
pdcch_params
->
config_type
=
(
coreset
->
coreset_id
==
0
)
?
NFAPI_NR_CSET_CONFIG_
PDCCH_CONFIG_CSET_0
:
NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG
;
pdcch_params
->
config_type
=
(
coreset
->
coreset_id
==
0
)
?
NFAPI_NR_CSET_CONFIG_
MIB_SIB1
:
NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG
;
//frequencyDomainResources
uint8_t
count
=
0
,
start
=
0
,
start_set
=
0
;
uint64_t
bitmap
=
coreset
->
frequency_domain_resources
;
for
(
int
i
=
0
;
i
<
64
;
i
++
)
if
((
bitmap
>>
(
63
-
i
))
&
1
)
{
for
(
int
i
=
0
;
i
<
45
;
i
++
)
if
((
bitmap
>>
(
44
-
i
))
&
1
)
{
count
++
;
if
(
!
start_set
)
if
(
!
start_set
)
{
start
=
i
;
start_set
=
1
;
start_set
=
1
;
}
}
pdcch_params
->
rb_offset
=
6
*
start
;
pdcch_params
->
n_rb
=
6
*
count
;
...
...
@@ -374,9 +375,15 @@ void nr_configure_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel1
if
(
pdcch_params
->
cr_mapping_type
==
NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED
)
{
pdcch_params
->
reg_bundle_size
=
coreset
->
reg_bundle_size
;
pdcch_params
->
interleaver_size
=
coreset
->
interleaver_size
;
pdcch_params
->
shift_index
=
coreset
->
shift_index
;
}
else
{
pdcch_params
->
reg_bundle_size
=
6
;
pdcch_params
->
interleaver_size
=
1
;
}
//shift index
pdcch_params
->
shift_index
=
coreset
->
shift_index
;
//precoderGranularity
pdcch_params
->
precoder_granularity
=
coreset
->
precoder_granularity
;
...
...
@@ -389,11 +396,16 @@ void nr_configure_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel1
/// SearchSpace
// first symbol
and duration
// first symbol
//AssertFatal(pdcch_scs==kHz15, "PDCCH SCS above 15kHz not allowed if a symbol above 2 is monitored");
for
(
int
i
=
0
;
i
<
get_symbolsperslot
(
&
cfg
);
i
++
)
if
((
search_space
->
monitoring_symbols_in_slot
>>
(
15
-
i
))
&
1
)
if
((
search_space
->
monitoring_symbols_in_slot
>>
(
15
-
i
))
&
1
)
{
pdcch_params
->
first_symbol
=
i
;
break
;
}
//searchSpaceType
pdcch_params
->
search_space_type
=
search_space
->
search_space_type
;
/*
//searchSpaceId
...
...
@@ -413,8 +425,7 @@ void nr_configure_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_rel1
//nrofCandidates
pdcch_params->aggregation_level = (uint8_t)number_of_candidates[NFAPI_NR_MAX_NB_CCE_AGGREGATION_LEVELS - 1];
//searchSpaceType
pdcch_params->search_space_type = search_space->search_space_type;
//Common_CSS
if (pdcch_params->search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_COMMON){
switch(search_space->css_formats_0_0_and_1_0){
...
...
@@ -500,7 +511,7 @@ int nr_is_dci_opportunity(nfapi_nr_search_space_t search_space,
uint16_t
Os
=
search_space
.
slot_monitoring_offset
;
uint8_t
Ts
=
search_space
.
duration
;
if
(((
frame
*
get_spf
(
&
cfg
)
+
slot
-
Os
)
%
Ks
)
==
Ts
)
if
(((
frame
*
get_spf
(
&
cfg
)
+
slot
-
Os
)
%
Ks
)
<
Ts
)
is_dci_opportunity
=
1
;
return
is_dci_opportunity
;
...
...
@@ -536,3 +547,7 @@ int get_symbolsperslot(nfapi_nr_config_request_t *cfg) {
return
((
cfg
->
subframe_config
.
dl_cyclic_prefix_type
.
value
==
NFAPI_CP_EXTENDED
)
?
12
:
14
);
}
int
nr_schedule_dci
()
{
}
openair2/LAYER2/NR_MAC_gNB/main.c
View file @
dcfe8097
...
...
@@ -44,6 +44,32 @@
extern
RAN_CONTEXT_t
RC
;
void
nr_init_coreset
(
nfapi_nr_coreset_t
*
coreset
)
{
coreset
->
coreset_id
=
1
;
coreset
->
frequency_domain_resources
=
0x1FE00000000
;
// 48 RB starting from CRB0
coreset
->
duration
=
2
;
coreset
->
cce_reg_mapping_type
=
NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED
;
coreset
->
precoder_granularity
=
NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS
;
coreset
->
tci_present_in_dci
=
0
;
coreset
->
dmrs_scrambling_id
=
0
;
}
void
nr_init_search_space
(
nfapi_nr_search_space_t
*
search_space
)
{
search_space
->
search_space_id
=
1
;
search_space
->
coreset_id
=
1
;
search_space
->
search_space_type
=
NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC
;
search_space
->
duration
=
5
;
search_space
->
slot_monitoring_periodicity
=
NFAPI_NR_SS_PERIODICITY_SL10
;
search_space
->
slot_monitoring_offset
=
1
;
search_space
->
monitoring_symbols_in_slot
=
0xC0000000
;
// first 2 ofdm symbols
search_space
->
css_formats_0_0_and_1_0
=
1
;
search_space
->
uss_dci_formats
=
0
;
// enum to be defined-- formats 0.0 and 1.0
for
(
int
i
=
0
;
i
<
NFAPI_NR_MAX_NB_CCE_AGGREGATION_LEVELS
;
i
++
)
search_space
->
number_of_candidates
[
i
]
=
4
;
// TODO
}
void
mac_top_init_gNB
(
void
)
{
module_id_t
i
,
j
;
...
...
@@ -56,24 +82,24 @@ void mac_top_init_gNB(void)
if
(
RC
.
nb_nr_macrlc_inst
>
0
)
{
RC
.
nrmac
=
(
gNB_MAC_INST
**
)
malloc16
(
RC
.
nb_nr_macrlc_inst
*
sizeof
(
gNB_MAC_INST
*
));
AssertFatal
(
RC
.
nrmac
!=
NULL
,
"can't ALLOCATE %zu Bytes for %d gNB_MAC_INST with size %zu
\n
"
,
RC
.
nb_nr_macrlc_inst
*
sizeof
(
gNB_MAC_INST
*
),
RC
.
nb_nr_macrlc_inst
,
sizeof
(
gNB_MAC_INST
));
for
(
i
=
0
;
i
<
RC
.
nb_nr_macrlc_inst
;
i
++
)
{
RC
.
nrmac
[
i
]
=
(
gNB_MAC_INST
*
)
malloc16
(
sizeof
(
gNB_MAC_INST
));
AssertFatal
(
RC
.
nrmac
!=
NULL
,
"can't ALLOCATE %zu Bytes for %d gNB_MAC_INST with size %zu
\n
"
,
RC
.
nb_nr_macrlc_inst
*
sizeof
(
gNB_MAC_INST
*
),
RC
.
nb_nr_macrlc_inst
,
sizeof
(
gNB_MAC_INST
));
LOG_D
(
MAC
,
"[MAIN] ALLOCATE %zu Bytes for %d gNB_MAC_INST @ %p
\n
"
,
sizeof
(
gNB_MAC_INST
),
RC
.
nb_nr_macrlc_inst
,
RC
.
mac
);
bzero
(
RC
.
nrmac
[
i
],
sizeof
(
gNB_MAC_INST
));
RC
.
nrmac
[
i
]
->
Mod_id
=
i
;
for
(
j
=
0
;
j
<
MAX_NUM_CCs
;
j
++
)
{
RC
.
nrmac
[
i
]
->
DL_req
[
j
].
dl_config_request_body
.
dl_config_pdu_list
=
RC
.
nrmac
[
i
]
->
dl_config_pdu_list
[
j
];
...
...
@@ -84,7 +110,11 @@ void mac_top_init_gNB(void)
RC
.
nrmac
[
i
]
->
HI_DCI0_req
[
j
].
hi_dci0_request_body
.
hi_dci0_pdu_list
=
RC
.
nrmac
[
i
]
->
hi_dci0_pdu_list
[
j
];
RC
.
nrmac
[
i
]
->
TX_req
[
j
].
tx_request_body
.
tx_pdu_list
=
RC
.
nrmac
[
i
]
->
tx_request_pdu
[
j
];
RC
.
nrmac
[
i
]
->
ul_handle
=
0
;
RC
.
nrmac
[
i
]
->
ul_handle
=
0
;
// Init PDCCH structures
nr_init_coreset
(
&
RC
.
nrmac
[
i
]
->
coreset
[
j
][
1
]);
nr_init_search_space
(
&
RC
.
nrmac
[
i
]
->
search_space
[
j
][
1
]);
}
...
...
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
View file @
dcfe8097
...
...
@@ -138,6 +138,10 @@ typedef struct gNB_MAC_INST_s {
nfapi_tx_request_pdu_t
tx_request_pdu
[
NFAPI_CC_MAX
][
MAX_NUM_TX_REQUEST_PDU
];
/// NFAPI DL PDU structure
nfapi_tx_request_t
TX_req
[
NFAPI_CC_MAX
];
/// NFAPI coreset structure
nfapi_nr_coreset_t
coreset
[
NFAPI_CC_MAX
][
NFAPI_NR_MAX_NB_CORESETS
];
/// NFAPI search space structure
nfapi_nr_search_space_t
search_space
[
NFAPI_CC_MAX
][
NFAPI_NR_MAX_NB_SEARCH_SPACES
];
UE_list_t
UE_list
;
...
...
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