feat(ldpc_decoding_module_interface_rework_xdma): Add xdma library into LDPC...

feat(ldpc_decoding_module_interface_rework_xdma): Add xdma library into LDPC decoding module interface for xdma support

CMakeLists.txt

@@ -884,6 +884,12 @@ set(PHY_NR_ULSCH_DECODING_DEMO_SRC
   ${OPENAIR1_DIR}/PHY/CODING/nr_dlsch_encoding_interface_demo.c
 )
 
+set(PHY_NR_ULSCH_DECODING_XDMA_SRC
+  ${OPENAIR1_DIR}/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_offload_xdma.c
+  ${OPENAIR1_DIR}/PHY/CODING/nr_ulsch_decoding_interface_xdma.c
+  ${OPENAIR1_DIR}/PHY/CODING/nr_dlsch_encoding_interface_demo.c
+)
+
 set(PHY_NR_CODINGIF
   ${OPENAIR1_DIR}/PHY/CODING/nrLDPC_load.c
 )
@@ -914,6 +920,8 @@ add_library(dfts MODULE ${OPENAIR1_DIR}/PHY/TOOLS/oai_dfts.c ${OPENAIR1_DIR}/PHY
 
 add_library(ldpc_slot_demo MODULE ${PHY_NR_ULSCH_DECODING_DEMO_SRC})
 
+add_library(ldpc_slot_xdma MODULE ${PHY_NR_ULSCH_DECODING_XDMA_SRC})
+
 set(PHY_SRC_COMMON
   ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/dci_tools_common.c
   ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/lte_mcs.c
@@ -2118,7 +2126,7 @@ if(E2_AGENT)
 endif()
 
 
-add_dependencies(nr-softmodem ldpc_orig ldpc_optim ldpc_optim8seg ldpc ldpc_slot_demo)
+add_dependencies(nr-softmodem ldpc_orig ldpc_optim ldpc_optim8seg ldpc ldpc_slot_demo ldpc_slot_xdma)
 
 if (ENABLE_LDPC_T2)
   add_dependencies(nr-softmodem ldpc_t2)
@@ -2355,7 +2363,7 @@ add_executable(nr_ulsim
 if (ENABLE_LDPC_T2)
   add_dependencies(nr_ulsim ldpc_t2)
 endif()
-add_dependencies(nr_ulsim ldpc_slot_demo)
+add_dependencies(nr_ulsim ldpc_slot_demo ldpc_slot_xdma)
 
 target_link_libraries(nr_ulsim PRIVATE
   -Wl,--start-group UTIL SIMU SIMU_ETH PHY_COMMON PHY_NR_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB MAC_UE_NR MAC_NR_COMMON nr_rrc CONFIG_LIB L2_NR HASHTABLE x2ap SECURITY ngap -lz -Wl,--end-group
@@ -2422,7 +2430,8 @@ if (${T_TRACER})
         PHY_COMMON PHY PHY_UE PHY_NR PHY_NR_COMMON PHY_NR_UE PHY_RU PHY_MEX
         L2 L2_LTE L2_NR L2_LTE_NR L2_UE NR_L2_UE L2_UE_LTE_NR MAC_NR_COMMON MAC_UE_NR ngap
         CN_UTILS GTPV1U SCTP_CLIENT MME_APP LIB_NAS_UE NB_IoT SIMU SIMU_ETH OPENAIR0_LIB
-        ldpc_orig ldpc_optim ldpc_optim8seg ldpc_t2 ldpc_cl ldpc_cuda ldpc ldpc_slot_demo dfts config_internals)
+        ldpc_orig ldpc_optim ldpc_optim8seg ldpc_t2 ldpc_cl ldpc_cuda ldpc
+        ldpc_slot_demo ldpc_slot_xdma dfts config_internals)
     if (TARGET ${i})
       add_dependencies(${i} generate_T)
     endif()

openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_offload_xdma.h

+/*! \file PHY/CODING/nrLDPC_decoder_offload_xdma/nrLDPC_decoder_offload_xdma.h
+ * \briefFPGA accelerator integrated into OAI (for one and multi code block)
+ * \author Sendren Xu, SY Yeh(fdragon), Hongming, Terng-Yin Hsu
+ * \date 2022-05-31
+ * \version 5.0
+ * \email: summery19961210@gmail.com
+ */
+
+#include <stdint.h>
+
+/**
+    \brief LDPC input parameter
+    \param Zc shifting size
+    \param Rows
+    \param baseGraph base graph
+    \param CB_num number of code block
+    \param numChannelLlrs input soft bits length, Zc x 66 - length of filler bits
+    \param numFillerBits filler bits length
+*/
+
+typedef struct {
+  unsigned char max_schedule;
+  unsigned char SetIdx;
+  int Zc;
+  unsigned char numCB;
+  unsigned char BG;
+  unsigned char max_iter;
+  int nRows;
+  int numChannelLls;
+  int numFillerBits;
+} DecIFConf;
+
+int nrLDPC_decoder_FPGA_8038(int8_t *buf_in, int8_t *buf_out, DecIFConf dec_conf);
+int nrLDPC_decoder_FPGA_PYM(int8_t *buf_in, int8_t *buf_out, DecIFConf dec_conf);
+// int nrLDPC_decoder_FPGA_PYM();

openair1/PHY/CODING/nrLDPC_decoder/xdma_diag.h

+/*
+ * This file is part of the Xilinx DMA IP Core driver tools for Linux
+ *
+ * Copyright (c) 2016-present,  Xilinx, Inc.
+ * All rights reserved.
+ *
+ * This source code is licensed under both the BSD-style license (found in the
+ * LICENSE file in the root directory of this source tree) and the GPLv2 (found
+ * in the COPYING file in the root directory of this source tree).
+ * You may select, at your option, one of the above-listed licenses.
+ */
+#ifndef MODULES_TXCTRL_INC_XDMA_DIAG_H_
+#define MODULES_TXCTRL_INC_XDMA_DIAG_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// #define _BSD_SOURCE
+// #define _XOPEN_SOURCE 500
+// #include "../../LDPC/LDPC_api.h"
+
+// #include "dma_utils.c"
+
+/*static struct option const long_opts[] = {
+  {"device", required_argument, NULL, 'd'},
+  {"address", required_argument, NULL, 'a'},
+  {"size", required_argument, NULL, 's'},
+  {"offset", required_argument, NULL, 'o'},
+  {"count", required_argument, NULL, 'c'},
+  {"data infile", required_argument, NULL, 'f'},
+  {"data outfile", required_argument, NULL, 'w'},
+  {"help", no_argument, NULL, 'h'},
+  {"verbose", no_argument, NULL, 'v'},
+  {0, 0, 0, 0}
+};*/
+
+typedef struct {
+  unsigned char max_schedule; // max_schedule = 0;
+  unsigned char mb; // mb = 32;
+  unsigned char CB_num; // id = CB_num;
+  unsigned char BGSel; // bg = 1;
+  unsigned char z_set; // z_set = 0;
+  unsigned char z_j; // z_j = 6;
+  unsigned char max_iter; // max_iter = 8;
+  unsigned char SetIdx; // sc_idx = 12;
+} DecIPConf;
+
+typedef struct {
+  int SetIdx;
+  int NumCBSegm;
+  int PayloadLen;
+  int Z;
+  int z_set;
+  int z_j;
+  int Kbmax;
+  int BGSel;
+  unsigned mb;
+  unsigned char CB_num;
+  unsigned char kb_1;
+} EncIPConf;
+
+/* ltoh: little to host */
+/* htol: little to host */
+#if __BYTE_ORDER == __LITTLE_ENDIAN
+#define ltohl(x) (x)
+#define ltohs(x) (x)
+#define htoll(x) (x)
+#define htols(x) (x)
+#elif __BYTE_ORDER == __BIG_ENDIAN
+#define ltohl(x) __bswap_32(x)
+#define ltohs(x) __bswap_16(x)
+#define htoll(x) __bswap_32(x)
+#define htols(x) __bswap_16(x)
+#endif
+
+#define FATAL                                                                                             \
+  do {                                                                                                    \
+    fprintf(stderr, "Error at line %d, file %s (%d) [%s]\n", __LINE__, __FILE__, errno, strerror(errno)); \
+    exit(1);                                                                                              \
+  } while (0)
+
+#define MAP_SIZE (32 * 1024UL)
+#define MAP_MASK (MAP_SIZE - 1)
+
+#define DEVICE_NAME_DEFAULT_ENC_READ "/dev/xdma0_c2h_1"
+#define DEVICE_NAME_DEFAULT_ENC_WRITE "/dev/xdma0_h2c_1"
+#define DEVICE_NAME_DEFAULT_DEC_READ "/dev/xdma0_c2h_0"
+#define DEVICE_NAME_DEFAULT_DEC_WRITE "/dev/xdma0_h2c_0"
+#define SIZE_DEFAULT (32)
+#define COUNT_DEFAULT (1)
+
+#define OFFSET_DEC_IN 0x0000
+#define OFFSET_DEC_OUT 0x0004
+#define OFFSET_ENC_IN 0x0008
+#define OFFSET_ENC_OUT 0x000c
+#define OFFSET_RESET 0x0020
+#define PCIE_OFF 0x0030
+
+#define CB_PROCESS_NUMBER 24 // add by JW
+#define CB_PROCESS_NUMBER_Dec 24
+
+// dma_from_device.c
+
+int test_dma_enc_read(char *EncOut, EncIPConf Confparam);
+int test_dma_enc_write(char *data, EncIPConf Confparam);
+int test_dma_dec_read(char *DecOut, DecIPConf Confparam);
+int test_dma_dec_write(char *data, DecIPConf Confparam);
+void test_dma_init();
+void test_dma_shutdown();
+void dma_reset();
+
+#ifdef __cplusplus
+}
+#endif
+#endif