Commit c48397f4 authored by francescomani's avatar francescomani

fix: reset beam only if it is a newly allocated one

parent e93f056b
......@@ -319,7 +319,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
UL_tti_req->SFN = frameP;
UL_tti_req->Slot = slotP;
UL_tti_req->rach_present = 1;
int beam_idx = 0;
NR_beam_alloc_stuct_t beam = {0};
for (int fdm_index = 0; fdm_index < fdm; fdm_index++) { // one structure per frequency domain occasion
for (int td_index = 0; td_index < N_t_slot; td_index++) {
......@@ -332,14 +332,14 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
float num_ssb_per_RO = ssb_per_rach_occasion[cfg->prach_config.ssb_per_rach.value];
if(num_ssb_per_RO <= 1) {
int ssb_index = (int) (prach_occasion_id / (int)(1 / num_ssb_per_RO)) % cc->num_active_ssb;
beam_idx = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, ssb_index, nr_slots_per_frame[mu]);
AssertFatal(beam_idx >= 0, "Cannot allocate PRACH corresponding to SSB %d in any available beam\n", ssb_index);
beam = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, ssb_index, nr_slots_per_frame[mu]);
AssertFatal(beam.idx >= 0, "Cannot allocate PRACH corresponding to SSB %d in any available beam\n", ssb_index);
}
else {
int first_ssb_index = (prach_occasion_id * (int)num_ssb_per_RO) % cc->num_active_ssb;
for(int j = first_ssb_index; j < num_ssb_per_RO; j++) {
beam_idx = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, j, nr_slots_per_frame[mu]);
AssertFatal(beam_idx >= 0, "Cannot allocate PRACH corresponding to SSB %d in any available beam\n", j);
beam = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, j, nr_slots_per_frame[mu]);
AssertFatal(beam.idx >= 0, "Cannot allocate PRACH corresponding to SSB %d in any available beam\n", j);
}
}
if(td_index == 0) {
......@@ -434,7 +434,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
const int mu_pusch = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
const int16_t n_ra_rb = get_N_RA_RB(cfg->prach_config.prach_sub_c_spacing.value, mu_pusch);
index = ul_buffer_index(frameP, slotP, mu, gNB->vrb_map_UL_size);
uint16_t *vrb_map_UL = &cc->vrb_map_UL[beam_idx][index * MAX_BWP_SIZE];
uint16_t *vrb_map_UL = &cc->vrb_map_UL[beam.idx][index * MAX_BWP_SIZE];
for (int i = 0; i < n_ra_rb * fdm; ++i)
vrb_map_UL[bwp_start + rach_ConfigGeneric->msg1_FrequencyStart + i] |= SL_to_bitmap(start_symbol, N_t_slot * N_dur);
}
......@@ -588,12 +588,17 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
if (is_xlsch_in_slot(nr_mac->ulsch_slot_bitmap[sched_slot / 64], sched_slot)) {
const int n_slots_frame = nr_slots_per_frame[mu];
int beam_ul = beam_allocation_procedure(&nr_mac->beam_info, sched_frame, sched_slot, ra->beam_id, n_slots_frame);
if (beam_ul < 0)
NR_beam_alloc_stuct_t beam_ul = beam_allocation_procedure(&nr_mac->beam_info,
sched_frame,
sched_slot,
ra->beam_id,
n_slots_frame);
if (beam_ul.idx < 0)
return;
int beam_dci = beam_allocation_procedure(&nr_mac->beam_info, frame, slot, ra->beam_id, n_slots_frame);
if (beam_dci < 0) {
reset_beam_status(&nr_mac->beam_info, sched_frame, sched_slot, ra->beam_id, n_slots_frame);
NR_beam_alloc_stuct_t beam_dci = beam_allocation_procedure(&nr_mac->beam_info, frame, slot, ra->beam_id, n_slots_frame);
if (beam_dci.idx < 0) {
if (beam_ul.new_beam)
reset_beam_status(&nr_mac->beam_info, sched_frame, sched_slot, ra->beam_id, n_slots_frame);
return;
}
int fh = 0;
......@@ -603,7 +608,7 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
int mappingtype = pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->mappingType;
int buffer_index = ul_buffer_index(sched_frame, sched_slot, mu, nr_mac->vrb_map_UL_size);
uint16_t *vrb_map_UL = &nr_mac->common_channels[CC_id].vrb_map_UL[beam_ul][buffer_index * MAX_BWP_SIZE];
uint16_t *vrb_map_UL = &nr_mac->common_channels[CC_id].vrb_map_UL[beam_ul.idx][buffer_index * MAX_BWP_SIZE];
const int BWPSize = sc_info->initial_ul_BWPSize;
const int BWPStart = sc_info->initial_ul_BWPStart;
......@@ -677,7 +682,7 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
int CCEIndex = get_cce_index(nr_mac,
CC_id, slot, 0,
&aggregation_level,
beam_dci,
beam_dci.idx,
ss,
coreset,
&ra->sched_pdcch,
......@@ -729,7 +734,7 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
&ra->sched_pdcch,
CCEIndex,
aggregation_level,
beam_dci);
beam_dci.idx);
for (int rb = 0; rb < ra->msg3_nb_rb; rb++) {
vrb_map_UL[rbStart + BWPStart + rb] |= SL_to_bitmap(StartSymbolIndex, NrOfSymbols);
......@@ -798,15 +803,15 @@ static bool get_feasible_msg3_tda(frame_type_t frame_type,
continue;
// check if it is possible to allocate MSG3 in a beam in this slot
int beam_idx = beam_allocation_procedure(beam_info, temp_frame, temp_slot, ra->beam_id, slots_per_frame);
if (beam_idx < 0)
NR_beam_alloc_stuct_t beam = beam_allocation_procedure(beam_info, temp_frame, temp_slot, ra->beam_id, slots_per_frame);
if (beam.idx < 0)
continue;
// is in mixed slot with more or equal than 3 symbols, or UL slot
ra->Msg3_frame = temp_frame;
ra->Msg3_slot = temp_slot;
ra->Msg3_tda_id = i;
ra->Msg3_beam_idx = beam_idx;
ra->Msg3_beam = beam;
return true;
}
......@@ -844,7 +849,7 @@ static void nr_get_Msg3alloc(module_id_t module_id,
current_slot,
ra->Msg3_tda_id);
const int buffer_index = ul_buffer_index(ra->Msg3_frame, ra->Msg3_slot, mu, mac->vrb_map_UL_size);
uint16_t *vrb_map_UL = &mac->common_channels[CC_id].vrb_map_UL[ra->Msg3_beam_idx][buffer_index * MAX_BWP_SIZE];
uint16_t *vrb_map_UL = &mac->common_channels[CC_id].vrb_map_UL[ra->Msg3_beam.idx][buffer_index * MAX_BWP_SIZE];
int bwpSize = sc_info->initial_ul_BWPSize;
int bwpStart = sc_info->initial_ul_BWPStart;
......@@ -999,7 +1004,7 @@ static void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_f
const int scs = ul_bwp->scs;
const uint16_t mask = SL_to_bitmap(ra->msg3_startsymb, ra->msg3_nbSymb);
int buffer_index = ul_buffer_index(ra->Msg3_frame, ra->Msg3_slot, scs, mac->vrb_map_UL_size);
uint16_t *vrb_map_UL = &RC.nrmac[module_idP]->common_channels[CC_id].vrb_map_UL[ra->Msg3_beam_idx][buffer_index * MAX_BWP_SIZE];
uint16_t *vrb_map_UL = &RC.nrmac[module_idP]->common_channels[CC_id].vrb_map_UL[ra->Msg3_beam.idx][buffer_index * MAX_BWP_SIZE];
for (int i = 0; i < ra->msg3_nb_rb; ++i) {
AssertFatal(!(vrb_map_UL[i + ra->msg3_first_rb + ra->msg3_bwp_start] & mask),
"RB %d in %4d.%2d is already taken, cannot allocate Msg3!\n",
......@@ -1227,8 +1232,8 @@ static void nr_generate_Msg2(module_id_t module_idP,
}
const int n_slots_frame = nr_slots_per_frame[dl_bwp->scs];
int beam = beam_allocation_procedure(&nr_mac->beam_info, frameP, slotP, ra->beam_id, n_slots_frame);
if (beam < 0)
NR_beam_alloc_stuct_t beam = beam_allocation_procedure(&nr_mac->beam_info, frameP, slotP, ra->beam_id, n_slots_frame);
if (beam.idx < 0)
return;
const NR_UE_UL_BWP_t *ul_bwp = &ra->UL_BWP;
......@@ -1282,7 +1287,7 @@ static void nr_generate_Msg2(module_id_t module_idP,
coresetid,
false);
uint16_t *vrb_map = cc[CC_id].vrb_map[beam];
uint16_t *vrb_map = cc[CC_id].vrb_map[beam.idx];
for (int i = 0; (i < rbSize) && (rbStart <= (BWPSize - rbSize)); i++) {
if (vrb_map[BWPStart + rbStart + i] & SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols)) {
rbStart += i;
......@@ -1292,8 +1297,10 @@ static void nr_generate_Msg2(module_id_t module_idP,
if (rbStart > (BWPSize - rbSize)) {
LOG_W(NR_MAC, "%s(): cannot find free vrb_map for RA RNTI %04x!\n", __func__, ra->RA_rnti);
reset_beam_status(&nr_mac->beam_info, ra->Msg3_frame, ra->Msg3_slot, ra->beam_id, n_slots_frame);
reset_beam_status(&nr_mac->beam_info, frameP, slotP, ra->beam_id, n_slots_frame);
if (ra->Msg3_beam.new_beam)
reset_beam_status(&nr_mac->beam_info, ra->Msg3_frame, ra->Msg3_slot, ra->beam_id, n_slots_frame);
if (beam.new_beam)
reset_beam_status(&nr_mac->beam_info, frameP, slotP, ra->beam_id, n_slots_frame);
return;
}
......@@ -1301,18 +1308,22 @@ static void nr_generate_Msg2(module_id_t module_idP,
nfapi_nr_dl_tti_request_body_t *dl_req = &DL_req->dl_tti_request_body;
if (dl_req->nPDUs > NFAPI_NR_MAX_DL_TTI_PDUS - 2) {
LOG_W(NR_MAC, "UE %04x: %d.%d FAPI DL structure is full\n", ra->rnti, frameP, slotP);
reset_beam_status(&nr_mac->beam_info, ra->Msg3_frame, ra->Msg3_slot, ra->beam_id, n_slots_frame);
reset_beam_status(&nr_mac->beam_info, frameP, slotP, ra->beam_id, n_slots_frame);
if (ra->Msg3_beam.new_beam)
reset_beam_status(&nr_mac->beam_info, ra->Msg3_frame, ra->Msg3_slot, ra->beam_id, n_slots_frame);
if (beam.new_beam)
reset_beam_status(&nr_mac->beam_info, frameP, slotP, ra->beam_id, n_slots_frame);
return;
}
uint8_t aggregation_level;
int CCEIndex = get_cce_index(nr_mac, CC_id, slotP, 0, &aggregation_level, beam, ss, coreset, &ra->sched_pdcch, true);
int CCEIndex = get_cce_index(nr_mac, CC_id, slotP, 0, &aggregation_level, beam.idx, ss, coreset, &ra->sched_pdcch, true);
if (CCEIndex < 0) {
LOG_W(NR_MAC, "UE %04x: %d.%d cannot find free CCE for Msg2!\n", ra->rnti, frameP, slotP);
reset_beam_status(&nr_mac->beam_info, ra->Msg3_frame, ra->Msg3_slot, ra->beam_id, n_slots_frame);
reset_beam_status(&nr_mac->beam_info, frameP, slotP, ra->beam_id, n_slots_frame);
if (ra->Msg3_beam.new_beam)
reset_beam_status(&nr_mac->beam_info, ra->Msg3_frame, ra->Msg3_slot, ra->beam_id, n_slots_frame);
if (beam.new_beam)
reset_beam_status(&nr_mac->beam_info, frameP, slotP, ra->beam_id, n_slots_frame);
return;
}
......@@ -1526,7 +1537,7 @@ static void nr_generate_Msg2(module_id_t module_idP,
TX_req->Slot = slotP;
// Mark the corresponding symbols RBs as used
fill_pdcch_vrb_map(nr_mac, CC_id, &ra->sched_pdcch, CCEIndex, aggregation_level, beam);
fill_pdcch_vrb_map(nr_mac, CC_id, &ra->sched_pdcch, CCEIndex, aggregation_level, beam.idx);
for (int rb = 0; rb < rbSize; rb++) {
vrb_map[BWPStart + rb + rbStart] |= SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols);
}
......@@ -1777,8 +1788,8 @@ static void nr_generate_Msg4(module_id_t module_idP,
}
const int n_slots_frame = nr_slots_per_frame[dl_bwp->scs];
int beam = beam_allocation_procedure(&nr_mac->beam_info, frameP, slotP, ra->beam_id, n_slots_frame);
if (beam < 0)
NR_beam_alloc_stuct_t beam = beam_allocation_procedure(&nr_mac->beam_info, frameP, slotP, ra->beam_id, n_slots_frame);
if (beam.idx < 0)
return;
long BWPStart = 0;
......@@ -1798,7 +1809,7 @@ static void nr_generate_Msg4(module_id_t module_idP,
int CCEIndex = get_cce_index(nr_mac,
CC_id, slotP, 0,
&aggregation_level,
beam,
beam.idx,
ss,
coreset,
&ra->sched_pdcch,
......@@ -1806,7 +1817,8 @@ static void nr_generate_Msg4(module_id_t module_idP,
if (CCEIndex < 0) {
LOG_E(NR_MAC, "%s(): cannot find free CCE for RA RNTI 0x%04x!\n", __func__, ra->rnti);
reset_beam_status(&nr_mac->beam_info, frameP, slotP, ra->beam_id, n_slots_frame);
if (beam.new_beam)
reset_beam_status(&nr_mac->beam_info, frameP, slotP, ra->beam_id, n_slots_frame);
return;
}
......@@ -1814,7 +1826,8 @@ static void nr_generate_Msg4(module_id_t module_idP,
nfapi_nr_dl_tti_request_body_t *dl_req = &DL_req->dl_tti_request_body;
if (dl_req->nPDUs > NFAPI_NR_MAX_DL_TTI_PDUS - 2) {
LOG_I(NR_MAC, "UE %04x: %d.%d FAPI DL structure is full\n", ra->rnti, frameP, slotP);
reset_beam_status(&nr_mac->beam_info, frameP, slotP, ra->beam_id, n_slots_frame);
if (beam.new_beam)
reset_beam_status(&nr_mac->beam_info, frameP, slotP, ra->beam_id, n_slots_frame);
return;
}
......@@ -1863,7 +1876,7 @@ static void nr_generate_Msg4(module_id_t module_idP,
AssertFatal(tb_size >= pdu_length,"Cannot allocate Msg4\n");
int i = 0;
uint16_t *vrb_map = cc[CC_id].vrb_map[beam];
uint16_t *vrb_map = cc[CC_id].vrb_map[beam.idx];
while ((i < rbSize) && (rbStart + rbSize <= BWPSize)) {
if (vrb_map[BWPStart + rbStart + i]&SL_to_bitmap(msg4_tda.startSymbolIndex, msg4_tda.nrOfSymbols)) {
rbStart += i+1;
......@@ -1875,7 +1888,8 @@ static void nr_generate_Msg4(module_id_t module_idP,
if (rbStart > (BWPSize - rbSize)) {
LOG_E(NR_MAC, "Cannot find free vrb_map for RNTI %04x!\n", ra->rnti);
reset_beam_status(&nr_mac->beam_info, frameP, slotP, ra->beam_id, n_slots_frame);
if (beam.new_beam)
reset_beam_status(&nr_mac->beam_info, frameP, slotP, ra->beam_id, n_slots_frame);
return;
}
......@@ -1887,7 +1901,8 @@ static void nr_generate_Msg4(module_id_t module_idP,
int alloc = nr_acknack_scheduling(nr_mac, UE, frameP, slotP, ra->beam_id, r_pucch, 1);
if (alloc < 0) {
LOG_D(NR_MAC,"Couldn't find a pucch allocation for ack nack (msg4) in frame %d slot %d\n",frameP,slotP);
reset_beam_status(&nr_mac->beam_info, frameP, slotP, ra->beam_id, n_slots_frame);
if (beam.new_beam)
reset_beam_status(&nr_mac->beam_info, frameP, slotP, ra->beam_id, n_slots_frame);
return;
}
......@@ -1982,7 +1997,7 @@ static void nr_generate_Msg4(module_id_t module_idP,
&ra->sched_pdcch,
CCEIndex,
aggregation_level,
beam);
beam.idx);
for (int rb = 0; rb < rbSize; rb++) {
vrb_map[BWPStart + rb + rbStart] |= SL_to_bitmap(msg4_tda.startSymbolIndex, msg4_tda.nrOfSymbols);
}
......
......@@ -183,11 +183,11 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP,
ssb_start_symbol = get_ssb_start_symbol(band, scs, i_ssb);
// if start symbol is in current slot, schedule current SSB, fill VRB map and call get_type0_PDCCH_CSS_config_parameters
if ((ssb_start_symbol / 14) == rel_slot){
int beam = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, i_ssb, n_slots_frame);
AssertFatal(beam >= 0, "Cannot allocate SSB %d in any available beam\n", i_ssb);
NR_beam_alloc_stuct_t beam = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, i_ssb, n_slots_frame);
AssertFatal(beam.idx >= 0, "Cannot allocate SSB %d in any available beam\n", i_ssb);
const int prb_offset = offset_pointa >> scs;
schedule_ssb(frameP, slotP, scc, dl_req, i_ssb, ssbSubcarrierOffset, offset_pointa, mib_pdu);
fill_ssb_vrb_map(cc, prb_offset, ssbSubcarrierOffset, ssb_start_symbol, CC_id, beam);
fill_ssb_vrb_map(cc, prb_offset, ssbSubcarrierOffset, ssb_start_symbol, CC_id, beam.idx);
if (get_softmodem_params()->sa == 1) {
get_type0_PDCCH_CSS_config_parameters(&gNB->type0_PDCCH_CSS_config[i_ssb],
frameP,
......@@ -214,11 +214,11 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP,
ssb_start_symbol = get_ssb_start_symbol(band, scs, i_ssb);
// if start symbol is in current slot, schedule current SSB, fill VRB map and call get_type0_PDCCH_CSS_config_parameters
if ((ssb_start_symbol / 14) == rel_slot){
int beam = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, i_ssb, n_slots_frame);
AssertFatal(beam >= 0, "Cannot allocate SSB %d in any available beam\n", i_ssb);
NR_beam_alloc_stuct_t beam = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, i_ssb, n_slots_frame);
AssertFatal(beam.idx >= 0, "Cannot allocate SSB %d in any available beam\n", i_ssb);
const int prb_offset = offset_pointa >> scs;
schedule_ssb(frameP, slotP, scc, dl_req, i_ssb, ssbSubcarrierOffset, offset_pointa, mib_pdu);
fill_ssb_vrb_map(cc, prb_offset, ssbSubcarrierOffset, ssb_start_symbol, CC_id, beam);
fill_ssb_vrb_map(cc, prb_offset, ssbSubcarrierOffset, ssb_start_symbol, CC_id, beam.idx);
if (get_softmodem_params()->sa == 1) {
get_type0_PDCCH_CSS_config_parameters(&gNB->type0_PDCCH_CSS_config[i_ssb],
frameP,
......@@ -245,11 +245,11 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP,
ssb_start_symbol = get_ssb_start_symbol(band, scs, i_ssb);
// if start symbol is in current slot, schedule current SSB, fill VRB map and call get_type0_PDCCH_CSS_config_parameters
if ((ssb_start_symbol / 14) == rel_slot){
int beam = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, i_ssb, n_slots_frame);
AssertFatal(beam >= 0, "Cannot allocate SSB %d in any available beam\n", i_ssb);
NR_beam_alloc_stuct_t beam = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, i_ssb, n_slots_frame);
AssertFatal(beam.idx >= 0, "Cannot allocate SSB %d in any available beam\n", i_ssb);
const int prb_offset = offset_pointa >> (scs-2); // reference 60kHz
schedule_ssb(frameP, slotP, scc, dl_req, i_ssb, ssbSubcarrierOffset, offset_pointa, mib_pdu);
fill_ssb_vrb_map(cc, prb_offset, ssbSubcarrierOffset >> (scs - 2), ssb_start_symbol, CC_id, beam);
fill_ssb_vrb_map(cc, prb_offset, ssbSubcarrierOffset >> (scs - 2), ssb_start_symbol, CC_id, beam.idx);
if (get_softmodem_params()->sa == 1) {
get_type0_PDCCH_CSS_config_parameters(&gNB->type0_PDCCH_CSS_config[i_ssb],
frameP,
......@@ -586,8 +586,8 @@ void schedule_nr_sib1(module_id_t module_idP,
(type0_PDCCH_CSS_config->active == true)) {
const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
int beam = beam_allocation_procedure(&gNB_mac->beam_info, frameP, slotP, i, n_slots_frame);
AssertFatal(beam >= 0, "Cannot allocate SIB1 corresponding to SSB %d in any available beam\n", i);
NR_beam_alloc_stuct_t beam = beam_allocation_procedure(&gNB_mac->beam_info, frameP, slotP, i, n_slots_frame);
AssertFatal(beam.idx >= 0, "Cannot allocate SIB1 corresponding to SSB %d in any available beam\n", i);
LOG_D(NR_MAC,"(%d.%d) SIB1 transmission: ssb_index %d\n", frameP, slotP, type0_PDCCH_CSS_config->ssb_index);
default_table_type_t table_type = get_default_table_type(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern);
......@@ -610,7 +610,7 @@ void schedule_nr_sib1(module_id_t module_idP,
&dmrs_parms,
&tda_info,
candidate_idx,
beam,
beam.idx,
cc->sib1_bcch_length);
nfapi_nr_dl_tti_request_body_t *dl_req = &DL_req->dl_tti_request_body;
......
......@@ -3100,20 +3100,30 @@ void UL_tti_req_ahead_initialization(gNB_MAC_INST *gNB, int n, int CCid, frame_t
}
// return index of beam in period if valid or -1 if not valid
int beam_allocation_procedure(NR_beam_info_t *beam_info, int frame, int slot, int beam_index, int slots_per_frame)
NR_beam_alloc_stuct_t beam_allocation_procedure(NR_beam_info_t *beam_info, int frame, int slot, int beam_index, int slots_per_frame)
{
NR_beam_alloc_stuct_t beam_struct;
beam_struct.new_beam = false;
beam_struct.idx = -1;
// if no beam allocation for analog beamforming we always return beam index 0 (no multiple beams)
if(!beam_info->beam_allocation)
return 0;
if(!beam_info->beam_allocation) {
beam_struct.idx = 0;
return beam_struct;
}
const int index = ((frame * slots_per_frame + slot) / beam_info->slots_in_beam_period) % beam_info->beam_allocation_size;
for (int i = 0; i < beam_info->beams_per_period; i++) {
if (beam_info->beam_allocation[i][index] == -1 ||
beam_info->beam_allocation[i][index] == beam_index) {
if (beam_info->beam_allocation[i][index] == beam_index) {
beam_struct.idx = i;
return beam_struct;
}
if (beam_info->beam_allocation[i][index] == -1) {
beam_info->beam_allocation[i][index] = beam_index;
return i;
beam_struct.new_beam = true;
beam_struct.idx = i;
return beam_struct;
}
}
return -1;
return beam_struct;
}
void reset_beam_status(NR_beam_info_t *beam_info, int frame, int slot, int beam_index, int slots_per_frame)
......
......@@ -1326,15 +1326,15 @@ int nr_acknack_scheduling(gNB_MAC_INST *mac,
else { // unoccupied occasion
// checking if in ul_slot the resources potentially to be assigned to this PUCCH are available
set_pucch_allocation(ul_bwp, r_pucch, bwp_size, curr_pucch);
int beam = beam_allocation_procedure(&mac->beam_info, pucch_frame, pucch_slot, beam_index, n_slots_frame);
if (beam < 0) {
NR_beam_alloc_stuct_t beam = beam_allocation_procedure(&mac->beam_info, pucch_frame, pucch_slot, beam_index, n_slots_frame);
if (beam.idx < 0) {
LOG_D(NR_MAC,
"DL %4d.%2d, UL_ACK %4d.%2d beam resources for this occasion are already occupied, move to the following occasion\n",
frame, slot, pucch_frame, pucch_slot);
continue;
}
const int index = ul_buffer_index(pucch_frame, pucch_slot, ul_bwp->scs, mac->vrb_map_UL_size);
uint16_t *vrb_map_UL = &mac->common_channels[CC_id].vrb_map_UL[beam][index * MAX_BWP_SIZE];
uint16_t *vrb_map_UL = &mac->common_channels[CC_id].vrb_map_UL[beam.idx][index * MAX_BWP_SIZE];
bool ret = test_pucch0_vrb_occupation(curr_pucch,
vrb_map_UL,
bwp_start,
......@@ -1343,6 +1343,8 @@ int nr_acknack_scheduling(gNB_MAC_INST *mac,
LOG_D(NR_MAC,
"DL %4d.%2d, UL_ACK %4d.%2d PRB resources for this occasion are already occupied, move to the following occasion\n",
frame, slot, pucch_frame, pucch_slot);
if (beam.new_beam)
reset_beam_status(&mac->beam_info, pucch_frame, pucch_slot, beam_index, n_slots_frame);
continue;
}
// allocating a new PUCCH structure for this occasion
......
......@@ -425,7 +425,7 @@ int get_mcs_from_bler(const NR_bler_options_t *bler_options,
int ul_buffer_index(int frame, int slot, int scs, int size);
void UL_tti_req_ahead_initialization(gNB_MAC_INST *gNB, int n, int CCid, frame_t frameP, int slotP);
int beam_allocation_procedure(NR_beam_info_t *beam_info, int frame, int slot, int beam_index, int slots_per_frame);
NR_beam_alloc_stuct_t beam_allocation_procedure(NR_beam_info_t *beam_info, int frame, int slot, int beam_index, int slots_per_frame);
void reset_beam_status(NR_beam_info_t *beam_info, int frame, int slot, int beam_index, int slots_per_frame);
void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t frameP, sub_frame_t slotP);
......
......@@ -121,8 +121,15 @@ typedef enum {
nrRA_Msg4 = 4,
nrRA_WAIT_Msg4_ACK = 5,
} RA_gNB_state_t;
static const char *const nrra_text[] =
{"IDLE", "Msg2", "WAIT_Msg3", "Msg3_retransmission", "Msg3_dcch_dtch", "Msg4", "WAIT_Msg4_ACK"};
typedef struct {
int idx;
bool new_beam;
} NR_beam_alloc_stuct_t;
typedef struct nr_pdsch_AntennaPorts_t {
int N1;
int N2;
......@@ -202,7 +209,7 @@ typedef struct {
/// Msg3 time domain allocation index
int Msg3_tda_id;
/// Msg3 beam matrix index
int Msg3_beam_idx;
NR_beam_alloc_stuct_t Msg3_beam;
/// harq_pid used for Msg4 transmission
uint8_t harq_pid;
/// UE RNTI allocated during RAR
......
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