Commit c6ec2074 authored by Francesco Mani's avatar Francesco Mani

adapting config_request to scf nfapi (compiling ok but still not running)

parent 17c15f50
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...@@ -1039,10 +1039,10 @@ int wakeup_prach_ru(RU_t *ru) { ...@@ -1039,10 +1039,10 @@ int wakeup_prach_ru(RU_t *ru) {
void fill_rf_config(RU_t *ru, char *rf_config_file) { void fill_rf_config(RU_t *ru, char *rf_config_file) {
int i; int i;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms; NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
nfapi_nr_config_request_t *gNB_config = &ru->gNB_list[0]->gNB_config; //tmp index nfapi_nr_config_request_scf_t *gNB_config = &ru->gNB_list[0]->gNB_config; //tmp index
openair0_config_t *cfg = &ru->openair0_cfg; openair0_config_t *cfg = &ru->openair0_cfg;
int N_RB = gNB_config->rf_config.dl_carrier_bandwidth.value; int mu = gNB_config->ssb_config.scs_common.value;
int mu = gNB_config->subframe_config.numerology_index_mu.value; int N_RB = gNB_config->carrier_config.dl_grid_size[gNB_config->ssb_config.scs_common.value].value;
if (mu == NR_MU_0) { //or if LTE if (mu == NR_MU_0) { //or if LTE
if(N_RB == 100) { if(N_RB == 100) {
...@@ -1115,7 +1115,7 @@ void fill_rf_config(RU_t *ru, char *rf_config_file) { ...@@ -1115,7 +1115,7 @@ void fill_rf_config(RU_t *ru, char *rf_config_file) {
AssertFatal(0 == 1,"Numerology %d not supported for the moment\n",mu); AssertFatal(0 == 1,"Numerology %d not supported for the moment\n",mu);
} }
if (gNB_config->subframe_config.duplex_mode.value==TDD) if (gNB_config->cell_config.frame_duplex_type.value==TDD)
cfg->duplex_mode = duplex_mode_TDD; cfg->duplex_mode = duplex_mode_TDD;
else //FDD else //FDD
cfg->duplex_mode = duplex_mode_FDD; cfg->duplex_mode = duplex_mode_FDD;
...@@ -1862,7 +1862,7 @@ void configure_ru(int idx, ...@@ -1862,7 +1862,7 @@ void configure_ru(int idx,
RU_t *ru = RC.ru[idx]; RU_t *ru = RC.ru[idx];
RRU_config_t *config = (RRU_config_t *)arg; RRU_config_t *config = (RRU_config_t *)arg;
RRU_capabilities_t *capabilities = (RRU_capabilities_t *)arg; RRU_capabilities_t *capabilities = (RRU_capabilities_t *)arg;
nfapi_nr_config_request_t *gNB_config = &ru->gNB_list[0]->gNB_config; nfapi_nr_config_request_scf_t *gNB_config = &ru->gNB_list[0]->gNB_config;
int ret; int ret;
LOG_I(PHY, "Received capabilities from RRU %d\n",idx); LOG_I(PHY, "Received capabilities from RRU %d\n",idx);
...@@ -1885,8 +1885,8 @@ void configure_ru(int idx, ...@@ -1885,8 +1885,8 @@ void configure_ru(int idx,
//config->tdd_config_S[0] = ru->nr_frame_parms->tdd_config_S; //config->tdd_config_S[0] = ru->nr_frame_parms->tdd_config_S;
config->att_tx[0] = ru->att_tx; config->att_tx[0] = ru->att_tx;
config->att_rx[0] = ru->att_rx; config->att_rx[0] = ru->att_rx;
config->N_RB_DL[0] = gNB_config->rf_config.dl_carrier_bandwidth.value; config->N_RB_DL[0] = gNB_config->carrier_config.dl_grid_size[gNB_config->ssb_config.scs_common.value].value;
config->N_RB_UL[0] = gNB_config->rf_config.ul_carrier_bandwidth.value; config->N_RB_UL[0] = gNB_config->carrier_config.dl_grid_size[gNB_config->ssb_config.scs_common.value].value;
config->threequarter_fs[0] = ru->nr_frame_parms->threequarter_fs; config->threequarter_fs[0] = ru->nr_frame_parms->threequarter_fs;
/* if (ru->if_south==REMOTE_IF4p5) { /* if (ru->if_south==REMOTE_IF4p5) {
config->prach_FreqOffset[0] = ru->nr_frame_parms->prach_config_common.prach_ConfigInfo.prach_FreqOffset; config->prach_FreqOffset[0] = ru->nr_frame_parms->prach_config_common.prach_ConfigInfo.prach_FreqOffset;
......
...@@ -211,7 +211,7 @@ char uecap_xer_in=0; ...@@ -211,7 +211,7 @@ char uecap_xer_in=0;
uint8_t abstraction_flag=0; uint8_t abstraction_flag=0;
/* forward declarations */ /* forward declarations */
void set_default_frame_parms(nfapi_nr_config_request_t *config[MAX_NUM_CCs], NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]); void set_default_frame_parms(nfapi_nr_config_request_scf_t *config[MAX_NUM_CCs], NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]);
/*---------------------BMC: timespec helpers -----------------------------*/ /*---------------------BMC: timespec helpers -----------------------------*/
...@@ -525,18 +525,18 @@ static void get_options(void) { ...@@ -525,18 +525,18 @@ static void get_options(void) {
void set_default_frame_parms(nfapi_nr_config_request_t *config[MAX_NUM_CCs], void set_default_frame_parms(nfapi_nr_config_request_scf_t *config[MAX_NUM_CCs],
NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]) NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs])
{ {
for (int CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) { for (int CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
frame_parms[CC_id] = (NR_DL_FRAME_PARMS *) malloc(sizeof(NR_DL_FRAME_PARMS)); frame_parms[CC_id] = (NR_DL_FRAME_PARMS *) malloc(sizeof(NR_DL_FRAME_PARMS));
config[CC_id] = (nfapi_nr_config_request_t *) malloc(sizeof(nfapi_nr_config_request_t)); config[CC_id] = (nfapi_nr_config_request_scf_t *) malloc(sizeof(nfapi_nr_config_request_scf_t));
config[CC_id]->subframe_config.numerology_index_mu.value =1; config[CC_id]->ssb_config.scs_common.value = 1;
config[CC_id]->subframe_config.duplex_mode.value = 1; //FDD config[CC_id]->cell_config.frame_duplex_type.value = 1; //FDD
config[CC_id]->subframe_config.dl_cyclic_prefix_type.value = 0; //NORMAL //config[CC_id]->subframe_config.dl_cyclic_prefix_type.value = 0; //NORMAL
config[CC_id]->rf_config.dl_carrier_bandwidth.value = 106; config[CC_id]->carrier_config.dl_grid_size[1].value = 106;
config[CC_id]->rf_config.ul_carrier_bandwidth.value = 106; config[CC_id]->carrier_config.ul_grid_size[1].value = 106;
config[CC_id]->sch_config.physical_cell_id.value = 0; config[CC_id]->cell_config.phy_cell_id.value = 0;
///dl frequency to be filled in ///dl frequency to be filled in
/* //Set some default values that may be overwritten while reading options /* //Set some default values that may be overwritten while reading options
frame_parms[CC_id]->frame_type = FDD; frame_parms[CC_id]->frame_type = FDD;
......
...@@ -22,18 +22,6 @@ ...@@ -22,18 +22,6 @@
#define NFAPI_MAX_NUM_GROUPS 8 #define NFAPI_MAX_NUM_GROUPS 8
#define NFAPI_MAX_NUM_CB 8 #define NFAPI_MAX_NUM_CB 8
/*
// Extension to the generic structures for single tlv values
typedef struct {
nfapi_tl_t tl;
int32_t value;
} nfapi_int32_tlv_t;
typedef struct {
nfapi_tl_t tl;
uint32_t value;
} nfapi_uint32_tlv_t;
*/
// 2019.8 // 2019.8
// SCF222_5G-FAPI_PHY_SPI_Specificayion.pdf Section 3.2 // SCF222_5G-FAPI_PHY_SPI_Specificayion.pdf Section 3.2
...@@ -67,12 +55,6 @@ typedef enum { ...@@ -67,12 +55,6 @@ typedef enum {
//3.3.1 PARAM //3.3.1 PARAM
typedef struct {
nfapi_tl_t tl;
uint16_t value;
} nfapi_nr_param_tlv_t;
//same with nfapi_param_request_t //same with nfapi_param_request_t
typedef struct { typedef struct {
nfapi_p4_p5_message_header_t header; nfapi_p4_p5_message_header_t header;
...@@ -85,12 +67,12 @@ typedef enum { ...@@ -85,12 +67,12 @@ typedef enum {
} nfapi_nr_param_errors_e; } nfapi_nr_param_errors_e;
typedef struct { /*typedef struct {
nfapi_nr_param_errors_e error_code; nfapi_nr_param_errors_e error_code;
//Number of TLVs contained in the message body. //Number of TLVs contained in the message body.
uint8_t number_of_tlvs; uint8_t number_of_tlvs;
nfapi_nr_param_tlv_t TLV; nfapi_nr_param_tlv_t TLV;
} nfapi_nr_param_response_t; } nfapi_nr_param_response_t;*/
//PARAM and CONFIG TLVs are used in the PARAM and CONFIG message exchanges, respectively //PARAM and CONFIG TLVs are used in the PARAM and CONFIG message exchanges, respectively
...@@ -100,7 +82,7 @@ typedef struct { ...@@ -100,7 +82,7 @@ typedef struct {
//table 3-9 //table 3-9
#define NFAPI_NR_PARAM_TLV_RELEASE_CAPABILITY_TAG 0x0001 #define NFAPI_NR_PARAM_TLV_RELEASE_CAPABILITY_TAG 0x0001
#define NFAPI_NR_PARAM_TLV_PHY_STATE_TAG 0x0002 #define NFAPI_NR_PARAM_TLV_PHY_STATE_TAG 0x0002
#define NFAPI_NR_PARAM_TLV_SKIP_BLANK_DL_CONFIG_TAG 0x0003 #define NFAPI_NR_PARAM_TLV_SKIP_BLANK_DL_CONFIG_TAG 0x0003
#define NFAPI_NR_PARAM_TLV_SKIP_BLANK_UL_CONFIG_TAG 0x0004 #define NFAPI_NR_PARAM_TLV_SKIP_BLANK_UL_CONFIG_TAG 0x0004
...@@ -157,123 +139,113 @@ typedef struct { ...@@ -157,123 +139,113 @@ typedef struct {
typedef struct typedef struct
{ {
uint16_t release_capability; //TAG 0x0001 nfapi_uint16_tlv_t release_capability; //TAG 0x0001
uint16_t phy_state; nfapi_uint16_tlv_t phy_state;
uint8_t skip_blank_dl_config; nfapi_uint8_tlv_t skip_blank_dl_config;
uint8_t skip_blank_ul_config; nfapi_uint8_tlv_t skip_blank_ul_config;
uint16_t num_config_tlvs_to_report; nfapi_uint16_tlv_t num_config_tlvs_to_report;
nfapi_nr_param_tlv_t* config_tlvs_to_report_list; nfapi_uint8_tlv_t* config_tlvs_to_report_list;
} nfapi_nr_cell_param_t; } nfapi_nr_cell_param_t;
//table 3-10 Carrier parameters //table 3-10 Carrier parameters
typedef struct typedef struct
{ {
uint8_t cyclic_prefix;//TAG 0x0006 nfapi_uint8_tlv_t cyclic_prefix;//TAG 0x0006
uint8_t supported_subcarrier_spacings_dl; nfapi_uint16_tlv_t supported_subcarrier_spacings_dl;
uint16_t supported_bandwidth_dl; nfapi_uint16_tlv_t supported_bandwidth_dl;
uint8_t supported_subcarrier_spacings_ul; nfapi_uint8_tlv_t supported_subcarrier_spacings_ul;
uint16_t supported_bandwidth_ul; nfapi_uint16_tlv_t supported_bandwidth_ul;
} nfapi_nr_carrier_param_t; } nfapi_nr_carrier_param_t;
//table 3-11 PDCCH parameters //table 3-11 PDCCH parameters
typedef struct typedef struct
{ {
uint8_t cce_mapping_type; nfapi_uint8_tlv_t cce_mapping_type;
uint8_t coreset_outside_first_3_of_ofdm_syms_of_slot; nfapi_uint8_tlv_t coreset_outside_first_3_of_ofdm_syms_of_slot;
uint8_t coreset_precoder_granularity_coreset; nfapi_uint8_tlv_t coreset_precoder_granularity_coreset;
uint8_t pdcch_mu_mimo; nfapi_uint8_tlv_t pdcch_mu_mimo;
uint8_t pdcch_precoder_cycling; nfapi_uint8_tlv_t pdcch_precoder_cycling;
uint8_t max_pdcch_per_slot;//TAG 0x0010 nfapi_uint8_tlv_t max_pdcch_per_slot;//TAG 0x0010
} nfapi_nr_pdcch_param_t; } nfapi_nr_pdcch_param_t;
//table 3-12 PUCCH parameters //table 3-12 PUCCH parameters
typedef struct typedef struct
{ {
uint8_t pucch_formats; nfapi_uint8_tlv_t pucch_formats;
uint8_t max_pucchs_per_slot; nfapi_uint8_tlv_t max_pucchs_per_slot;
} nfapi_nr_pucch_param_t; } nfapi_nr_pucch_param_t;
//table 3-13 PDSCH parameters //table 3-13 PDSCH parameters
typedef struct typedef struct
{ {
uint8_t pdsch_mapping_type; nfapi_uint8_tlv_t pdsch_mapping_type;
uint8_t pdsch_allocation_types; nfapi_uint8_tlv_t pdsch_allocation_types;
uint8_t pdsch_vrb_to_prb_mapping; nfapi_uint8_tlv_t pdsch_vrb_to_prb_mapping;
uint8_t pdsch_cbg; nfapi_uint8_tlv_t pdsch_cbg;
uint8_t pdsch_dmrs_config_types; nfapi_uint8_tlv_t pdsch_dmrs_config_types;
uint8_t pdsch_dmrs_max_length; nfapi_uint8_tlv_t pdsch_dmrs_max_length;
uint8_t pdsch_dmrs_additional_pos; nfapi_uint8_tlv_t pdsch_dmrs_additional_pos;
uint8_t max_pdsch_tbs_per_slot; nfapi_uint8_tlv_t max_pdsch_tbs_per_slot;
uint8_t max_number_mimo_layers_pdsch; nfapi_uint8_tlv_t max_number_mimo_layers_pdsch;
uint8_t supported_max_modulation_order_dl; nfapi_uint8_tlv_t supported_max_modulation_order_dl;
uint8_t max_mu_mimo_users_dl; nfapi_uint8_tlv_t max_mu_mimo_users_dl;
uint8_t pdsch_data_in_dmrs_symbols; nfapi_uint8_tlv_t pdsch_data_in_dmrs_symbols;
uint8_t premption_support;//TAG 0x001F nfapi_uint8_tlv_t premption_support;//TAG 0x001F
uint8_t pdsch_non_slot_support; nfapi_uint8_tlv_t pdsch_non_slot_support;
} nfapi_nr_pdsch_param_t; } nfapi_nr_pdsch_param_t;
//table 3-14 //table 3-14
typedef struct typedef struct
{ {
uint8_t uci_mux_ulsch_in_pusch; nfapi_uint8_tlv_t uci_mux_ulsch_in_pusch;
uint8_t uci_only_pusch; nfapi_uint8_tlv_t uci_only_pusch;
uint8_t pusch_frequency_hopping; nfapi_uint8_tlv_t pusch_frequency_hopping;
uint8_t pusch_dmrs_config_types; nfapi_uint8_tlv_t pusch_dmrs_config_types;
uint8_t pusch_dmrs_max_len; nfapi_uint8_tlv_t pusch_dmrs_max_len;
uint8_t pusch_dmrs_additional_pos; nfapi_uint8_tlv_t pusch_dmrs_additional_pos;
uint8_t pusch_cbg; nfapi_uint8_tlv_t pusch_cbg;
uint8_t pusch_mapping_type; nfapi_uint8_tlv_t pusch_mapping_type;
uint8_t pusch_allocation_types; nfapi_uint8_tlv_t pusch_allocation_types;
uint8_t pusch_vrb_to_prb_mapping; nfapi_uint8_tlv_t pusch_vrb_to_prb_mapping;
//uint8 ? ↓ see table 3-14 nfapi_uint8_tlv_t pusch_max_ptrs_ports;
uint8_t pusch_max_ptrs_ports; nfapi_uint8_tlv_t max_pduschs_tbs_per_slot;
uint8_t max_pduschs_tbs_per_slot; nfapi_uint8_tlv_t max_number_mimo_layers_non_cb_pusch;
uint8_t max_number_mimo_layers_non_cb_pusch; nfapi_uint8_tlv_t supported_modulation_order_ul;
uint8_t supported_modulation_order_ul; nfapi_uint8_tlv_t max_mu_mimo_users_ul;
uint8_t max_mu_mimo_users_ul; nfapi_uint8_tlv_t dfts_ofdm_support;
uint8_t dfts_ofdm_support; nfapi_uint8_tlv_t pusch_aggregation_factor;//TAG 0x0031
uint8_t pusch_aggregation_factor;//TAG 0x0031
} nfapi_nr_pusch_param_t; } nfapi_nr_pusch_param_t;
//table 3-15 //table 3-15
typedef struct typedef struct
{ {
uint8_t prach_long_formats; nfapi_uint8_tlv_t prach_long_formats;
uint8_t prach_short_formats; nfapi_uint8_tlv_t prach_short_formats;
uint8_t prach_restricted_sets; nfapi_uint8_tlv_t prach_restricted_sets;
uint8_t max_prach_fd_occasions_in_a_slot; nfapi_uint8_tlv_t max_prach_fd_occasions_in_a_slot;
} nfapi_nr_prach_param_t; } nfapi_nr_prach_param_t;
//table 3-16 //table 3-16
typedef struct typedef struct
{ {
uint8_t rssi_measurement_support; nfapi_uint8_tlv_t rssi_measurement_support;
} nfapi_nr_measurement_param_t; } nfapi_nr_measurement_param_t;
//-------------------------------------------// //-------------------------------------------//
//3.3.2 CONFIG //3.3.2 CONFIG
typedef struct {
nfapi_tl_t tl;
uint16_t value;
} nfapi_nr_config_tlv_t;
typedef struct {
uint8_t number_of_tlvs;
nfapi_nr_config_tlv_t tlv;
} nfapi_nr_config_request_scf_t;
typedef enum { typedef enum {
NFAPI_NR_CONFIG_MSG_OK = 0, NFAPI_NR_CONFIG_MSG_OK = 0,
NFAPI_NR_CONFIG_MSG_INVALID_CONFIG //The configuration provided has missing mandatory TLVs, or TLVs that are invalid or unsupported in this state. NFAPI_NR_CONFIG_MSG_INVALID_CONFIG //The configuration provided has missing mandatory TLVs, or TLVs that are invalid or unsupported in this state.
} nfapi_nr_config_errors_e; } nfapi_nr_config_errors_e;
typedef struct { /*typedef struct {
nfapi_nr_config_errors_e error_code; nfapi_nr_config_errors_e error_code;
uint8_t number_of_invalid_tlvs_that_can_only_be_configured_in_idle; uint8_t number_of_invalid_tlvs_that_can_only_be_configured_in_idle;
uint8_t unmber_of_missing_tlvs; uint8_t unmber_of_missing_tlvs;
...@@ -283,7 +255,7 @@ typedef struct { ...@@ -283,7 +255,7 @@ typedef struct {
nfapi_nr_config_tlv_t* tlv_invalid_running_list; nfapi_nr_config_tlv_t* tlv_invalid_running_list;
nfapi_nr_config_tlv_t* tlv_missing_list; nfapi_nr_config_tlv_t* tlv_missing_list;
} nfapi_nr_config_response_t; } nfapi_nr_config_response_t;*/
//nfapi_nr_config_tlv_format_t carrier config ~ precoding config: //nfapi_nr_config_tlv_format_t carrier config ~ precoding config:
...@@ -336,34 +308,34 @@ typedef struct { ...@@ -336,34 +308,34 @@ typedef struct {
//table 3-21 //table 3-21
typedef struct typedef struct
{ {
uint16_t dl_bandwidth;//Carrier bandwidth for DL in MHz [38.104, sec 5.3.2] Values: 5, 10, 15, 20, 25, 30, 40,50, 60, 70, 80,90,100,200,400 nfapi_uint16_tlv_t dl_bandwidth;//Carrier bandwidth for DL in MHz [38.104, sec 5.3.2] Values: 5, 10, 15, 20, 25, 30, 40,50, 60, 70, 80,90,100,200,400
uint32_t dl_frequency; //Absolute frequency of DL point A in KHz [38.104, sec5.2 and 38.211 sec 4.4.4.2] Value: 450000 -> 52600000 nfapi_uint32_tlv_t dl_frequency; //Absolute frequency of DL point A in KHz [38.104, sec5.2 and 38.211 sec 4.4.4.2] Value: 450000 -> 52600000
uint16_t dl_k0[5];//𝑘_{0}^{𝜇} for each of the numerologies [38.211, sec 5.3.1] Value: 0 ->23699 nfapi_uint16_tlv_t dl_k0[5];//𝑘_{0}^{𝜇} for each of the numerologies [38.211, sec 5.3.1] Value: 0 ->23699
uint16_t dl_grid_size[5];//Grid size 𝑁_{𝑔𝑟𝑖𝑑}^{𝑠𝑖𝑧𝑒,𝜇} for each of the numerologies [38.211, sec 4.4.2] Value: 0->275 0 = this numerology not used nfapi_uint16_tlv_t dl_grid_size[5];//Grid size 𝑁_{𝑔𝑟𝑖𝑑}^{𝑠𝑖𝑧𝑒,𝜇} for each of the numerologies [38.211, sec 4.4.2] Value: 0->275 0 = this numerology not used
uint16_t num_tx_ant;//Number of Tx antennas nfapi_uint16_tlv_t num_tx_ant;//Number of Tx antennas
uint16_t uplink_bandwidth;//Carrier bandwidth for UL in MHz. [38.104, sec 5.3.2] Values: 5, 10, 15, 20, 25, 30, 40,50, 60, 70, 80,90,100,200,400 nfapi_uint16_tlv_t uplink_bandwidth;//Carrier bandwidth for UL in MHz. [38.104, sec 5.3.2] Values: 5, 10, 15, 20, 25, 30, 40,50, 60, 70, 80,90,100,200,400
uint32_t uplink_frequency;//Absolute frequency of UL point A in KHz [38.104, sec5.2 and 38.211 sec 4.4.4.2] Value: 450000 -> 52600000 nfapi_uint32_tlv_t uplink_frequency;//Absolute frequency of UL point A in KHz [38.104, sec5.2 and 38.211 sec 4.4.4.2] Value: 450000 -> 52600000
uint16_t ul_k0[5];//𝑘0 𝜇 for each of the numerologies [38.211, sec 5.3.1] Value: : 0 ->23699 nfapi_uint16_tlv_t ul_k0[5];//𝑘0 𝜇 for each of the numerologies [38.211, sec 5.3.1] Value: : 0 ->23699
uint16_t ul_grid_size[5];//Grid size 𝑁𝑔𝑟𝑖𝑑 𝑠𝑖𝑧𝑒,𝜇 for each of the numerologies [38.211, sec 4.4.2]. Value: 0->275 0 = this numerology not used nfapi_uint16_tlv_t ul_grid_size[5];//Grid size 𝑁𝑔𝑟𝑖𝑑 𝑠𝑖𝑧𝑒,𝜇 for each of the numerologies [38.211, sec 4.4.2]. Value: 0->275 0 = this numerology not used
uint16_t num_rx_ant;// nfapi_uint16_tlv_t num_rx_ant;//
uint8_t frequency_shift_7p5khz;//Indicates presence of 7.5KHz frequency shift. Value: 0 = false 1 = true nfapi_uint8_tlv_t frequency_shift_7p5khz;//Indicates presence of 7.5KHz frequency shift. Value: 0 = false 1 = true
} nfapi_nr_carrier_config_t; } nfapi_nr_carrier_config_t;
//table 3-22 //table 3-22
typedef struct typedef struct
{ {
uint8_t phy_cell_id;//Physical Cell ID, 𝑁_{𝐼𝐷}^{𝑐𝑒𝑙𝑙} [38.211, sec 7.4.2.1] Value: 0 ->1007 nfapi_uint8_tlv_t phy_cell_id;//Physical Cell ID, 𝑁_{𝐼𝐷}^{𝑐𝑒𝑙𝑙} [38.211, sec 7.4.2.1] Value: 0 ->1007
uint8_t frame_duplex_type;//Frame duplex type Value: 0 = FDD 1 = TDD nfapi_uint8_tlv_t frame_duplex_type;//Frame duplex type Value: 0 = FDD 1 = TDD
} nfapi_nr_cell_config_t; } nfapi_nr_cell_config_t;
//table 3-23 //table 3-23
typedef struct typedef struct
{ {
uint32_t ss_pbch_power;//SSB Block Power Value: TBD (-60..50 dBm) nfapi_uint32_tlv_t ss_pbch_power;//SSB Block Power Value: TBD (-60..50 dBm)
uint8_t bch_payload;//Defines option selected for generation of BCH payload, see Table 3-13 (v0.0.011 Value: 0: MAC generates the full PBCH payload 1: PHY generates the timing PBCH bits 2: PHY generates the full PBCH payload nfapi_uint8_tlv_t bch_payload;//Defines option selected for generation of BCH payload, see Table 3-13 (v0.0.011 Value: 0: MAC generates the full PBCH payload 1: PHY generates the timing PBCH bits 2: PHY generates the full PBCH payload
uint8_t scs_common;//subcarrierSpacing for common, used for initial access and broadcast message. [38.211 sec 4.2] Value:0->3 nfapi_uint8_tlv_t scs_common;//subcarrierSpacing for common, used for initial access and broadcast message. [38.211 sec 4.2] Value:0->3
} nfapi_nr_ssb_config_t; } nfapi_nr_ssb_config_t;
...@@ -375,51 +347,51 @@ typedef struct ...@@ -375,51 +347,51 @@ typedef struct
typedef struct typedef struct
{ {
uint8_t num_prach_fd_occasions; uint8_t num_prach_fd_occasions;
uint16_t prach_root_sequence_index;//Starting logical root sequence index, 𝑖, equivalent to higher layer parameter prach-RootSequenceIndex [38.211, sec 6.3.3.1] Value: 0 -> 837 nfapi_uint16_tlv_t prach_root_sequence_index;//Starting logical root sequence index, 𝑖, equivalent to higher layer parameter prach-RootSequenceIndex [38.211, sec 6.3.3.1] Value: 0 -> 837
uint8_t num_root_sequences;//Number of root sequences for a particular FD occasion that are required to generate the necessary number of preambles nfapi_uint8_tlv_t num_root_sequences;//Number of root sequences for a particular FD occasion that are required to generate the necessary number of preambles
uint16_t k1;//Frequency offset (from UL bandwidth part) for each FD. [38.211, sec 6.3.3.2] Value: from 0 to 272 nfapi_uint16_tlv_t k1;//Frequency offset (from UL bandwidth part) for each FD. [38.211, sec 6.3.3.2] Value: from 0 to 272
uint8_t prach_zero_corr_conf;//PRACH Zero CorrelationZone Config which is used to dervive 𝑁𝑐𝑠 [38.211, sec 6.3.3.1] Value: from 0 to 15 nfapi_uint8_tlv_t prach_zero_corr_conf;//PRACH Zero CorrelationZone Config which is used to dervive 𝑁𝑐𝑠 [38.211, sec 6.3.3.1] Value: from 0 to 15
uint8_t num_unused_root_sequences;//Number of unused sequences available for noise estimation per FD occasion. At least one unused root sequence is required per FD occasion. nfapi_uint8_tlv_t num_unused_root_sequences;//Number of unused sequences available for noise estimation per FD occasion. At least one unused root sequence is required per FD occasion.
uint8_t* unused_root_sequences_list;//Unused root sequence or sequences per FD occasion. Required for noise estimation. nfapi_uint8_tlv_t* unused_root_sequences_list;//Unused root sequence or sequences per FD occasion. Required for noise estimation.
} nfapi_nr_num_prach_fd_occasions_t; } nfapi_nr_num_prach_fd_occasions_t;
typedef struct typedef struct
{ {
uint8_t prach_sequence_length;//RACH sequence length. Long or Short sequence length. Only short sequence length is supported for FR2. [38.211, sec 6.3.3.1] Value: 0 = Long sequence 1 = Short sequence nfapi_uint8_tlv_t prach_sequence_length;//RACH sequence length. Only short sequence length is supported for FR2. [38.211, sec 6.3.3.1] Value: 0 = Long sequence 1 = Short sequence
uint8_t prach_sub_c_spacing;//Subcarrier spacing of PRACH. [38.211 sec 4.2] Value:0->4 nfapi_uint8_tlv_t prach_sub_c_spacing;//Subcarrier spacing of PRACH. [38.211 sec 4.2] Value:0->4
uint8_t restricted_set_config;//PRACH restricted set config Value: 0: unrestricted 1: restricted set type A 2: restricted set type B nfapi_uint8_tlv_t restricted_set_config;//PRACH restricted set config Value: 0: unrestricted 1: restricted set type A 2: restricted set type B
uint8_t num_prach_fd_occasions;//Number of RACH frequency domain occasions. Corresponds to the parameter 𝑀 in [38.211, sec 6.3.3.2] which equals the higher layer parameter msg1FDM Value: 1,2,4,8 nfapi_uint8_tlv_t num_prach_fd_occasions;//Corresponds to the parameter 𝑀 in [38.211, sec 6.3.3.2] which equals the higher layer parameter msg1FDM Value: 1,2,4,8
nfapi_nr_num_prach_fd_occasions_t* num_prach_fd_occasions_list; nfapi_nr_num_prach_fd_occasions_t* num_prach_fd_occasions_list;
uint8_t ssb_per_rach;//SSB-per-RACH-occasion Value: 0: 1/8 1:1/4, 2:1/2 3:1 4:2 5:4, 6:8 7:16 nfapi_uint8_tlv_t ssb_per_rach;//SSB-per-RACH-occasion Value: 0: 1/8 1:1/4, 2:1/2 3:1 4:2 5:4, 6:8 7:16
uint8_t prach_multiple_carriers_in_a_band;//0 = disabled 1 = enabled nfapi_uint8_tlv_t prach_multiple_carriers_in_a_band;//0 = disabled 1 = enabled
} nfapi_nr_prach_config_t; } nfapi_nr_prach_config_t;
//table 3-25 //table 3-25
typedef struct typedef struct
{ {
uint32_t ssb_mask;//Bitmap for actually transmitted SSB. MSB->LSB of first 32 bit number corresponds to SSB 0 to SSB 31 MSB->LSB of second 32 bit number corresponds to SSB 32 to SSB 63 Value for each bit: 0: not transmitted 1: transmitted nfapi_uint32_tlv_t ssb_mask;//Bitmap for actually transmitted SSB. MSB->LSB of first 32 bit number corresponds to SSB 0 to SSB 31 MSB->LSB of second 32 bit number corresponds to SSB 32 to SSB 63 Value for each bit: 0: not transmitted 1: transmitted
} nfapi_nr_ssb_mask_size_2_t; } nfapi_nr_ssb_mask_size_2_t;
typedef struct typedef struct
{ {
uint8_t beam_id[64];//BeamID for each SSB in SsbMask. For example, if SSB mask bit 26 is set to 1, then BeamId[26] will be used to indicate beam ID of SSB 26. Value: from 0 to 63 nfapi_uint8_tlv_t beam_id[64];//BeamID for each SSB in SsbMask. For example, if SSB mask bit 26 is set to 1, then BeamId[26] will be used to indicate beam ID of SSB 26. Value: from 0 to 63
} nfapi_nr_ssb_mask_size_64_t; } nfapi_nr_ssb_mask_size_64_t;
typedef struct typedef struct
{ {
uint16_t ssb_offset_point_a;//Offset of lowest subcarrier of lowest resource block used for SS/PBCH block. Given in PRB [38.211, section 4.4.4.2] Value: 0->2199 nfapi_uint16_tlv_t ssb_offset_point_a;//Offset of lowest subcarrier of lowest resource block used for SS/PBCH block. Given in PRB [38.211, section 4.4.4.2] Value: 0->2199
uint8_t beta_pss;//PSS EPRE to SSS EPRE in a SS/PBCH block [38.213, sec 4.1] Values: 0 = 0dB nfapi_uint8_tlv_t beta_pss;//PSS EPRE to SSS EPRE in a SS/PBCH block [38.213, sec 4.1] Values: 0 = 0dB
uint8_t ssb_period;//SSB periodicity in msec Value: 0: ms5 1: ms10 2: ms20 3: ms40 4: ms80 5: ms160 nfapi_uint8_tlv_t ssb_period;//SSB periodicity in msec Value: 0: ms5 1: ms10 2: ms20 3: ms40 4: ms80 5: ms160
uint8_t ssb_subcarrier_offset;//ssbSubcarrierOffset or 𝑘𝑆𝑆𝐵 (38.211, section 7.4.3.1) Value: 0->31 nfapi_uint8_tlv_t ssb_subcarrier_offset;//ssbSubcarrierOffset or 𝑘𝑆𝑆𝐵 (38.211, section 7.4.3.1) Value: 0->31
uint32_t MIB;//MIB payload, where the 24 MSB are used and represent the MIB in [38.331 MIB IE] and represent 0 1 2 3 1 , , , ,..., A− a a a a a [38.212, sec 7.1.1] nfapi_uint32_tlv_t MIB;//MIB payload, where the 24 MSB are used and represent the MIB in [38.331 MIB IE] and represent 0 1 2 3 1 , , , ,..., A− a a a a a [38.212, sec 7.1.1]
nfapi_nr_ssb_mask_size_2_t* ssb_mask_size_2_list;//2 nfapi_nr_ssb_mask_size_2_t ssb_mask_list[2];
nfapi_nr_ssb_mask_size_64_t* ssb_mask_size_64_list;//64 nfapi_nr_ssb_mask_size_64_t* ssb_beam_id_list;//64
uint8_t ss_pbch_multiple_carriers_in_a_band;//0 = disabled 1 = enabled nfapi_uint8_tlv_t ss_pbch_multiple_carriers_in_a_band;//0 = disabled 1 = enabled
uint8_t multiple_cells_ss_pbch_in_a_carrier;//Indicates that multiple cells will be supported in a single carrier 0 = disabled 1 = enabled nfapi_uint8_tlv_t multiple_cells_ss_pbch_in_a_carrier;//Indicates that multiple cells will be supported in a single carrier 0 = disabled 1 = enabled
} nfapi_nr_ssb_table_t; } nfapi_nr_ssb_table_t;
...@@ -428,7 +400,7 @@ typedef struct ...@@ -428,7 +400,7 @@ typedef struct
//? //?
typedef struct typedef struct
{ {
uint8_t slot_config;//For each symbol in each slot a uint8_t value is provided indicating: 0: DL slot 1: UL slot 2: Guard slot nfapi_uint8_tlv_t slot_config;//For each symbol in each slot a uint8_t value is provided indicating: 0: DL slot 1: UL slot 2: Guard slot
} nfapi_nr_max_num_of_symbol_per_slot_t; } nfapi_nr_max_num_of_symbol_per_slot_t;
...@@ -440,7 +412,7 @@ typedef struct ...@@ -440,7 +412,7 @@ typedef struct
typedef struct typedef struct
{ {
uint8_t tdd_period;//DL UL Transmission Periodicity. Value:0: ms0p5 1: ms0p625 2: ms1 3: ms1p25 4: ms2 5: ms2p5 6: ms5 7: ms10 nfapi_uint8_tlv_t tdd_period;//DL UL Transmission Periodicity. Value:0: ms0p5 1: ms0p625 2: ms1 3: ms1p25 4: ms2 5: ms2p5 6: ms5 7: ms10
nfapi_nr_max_tdd_periodicity_t* max_tdd_periodicity_list; nfapi_nr_max_tdd_periodicity_t* max_tdd_periodicity_list;
} nfapi_nr_tdd_table_t; } nfapi_nr_tdd_table_t;
...@@ -448,10 +420,23 @@ typedef struct ...@@ -448,10 +420,23 @@ typedef struct
//table 3-27 //table 3-27
typedef struct typedef struct
{ {
uint8_t rssi_measurement;//RSSI measurement unit. See Table 3-16 for RSSI definition. Value: 0: Do not report RSSI 1: dBm 2: dBFS nfapi_uint8_tlv_t rssi_measurement;//RSSI measurement unit. See Table 3-16 for RSSI definition. Value: 0: Do not report RSSI 1: dBm 2: dBFS
} nfapi_nr_measurement_config_t; } nfapi_nr_measurement_config_t;
typedef struct {
uint8_t num_tlv;
nfapi_nr_carrier_config_t carrier_config;
nfapi_nr_cell_config_t cell_config;
nfapi_nr_ssb_config_t ssb_config;
nfapi_nr_prach_config_t prach_config;
nfapi_nr_ssb_table_t ssb_table;
nfapi_nr_tdd_table_t tdd_table;
nfapi_nr_measurement_config_t measurement_config;
} nfapi_nr_config_request_scf_t;
//------------------------------// //------------------------------//
//3.3.3 START //3.3.3 START
......
...@@ -78,7 +78,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB, ...@@ -78,7 +78,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
unsigned char abstraction_flag) { unsigned char abstraction_flag) {
// shortcuts // shortcuts
NR_DL_FRAME_PARMS *const fp = &gNB->frame_parms; NR_DL_FRAME_PARMS *const fp = &gNB->frame_parms;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config; nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
NR_gNB_COMMON *const common_vars = &gNB->common_vars; NR_gNB_COMMON *const common_vars = &gNB->common_vars;
NR_gNB_PRACH *const prach_vars = &gNB->prach_vars; NR_gNB_PRACH *const prach_vars = &gNB->prach_vars;
NR_gNB_PUSCH **const pusch_vars = gNB->pusch_vars; NR_gNB_PUSCH **const pusch_vars = gNB->pusch_vars;
...@@ -129,7 +129,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB, ...@@ -129,7 +129,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
} }
} }
nr_init_pdcch_dmrs(gNB, cfg->sch_config.physical_cell_id.value); nr_init_pdcch_dmrs(gNB, cfg->cell_config.phy_cell_id.value);
nr_init_pbch_interleaver(gNB->nr_pbch_interleaver); nr_init_pbch_interleaver(gNB->nr_pbch_interleaver);
//PDSCH DMRS init //PDSCH DMRS init
gNB->nr_gold_pdsch_dmrs = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t ***)); gNB->nr_gold_pdsch_dmrs = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t ***));
...@@ -150,7 +150,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB, ...@@ -150,7 +150,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
} }
} }
nr_init_pdsch_dmrs(gNB, cfg->sch_config.physical_cell_id.value); nr_init_pdsch_dmrs(gNB, cfg->cell_config.phy_cell_id.value);
/// Transport init necessary for NR synchro /// Transport init necessary for NR synchro
init_nr_transport(gNB); init_nr_transport(gNB);
...@@ -198,6 +198,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB, ...@@ -198,6 +198,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
prach_vars->rxsigF = (int16_t *)malloc16_clear( 1024*2*sizeof(int16_t) ); prach_vars->rxsigF = (int16_t *)malloc16_clear( 1024*2*sizeof(int16_t) );
prach_vars->prach_ifft = (int32_t *)malloc16_clear(1024*2*sizeof(int32_t)); prach_vars->prach_ifft = (int32_t *)malloc16_clear(1024*2*sizeof(int32_t));
int N_RB_UL = cfg->carrier_config.ul_grid_size[cfg->ssb_config.scs_common.value].value;
for (int ULSCH_id=0; ULSCH_id<NUMBER_OF_NR_ULSCH_MAX; ULSCH_id++) { for (int ULSCH_id=0; ULSCH_id<NUMBER_OF_NR_ULSCH_MAX; ULSCH_id++) {
...@@ -215,16 +216,16 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB, ...@@ -215,16 +216,16 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
pusch_vars[ULSCH_id]->rho = (int32_t **)malloc16_clear( fp->nb_antennas_rx*sizeof(int32_t*) ); pusch_vars[ULSCH_id]->rho = (int32_t **)malloc16_clear( fp->nb_antennas_rx*sizeof(int32_t*) );
for (i=0; i<fp->nb_antennas_rx; i++) { for (i=0; i<fp->nb_antennas_rx; i++) {
pusch_vars[ULSCH_id]->rxdataF_ext[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12*fp->symbols_per_slot ); pusch_vars[ULSCH_id]->rxdataF_ext[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
pusch_vars[ULSCH_id]->rxdataF_ext2[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12*fp->symbols_per_slot ); pusch_vars[ULSCH_id]->rxdataF_ext2[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
pusch_vars[ULSCH_id]->ul_ch_estimates[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12*fp->symbols_per_slot ); pusch_vars[ULSCH_id]->ul_ch_estimates[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
pusch_vars[ULSCH_id]->ul_ch_estimates_ext[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12*fp->symbols_per_slot ); pusch_vars[ULSCH_id]->ul_ch_estimates_ext[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
pusch_vars[ULSCH_id]->ul_ch_estimates_time[i] = (int32_t *)malloc16_clear( 2*sizeof(int32_t)*fp->ofdm_symbol_size ); pusch_vars[ULSCH_id]->ul_ch_estimates_time[i] = (int32_t *)malloc16_clear( 2*sizeof(int32_t)*fp->ofdm_symbol_size );
pusch_vars[ULSCH_id]->rxdataF_comp[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12*fp->symbols_per_slot ); pusch_vars[ULSCH_id]->rxdataF_comp[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
pusch_vars[ULSCH_id]->ul_ch_mag0[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12 ); pusch_vars[ULSCH_id]->ul_ch_mag0[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*N_RB_UL*12 );
pusch_vars[ULSCH_id]->ul_ch_magb0[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12 ); pusch_vars[ULSCH_id]->ul_ch_magb0[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*N_RB_UL*12 );
pusch_vars[ULSCH_id]->ul_ch_mag[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12 ); pusch_vars[ULSCH_id]->ul_ch_mag[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*N_RB_UL*12 );
pusch_vars[ULSCH_id]->ul_ch_magb[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*cfg->rf_config.ul_carrier_bandwidth.value*12 ); pusch_vars[ULSCH_id]->ul_ch_magb[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*N_RB_UL*12 );
pusch_vars[ULSCH_id]->rho[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*(fp->N_RB_UL*12*7*2) ); pusch_vars[ULSCH_id]->rho[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*(fp->N_RB_UL*12*7*2) );
} }
...@@ -284,7 +285,6 @@ void phy_config_request(PHY_Config_t *phy_config) { ...@@ -284,7 +285,6 @@ void phy_config_request(PHY_Config_t *phy_config) {
void phy_free_nr_gNB(PHY_VARS_gNB *gNB) void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
{ {
//NR_DL_FRAME_PARMS* const fp = &gNB->frame_parms; //NR_DL_FRAME_PARMS* const fp = &gNB->frame_parms;
//nfapi_nr_config_request_t *cfg = &gNB->gNB_config;
NR_gNB_COMMON *const common_vars = &gNB->common_vars; NR_gNB_COMMON *const common_vars = &gNB->common_vars;
NR_gNB_PUSCH **const pusch_vars = gNB->pusch_vars; NR_gNB_PUSCH **const pusch_vars = gNB->pusch_vars;
/*LTE_eNB_SRS *const srs_vars = gNB->srs_vars; /*LTE_eNB_SRS *const srs_vars = gNB->srs_vars;
...@@ -375,21 +375,21 @@ void nr_phy_config_request_sim(PHY_VARS_gNB *gNB, ...@@ -375,21 +375,21 @@ void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,
uint64_t position_in_burst) uint64_t position_in_burst)
{ {
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms; NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
nfapi_nr_config_request_t *gNB_config = &gNB->gNB_config; nfapi_nr_config_request_scf_t *gNB_config = &gNB->gNB_config;
//overwrite for new NR parameters //overwrite for new NR parameters
gNB_config->nfapi_config.rf_bands.rf_band[0] = 78;
gNB_config->nfapi_config.nrarfcn.value = 620000; gNB_config->cell_config.phy_cell_id.value = Nid_cell;
gNB_config->subframe_config.numerology_index_mu.value = mu; gNB_config->ssb_config.scs_common.value = mu;
gNB_config->subframe_config.duplex_mode.value = TDD; gNB_config->ssb_table.ssb_subcarrier_offset.value = 0;
gNB_config->rf_config.dl_carrier_bandwidth.value = N_RB_DL; gNB_config->ssb_table.ssb_offset_point_a.value = (N_RB_DL-20);
gNB_config->rf_config.ul_carrier_bandwidth.value = N_RB_UL; gNB_config->ssb_table.ssb_mask_list[0].ssb_mask.value = position_in_burst;
gNB_config->sch_config.half_frame_index.value = 0; gNB_config->ssb_table.ssb_mask_list[1].ssb_mask.value = position_in_burst>>32;
gNB_config->sch_config.ssb_subcarrier_offset.value = 0; gNB_config->cell_config.frame_duplex_type.value = TDD;
gNB_config->sch_config.n_ssb_crb.value = (N_RB_DL-20); gNB_config->ssb_table.ssb_period.value = 1; //10ms
gNB_config->sch_config.ssb_subcarrier_offset.value = 0; gNB_config->carrier_config.dl_grid_size[mu].value = N_RB_DL;
gNB_config->sch_config.physical_cell_id.value = Nid_cell; gNB_config->carrier_config.ul_grid_size[mu].value = N_RB_UL;
gNB_config->sch_config.ssb_scg_position_in_burst.value = position_in_burst;
gNB_config->subframe_config.dl_cyclic_prefix_type.value = (fp->Ncp == NORMAL) ? NFAPI_CP_NORMAL : NFAPI_CP_EXTENDED; //gNB_config->subframe_config.dl_cyclic_prefix_type.value = (fp->Ncp == NORMAL) ? NFAPI_CP_NORMAL : NFAPI_CP_EXTENDED;
gNB->mac_enabled = 1; gNB->mac_enabled = 1;
fp->dl_CarrierFreq = 3500000000;//from_nrarfcn(gNB_config->nfapi_config.rf_bands.rf_band[0],gNB_config->nfapi_config.nrarfcn.value); fp->dl_CarrierFreq = 3500000000;//from_nrarfcn(gNB_config->nfapi_config.rf_bands.rf_band[0],gNB_config->nfapi_config.nrarfcn.value);
...@@ -402,42 +402,51 @@ void nr_phy_config_request_sim(PHY_VARS_gNB *gNB, ...@@ -402,42 +402,51 @@ void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,
void nr_phy_config_request(NR_PHY_Config_t *phy_config) { void nr_phy_config_request(NR_PHY_Config_t *phy_config) {
uint8_t Mod_id = phy_config->Mod_id; uint8_t Mod_id = phy_config->Mod_id;
NR_DL_FRAME_PARMS *fp = &RC.gNB[Mod_id]->frame_parms; NR_DL_FRAME_PARMS *fp = &RC.gNB[Mod_id]->frame_parms;
nfapi_nr_config_request_t *gNB_config = &RC.gNB[Mod_id]->gNB_config; nfapi_nr_config_request_scf_t *gNB_config = &RC.gNB[Mod_id]->gNB_config;
gNB_config->nfapi_config.rf_bands.rf_band[0] = phy_config->cfg->nfapi_config.rf_bands.rf_band[0]; //22
gNB_config->nfapi_config.nrarfcn.value = phy_config->cfg->nfapi_config.nrarfcn.value; //6600 gNB_config->cell_config.phy_cell_id.value = phy_config->cfg->cell_config.phy_cell_id.value;
gNB_config->subframe_config.numerology_index_mu.value = phy_config->cfg->subframe_config.numerology_index_mu.value;//1 gNB_config->carrier_config.dl_frequency.value = phy_config->cfg->carrier_config.dl_frequency.value;
gNB_config->rf_config.dl_carrier_bandwidth.value = phy_config->cfg->rf_config.dl_carrier_bandwidth.value;//106; gNB_config->carrier_config.uplink_frequency.value = phy_config->cfg->carrier_config.uplink_frequency.value;
gNB_config->rf_config.ul_carrier_bandwidth.value = phy_config->cfg->rf_config.ul_carrier_bandwidth.value;//106; gNB_config->ssb_config.scs_common.value = phy_config->cfg->ssb_config.scs_common.value;
gNB_config->sch_config.half_frame_index.value = 0; gNB_config->carrier_config.dl_bandwidth.value = phy_config->cfg->carrier_config.dl_bandwidth.value;
gNB_config->sch_config.ssb_subcarrier_offset.value = phy_config->cfg->sch_config.ssb_subcarrier_offset.value;//0; gNB_config->carrier_config.uplink_bandwidth.value = phy_config->cfg->carrier_config.uplink_bandwidth.value;
gNB_config->sch_config.n_ssb_crb.value = (phy_config->cfg->rf_config.dl_carrier_bandwidth.value-20); gNB_config->ssb_table.ssb_subcarrier_offset.value = phy_config->cfg->ssb_table.ssb_subcarrier_offset.value;
gNB_config->sch_config.physical_cell_id.value = phy_config->cfg->sch_config.physical_cell_id.value; gNB_config->ssb_table.ssb_offset_point_a.value = phy_config->cfg->ssb_table.ssb_offset_point_a.value;
gNB_config->sch_config.ssb_scg_position_in_burst.value= phy_config->cfg->sch_config.ssb_scg_position_in_burst.value; gNB_config->ssb_table.ssb_mask_list[0].ssb_mask.value = phy_config->cfg->ssb_table.ssb_mask_list[0].ssb_mask.value;
gNB_config->sch_config.ssb_periodicity.value = phy_config->cfg->sch_config.ssb_periodicity.value; gNB_config->ssb_table.ssb_mask_list[1].ssb_mask.value = phy_config->cfg->ssb_table.ssb_mask_list[1].ssb_mask.value;
gNB_config->ssb_table.ssb_period.value = phy_config->cfg->ssb_table.ssb_period.value;
if (phy_config->cfg->subframe_config.duplex_mode.value == 0) { for (int i=0; i<5; i++) {
gNB_config->subframe_config.duplex_mode.value = FDD; gNB_config->carrier_config.dl_grid_size[i].value = phy_config->cfg->carrier_config.dl_grid_size[i].value;
gNB_config->carrier_config.ul_grid_size[i].value = phy_config->cfg->carrier_config.ul_grid_size[i].value;
gNB_config->carrier_config.dl_k0[i].value = phy_config->cfg->carrier_config.dl_k0[i].value;
gNB_config->carrier_config.ul_k0[i].value = phy_config->cfg->carrier_config.ul_k0[i].value;
}
if (phy_config->cfg->cell_config.frame_duplex_type.value == 0) {
gNB_config->cell_config.frame_duplex_type.value = FDD;
} else { } else {
gNB_config->subframe_config.duplex_mode.value = TDD; gNB_config->cell_config.frame_duplex_type.value = TDD;
} }
memcpy((void*)&gNB_config->rach_config,(void*)&phy_config->cfg->rach_config,sizeof(phy_config->cfg->rach_config)); memcpy((void*)&gNB_config->prach_config,(void*)&phy_config->cfg->prach_config,sizeof(phy_config->cfg->prach_config));
RC.gNB[Mod_id]->mac_enabled = 1; RC.gNB[Mod_id]->mac_enabled = 1;
fp->dl_CarrierFreq = from_nrarfcn(gNB_config->nfapi_config.rf_bands.rf_band[0],gNB_config->nfapi_config.nrarfcn.value); fp->dl_CarrierFreq = (gNB_config->carrier_config.dl_frequency.value)*1e3 + (gNB_config->carrier_config.dl_bandwidth.value)*5e5;
int32_t *dlul_offset = 0;
lte_frame_type_t *frame_type = 0;
get_band(fp->dl_CarrierFreq,&fp->eutra_band,dlul_offset,frame_type);
fp->ul_CarrierFreq = (gNB_config->carrier_config.uplink_frequency.value)*1e3 + (gNB_config->carrier_config.uplink_bandwidth.value)*5e5;
fp->ul_CarrierFreq = fp->dl_CarrierFreq - (get_nr_uldl_offset(gNB_config->nfapi_config.rf_bands.rf_band[0])*100000); fp->threequarter_fs = openair0_cfg[0].threequarter_fs;
// get_band(fp->dl_CarrierFreq, &gNB_config->nfapi_config.rf_bands.rf_band[0], &uplink_frequency_offset[CC_id][0], &fp->frame_type); LOG_I(PHY,"Configuring MIB for instance %d, : (Nid_cell %d,DL freq %llu, UL freq %llu)\n",
// fp->ul_CarrierFreq = fp->dl_CarrierFreq + uplink_frequency_offset[CC_id][0];
fp->threequarter_fs = openair0_cfg[0].threequarter_fs;
LOG_I(PHY,"Configuring MIB for instance %d, : (band %d,N_RB_DL %d, N_RB_UL %d, Nid_cell %d,DL freq %llu, UL freq %llu)\n",
Mod_id, Mod_id,
gNB_config->nfapi_config.rf_bands.rf_band[0], gNB_config->cell_config.phy_cell_id.value,
gNB_config->rf_config.dl_carrier_bandwidth.value,
gNB_config->rf_config.ul_carrier_bandwidth.value,
gNB_config->sch_config.physical_cell_id.value,
(unsigned long long)fp->dl_CarrierFreq, (unsigned long long)fp->dl_CarrierFreq,
(unsigned long long)fp->ul_CarrierFreq); (unsigned long long)fp->ul_CarrierFreq);
...@@ -457,15 +466,16 @@ void init_nr_transport(PHY_VARS_gNB *gNB) { ...@@ -457,15 +466,16 @@ void init_nr_transport(PHY_VARS_gNB *gNB) {
int i; int i;
int j; int j;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms; NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config; nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
LOG_I(PHY, "Initialise nr transport\n"); LOG_I(PHY, "Initialise nr transport\n");
uint16_t grid_size = cfg->carrier_config.dl_grid_size[fp->numerology_index].value;
for (i=0; i<NUMBER_OF_NR_DLSCH_MAX; i++) { for (i=0; i<NUMBER_OF_NR_DLSCH_MAX; i++) {
LOG_I(PHY,"Allocating Transport Channel Buffers for DLSCH %d/%d\n",i,NUMBER_OF_NR_DLSCH_MAX); LOG_I(PHY,"Allocating Transport Channel Buffers for DLSCH %d/%d\n",i,NUMBER_OF_NR_DLSCH_MAX);
for (j=0; j<2; j++) { for (j=0; j<2; j++) {
gNB->dlsch[i][j] = new_gNB_dlsch(1,16,NSOFT,0,fp,cfg); gNB->dlsch[i][j] = new_gNB_dlsch(fp,1,16,NSOFT,0,grid_size);
if (!gNB->dlsch[i][j]) { if (!gNB->dlsch[i][j]) {
LOG_E(PHY,"Can't get gNB dlsch structures for UE %d \n", i); LOG_E(PHY,"Can't get gNB dlsch structures for UE %d \n", i);
......
...@@ -27,10 +27,11 @@ uint32_t nr_subcarrier_spacing[MAX_NUM_SUBCARRIER_SPACING] = {15e3, 30e3, 60e3, ...@@ -27,10 +27,11 @@ uint32_t nr_subcarrier_spacing[MAX_NUM_SUBCARRIER_SPACING] = {15e3, 30e3, 60e3,
uint16_t nr_slots_per_subframe[MAX_NUM_SUBCARRIER_SPACING] = {1, 2, 4, 16, 32}; uint16_t nr_slots_per_subframe[MAX_NUM_SUBCARRIER_SPACING] = {1, 2, 4, 16, 32};
int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp, uint8_t i_ssb, uint8_t half_frame_index) int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp, uint8_t i_ssb)
{ {
int mu = fp->numerology_index; int mu = fp->numerology_index;
uint8_t half_frame_index = fp->half_frame_bit;
int symbol = 0; int symbol = 0;
uint8_t n, n_temp; uint8_t n, n_temp;
nr_ssb_type_e type = fp->ssb_type; nr_ssb_type_e type = fp->ssb_type;
...@@ -79,16 +80,14 @@ int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp, uint8_t i_ssb, uint8_t half_f ...@@ -79,16 +80,14 @@ int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp, uint8_t i_ssb, uint8_t half_f
return symbol; return symbol;
} }
int nr_is_ssb_slot(nfapi_nr_config_request_t *cfg, int slot) int nr_is_ssb_slot(uint8_t n_hf, uint8_t period, int slot)
{ {
uint8_t n_hf;
int rel_slot;
n_hf = cfg->sch_config.half_frame_index.value; int rel_slot;
// if SSB periodicity is 5ms, they are transmitted in both half frames // if SSB periodicity is 5ms, they are transmitted in both half frames
if ( cfg->sch_config.ssb_periodicity.value == 5) { if ( period == 0) {
if (slot<10) if (slot<10)
n_hf=0; n_hf=0;
else else
...@@ -122,6 +121,7 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp, ...@@ -122,6 +121,7 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp,
if (Ncp == NFAPI_CP_EXTENDED) if (Ncp == NFAPI_CP_EXTENDED)
AssertFatal(mu == NR_MU_2,"Invalid cyclic prefix %d for numerology index %d\n", Ncp, mu); AssertFatal(mu == NR_MU_2,"Invalid cyclic prefix %d for numerology index %d\n", Ncp, mu);
fp->half_frame_bit = 0; // half frame bit initialized to 0 here
fp->numerology_index = mu; fp->numerology_index = mu;
fp->Ncp = Ncp; fp->Ncp = Ncp;
fp->N_RB_DL = N_RB_DL; fp->N_RB_DL = N_RB_DL;
...@@ -277,17 +277,17 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp, ...@@ -277,17 +277,17 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp,
return 0; return 0;
} }
int nr_init_frame_parms(nfapi_nr_config_request_t* config, int nr_init_frame_parms(nfapi_nr_config_request_scf_t* config,
NR_DL_FRAME_PARMS *fp) NR_DL_FRAME_PARMS *fp)
{ {
fp->eutra_band = config->nfapi_config.rf_bands.rf_band[0]; fp->frame_type = config->cell_config.frame_duplex_type.value;
fp->frame_type = config->subframe_config.duplex_mode.value; fp->L_ssb = (((uint64_t) config->ssb_table.ssb_mask_list[1].ssb_mask.value)<<32) | config->ssb_table.ssb_mask_list[0].ssb_mask.value ;
fp->L_ssb = config->sch_config.ssb_scg_position_in_burst.value; int N_RB_DL = config->carrier_config.dl_grid_size[config->ssb_config.scs_common.value].value;
return nr_init_frame_parms0(fp, return nr_init_frame_parms0(fp,
config->subframe_config.numerology_index_mu.value, config->ssb_config.scs_common.value,
config->subframe_config.dl_cyclic_prefix_type.value, NFAPI_CP_NORMAL,
config->rf_config.dl_carrier_bandwidth.value); N_RB_DL);
} }
int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *fp, int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *fp,
...@@ -314,8 +314,8 @@ void nr_dump_frame_parms(NR_DL_FRAME_PARMS *fp) ...@@ -314,8 +314,8 @@ void nr_dump_frame_parms(NR_DL_FRAME_PARMS *fp)
LOG_I(PHY,"fp->samples_per_frame_wCP=%d\n",fp->samples_per_frame_wCP); LOG_I(PHY,"fp->samples_per_frame_wCP=%d\n",fp->samples_per_frame_wCP);
LOG_I(PHY,"fp->samples_per_subframe=%d\n",fp->samples_per_subframe); LOG_I(PHY,"fp->samples_per_subframe=%d\n",fp->samples_per_subframe);
LOG_I(PHY,"fp->samples_per_frame=%d\n",fp->samples_per_frame); LOG_I(PHY,"fp->samples_per_frame=%d\n",fp->samples_per_frame);
LOG_I(PHY,"fp->dl_CarrierFreq=%u\n",fp->dl_CarrierFreq); LOG_I(PHY,"fp->dl_CarrierFreq=%lu\n",fp->dl_CarrierFreq);
LOG_I(PHY,"fp->ul_CarrierFreq=%u\n",fp->ul_CarrierFreq); LOG_I(PHY,"fp->ul_CarrierFreq=%lu\n",fp->ul_CarrierFreq);
} }
......
...@@ -377,9 +377,9 @@ void phy_config_request(PHY_Config_t *phy_config); ...@@ -377,9 +377,9 @@ void phy_config_request(PHY_Config_t *phy_config);
int init_frame_parms(LTE_DL_FRAME_PARMS *frame_parms,uint8_t osf); int init_frame_parms(LTE_DL_FRAME_PARMS *frame_parms,uint8_t osf);
void dump_frame_parms(LTE_DL_FRAME_PARMS *frame_parms); void dump_frame_parms(LTE_DL_FRAME_PARMS *frame_parms);
int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp, uint8_t i_ssb, uint8_t half_frame_index); int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp, uint8_t i_ssb);
int nr_is_ssb_slot(nfapi_nr_config_request_t *cfg, int slot); int nr_is_ssb_slot(uint8_t n_hf, uint8_t period, int slot);
int nr_init_frame_parms(nfapi_nr_config_request_t *config, NR_DL_FRAME_PARMS *frame_parms); int nr_init_frame_parms(nfapi_nr_config_request_scf_t *config, NR_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *frame_parms,int mu,int Ncp,int N_RB_DL,int n_ssb_crb,int ssb_subcarrier_offset); int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *frame_parms,int mu,int Ncp,int N_RB_DL,int n_ssb_crb,int ssb_subcarrier_offset);
int init_nr_ue_signal(PHY_VARS_NR_UE *ue,int nb_connected_eNB,uint8_t abstraction_flag); int init_nr_ue_signal(PHY_VARS_NR_UE *ue,int nb_connected_eNB,uint8_t abstraction_flag);
void init_nr_ue_transport(PHY_VARS_NR_UE *ue,int abstraction_flag); void init_nr_ue_transport(PHY_VARS_NR_UE *ue,int abstraction_flag);
......
...@@ -26,11 +26,11 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB) ...@@ -26,11 +26,11 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB)
unsigned int x1, x2; unsigned int x1, x2;
uint16_t Nid, i_ssb, i_ssb2; uint16_t Nid, i_ssb, i_ssb2;
unsigned char Lmax, l, n_hf, N_hf; unsigned char Lmax, l, n_hf, N_hf;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config; nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms; NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
uint8_t reset; uint8_t reset;
Nid = cfg->sch_config.physical_cell_id.value; Nid = cfg->cell_config.phy_cell_id.value;
Lmax = fp->Lmax; Lmax = fp->Lmax;
N_hf = (Lmax == 4)? 2:1; N_hf = (Lmax == 4)? 2:1;
...@@ -156,4 +156,4 @@ void nr_gold_pusch(PHY_VARS_gNB* gNB, unsigned short lbar,unsigned short *n_idDM ...@@ -156,4 +156,4 @@ void nr_gold_pusch(PHY_VARS_gNB* gNB, unsigned short lbar,unsigned short *n_idDM
} }
} }
} }
} }
\ No newline at end of file
...@@ -42,8 +42,7 @@ ...@@ -42,8 +42,7 @@
uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format, uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
nfapi_nr_rnti_type_e rnti_type, nfapi_nr_rnti_type_e rnti_type,
uint16_t N_RB, uint16_t N_RB) {
nfapi_nr_config_request_t *config) {
uint16_t size = 0; uint16_t size = 0;
switch(format) { switch(format) {
...@@ -52,7 +51,7 @@ uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format, ...@@ -52,7 +51,7 @@ uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
/// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20 /// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20
size += 20; size += 20;
size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment -- hopping scenario to be updated size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment -- hopping scenario to be updated
size += nr_get_dci_size(NFAPI_NR_DL_DCI_FORMAT_1_0, rnti_type, N_RB, config) - size; // Padding to match 1_0 size size += nr_get_dci_size(NFAPI_NR_DL_DCI_FORMAT_1_0, rnti_type, N_RB) - size; // Padding to match 1_0 size
// UL/SUL indicator assumed to be 0 // UL/SUL indicator assumed to be 0
break; break;
...@@ -159,8 +158,8 @@ uint8_t nr_generate_dci_top(nfapi_nr_dl_config_pdcch_pdu *pdcch_pdu, ...@@ -159,8 +158,8 @@ uint8_t nr_generate_dci_top(nfapi_nr_dl_config_pdcch_pdu *pdcch_pdu,
uint32_t **gold_pdcch_dmrs, uint32_t **gold_pdcch_dmrs,
int32_t *txdataF, int32_t *txdataF,
int16_t amp, int16_t amp,
NR_DL_FRAME_PARMS frame_parms, NR_DL_FRAME_PARMS frame_parms) {
nfapi_nr_config_request_t config) {
int16_t mod_dmrs[NR_MAX_CSET_DURATION][NR_MAX_PDCCH_DMRS_LENGTH>>1]; // 3 for the max coreset duration int16_t mod_dmrs[NR_MAX_CSET_DURATION][NR_MAX_PDCCH_DMRS_LENGTH>>1]; // 3 for the max coreset duration
uint16_t cset_start_sc; uint16_t cset_start_sc;
uint8_t cset_start_symb, cset_nsymb; uint8_t cset_start_symb, cset_nsymb;
......
...@@ -27,15 +27,13 @@ ...@@ -27,15 +27,13 @@
uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format, uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
nfapi_nr_rnti_type_e rnti_type, nfapi_nr_rnti_type_e rnti_type,
uint16_t N_RB, uint16_t N_RB);
nfapi_nr_config_request_t *config);
uint8_t nr_generate_dci_top(nfapi_nr_dl_config_pdcch_pdu *pdcch_vars, uint8_t nr_generate_dci_top(nfapi_nr_dl_config_pdcch_pdu *pdcch_vars,
uint32_t **gold_pdcch_dmrs, uint32_t **gold_pdcch_dmrs,
int32_t *txdataF, int32_t *txdataF,
int16_t amp, int16_t amp,
NR_DL_FRAME_PARMS frame_parms, NR_DL_FRAME_PARMS frame_parms);
nfapi_nr_config_request_t config);
void nr_pdcch_scrambling(uint32_t *in, void nr_pdcch_scrambling(uint32_t *in,
uint32_t size, uint32_t size,
......
...@@ -74,7 +74,6 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch, ...@@ -74,7 +74,6 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch,
uint8_t slot, uint8_t slot,
NR_DL_FRAME_PARMS *frame_parms, NR_DL_FRAME_PARMS *frame_parms,
int xOverhead, int xOverhead,
nfapi_nr_config_request_t *config,
time_stats_t *dlsch_encoding_stats, time_stats_t *dlsch_encoding_stats,
time_stats_t *dlsch_scrambling_stats, time_stats_t *dlsch_scrambling_stats,
time_stats_t *dlsch_modulation_stats) { time_stats_t *dlsch_modulation_stats) {
......
...@@ -77,7 +77,6 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch, ...@@ -77,7 +77,6 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch,
uint8_t slot, uint8_t slot,
NR_DL_FRAME_PARMS *frame_parms, NR_DL_FRAME_PARMS *frame_parms,
int xOverhead, int xOverhead,
nfapi_nr_config_request_t *config,
time_stats_t *dlsch_encoding_stats, time_stats_t *dlsch_encoding_stats,
time_stats_t *dlsch_scrambling_stats, time_stats_t *dlsch_scrambling_stats,
time_stats_t *dlsch_modulation_stats); time_stats_t *dlsch_modulation_stats);
......
...@@ -107,19 +107,18 @@ void free_gNB_dlsch(NR_gNB_DLSCH_t *dlsch) ...@@ -107,19 +107,18 @@ void free_gNB_dlsch(NR_gNB_DLSCH_t *dlsch)
} }
NR_gNB_DLSCH_t *new_gNB_dlsch(unsigned char Kmimo, NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms,
unsigned char Kmimo,
unsigned char Mdlharq, unsigned char Mdlharq,
uint32_t Nsoft, uint32_t Nsoft,
uint8_t abstraction_flag, uint8_t abstraction_flag,
NR_DL_FRAME_PARMS *frame_parms, uint16_t N_RB)
nfapi_nr_config_request_t *config)
{ {
NR_gNB_DLSCH_t *dlsch; NR_gNB_DLSCH_t *dlsch;
unsigned char exit_flag = 0,i,r,aa,layer; unsigned char exit_flag = 0,i,r,aa,layer;
int re; int re;
unsigned char bw_scaling =1; unsigned char bw_scaling =1;
uint16_t N_RB = config->rf_config.dl_carrier_bandwidth.value;
switch (N_RB) { switch (N_RB) {
...@@ -144,12 +143,12 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(unsigned char Kmimo, ...@@ -144,12 +143,12 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(unsigned char Kmimo,
for (layer=0; layer<NR_MAX_NB_LAYERS; layer++) { for (layer=0; layer<NR_MAX_NB_LAYERS; layer++) {
dlsch->ue_spec_bf_weights[layer] = (int32_t**)malloc16(64*sizeof(int32_t*)); dlsch->ue_spec_bf_weights[layer] = (int32_t**)malloc16(64*sizeof(int32_t*));
for (aa=0; aa<64; aa++) { for (aa=0; aa<64; aa++) {
dlsch->ue_spec_bf_weights[layer][aa] = (int32_t *)malloc16(OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES*sizeof(int32_t)); dlsch->ue_spec_bf_weights[layer][aa] = (int32_t *)malloc16(OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES*sizeof(int32_t));
for (re=0;re<OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES; re++) { for (re=0;re<OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES; re++) {
dlsch->ue_spec_bf_weights[layer][aa][re] = 0x00007fff; dlsch->ue_spec_bf_weights[layer][aa][re] = 0x00007fff;
} }
} }
dlsch->txdataF[layer] = (int32_t *)malloc16((NR_MAX_PDSCH_ENCODED_LENGTH/NR_MAX_NB_LAYERS)*sizeof(int32_t)); // NR_MAX_NB_LAYERS is already included in NR_MAX_PDSCH_ENCODED_LENGTH dlsch->txdataF[layer] = (int32_t *)malloc16((NR_MAX_PDSCH_ENCODED_LENGTH/NR_MAX_NB_LAYERS)*sizeof(int32_t)); // NR_MAX_NB_LAYERS is already included in NR_MAX_PDSCH_ENCODED_LENGTH
} }
......
...@@ -50,13 +50,13 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs, ...@@ -50,13 +50,13 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
int32_t *txdataF, int32_t *txdataF,
int16_t amp, int16_t amp,
uint8_t ssb_start_symbol, uint8_t ssb_start_symbol,
nfapi_nr_config_request_t *config, nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms) { NR_DL_FRAME_PARMS *frame_parms) {
int k,l; int k,l;
//int16_t a; //int16_t a;
int16_t mod_dmrs[NR_PBCH_DMRS_LENGTH<<1]; int16_t mod_dmrs[NR_PBCH_DMRS_LENGTH<<1];
uint8_t idx=0; uint8_t idx=0;
uint8_t nushift = config->sch_config.physical_cell_id.value &3; uint8_t nushift = config->cell_config.phy_cell_id.value &3;
LOG_D(PHY, "PBCH DMRS mapping started at symbol %d shift %d\n", ssb_start_symbol+1, nushift); LOG_D(PHY, "PBCH DMRS mapping started at symbol %d shift %d\n", ssb_start_symbol+1, nushift);
/// QPSK modulation /// QPSK modulation
...@@ -229,7 +229,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch, ...@@ -229,7 +229,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
uint8_t Lmax, uint8_t Lmax,
uint8_t ssb_index, uint8_t ssb_index,
int sfn, int sfn,
nfapi_nr_config_request_t *config, nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms) { NR_DL_FRAME_PARMS *frame_parms) {
int k,l,m; int k,l,m;
//int16_t a; //int16_t a;
...@@ -265,7 +265,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch, ...@@ -265,7 +265,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
for (int i=0; i<3; i++) for (int i=0; i<3; i++)
pbch->pbch_a |= ((ssb_index>>(5-i))&1)<<(29+i); // resp. 6th, 5th and 4th bits of ssb_index pbch->pbch_a |= ((ssb_index>>(5-i))&1)<<(29+i); // resp. 6th, 5th and 4th bits of ssb_index
else else
pbch->pbch_a |= ((config->sch_config.ssb_subcarrier_offset.value>>4)&1)<<29; //MSB of k_SSB (bit index 4) pbch->pbch_a |= ((config->ssb_table.ssb_subcarrier_offset.value>>4)&1)<<29; //MSB of k_SSB (bit index 4)
LOG_D(PHY,"After extra byte: pbch_a = 0x%08x\n",pbch->pbch_a); LOG_D(PHY,"After extra byte: pbch_a = 0x%08x\n",pbch->pbch_a);
...@@ -287,7 +287,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch, ...@@ -287,7 +287,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
M = (Lmax == 64)? (NR_POLAR_PBCH_PAYLOAD_BITS - 6) : (NR_POLAR_PBCH_PAYLOAD_BITS - 3); M = (Lmax == 64)? (NR_POLAR_PBCH_PAYLOAD_BITS - 6) : (NR_POLAR_PBCH_PAYLOAD_BITS - 3);
nushift = (((sfn>>2)&1)<<1) ^ ((sfn>>1)&1); nushift = (((sfn>>2)&1)<<1) ^ ((sfn>>1)&1);
pbch->pbch_a_prime = 0; pbch->pbch_a_prime = 0;
nr_pbch_scrambling(pbch, (uint32_t)config->sch_config.physical_cell_id.value, nushift, M, NR_POLAR_PBCH_PAYLOAD_BITS, 0, unscrambling_mask); nr_pbch_scrambling(pbch, (uint32_t)config->cell_config.phy_cell_id.value, nushift, M, NR_POLAR_PBCH_PAYLOAD_BITS, 0, unscrambling_mask);
#ifdef DEBUG_PBCH_ENCODING #ifdef DEBUG_PBCH_ENCODING
printf("Payload scrambling: nushift %d M %d sfn3 %d sfn2 %d\n", nushift, M, (sfn>>2)&1, (sfn>>1)&1); printf("Payload scrambling: nushift %d M %d sfn3 %d sfn2 %d\n", nushift, M, (sfn>>2)&1, (sfn>>1)&1);
printf("pbch_a_prime: 0x%08x\n", pbch->pbch_a_prime); printf("pbch_a_prime: 0x%08x\n", pbch->pbch_a_prime);
...@@ -312,7 +312,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch, ...@@ -312,7 +312,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
/// Scrambling /// Scrambling
M = NR_POLAR_PBCH_E; M = NR_POLAR_PBCH_E;
nushift = (Lmax==4)? ssb_index&3 : ssb_index&7; nushift = (Lmax==4)? ssb_index&3 : ssb_index&7;
nr_pbch_scrambling(pbch, (uint32_t)config->sch_config.physical_cell_id.value, nushift, M, NR_POLAR_PBCH_E, 1, 0); nr_pbch_scrambling(pbch, (uint32_t)config->cell_config.phy_cell_id.value, nushift, M, NR_POLAR_PBCH_E, 1, 0);
#ifdef DEBUG_PBCH_ENCODING #ifdef DEBUG_PBCH_ENCODING
printf("Scrambling:\n"); printf("Scrambling:\n");
...@@ -333,7 +333,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch, ...@@ -333,7 +333,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
} }
/// Resource mapping /// Resource mapping
nushift = config->sch_config.physical_cell_id.value &3; nushift = config->cell_config.phy_cell_id.value &3;
// PBCH modulated symbols are mapped within the SSB block on symbols 1, 2, 3 excluding the subcarriers used for the PBCH DMRS // PBCH modulated symbols are mapped within the SSB block on symbols 1, 2, 3 excluding the subcarriers used for the PBCH DMRS
///symbol 1 [0:239] -- 180 mod symbols ///symbol 1 [0:239] -- 180 mod symbols
k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier; k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier;
......
...@@ -28,7 +28,7 @@ int nr_generate_pss( int16_t *d_pss, ...@@ -28,7 +28,7 @@ int nr_generate_pss( int16_t *d_pss,
int32_t *txdataF, int32_t *txdataF,
int16_t amp, int16_t amp,
uint8_t ssb_start_symbol, uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config, nfapi_nr_config_request_scf_t* config,
NR_DL_FRAME_PARMS *frame_parms) NR_DL_FRAME_PARMS *frame_parms)
{ {
int i,k,l,m; int i,k,l,m;
...@@ -36,7 +36,7 @@ int nr_generate_pss( int16_t *d_pss, ...@@ -36,7 +36,7 @@ int nr_generate_pss( int16_t *d_pss,
int16_t x[NR_PSS_LENGTH]; int16_t x[NR_PSS_LENGTH];
const int x_initial[7] = {0, 1, 1 , 0, 1, 1, 1}; const int x_initial[7] = {0, 1, 1 , 0, 1, 1, 1};
uint8_t Nid2 = config->sch_config.physical_cell_id.value % 3; uint8_t Nid2 = config->cell_config.phy_cell_id.value % 3;
/// Sequence generation /// Sequence generation
for (i=0; i < 7; i++) for (i=0; i < 7; i++)
......
...@@ -27,7 +27,7 @@ int nr_generate_sss( int16_t *d_sss, ...@@ -27,7 +27,7 @@ int nr_generate_sss( int16_t *d_sss,
int32_t *txdataF, int32_t *txdataF,
int16_t amp, int16_t amp,
uint8_t ssb_start_symbol, uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config, nfapi_nr_config_request_scf_t* config,
NR_DL_FRAME_PARMS *frame_parms) NR_DL_FRAME_PARMS *frame_parms)
{ {
int i,k,l; int i,k,l;
...@@ -39,7 +39,7 @@ int nr_generate_sss( int16_t *d_sss, ...@@ -39,7 +39,7 @@ int nr_generate_sss( int16_t *d_sss,
const int x1_initial[7] = { 1, 0, 0, 0, 0, 0, 0 }; const int x1_initial[7] = { 1, 0, 0, 0, 0, 0, 0 };
/// Sequence generation /// Sequence generation
Nid = config->sch_config.physical_cell_id.value; Nid = config->cell_config.phy_cell_id.value;
Nid2 = Nid % 3; Nid2 = Nid % 3;
Nid1 = (Nid - Nid2)/3; Nid1 = (Nid - Nid2)/3;
......
...@@ -36,7 +36,7 @@ int nr_generate_pss( int16_t *d_pss, ...@@ -36,7 +36,7 @@ int nr_generate_pss( int16_t *d_pss,
int32_t *txdataF, int32_t *txdataF,
int16_t amp, int16_t amp,
uint8_t ssb_start_symbol, uint8_t ssb_start_symbol,
nfapi_nr_config_request_t *config, nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms); NR_DL_FRAME_PARMS *frame_parms);
/*! /*!
...@@ -49,7 +49,7 @@ int nr_generate_sss( int16_t *d_sss, ...@@ -49,7 +49,7 @@ int nr_generate_sss( int16_t *d_sss,
int32_t *txdataF, int32_t *txdataF,
int16_t amp, int16_t amp,
uint8_t ssb_start_symbol, uint8_t ssb_start_symbol,
nfapi_nr_config_request_t *config, nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms); NR_DL_FRAME_PARMS *frame_parms);
/*! /*!
...@@ -62,7 +62,7 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs, ...@@ -62,7 +62,7 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
int32_t *txdataF, int32_t *txdataF,
int16_t amp, int16_t amp,
uint8_t ssb_start_symbol, uint8_t ssb_start_symbol,
nfapi_nr_config_request_t *config, nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms); NR_DL_FRAME_PARMS *frame_parms);
/*! /*!
...@@ -94,7 +94,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch, ...@@ -94,7 +94,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
uint8_t Lmax, uint8_t Lmax,
uint8_t ssb_index, uint8_t ssb_index,
int sfn, int sfn,
nfapi_nr_config_request_t *config, nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms); NR_DL_FRAME_PARMS *frame_parms);
/*! /*!
...@@ -105,12 +105,12 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch, ...@@ -105,12 +105,12 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
*/ */
void nr_init_pbch_interleaver(uint8_t *interleaver); void nr_init_pbch_interleaver(uint8_t *interleaver);
NR_gNB_DLSCH_t *new_gNB_dlsch(unsigned char Kmimo, NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms,
unsigned char Kmimo,
unsigned char Mdlharq, unsigned char Mdlharq,
uint32_t Nsoft, uint32_t Nsoft,
uint8_t abstraction_flag, uint8_t abstraction_flag,
NR_DL_FRAME_PARMS *frame_parms, uint16_t N_RB);
nfapi_nr_config_request_t *config);
void rx_nr_prach(PHY_VARS_gNB *gNB, void rx_nr_prach(PHY_VARS_gNB *gNB,
int frame, int frame,
......
...@@ -598,7 +598,7 @@ typedef struct PHY_VARS_gNB_s { ...@@ -598,7 +598,7 @@ typedef struct PHY_VARS_gNB_s {
int rx_total_gain_dB; int rx_total_gain_dB;
int (*nr_start_if)(struct RU_t_s *ru, struct PHY_VARS_gNB_s *gNB); int (*nr_start_if)(struct RU_t_s *ru, struct PHY_VARS_gNB_s *gNB);
uint8_t local_flag; uint8_t local_flag;
nfapi_nr_config_request_t gNB_config; nfapi_nr_config_request_scf_t gNB_config;
NR_DL_FRAME_PARMS frame_parms; NR_DL_FRAME_PARMS frame_parms;
PHY_MEASUREMENTS_gNB measurements; PHY_MEASUREMENTS_gNB measurements;
NR_IF_Module_t *if_inst; NR_IF_Module_t *if_inst;
......
...@@ -241,9 +241,9 @@ typedef struct NR_DL_FRAME_PARMS { ...@@ -241,9 +241,9 @@ typedef struct NR_DL_FRAME_PARMS {
/// EUTRA Band /// EUTRA Band
uint16_t eutra_band; uint16_t eutra_band;
/// DL carrier frequency /// DL carrier frequency
uint32_t dl_CarrierFreq; uint64_t dl_CarrierFreq;
/// UL carrier frequency /// UL carrier frequency
uint32_t ul_CarrierFreq; uint64_t ul_CarrierFreq;
/// TX attenuation /// TX attenuation
uint32_t att_tx; uint32_t att_tx;
/// RX attenuation /// RX attenuation
...@@ -321,6 +321,8 @@ typedef struct NR_DL_FRAME_PARMS { ...@@ -321,6 +321,8 @@ typedef struct NR_DL_FRAME_PARMS {
/// TDD configuration /// TDD configuration
uint16_t tdd_uplink_nr[2*NR_MAX_SLOTS_PER_FRAME]; /* this is a bitmap of symbol of each slot given for 2 frames */ uint16_t tdd_uplink_nr[2*NR_MAX_SLOTS_PER_FRAME]; /* this is a bitmap of symbol of each slot given for 2 frames */
uint8_t half_frame_bit;
//SSB related params //SSB related params
/// Start in Subcarrier index of the SSB block /// Start in Subcarrier index of the SSB block
uint16_t ssb_start_subcarrier; uint16_t ssb_start_subcarrier;
......
...@@ -113,7 +113,6 @@ void nr_feptx0(RU_t *ru,int tti_tx,int first_symbol, int num_symbols) { ...@@ -113,7 +113,6 @@ void nr_feptx0(RU_t *ru,int tti_tx,int first_symbol, int num_symbols) {
void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx) { void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx) {
NR_DL_FRAME_PARMS *fp=ru->nr_frame_parms; NR_DL_FRAME_PARMS *fp=ru->nr_frame_parms;
nfapi_nr_config_request_t *cfg = &ru->gNB_list[0]->gNB_config;
RU_proc_t *proc = &ru->proc; RU_proc_t *proc = &ru->proc;
struct timespec wait; struct timespec wait;
int slot = tti_tx; int slot = tti_tx;
...@@ -215,11 +214,11 @@ void nr_init_feptx_thread(RU_t *ru) { ...@@ -215,11 +214,11 @@ void nr_init_feptx_thread(RU_t *ru) {
void nr_feptx_ofdm(RU_t *ru,int frame_tx,int tti_tx) { void nr_feptx_ofdm(RU_t *ru,int frame_tx,int tti_tx) {
NR_DL_FRAME_PARMS *fp=ru->nr_frame_parms; NR_DL_FRAME_PARMS *fp=ru->nr_frame_parms;
nfapi_nr_config_request_t *cfg = &ru->gNB_list[0]->gNB_config; int cyclic_prefix_type = NFAPI_CP_NORMAL;
unsigned int aa=0; unsigned int aa=0;
int slot_sizeF = (fp->ofdm_symbol_size)* int slot_sizeF = (fp->ofdm_symbol_size)*
((cfg->subframe_config.dl_cyclic_prefix_type.value == 1) ? 12 : 14); ((cyclic_prefix_type == 1) ? 12 : 14);
int slot = tti_tx; int slot = tti_tx;
int *txdata = &ru->common.txdata[aa][slot*fp->samples_per_slot]; int *txdata = &ru->common.txdata[aa][slot*fp->samples_per_slot];
......
...@@ -84,23 +84,23 @@ int return_ssb_type(nfapi_config_request_t *cfg) ...@@ -84,23 +84,23 @@ int return_ssb_type(nfapi_config_request_t *cfg)
void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *fp) { void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_scf_t *cfg, NR_DL_FRAME_PARMS *fp) {
fp->ssb_start_subcarrier = (12 * cfg->sch_config.n_ssb_crb.value + cfg->sch_config.ssb_subcarrier_offset.value)/(1<<cfg->subframe_config.numerology_index_mu.value); fp->ssb_start_subcarrier = (12 * cfg->ssb_table.ssb_offset_point_a.value + cfg->ssb_table.ssb_subcarrier_offset.value)/(1<<cfg->ssb_config.scs_common.value);
LOG_D(PHY, "SSB first subcarrier %d (%d,%d)\n", fp->ssb_start_subcarrier,cfg->sch_config.n_ssb_crb.value,cfg->sch_config.ssb_subcarrier_offset.value); LOG_D(PHY, "SSB first subcarrier %d (%d,%d)\n", fp->ssb_start_subcarrier,cfg->ssb_table.ssb_offset_point_a.value,cfg->ssb_table.ssb_subcarrier_offset.value);
} }
void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) { void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
NR_DL_FRAME_PARMS *fp=&gNB->frame_parms; NR_DL_FRAME_PARMS *fp=&gNB->frame_parms;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config; nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
int **txdataF = gNB->common_vars.txdataF; int **txdataF = gNB->common_vars.txdataF;
uint8_t *pbch_pdu=&gNB->pbch_pdu[0]; uint8_t *pbch_pdu=&gNB->pbch_pdu[0];
uint8_t ssb_index, n_hf; uint8_t ssb_index, n_hf;
int ssb_start_symbol, rel_slot; int ssb_start_symbol, rel_slot;
n_hf = cfg->sch_config.half_frame_index.value; n_hf = fp->half_frame_bit;
// if SSB periodicity is 5ms, they are transmitted in both half frames // if SSB periodicity is 5ms, they are transmitted in both half frames
if ( cfg->sch_config.ssb_periodicity.value == 5) { if ( cfg->ssb_table.ssb_period.value == 0) {
if (slot<10) if (slot<10)
n_hf=0; n_hf=0;
else else
...@@ -118,7 +118,7 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) { ...@@ -118,7 +118,7 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
ssb_index = i + 2*rel_slot; // computing the ssb_index ssb_index = i + 2*rel_slot; // computing the ssb_index
if ((fp->L_ssb >> ssb_index) & 0x01) { // generating the ssb only if the bit of L_ssb at current ssb index is 1 if ((fp->L_ssb >> ssb_index) & 0x01) { // generating the ssb only if the bit of L_ssb at current ssb index is 1
int ssb_start_symbol_abs = nr_get_ssb_start_symbol(fp, ssb_index, n_hf); // computing the starting symbol for current ssb int ssb_start_symbol_abs = nr_get_ssb_start_symbol(fp, ssb_index); // computing the starting symbol for current ssb
ssb_start_symbol = ssb_start_symbol_abs % 14; // start symbol wrt slot ssb_start_symbol = ssb_start_symbol_abs % 14; // start symbol wrt slot
nr_set_ssb_first_subcarrier(cfg, fp); // setting the first subcarrier nr_set_ssb_first_subcarrier(cfg, fp); // setting the first subcarrier
...@@ -150,16 +150,16 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, ...@@ -150,16 +150,16 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
int do_meas) { int do_meas) {
int aa; int aa;
NR_DL_FRAME_PARMS *fp=&gNB->frame_parms; NR_DL_FRAME_PARMS *fp=&gNB->frame_parms;
nfapi_nr_config_request_t *cfg = &gNB->gNB_config; nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
int offset = gNB->CC_id; int offset = gNB->CC_id;
uint8_t ssb_frame_periodicity; // every how many frames SSB are generated uint8_t ssb_frame_periodicity = 1; // every how many frames SSB are generated
if (cfg->sch_config.ssb_periodicity.value < 20)
ssb_frame_periodicity = 1;
else if (cfg->ssb_table.ssb_period.value > 1)
ssb_frame_periodicity = (cfg->sch_config.ssb_periodicity.value)/10 ; // 10ms is the frame length ssb_frame_periodicity = 1 <<(cfg->ssb_table.ssb_period.value -1) ; // 10ms is the frame length
if ((cfg->subframe_config.duplex_mode.value == TDD) && if ((cfg->cell_config.frame_duplex_type.value == TDD) &&
((nr_slot_select(fp,frame,slot)&NR_UPLINK_SLOT) > 0)) return; ((nr_slot_select(fp,frame,slot)&NR_UPLINK_SLOT) > 0)) return;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX+offset,1); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX+offset,1);
...@@ -187,7 +187,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, ...@@ -187,7 +187,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
if (gNB->pdcch_pdu) nr_generate_dci_top(gNB->pdcch_pdu, if (gNB->pdcch_pdu) nr_generate_dci_top(gNB->pdcch_pdu,
gNB->nr_gold_pdcch_dmrs[slot], gNB->nr_gold_pdcch_dmrs[slot],
gNB->common_vars.txdataF[0], gNB->common_vars.txdataF[0],
AMP, *fp, *cfg); AMP, *fp);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX,0); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX,0);
LOG_D(PHY, "PDSCH generation started (%d)\n", gNB->num_pdsch_rnti); LOG_D(PHY, "PDSCH generation started (%d)\n", gNB->num_pdsch_rnti);
...@@ -196,7 +196,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, ...@@ -196,7 +196,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
nr_generate_pdsch(gNB->dlsch[i][0], nr_generate_pdsch(gNB->dlsch[i][0],
gNB->nr_gold_pdsch_dmrs[slot], gNB->nr_gold_pdsch_dmrs[slot],
gNB->common_vars.txdataF, gNB->common_vars.txdataF,
AMP, frame, slot, fp, 0,cfg, AMP, frame, slot, fp, 0,
&gNB->dlsch_encoding_stats, &gNB->dlsch_encoding_stats,
&gNB->dlsch_scrambling_stats, &gNB->dlsch_scrambling_stats,
&gNB->dlsch_modulation_stats); &gNB->dlsch_modulation_stats);
......
...@@ -35,7 +35,7 @@ ...@@ -35,7 +35,7 @@
#include "phy_frame_config_nr.h" #include "phy_frame_config_nr.h"
void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_t *cfg, NR_DL_FRAME_PARMS *fp); void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_scf_t *cfg, NR_DL_FRAME_PARMS *fp);
void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, int frame_tx, int slot_tx, int do_meas); void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, int frame_tx, int slot_tx, int do_meas);
void phy_procedures_gNB_common_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx); void phy_procedures_gNB_common_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx);
void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx); void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx);
......
...@@ -136,7 +136,6 @@ int main(int argc, char **argv) ...@@ -136,7 +136,6 @@ int main(int argc, char **argv)
int frame_length_complex_samples; int frame_length_complex_samples;
//int frame_length_complex_samples_no_prefix; //int frame_length_complex_samples_no_prefix;
NR_DL_FRAME_PARMS *frame_parms; NR_DL_FRAME_PARMS *frame_parms;
//nfapi_nr_config_request_t *gNB_config;
uint8_t Kmimo = 0; uint8_t Kmimo = 0;
uint32_t Nsoft = 0; uint32_t Nsoft = 0;
double sigma; double sigma;
......
...@@ -207,12 +207,11 @@ int main(int argc, char **argv) ...@@ -207,12 +207,11 @@ int main(int argc, char **argv)
int frame_length_complex_samples_no_prefix; int frame_length_complex_samples_no_prefix;
int slot_length_complex_samples_no_prefix; int slot_length_complex_samples_no_prefix;
NR_DL_FRAME_PARMS *frame_parms; NR_DL_FRAME_PARMS *frame_parms;
nfapi_nr_config_request_t *gNB_config;
UE_nr_rxtx_proc_t UE_proc; UE_nr_rxtx_proc_t UE_proc;
NR_Sched_Rsp_t Sched_INFO; NR_Sched_Rsp_t Sched_INFO;
gNB_MAC_INST *gNB_mac; gNB_MAC_INST *gNB_mac;
NR_UE_MAC_INST_t *UE_mac; NR_UE_MAC_INST_t *UE_mac;
int cyclic_prefix_type = NFAPI_CP_NORMAL;
int ret; int ret;
int run_initial_sync=0; int run_initial_sync=0;
int do_pdcch_flag=1; int do_pdcch_flag=1;
...@@ -478,7 +477,6 @@ int main(int argc, char **argv) ...@@ -478,7 +477,6 @@ int main(int argc, char **argv)
memset(RC.gNB[0],0,sizeof(PHY_VARS_gNB)); memset(RC.gNB[0],0,sizeof(PHY_VARS_gNB));
gNB = RC.gNB[0]; gNB = RC.gNB[0];
gNB_config = &gNB->gNB_config;
frame_parms = &gNB->frame_parms; //to be initialized I suppose (maybe not necessary for PBCH) frame_parms = &gNB->frame_parms; //to be initialized I suppose (maybe not necessary for PBCH)
frame_parms->nb_antennas_tx = n_tx; frame_parms->nb_antennas_tx = n_tx;
frame_parms->nb_antennas_rx = n_rx; frame_parms->nb_antennas_rx = n_rx;
...@@ -692,7 +690,7 @@ int main(int argc, char **argv) ...@@ -692,7 +690,7 @@ int main(int argc, char **argv)
//TODO: loop over slots //TODO: loop over slots
for (aa=0; aa<gNB->frame_parms.nb_antennas_tx; aa++) { for (aa=0; aa<gNB->frame_parms.nb_antennas_tx; aa++) {
if (gNB_config->subframe_config.dl_cyclic_prefix_type.value == 1) { if (cyclic_prefix_type == 1) {
PHY_ofdm_mod(gNB->common_vars.txdataF[aa], PHY_ofdm_mod(gNB->common_vars.txdataF[aa],
&txdata[aa][tx_offset], &txdata[aa][tx_offset],
frame_parms->ofdm_symbol_size, frame_parms->ofdm_symbol_size,
......
...@@ -113,7 +113,6 @@ int main(int argc, char **argv) ...@@ -113,7 +113,6 @@ int main(int argc, char **argv)
int frame_length_complex_samples; int frame_length_complex_samples;
int frame_length_complex_samples_no_prefix; int frame_length_complex_samples_no_prefix;
NR_DL_FRAME_PARMS *frame_parms; NR_DL_FRAME_PARMS *frame_parms;
nfapi_nr_config_request_t *gNB_config;
int ret, payload_ret=0; int ret, payload_ret=0;
int run_initial_sync=0; int run_initial_sync=0;
...@@ -348,7 +347,6 @@ int main(int argc, char **argv) ...@@ -348,7 +347,6 @@ int main(int argc, char **argv)
RC.gNB = (PHY_VARS_gNB**) malloc(sizeof(PHY_VARS_gNB *)); RC.gNB = (PHY_VARS_gNB**) malloc(sizeof(PHY_VARS_gNB *));
RC.gNB[0] = malloc(sizeof(PHY_VARS_gNB)); RC.gNB[0] = malloc(sizeof(PHY_VARS_gNB));
gNB = RC.gNB[0]; gNB = RC.gNB[0];
gNB_config = &gNB->gNB_config;
frame_parms = &gNB->frame_parms; //to be initialized I suppose (maybe not necessary for PBCH) frame_parms = &gNB->frame_parms; //to be initialized I suppose (maybe not necessary for PBCH)
frame_parms->nb_antennas_tx = n_tx; frame_parms->nb_antennas_tx = n_tx;
frame_parms->nb_antennas_rx = n_rx; frame_parms->nb_antennas_rx = n_rx;
...@@ -361,7 +359,8 @@ int main(int argc, char **argv) ...@@ -361,7 +359,8 @@ int main(int argc, char **argv)
nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,Nid_cell,SSB_positions); nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,Nid_cell,SSB_positions);
phy_init_nr_gNB(gNB,0,0); phy_init_nr_gNB(gNB,0,0);
uint8_t n_hf = gNB_config->sch_config.half_frame_index.value; uint8_t n_hf = 0;
int cyclic_prefix_type = NFAPI_CP_NORMAL;
double fs,bw,scs,eps; double fs,bw,scs,eps;
...@@ -479,7 +478,7 @@ int main(int argc, char **argv) ...@@ -479,7 +478,7 @@ int main(int argc, char **argv)
nr_common_signal_procedures (gNB,frame,slot); nr_common_signal_procedures (gNB,frame,slot);
for (aa=0; aa<gNB->frame_parms.nb_antennas_tx; aa++) { for (aa=0; aa<gNB->frame_parms.nb_antennas_tx; aa++) {
if (gNB_config->subframe_config.dl_cyclic_prefix_type.value == 1) { if (cyclic_prefix_type == 1) {
PHY_ofdm_mod(gNB->common_vars.txdataF[aa], PHY_ofdm_mod(gNB->common_vars.txdataF[aa],
&txdata[aa][slot*frame_parms->samples_per_slot], &txdata[aa][slot*frame_parms->samples_per_slot],
frame_parms->ofdm_symbol_size, frame_parms->ofdm_symbol_size,
...@@ -589,7 +588,7 @@ int main(int argc, char **argv) ...@@ -589,7 +588,7 @@ int main(int argc, char **argv)
UE->rx_offset=0; UE->rx_offset=0;
uint8_t ssb_index = 0; uint8_t ssb_index = 0;
while (!((SSB_positions >> ssb_index) & 0x01)) ssb_index++; // to select the first transmitted ssb while (!((SSB_positions >> ssb_index) & 0x01)) ssb_index++; // to select the first transmitted ssb
UE->symbol_offset = nr_get_ssb_start_symbol(frame_parms, ssb_index, n_hf); UE->symbol_offset = nr_get_ssb_start_symbol(frame_parms, ssb_index);
int ssb_slot = (ssb_index/2)+(n_hf*frame_parms->slots_per_frame); int ssb_slot = (ssb_index/2)+(n_hf*frame_parms->slots_per_frame);
for (int i=UE->symbol_offset+1; i<UE->symbol_offset+4; i++) { for (int i=UE->symbol_offset+1; i<UE->symbol_offset+4; i++) {
nr_slot_fep(UE, nr_slot_fep(UE,
......
...@@ -639,7 +639,7 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) { ...@@ -639,7 +639,7 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
// Parse optional physical parameters // Parse optional physical parameters
sprintf(gnbpath,"%s.[%i]",GNB_CONFIG_STRING_GNB_LIST,k), sprintf(gnbpath,"%s.[%i]",GNB_CONFIG_STRING_GNB_LIST,k),
printf("SSB SCO %d\n",ssb_SubcarrierOffset);
NRRRC_CONFIGURATION_REQ (msg_p).ssb_SubcarrierOffset = ssb_SubcarrierOffset; NRRRC_CONFIGURATION_REQ (msg_p).ssb_SubcarrierOffset = ssb_SubcarrierOffset;
NRRRC_CONFIGURATION_REQ (msg_p).scc = scc; NRRRC_CONFIGURATION_REQ (msg_p).scc = scc;
......
...@@ -49,126 +49,363 @@ extern RAN_CONTEXT_t RC; ...@@ -49,126 +49,363 @@ extern RAN_CONTEXT_t RC;
extern void mac_top_init_gNB(void); extern void mac_top_init_gNB(void);
extern uint8_t nfapi_mode; extern uint8_t nfapi_mode;
uint16_t config_bandwidth(int mu, int nb_rb, int nr_band)
void config_common(int Mod_idP, {
NR_ServingCellConfigCommon_t *scc uint16_t bandwidth;
){
nfapi_nr_config_request_t *cfg = &RC.nrmac[Mod_idP]->config[0]; if (nr_band < 100) { //FR1
RC.nrmac[Mod_idP]->common_channels[0].ServingCellConfigCommon = scc; switch(mu) {
case 0 :
int mu = 1; switch(nb_rb) {
case 25 :
switch (*scc->ssb_periodicityServingCell) { bandwidth = 5;
case 0: break;
cfg->sch_config.ssb_periodicity.value = 5; case 52 :
break; bandwidth = 10;
case 1: break;
cfg->sch_config.ssb_periodicity.value = 10; case 79 :
bandwidth = 15;
break;
case 106 :
bandwidth = 20;
break;
case 133 :
bandwidth = 25;
break;
case 160 :
bandwidth = 30;
break;
case 216 :
bandwidth = 40;
break;
case 270 :
bandwidth = 50;
break;
default:
AssertFatal(1==0,"Number of DL resource blocks %d undefined for mu %d\n", nb_rb, mu);
}
break; break;
case 2: case 1 :
cfg->sch_config.ssb_periodicity.value = 20; switch(nb_rb) {
case 11 :
bandwidth = 5;
break;
case 24 :
bandwidth = 10;
break;
case 38 :
bandwidth = 15;
break;
case 51 :
bandwidth = 20;
break;
case 65 :
bandwidth = 25;
break;
case 78 :
bandwidth = 30;
break;
case 106 :
bandwidth = 40;
break;
case 133 :
bandwidth = 50;
break;
case 162 :
bandwidth = 60;
break;
case 189 :
bandwidth = 70;
break;
case 217 :
bandwidth = 80;
break;
case 245 :
bandwidth = 90;
break;
case 273 :
bandwidth = 100;
break;
default:
AssertFatal(1==0,"Number of DL resource blocks %d undefined for mu %d\n", nb_rb, mu);
}
break; break;
case 3: case 2 :
cfg->sch_config.ssb_periodicity.value = 40; switch(nb_rb) {
case 11 :
bandwidth = 10;
break;
case 18 :
bandwidth = 15;
break;
case 24 :
bandwidth = 20;
break;
case 31 :
bandwidth = 25;
break;
case 38 :
bandwidth = 30;
break;
case 51 :
bandwidth = 40;
break;
case 65 :
bandwidth = 50;
break;
case 79 :
bandwidth = 60;
break;
case 93 :
bandwidth = 70;
break;
case 107 :
bandwidth = 80;
break;
case 121 :
bandwidth = 90;
break;
case 135 :
bandwidth = 100;
break;
default:
AssertFatal(1==0,"Number of DL resource blocks %d undefined for mu %d\n", nb_rb, mu);
}
break; break;
case 4: default:
cfg->sch_config.ssb_periodicity.value = 80; AssertFatal(1==0,"Numerology %d undefined for band %d in FR1\n", mu,nr_band);
}
}
else {
switch(mu) {
case 2 :
switch(nb_rb) {
case 66 :
bandwidth = 50;
break;
case 132 :
bandwidth = 100;
break;
case 264 :
bandwidth = 200;
break;
default:
AssertFatal(1==0,"Number of DL resource blocks %d undefined for mu %d\n", nb_rb, mu);
}
break; break;
case 5: case 3 :
cfg->sch_config.ssb_periodicity.value = 160; switch(nb_rb) {
case 32 :
bandwidth = 50;
break;
case 66 :
bandwidth = 100;
break;
case 132 :
bandwidth = 200;
break;
case 264 :
bandwidth = 400;
break;
default:
AssertFatal(1==0,"Number of DL resource blocks %d undefined for mu %d\n", nb_rb, mu);
}
break; break;
} default:
AssertFatal(1==0,"Numerology %d undefined for band %d in FR1\n", mu,nr_band);
}
}
return (bandwidth);
}
cfg->sch_config.physical_cell_id.value = *scc->physCellId;
cfg->sch_config.ssb_scg_position_in_burst.value = scc->ssb_PositionsInBurst->choice.mediumBitmap.buf[0]; void config_common(int Mod_idP, NR_ServingCellConfigCommon_t *scc) {
// TDD nfapi_nr_config_request_scf_t *cfg = &RC.nrmac[Mod_idP]->config[0];
cfg->subframe_config.duplex_mode.value = 1; RC.nrmac[Mod_idP]->common_channels[0].ServingCellConfigCommon = scc;
cfg->subframe_config.duplex_mode.tl.tag = NFAPI_SUBFRAME_CONFIG_DUPLEX_MODE_TAG; int i;
// Carrier configuration
cfg->carrier_config.dl_bandwidth.value = config_bandwidth(scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth,
*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]);
cfg->carrier_config.dl_bandwidth.tl.tag = NFAPI_NR_CONFIG_DL_BANDWIDTH_TAG; //temporary
cfg->num_tlv++; cfg->num_tlv++;
LOG_I(PHY,"%s() dl_BandwidthP:%d\n", __FUNCTION__, cfg->carrier_config.dl_bandwidth.value);
/// In NR DL and UL will be different band
cfg->nfapi_config.rf_bands.number_rf_bands = 1; cfg->carrier_config.dl_frequency.value = from_nrarfcn(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0],
cfg->nfapi_config.rf_bands.rf_band[0] = *(long*)scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]; scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA)/1000; // freq in kHz
cfg->nfapi_config.rf_bands.tl.tag = NFAPI_PHY_RF_BANDS_TAG; cfg->carrier_config.dl_frequency.tl.tag = NFAPI_NR_CONFIG_DL_FREQUENCY_TAG;
cfg->num_tlv++; cfg->num_tlv++;
cfg->nfapi_config.nrarfcn.value = scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA; for (i=0; i<5; i++) {
if (i==scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing) {
cfg->carrier_config.dl_grid_size[i].value = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
cfg->carrier_config.dl_k0[i].value = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
cfg->carrier_config.dl_grid_size[i].tl.tag = NFAPI_NR_CONFIG_DL_GRID_SIZE_TAG;
cfg->carrier_config.dl_k0[i].tl.tag = NFAPI_NR_CONFIG_DL_K0_TAG;
cfg->num_tlv++;
cfg->num_tlv++;
}
else {
cfg->carrier_config.dl_grid_size[i].value = 0;
cfg->carrier_config.dl_k0[i].value = 0;
}
}
cfg->nfapi_config.nrarfcn.tl.tag = NFAPI_NR_NFAPI_NRARFCN_TAG; cfg->carrier_config.uplink_bandwidth.value = config_bandwidth(scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth,
*scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0]);
cfg->carrier_config.uplink_bandwidth.tl.tag = NFAPI_NR_CONFIG_UPLINK_BANDWIDTH_TAG; //temporary
cfg->num_tlv++; cfg->num_tlv++;
LOG_I(PHY,"%s() dl_BandwidthP:%d\n", __FUNCTION__, cfg->carrier_config.uplink_bandwidth.value);
cfg->subframe_config.numerology_index_mu.value = mu; int UL_pointA;
//cfg->subframe_config.tl.tag = if (scc->uplinkConfigCommon->frequencyInfoUL->absoluteFrequencyPointA == NULL)
//cfg->num_tlv++; UL_pointA = scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA;
else
UL_pointA = *scc->uplinkConfigCommon->frequencyInfoUL->absoluteFrequencyPointA;
cfg->rf_config.dl_carrier_bandwidth.value = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth; cfg->carrier_config.uplink_frequency.value = from_nrarfcn(*scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0],
cfg->rf_config.dl_carrier_bandwidth.tl.tag = NFAPI_RF_CONFIG_DL_CHANNEL_BANDWIDTH_TAG; //temporary UL_pointA)/1000; // freq in kHz
cfg->carrier_config.uplink_frequency.tl.tag = NFAPI_NR_CONFIG_UPLINK_FREQUENCY_TAG;
cfg->num_tlv++; cfg->num_tlv++;
LOG_I(PHY,"%s() dl_BandwidthP:%d\n", __FUNCTION__, cfg->rf_config.dl_carrier_bandwidth.value);
cfg->rf_config.ul_carrier_bandwidth.value = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth; for (i=0; i<5; i++) {
cfg->rf_config.ul_carrier_bandwidth.tl.tag = NFAPI_RF_CONFIG_UL_CHANNEL_BANDWIDTH_TAG; if (i==scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing) {
cfg->num_tlv++; cfg->carrier_config.ul_grid_size[i].value = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
cfg->carrier_config.ul_k0[i].value = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
cfg->carrier_config.ul_grid_size[i].tl.tag = NFAPI_NR_CONFIG_UL_GRID_SIZE_TAG;
cfg->carrier_config.ul_k0[i].tl.tag = NFAPI_NR_CONFIG_UL_K0_TAG;
cfg->num_tlv++;
cfg->num_tlv++;
}
else {
cfg->carrier_config.ul_grid_size[i].value = 0;
cfg->carrier_config.ul_k0[i].value = 0;
}
}
cfg->rf_config.dl_subcarrierspacing.value = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing; // Cell configuration
cfg->rf_config.dl_subcarrierspacing.tl.tag = NFAPI_NR_RF_CONFIG_DL_SUBCARRIERSPACING_TAG; cfg->cell_config.phy_cell_id.value = *scc->physCellId;
cfg->cell_config.phy_cell_id.tl.tag = NFAPI_NR_CONFIG_PHY_CELL_ID_TAG;
cfg->num_tlv++; cfg->num_tlv++;
cfg->rf_config.ul_subcarrierspacing.value = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing; cfg->cell_config.frame_duplex_type.value = 1;
cfg->rf_config.ul_subcarrierspacing.tl.tag = NFAPI_NR_RF_CONFIG_UL_SUBCARRIERSPACING_TAG; cfg->cell_config.frame_duplex_type.tl.tag = NFAPI_NR_CONFIG_FRAME_DUPLEX_TYPE_TAG;
cfg->num_tlv++; cfg->num_tlv++;
cfg->rf_config.dl_offsettocarrier.value = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
cfg->rf_config.dl_offsettocarrier.tl.tag = NFAPI_NR_RF_CONFIG_DL_OFFSETTOCARRIER_TAG;
cfg->num_tlv++;
cfg->rf_config.ul_offsettocarrier.value = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier; // SSB configuration
cfg->rf_config.ul_offsettocarrier.tl.tag = NFAPI_NR_RF_CONFIG_UL_OFFSETTOCARRIER_TAG; cfg->ssb_config.ss_pbch_power.value = scc->ss_PBCH_BlockPower;
cfg->ssb_config.ss_pbch_power.tl.tag = NFAPI_NR_CONFIG_SS_PBCH_POWER_TAG;
cfg->num_tlv++; cfg->num_tlv++;
// InitialBWP configuration
cfg->initialBWP_config.dl_bandwidth.value = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,275); cfg->ssb_config.scs_common.value = *scc->ssbSubcarrierSpacing;
cfg->initialBWP_config.dl_bandwidth.tl.tag = NFAPI_INITIALBWP_DL_BANDWIDTH_TAG; //temporary cfg->ssb_config.scs_common.tl.tag = NFAPI_NR_CONFIG_SCS_COMMON_TAG;
cfg->num_tlv++; cfg->num_tlv++;
cfg->initialBWP_config.dl_offset.value = NRRIV2PRBOFFSET(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,275);
cfg->initialBWP_config.dl_offset.tl.tag = NFAPI_INITIALBWP_DL_OFFSET_TAG; //temporary // PRACH configuration
cfg->prach_config.prach_sequence_length.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.present;
cfg->prach_config.prach_sequence_length.tl.tag = NFAPI_NR_CONFIG_PRACH_SEQUENCE_LENGTH_TAG;
cfg->num_tlv++;
if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing)
cfg->prach_config.prach_sub_c_spacing.value = *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing;
else
cfg->prach_config.prach_sub_c_spacing.value = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
cfg->prach_config.prach_sub_c_spacing.tl.tag = NFAPI_NR_CONFIG_PRACH_SUB_C_SPACING_TAG;
cfg->num_tlv++; cfg->num_tlv++;
cfg->initialBWP_config.dl_subcarrierSpacing.value = scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing;
cfg->initialBWP_config.dl_subcarrierSpacing.tl.tag = NFAPI_INITIALBWP_DL_SUBCARRIERSPACING_TAG; //temporary cfg->prach_config.restricted_set_config.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->restrictedSetConfig;
cfg->prach_config.restricted_set_config.tl.tag = NFAPI_NR_CONFIG_RESTRICTED_SET_CONFIG_TAG;
cfg->num_tlv++; cfg->num_tlv++;
LOG_I(PHY,"%s() initialBWP_dl_Bandwidth.RBstart.SCS :%d.%d.%d\n", __FUNCTION__, cfg->initialBWP_config.dl_bandwidth.value,cfg->initialBWP_config.dl_offset.value,cfg->initialBWP_config.dl_subcarrierSpacing.value);
cfg->initialBWP_config.ul_bandwidth.value = NRRIV2BW(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth,275); switch (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM) {
cfg->initialBWP_config.ul_bandwidth.tl.tag = NFAPI_INITIALBWP_UL_BANDWIDTH_TAG; case 0 :
cfg->prach_config.num_prach_fd_occasions.value = 1;
break;
case 1 :
cfg->prach_config.num_prach_fd_occasions.value = 2;
break;
case 2 :
cfg->prach_config.num_prach_fd_occasions.value = 4;
break;
case 3 :
cfg->prach_config.num_prach_fd_occasions.value = 8;
break;
default:
AssertFatal(1==0,"msg1 FDM identifier %ld undefined (0,1,2,3) \n", scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM);
}
cfg->prach_config.num_prach_fd_occasions.tl.tag = NFAPI_NR_CONFIG_NUM_PRACH_FD_OCCASIONS_TAG;
cfg->num_tlv++; cfg->num_tlv++;
cfg->initialBWP_config.ul_offset.value = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth,275);
cfg->initialBWP_config.ul_offset.tl.tag = NFAPI_INITIALBWP_UL_OFFSET_TAG; //temporary cfg->prach_config.num_prach_fd_occasions_list = (nfapi_nr_num_prach_fd_occasions_t *) malloc(cfg->prach_config.num_prach_fd_occasions.value*sizeof(nfapi_nr_num_prach_fd_occasions_t));
for (i=0; i<cfg->prach_config.num_prach_fd_occasions.value; i++) {
cfg->prach_config.num_prach_fd_occasions_list[i].num_prach_fd_occasions = i;
if (cfg->prach_config.prach_sequence_length.value)
cfg->prach_config.num_prach_fd_occasions_list[i].prach_root_sequence_index.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139;
else
cfg->prach_config.num_prach_fd_occasions_list[i].prach_root_sequence_index.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l839;
cfg->prach_config.num_prach_fd_occasions_list[i].prach_root_sequence_index.tl.tag = NFAPI_NR_CONFIG_PRACH_ROOT_SEQUENCE_INDEX_TAG;
cfg->num_tlv++;
cfg->prach_config.num_prach_fd_occasions_list[i].k1.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart;
cfg->prach_config.num_prach_fd_occasions_list[i].k1.tl.tag = NFAPI_NR_CONFIG_K1_TAG;
cfg->num_tlv++;
cfg->prach_config.num_prach_fd_occasions_list[i].prach_zero_corr_conf.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig;
cfg->prach_config.num_prach_fd_occasions_list[i].prach_zero_corr_conf.tl.tag = NFAPI_NR_CONFIG_PRACH_ZERO_CORR_CONF_TAG;
cfg->num_tlv++;
//cfg->prach_config.num_prach_fd_occasions_list[i].num_unused_root_sequences.value = ???
}
cfg->prach_config.ssb_per_rach.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present;
cfg->prach_config.ssb_per_rach.tl.tag = NFAPI_NR_CONFIG_SSB_PER_RACH_TAG;
cfg->num_tlv++; cfg->num_tlv++;
cfg->initialBWP_config.ul_subcarrierSpacing.value = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing;
cfg->initialBWP_config.ul_subcarrierSpacing.tl.tag = NFAPI_INITIALBWP_DL_SUBCARRIERSPACING_TAG; //temporary // SSB Table Configuration
int scs_scaling = 1<<(cfg->ssb_config.scs_common.value);
uint32_t absolute_diff = (*scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB - scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA);
cfg->ssb_table.ssb_offset_point_a.value = absolute_diff/(12*scs_scaling);
cfg->ssb_table.ssb_offset_point_a.tl.tag = NFAPI_NR_CONFIG_SSB_OFFSET_POINT_A_TAG;
cfg->num_tlv++; cfg->num_tlv++;
LOG_I(PHY,"%s() initialBWP_ul_Bandwidth.RBstart.SCS :%d.%d.%d\n", __FUNCTION__, cfg->initialBWP_config.ul_bandwidth.value,cfg->initialBWP_config.ul_offset.value,cfg->initialBWP_config.ul_subcarrierSpacing.value);
cfg->ssb_table.ssb_period.value = *scc->ssb_periodicityServingCell;
cfg->ssb_table.ssb_period.tl.tag = NFAPI_NR_CONFIG_SSB_PERIOD_TAG;
cfg->num_tlv++;
cfg->rach_config.prach_RootSequenceIndex.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139; switch (scc->ssb_PositionsInBurst->present) {
if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing) case 1 :
cfg->rach_config.prach_msg1_SubcarrierSpacing.value = *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing; cfg->ssb_table.ssb_mask_list[0].ssb_mask.value = scc->ssb_PositionsInBurst->choice.shortBitmap.buf[0];
else cfg->rach_config.prach_msg1_SubcarrierSpacing.value=cfg->rf_config.dl_subcarrierspacing.value; cfg->ssb_table.ssb_mask_list[1].ssb_mask.value = 0;
break;
case 2 :
cfg->ssb_table.ssb_mask_list[0].ssb_mask.value = scc->ssb_PositionsInBurst->choice.mediumBitmap.buf[0];
cfg->ssb_table.ssb_mask_list[1].ssb_mask.value = 0;
break;
case 3 :
cfg->ssb_table.ssb_mask_list[0].ssb_mask.value = 0;
cfg->ssb_table.ssb_mask_list[1].ssb_mask.value = 0;
for (i=0; i<4; i++) {
cfg->ssb_table.ssb_mask_list[0].ssb_mask.value += (scc->ssb_PositionsInBurst->choice.longBitmap.buf[i]<<i*8);
cfg->ssb_table.ssb_mask_list[1].ssb_mask.value += (scc->ssb_PositionsInBurst->choice.longBitmap.buf[i+4]<<i*8);
}
break;
default:
AssertFatal(1==0,"SSB bitmap size value %d undefined (allowed values 1,2,3) \n", scc->ssb_PositionsInBurst->present);
}
cfg->ssb_table.ssb_mask_list[0].ssb_mask.tl.tag = NFAPI_NR_CONFIG_SSB_MASK_TAG;
cfg->num_tlv++;
cfg->rach_config.restrictedSetConfig.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->restrictedSetConfig; // TDD Table Configuration
if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder) cfg->tdd_table.tdd_period.value = scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity;
cfg->rach_config.msg3_transformPrecoding.value = 1; cfg->tdd_table.tdd_period.tl.tag = NFAPI_NR_CONFIG_TDD_PERIOD_TAG;
else cfg->rach_config.msg3_transformPrecoding.value = 0; cfg->num_tlv++;
cfg->rach_config.prach_ConfigurationIndex.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.prach_ConfigurationIndex;
cfg->rach_config.prach_msg1_FDM.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM;
cfg->rach_config.prach_msg1_FrequencyStart.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart;
cfg->rach_config.zeroCorrelationZoneConfig.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig;
cfg->rach_config.preambleReceivedTargetPower.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.preambleReceivedTargetPower;
/*
// PDCCH-ConfigCommon // PDCCH-ConfigCommon
cfg->pdcch_config.controlResourceSetZero.value = scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->controlResourceSetZero; cfg->pdcch_config.controlResourceSetZero.value = scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->controlResourceSetZero;
cfg->pdcch_config.searchSpaceZero.value = scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->searchSpaceZero; cfg->pdcch_config.searchSpaceZero.value = scc->downlinkConfigCommon->initialDownlinkBWP->pdcch_ConfigCommon->choice.setup->searchSpaceZero;
...@@ -189,10 +426,8 @@ void config_common(int Mod_idP, ...@@ -189,10 +426,8 @@ void config_common(int Mod_idP,
AssertFatal(cfg->pusch_config.num_PUSCHTimeDomainResourceAllocations.value<=NFAPI_NR_PUSCH_CONFIG_MAXALLOCATIONS,"illegal TimeDomainAllocation count %d\n",cfg->pusch_config.num_PUSCHTimeDomainResourceAllocations.value); AssertFatal(cfg->pusch_config.num_PUSCHTimeDomainResourceAllocations.value<=NFAPI_NR_PUSCH_CONFIG_MAXALLOCATIONS,"illegal TimeDomainAllocation count %d\n",cfg->pusch_config.num_PUSCHTimeDomainResourceAllocations.value);
for (int i=0;i<cfg->pusch_config.num_PUSCHTimeDomainResourceAllocations.value;i++) { for (int i=0;i<cfg->pusch_config.num_PUSCHTimeDomainResourceAllocations.value;i++) {
cfg->pusch_config.PUSCHTimeDomainResourceAllocation_k2[i].value=*scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->k2; cfg->pusch_config.PUSCHTimeDomainResourceAllocation_k2[i].value=*scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[0]->k2;
} }*/
//cfg->sch_config.half_frame_index.value = 0; Fix in PHY
//cfg->sch_config.n_ssb_crb.value = 86; Fix in PHY
} }
...@@ -231,7 +466,11 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, ...@@ -231,7 +466,11 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
phycfg.Mod_id = Mod_idP; phycfg.Mod_id = Mod_idP;
phycfg.CC_id = 0; phycfg.CC_id = 0;
phycfg.cfg = &RC.nrmac[Mod_idP]->config[0]; phycfg.cfg = &RC.nrmac[Mod_idP]->config[0];
phycfg.cfg->ssb_table.ssb_subcarrier_offset.value = ssb_SubcarrierOffset;
phycfg.cfg->ssb_table.ssb_subcarrier_offset.tl.tag = NFAPI_NR_CONFIG_SSB_SUBCARRIER_OFFSET_TAG;
phycfg.cfg->num_tlv++;
if (RC.nrmac[Mod_idP]->if_inst->NR_PHY_config_req) RC.nrmac[Mod_idP]->if_inst->NR_PHY_config_req(&phycfg); if (RC.nrmac[Mod_idP]->if_inst->NR_PHY_config_req) RC.nrmac[Mod_idP]->if_inst->NR_PHY_config_req(&phycfg);
} }
......
...@@ -853,7 +853,7 @@ void fill_dci_pdu_rel15(nfapi_nr_dl_config_pdcch_pdu_rel15_t *pdcch_pdu_rel15, ...@@ -853,7 +853,7 @@ void fill_dci_pdu_rel15(nfapi_nr_dl_config_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
nfapi_nr_coreset_t coreset, nfapi_nr_coreset_t coreset,
uint16_t frame, uint16_t frame,
uint16_t slot, uint16_t slot,
nfapi_nr_config_request_t cfg) { nfapi_nr_config_request_scf_t cfg) {
AssertFatal(search_space.coreset_id==coreset.coreset_id, "Invalid association of coreset(%d) and search space(%d)\n", AssertFatal(search_space.coreset_id==coreset.coreset_id, "Invalid association of coreset(%d) and search space(%d)\n",
search_space.search_space_id, coreset.coreset_id); search_space.search_space_id, coreset.coreset_id);
...@@ -870,38 +870,20 @@ void fill_dci_pdu_rel15(nfapi_nr_dl_config_pdcch_pdu_rel15_t *pdcch_pdu_rel15, ...@@ -870,38 +870,20 @@ void fill_dci_pdu_rel15(nfapi_nr_dl_config_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
} }
*/ */
int get_dlscs(nfapi_nr_config_request_t *cfg) { int get_spf(nfapi_nr_config_request_scf_t *cfg) {
return(cfg->rf_config.dl_subcarrierspacing.value); int mu = cfg->ssb_config.scs_common.value;
}
int get_ulscs(nfapi_nr_config_request_t *cfg) {
return(cfg->rf_config.ul_subcarrierspacing.value);
}
int get_spf(nfapi_nr_config_request_t *cfg) {
int mu = cfg->rf_config.dl_subcarrierspacing.value;
AssertFatal(mu>=0&&mu<4,"Illegal scs %d\n",mu); AssertFatal(mu>=0&&mu<4,"Illegal scs %d\n",mu);
return(10 * (1<<mu)); return(10 * (1<<mu));
} }
int to_absslot(nfapi_nr_config_request_t *cfg,int frame,int slot) { int to_absslot(nfapi_nr_config_request_scf_t *cfg,int frame,int slot) {
return(get_spf(cfg)*frame) + slot; return(get_spf(cfg)*frame) + slot;
} }
int get_symbolsperslot(nfapi_nr_config_request_t *cfg) {
return ((cfg->subframe_config.dl_cyclic_prefix_type.value==NFAPI_CP_EXTENDED)?12:14);
}
int extract_startSymbol(int startSymbolAndLength) { int extract_startSymbol(int startSymbolAndLength) {
int tmp = startSymbolAndLength/14; int tmp = startSymbolAndLength/14;
......
...@@ -100,7 +100,7 @@ int nr_is_dci_opportunity(nfapi_nr_search_space_t search_space, ...@@ -100,7 +100,7 @@ int nr_is_dci_opportunity(nfapi_nr_search_space_t search_space,
nfapi_nr_coreset_t coreset, nfapi_nr_coreset_t coreset,
uint16_t frame, uint16_t frame,
uint16_t slot, uint16_t slot,
nfapi_nr_config_request_t cfg); nfapi_nr_config_request_scf_t cfg);
*/ */
void nr_configure_pdcch(nfapi_nr_dl_config_pdcch_pdu_rel15_t* pdcch_pdu, void nr_configure_pdcch(nfapi_nr_dl_config_pdcch_pdu_rel15_t* pdcch_pdu,
int ss_type, int ss_type,
...@@ -111,17 +111,12 @@ void fill_dci_pdu_rel15(nfapi_nr_dl_config_pdcch_pdu_rel15_t *pdcch_pdu_rel15, ...@@ -111,17 +111,12 @@ void fill_dci_pdu_rel15(nfapi_nr_dl_config_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
int *dci_formats, int *dci_formats,
int *rnti_types int *rnti_types
); );
int get_dlscs(nfapi_nr_config_request_t *cfg);
int get_ulscs(nfapi_nr_config_request_t *cfg); int get_spf(nfapi_nr_config_request_scf_t *cfg);
int get_spf(nfapi_nr_config_request_t *cfg); int to_absslot(nfapi_nr_config_request_scf_t *cfg,int frame,int slot);
int to_absslot(nfapi_nr_config_request_t *cfg,int frame,int slot); void get_band(uint64_t downlink_frequency, uint16_t *current_band, int32_t *current_offset, lte_frame_type_t *current_type);
int get_symbolsperslot(nfapi_nr_config_request_t *cfg);
void get_band(uint32_t downlink_frequency, uint16_t *current_band, int32_t *current_offset, lte_frame_type_t *current_type);
uint64_t from_nrarfcn(int nr_bandP, uint32_t dl_nrarfcn); uint64_t from_nrarfcn(int nr_bandP, uint32_t dl_nrarfcn);
......
...@@ -69,7 +69,7 @@ nr_bandentry_t nr_bandtable[] = { ...@@ -69,7 +69,7 @@ nr_bandentry_t nr_bandtable[] = {
#define NR_BANDTABLE_SIZE (sizeof(nr_bandtable)/sizeof(nr_bandentry_t)) #define NR_BANDTABLE_SIZE (sizeof(nr_bandtable)/sizeof(nr_bandentry_t))
void get_band(uint32_t downlink_frequency, void get_band(uint64_t downlink_frequency,
uint16_t *current_band, uint16_t *current_band,
int32_t *current_offset, int32_t *current_offset,
lte_frame_type_t *current_type) lte_frame_type_t *current_type)
...@@ -91,26 +91,24 @@ void get_band(uint32_t downlink_frequency, ...@@ -91,26 +91,24 @@ void get_band(uint32_t downlink_frequency,
if ( nr_bandtable[ind].dl_min <= dl_freq_khz && nr_bandtable[ind].dl_max >= dl_freq_khz ) { if ( nr_bandtable[ind].dl_min <= dl_freq_khz && nr_bandtable[ind].dl_max >= dl_freq_khz ) {
center_frequency_khz = (nr_bandtable[ind].dl_max + nr_bandtable[ind].dl_min)/2; center_frequency_khz = (nr_bandtable[ind].dl_max + nr_bandtable[ind].dl_min)/2;
if (abs(dl_freq_khz - center_frequency_khz) < center_freq_diff_khz){ if (abs(dl_freq_khz - center_frequency_khz) < center_freq_diff_khz){
*current_band = nr_bandtable[ind].band; *current_band = nr_bandtable[ind].band;
*current_offset = (nr_bandtable[ind].ul_min - nr_bandtable[ind].dl_min)*1000; *current_offset = (nr_bandtable[ind].ul_min - nr_bandtable[ind].dl_min)*1000;
center_freq_diff_khz = abs(dl_freq_khz - center_frequency_khz); center_freq_diff_khz = abs(dl_freq_khz - center_frequency_khz);
if (*current_offset == 0) if (*current_offset == 0)
*current_type = TDD; *current_type = TDD;
else else
*current_type = FDD; *current_type = FDD;
} }
} }
} }
LOG_I( PHY, "DL frequency %"PRIu32": band %d, frame_type %d, UL frequency %"PRIu32"\n", LOG_I( PHY, "DL frequency %"PRIu64": band %d, frame_type %d, UL frequency %"PRIu64"\n",
downlink_frequency, *current_band, *current_type, downlink_frequency+*current_offset); downlink_frequency, *current_band, *current_type, downlink_frequency+*current_offset);
AssertFatal(*current_band != 0, AssertFatal(*current_band != 0,
"Can't find EUTRA band for frequency %u\n", downlink_frequency); "Can't find EUTRA band for frequency %lu\n", downlink_frequency);
} }
uint32_t to_nrarfcn(int nr_bandP, uint32_t to_nrarfcn(int nr_bandP,
...@@ -362,7 +360,7 @@ static inline uint8_t get_table_idx(uint8_t mcs_table, uint8_t dci_format, uint8 ...@@ -362,7 +360,7 @@ static inline uint8_t get_table_idx(uint8_t mcs_table, uint8_t dci_format, uint8
int get_num_dmrs(uint16_t dmrs_mask ) { int get_num_dmrs(uint16_t dmrs_mask ) {
int num_dmrs; int num_dmrs=0;
for (int i=0;i<16;i++) num_dmrs+=((dmrs_mask>>i)&1); for (int i=0;i<16;i++) num_dmrs+=((dmrs_mask>>i)&1);
return(num_dmrs); return(num_dmrs);
......
...@@ -67,7 +67,7 @@ typedef struct { ...@@ -67,7 +67,7 @@ typedef struct {
int p_gNB; int p_gNB;
int Ncp; int Ncp;
int nr_band; int nr_band;
uint32_t dl_CarrierFreq; uint64_t dl_CarrierFreq;
NR_BCCH_BCH_Message_t *mib; NR_BCCH_BCH_Message_t *mib;
NR_ServingCellConfigCommon_t *ServingCellConfigCommon; NR_ServingCellConfigCommon_t *ServingCellConfigCommon;
NR_TDD_UL_DL_ConfigCommon_t *tdd_Config; NR_TDD_UL_DL_ConfigCommon_t *tdd_Config;
...@@ -139,7 +139,7 @@ typedef struct gNB_MAC_INST_s { ...@@ -139,7 +139,7 @@ typedef struct gNB_MAC_INST_s {
uint16_t pdu_index[NFAPI_CC_MAX]; uint16_t pdu_index[NFAPI_CC_MAX];
/// NFAPI Config Request Structure /// NFAPI Config Request Structure
nfapi_nr_config_request_t config[NFAPI_CC_MAX]; nfapi_nr_config_request_scf_t config[NFAPI_CC_MAX];
/// NFAPI DL Config Request Structure /// NFAPI DL Config Request Structure
nfapi_nr_dl_config_request_t DL_req[NFAPI_CC_MAX]; nfapi_nr_dl_config_request_t DL_req[NFAPI_CC_MAX];
/// NFAPI UL TTI Request Structure (this is from the new SCF specs) /// NFAPI UL TTI Request Structure (this is from the new SCF specs)
......
...@@ -283,7 +283,7 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) { ...@@ -283,7 +283,7 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) {
(UL_info->frame+((UL_info->slot>(9-sf_ahead))?1:0)) % 1024, (UL_info->frame+((UL_info->slot>(9-sf_ahead))?1:0)) % 1024,
(UL_info->slot+sf_ahead)%10); (UL_info->slot+sf_ahead)%10);
*/ */
nfapi_nr_config_request_t *cfg = &mac->config[CC_id]; nfapi_nr_config_request_scf_t *cfg = &mac->config[CC_id];
int spf = get_spf(cfg); int spf = get_spf(cfg);
gNB_dlsch_ulsch_scheduler(module_id, gNB_dlsch_ulsch_scheduler(module_id,
UL_info->frame, UL_info->frame,
......
...@@ -112,7 +112,7 @@ typedef struct { ...@@ -112,7 +112,7 @@ typedef struct {
typedef struct { typedef struct {
uint8_t Mod_id; uint8_t Mod_id;
int CC_id; int CC_id;
nfapi_nr_config_request_t *cfg; nfapi_nr_config_request_scf_t *cfg;
} NR_PHY_Config_t; } NR_PHY_Config_t;
typedef struct NR_IF_Module_s { typedef struct NR_IF_Module_s {
......
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