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OpenXG
OpenXG-RAN
Commits
d0476cb0
Commit
d0476cb0
authored
8 years ago
by
Xenofon Foukas
Browse files
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Fixed various bugs related to scheduling using agent
parent
27a1101a
Changes
3
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Showing
3 changed files
with
112 additions
and
71 deletions
+112
-71
openair2/ENB_APP/flexran_agent_common.c
openair2/ENB_APP/flexran_agent_common.c
+12
-3
openair2/LAYER2/MAC/flexran_agent_scheduler_dataplane.c
openair2/LAYER2/MAC/flexran_agent_scheduler_dataplane.c
+34
-33
openair2/LAYER2/MAC/flexran_agent_scheduler_dlsch_ue.c
openair2/LAYER2/MAC/flexran_agent_scheduler_dlsch_ue.c
+66
-35
No files found.
openair2/ENB_APP/flexran_agent_common.c
View file @
d0476cb0
...
@@ -553,7 +553,11 @@ int flexran_get_ue_phr (mid_t mod_id, mid_t ue_id) {
...
@@ -553,7 +553,11 @@ int flexran_get_ue_phr (mid_t mod_id, mid_t ue_id) {
}
}
int
flexran_get_ue_wcqi
(
mid_t
mod_id
,
mid_t
ue_id
)
{
int
flexran_get_ue_wcqi
(
mid_t
mod_id
,
mid_t
ue_id
)
{
return
((
UE_list_t
*
)
enb_ue
[
mod_id
])
->
eNB_UE_stats
[
UE_PCCID
(
mod_id
,
ue_id
)][
ue_id
].
dl_cqi
;
LTE_eNB_UE_stats
*
eNB_UE_stats
=
NULL
;
eNB_UE_stats
=
mac_xface
->
get_eNB_UE_stats
(
mod_id
,
0
,
UE_RNTI
(
mod_id
,
ue_id
));
return
eNB_UE_stats
->
DL_cqi
[
0
];
// return ((UE_list_t *)enb_ue[mod_id])->eNB_UE_stats[UE_PCCID(mod_id,ue_id)][ue_id].dl_cqi;
}
}
int
flexran_get_tx_queue_size
(
mid_t
mod_id
,
mid_t
ue_id
,
logical_chan_id_t
channel_id
)
{
int
flexran_get_tx_queue_size
(
mid_t
mod_id
,
mid_t
ue_id
,
logical_chan_id_t
channel_id
)
{
...
@@ -680,8 +684,13 @@ int flexran_get_tpc(mid_t mod_id, mid_t ue_id) {
...
@@ -680,8 +684,13 @@ int flexran_get_tpc(mid_t mod_id, mid_t ue_id) {
return
tpc
;
return
tpc
;
}
}
int
flexran_get_harq
(
const
mid_t
mod_id
,
const
uint8_t
CC_id
,
const
mid_t
ue_id
,
const
int
frame
,
const
uint8_t
subframe
,
int
flexran_get_harq
(
const
mid_t
mod_id
,
unsigned
char
*
id
,
unsigned
char
*
round
)
{
//flag_id_status = 0 then id, else status
const
uint8_t
CC_id
,
const
mid_t
ue_id
,
const
int
frame
,
const
uint8_t
subframe
,
uint8_t
*
id
,
uint8_t
*
round
)
{
//flag_id_status = 0 then id, else status
/*TODO: Add int TB in function parameters to get the status of the second TB. This can be done to by editing in
/*TODO: Add int TB in function parameters to get the status of the second TB. This can be done to by editing in
* get_ue_active_harq_pid function in line 272 file: phy_procedures_lte_eNB.c to add
* get_ue_active_harq_pid function in line 272 file: phy_procedures_lte_eNB.c to add
* DLSCH_ptr = PHY_vars_eNB_g[Mod_id][CC_id]->dlsch_eNB[(uint32_t)UE_id][1];*/
* DLSCH_ptr = PHY_vars_eNB_g[Mod_id][CC_id]->dlsch_eNB[(uint32_t)UE_id][1];*/
...
...
This diff is collapsed.
Click to expand it.
openair2/LAYER2/MAC/flexran_agent_scheduler_dataplane.c
View file @
d0476cb0
...
@@ -99,8 +99,8 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
...
@@ -99,8 +99,8 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
uint16_t
nb_rb
;
uint16_t
nb_rb
;
uint16_t
TBS
,
j
,
sdu_lengths
[
11
],
rnti
,
padding
=
0
,
post_padding
=
0
;
uint16_t
TBS
,
j
,
sdu_lengths
[
11
],
rnti
,
padding
=
0
,
post_padding
=
0
;
unsigned
char
dlsch_buffer
[
MAX_DLSCH_PAYLOAD_BYTES
];
unsigned
char
dlsch_buffer
[
MAX_DLSCH_PAYLOAD_BYTES
];
u
nsigned
char
round
=
0
;
u
int8_t
round
=
0
;
u
nsigned
char
harq_pid
=
0
;
u
int8_t
harq_pid
=
0
;
// LTE_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs];
// LTE_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs];
LTE_eNB_UE_stats
*
eNB_UE_stats
=
NULL
;
LTE_eNB_UE_stats
*
eNB_UE_stats
=
NULL
;
uint16_t
sdu_length_total
=
0
;
uint16_t
sdu_length_total
=
0
;
...
@@ -147,7 +147,7 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
...
@@ -147,7 +147,7 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
if
(
dl_data
->
n_ce_bitmap
>
0
)
{
if
(
dl_data
->
n_ce_bitmap
>
0
)
{
//Check if there is TA command and set the length appropriately
//Check if there is TA command and set the length appropriately
ta_len
=
(
dl_data
->
ce_bitmap
[
0
]
&
PROTOCOL__FLEX_CE_TYPE__FLPCET_TA
)
?
1
:
0
;
ta_len
=
(
dl_data
->
ce_bitmap
[
0
]
&
PROTOCOL__FLEX_CE_TYPE__FLPCET_TA
)
?
2
:
0
;
}
}
num_sdus
=
0
;
num_sdus
=
0
;
...
@@ -157,12 +157,14 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
...
@@ -157,12 +157,14 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
// Reset the measurement
// Reset the measurement
ue_sched_ctl
->
ta_timer
=
20
;
ue_sched_ctl
->
ta_timer
=
20
;
eNB_UE_stats
->
timing_advance_update
=
0
;
eNB_UE_stats
->
timing_advance_update
=
0
;
header_len
=
ta_len
;
//
header_len = ta_len;
last_sdu_header_len
=
ta_len
;
//
last_sdu_header_len = ta_len;
}
}
n_lc
=
dl_data
->
n_rlc_pdu
;
n_lc
=
dl_data
->
n_rlc_pdu
;
// Go through each one of the channel commands and create SDUs
// Go through each one of the channel commands and create SDUs
header_len
=
0
;
last_sdu_header_len
=
0
;
for
(
i
=
0
;
i
<
n_lc
;
i
++
)
{
for
(
i
=
0
;
i
<
n_lc
;
i
++
)
{
lcid
=
dl_data
->
rlc_pdu
[
i
]
->
rlc_pdu_tb
[
0
]
->
logical_channel_id
;
lcid
=
dl_data
->
rlc_pdu
[
i
]
->
rlc_pdu_tb
[
0
]
->
logical_channel_id
;
rlc_size
=
dl_data
->
rlc_pdu
[
i
]
->
rlc_pdu_tb
[
0
]
->
size
;
rlc_size
=
dl_data
->
rlc_pdu
[
i
]
->
rlc_pdu_tb
[
0
]
->
size
;
...
@@ -200,7 +202,7 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
...
@@ -200,7 +202,7 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
if
(
rlc_status
.
bytes_in_buffer
>
0
)
{
if
(
rlc_status
.
bytes_in_buffer
>
0
)
{
sdu_lengths
[
i
]
+
=
mac_rlc_data_req
(
mod_id
,
sdu_lengths
[
i
]
=
mac_rlc_data_req
(
mod_id
,
rnti
,
rnti
,
mod_id
,
mod_id
,
frame
,
frame
,
...
@@ -216,7 +218,7 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
...
@@ -216,7 +218,7 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
UE_list
->
eNB_UE_stats
[
CC_id
][
UE_id
].
num_pdu_tx
[
lcid
]
+=
1
;
UE_list
->
eNB_UE_stats
[
CC_id
][
UE_id
].
num_pdu_tx
[
lcid
]
+=
1
;
UE_list
->
eNB_UE_stats
[
CC_id
][
UE_id
].
num_bytes_tx
[
lcid
]
+=
sdu_lengths
[
i
];
UE_list
->
eNB_UE_stats
[
CC_id
][
UE_id
].
num_bytes_tx
[
lcid
]
+=
sdu_lengths
[
i
];
if
(
sdu_lengths
[
i
]
<
=
128
)
{
if
(
sdu_lengths
[
i
]
<
128
)
{
header_len
+=
2
;
header_len
+=
2
;
last_sdu_header_len
=
2
;
last_sdu_header_len
=
2
;
}
else
{
}
else
{
...
@@ -230,20 +232,18 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
...
@@ -230,20 +232,18 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
}
// SDU creation end
}
// SDU creation end
if
(((
sdu_length_total
+
header_len
)
>
0
))
{
if
(((
sdu_length_total
+
header_len
+
ta_len
)
>
0
))
{
//
header_len_tmp = header_len;
header_len_tmp
=
header_len
;
// If we have only a single SDU, header length becomes 1
// If we have only a single SDU, header length becomes 1
if
((
num_sdus
+
ta_len
)
==
1
)
{
if
((
num_sdus
)
==
1
)
{
//if (header_len == 2 || header_len == 3) {
//if (header_len == 2 || header_len == 3) {
header_len
=
1
;
header_len
=
1
;
}
else
{
}
else
{
header_len
=
(
header_len
-
last_sdu_header_len
)
+
1
;
header_len
=
(
header_len
-
last_sdu_header_len
)
+
1
;
}
}
// there is a payload
if
(((
sdu_length_total
+
header_len
)
>
0
))
{
// If we need a 1 or 2 bit padding or no padding at all
// If we need a 1 or 2 bit padding or no padding at all
if
((
TBS
-
header_len
-
sdu_length_total
-
ta_len
)
<=
2
if
((
TBS
-
header_len
-
sdu_length_total
-
ta_len
)
<=
2
||
(
TBS
-
header_len
-
sdu_length_total
-
ta_len
)
>
TBS
)
{
//protect from overflow
||
(
TBS
-
header_len
-
sdu_length_total
-
ta_len
)
>
TBS
)
{
//protect from overflow
...
@@ -252,8 +252,7 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
...
@@ -252,8 +252,7 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
}
else
{
// The last sdu needs to have a length field, since we add padding
}
else
{
// The last sdu needs to have a length field, since we add padding
padding
=
0
;
padding
=
0
;
header_len
=
header_len_tmp
;
header_len
=
header_len_tmp
;
post_padding
=
TBS
-
sdu_length_total
-
header_len
-
ta_len
-
1
;
// 1 is for the postpadding header
post_padding
=
TBS
-
sdu_length_total
-
header_len
-
ta_len
;
// 1 is for the postpadding header
}
}
}
ta_update
=
(
ta_len
>
0
)
?
ue_sched_ctl
->
ta_update
:
0
;
ta_update
=
(
ta_len
>
0
)
?
ue_sched_ctl
->
ta_update
:
0
;
...
@@ -320,6 +319,8 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
...
@@ -320,6 +319,8 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
stats_tbs
=
mac_xface
->
get_TBS_DL
(
dl_dci
->
mcs
[
0
],
nb_rb
);
stats_tbs
=
mac_xface
->
get_TBS_DL
(
dl_dci
->
mcs
[
0
],
nb_rb
);
}
}
// LOG_I(FLEXRAN_AGENT, "The MCS was %d\n", dl_dci->mcs[0]);
UE_list
->
eNB_UE_stats
[
CC_id
][
UE_id
].
rbs_used
=
nb_rb
;
UE_list
->
eNB_UE_stats
[
CC_id
][
UE_id
].
rbs_used
=
nb_rb
;
UE_list
->
eNB_UE_stats
[
CC_id
][
UE_id
].
total_rbs_used
+=
nb_rb
;
UE_list
->
eNB_UE_stats
[
CC_id
][
UE_id
].
total_rbs_used
+=
nb_rb
;
UE_list
->
eNB_UE_stats
[
CC_id
][
UE_id
].
dlsch_mcs1
=
dl_dci
->
mcs
[
0
];
UE_list
->
eNB_UE_stats
[
CC_id
][
UE_id
].
dlsch_mcs1
=
dl_dci
->
mcs
[
0
];
...
@@ -345,8 +346,8 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
...
@@ -345,8 +346,8 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
//UE_list->eNB_UE_stats[CC_id][UE_id].ncce_used_retx=nCCECC_id];
//UE_list->eNB_UE_stats[CC_id][UE_id].ncce_used_retx=nCCECC_id];
}
}
UE_list
->
UE_template
[
CC_id
][
UE_id
].
oldNDI
[
dl_dci
->
harq_process
]
=
dl_dci
->
ndi
[
0
];
//
UE_list->UE_template[CC_id][UE_id].oldNDI[dl_dci->harq_process] = dl_dci->ndi[0];
eNB_UE_stats
->
dlsch_mcs1
=
dl_dci
->
mcs
[
0
];
//
eNB_UE_stats->dlsch_mcs1 = dl_dci->mcs[0];
//Fill the proper DCI of OAI
//Fill the proper DCI of OAI
flexran_fill_oai_dci
(
mod_id
,
CC_id
,
rnti
,
dl_dci
);
flexran_fill_oai_dci
(
mod_id
,
CC_id
,
rnti
,
dl_dci
);
...
...
This diff is collapsed.
Click to expand it.
openair2/LAYER2/MAC/flexran_agent_scheduler_dlsch_ue.c
View file @
d0476cb0
...
@@ -233,7 +233,7 @@ void _assign_rbs_required (module_id_t Mod_id,
...
@@ -233,7 +233,7 @@ void _assign_rbs_required (module_id_t Mod_id,
for
(
n
=
0
;
n
<
UE_list
->
numactiveCCs
[
UE_id
];
n
++
)
{
for
(
n
=
0
;
n
<
UE_list
->
numactiveCCs
[
UE_id
];
n
++
)
{
CC_id
=
UE_list
->
ordered_CCids
[
n
][
UE_id
];
CC_id
=
UE_list
->
ordered_CCids
[
n
][
UE_id
];
eNB_UE_stats
[
CC_id
]
=
mac_xface
->
get_eNB_UE_stats
(
Mod_id
,
CC_id
,
rnti
);
eNB_UE_stats
[
CC_id
]
=
mac_xface
->
get_eNB_UE_stats
(
Mod_id
,
CC_id
,
rnti
);
eNB_UE_stats
[
CC_id
]
->
dlsch_mcs1
=
cqi_to_mcs
[
flexran_get_ue_wcqi
(
Mod_id
,
UE_id
)];
eNB_UE_stats
[
CC_id
]
->
dlsch_mcs1
=
cqi_to_mcs
[
flexran_get_ue_wcqi
(
Mod_id
,
UE_id
)];
}
}
// provide the list of CCs sorted according to MCS
// provide the list of CCs sorted according to MCS
...
@@ -260,34 +260,34 @@ void _assign_rbs_required (module_id_t Mod_id,
...
@@ -260,34 +260,34 @@ void _assign_rbs_required (module_id_t Mod_id,
CC_id
=
UE_list
->
ordered_CCids
[
i
][
UE_id
];
CC_id
=
UE_list
->
ordered_CCids
[
i
][
UE_id
];
eNB_UE_stats
[
CC_id
]
=
mac_xface
->
get_eNB_UE_stats
(
Mod_id
,
CC_id
,
rnti
);
eNB_UE_stats
[
CC_id
]
=
mac_xface
->
get_eNB_UE_stats
(
Mod_id
,
CC_id
,
rnti
);
if
(
eNB_UE_stats
[
CC_id
]
->
dlsch_mcs1
==
0
)
{
if
(
cqi_to_mcs
[
flexran_get_ue_wcqi
(
Mod_id
,
UE_id
)]
==
0
)
{
//
eNB_UE_stats[CC_id]->dlsch_mcs1==0) {
nb_rbs_required
[
CC_id
][
UE_id
]
=
4
;
// don't let the TBS get too small
nb_rbs_required
[
CC_id
][
UE_id
]
=
4
;
// don't let the TBS get too small
}
else
{
}
else
{
nb_rbs_required
[
CC_id
][
UE_id
]
=
min_rb_unit
[
CC_id
];
nb_rbs_required
[
CC_id
][
UE_id
]
=
min_rb_unit
[
CC_id
];
}
}
TBS
=
mac_xface
->
get_TBS_DL
(
eNB_UE_stats
[
CC_id
]
->
dlsch_mcs1
,
nb_rbs_required
[
CC_id
][
UE_id
]);
TBS
=
mac_xface
->
get_TBS_DL
(
cqi_to_mcs
[
flexran_get_ue_wcqi
(
Mod_id
,
UE_id
)],
nb_rbs_required
[
CC_id
][
UE_id
]);
nb_rbs_allowed_slice
[
CC_id
][
slice_id
]
=
flexran_nb_rbs_allowed_slice
(
slice_percentage
[
slice_id
],
nb_rbs_allowed_slice
[
CC_id
][
slice_id
]
=
flexran_nb_rbs_allowed_slice
(
slice_percentage
[
slice_id
],
flexran_get_N_RB_DL
(
Mod_id
,
CC_id
));
flexran_get_N_RB_DL
(
Mod_id
,
CC_id
));
LOG_D
(
MAC
,
"[preprocessor] start RB assignement for UE %d CC_id %d dl buffer %d (RB unit %d, MCS %d, TBS %d)
\n
"
,
LOG_D
(
MAC
,
"[preprocessor] start RB assignement for UE %d CC_id %d dl buffer %d (RB unit %d, MCS %d, TBS %d)
\n
"
,
UE_id
,
CC_id
,
UE_list
->
UE_template
[
pCCid
][
UE_id
].
dl_buffer_total
,
UE_id
,
CC_id
,
UE_list
->
UE_template
[
pCCid
][
UE_id
].
dl_buffer_total
,
nb_rbs_required
[
CC_id
][
UE_id
],
eNB_UE_stats
[
CC_id
]
->
dlsch_mcs1
,
TBS
);
nb_rbs_required
[
CC_id
][
UE_id
],
flexran_get_ue_wcqi
(
Mod_id
,
UE_id
),
TBS
);
/* calculating required number of RBs for each UE */
/* calculating required number of RBs for each UE */
while
(
TBS
<
UE_list
->
UE_template
[
pCCid
][
UE_id
].
dl_buffer_total
)
{
while
(
TBS
<
UE_list
->
UE_template
[
pCCid
][
UE_id
].
dl_buffer_total
)
{
nb_rbs_required
[
CC_id
][
UE_id
]
+=
min_rb_unit
[
CC_id
];
nb_rbs_required
[
CC_id
][
UE_id
]
+=
min_rb_unit
[
CC_id
];
if
(
nb_rbs_required
[
CC_id
][
UE_id
]
>
nb_rbs_allowed_slice
[
CC_id
][
slice_id
])
{
if
(
nb_rbs_required
[
CC_id
][
UE_id
]
>
nb_rbs_allowed_slice
[
CC_id
][
slice_id
])
{
TBS
=
mac_xface
->
get_TBS_DL
(
eNB_UE_stats
[
CC_id
]
->
dlsch_mcs1
,
nb_rbs_allowed_slice
[
CC_id
][
slice_id
]);
TBS
=
mac_xface
->
get_TBS_DL
(
flexran_get_ue_wcqi
(
Mod_id
,
UE_id
)
,
nb_rbs_allowed_slice
[
CC_id
][
slice_id
]);
nb_rbs_required
[
CC_id
][
UE_id
]
=
nb_rbs_allowed_slice
[
CC_id
][
slice_id
];
nb_rbs_required
[
CC_id
][
UE_id
]
=
nb_rbs_allowed_slice
[
CC_id
][
slice_id
];
break
;
break
;
}
}
TBS
=
mac_xface
->
get_TBS_DL
(
eNB_UE_stats
[
CC_id
]
->
dlsch_mcs1
,
nb_rbs_required
[
CC_id
][
UE_id
]);
TBS
=
mac_xface
->
get_TBS_DL
(
cqi_to_mcs
[
flexran_get_ue_wcqi
(
Mod_id
,
UE_id
)],
nb_rbs_required
[
CC_id
][
UE_id
]);
}
// end of while
}
// end of while
LOG_D
(
MAC
,
"[eNB %d][SLICE %d] Frame %d: UE %d on CC %d: RB unit %d, nb_required RB %d (TBS %d, mcs %d)
\n
"
,
LOG_D
(
MAC
,
"[eNB %d][SLICE %d] Frame %d: UE %d on CC %d: RB unit %d, nb_required RB %d (TBS %d, mcs %d)
\n
"
,
Mod_id
,
slice_id
,
frameP
,
UE_id
,
CC_id
,
min_rb_unit
[
CC_id
],
nb_rbs_required
[
CC_id
][
UE_id
],
TBS
,
eNB_UE_stats
[
CC_id
]
->
dlsch_mcs1
);
Mod_id
,
slice_id
,
frameP
,
UE_id
,
CC_id
,
min_rb_unit
[
CC_id
],
nb_rbs_required
[
CC_id
][
UE_id
],
TBS
,
cqi_to_mcs
[
flexran_get_ue_wcqi
(
Mod_id
,
UE_id
)]
);
}
}
}
}
}
}
...
@@ -543,10 +543,11 @@ void _dlsch_scheduler_pre_processor (module_id_t Mod_id,
...
@@ -543,10 +543,11 @@ void _dlsch_scheduler_pre_processor (module_id_t Mod_id,
int
*
mbsfn_flag
)
int
*
mbsfn_flag
)
{
{
unsigned
char
rballoc_sub
[
MAX_NUM_CCs
][
N_RBG_MAX
],
harq_pid
=
0
,
total_ue_count
;
unsigned
char
rballoc_sub
[
MAX_NUM_CCs
][
N_RBG_MAX
],
total_ue_count
;
unsigned
char
MIMO_mode_indicator
[
MAX_NUM_CCs
][
N_RBG_MAX
];
unsigned
char
MIMO_mode_indicator
[
MAX_NUM_CCs
][
N_RBG_MAX
];
int
UE_id
,
i
;
int
UE_id
,
i
;
unsigned
char
round
=
0
;
uint8_t
round
=
0
;
uint8_t
harq_pid
=
0
;
uint16_t
ii
,
j
;
uint16_t
ii
,
j
;
uint16_t
nb_rbs_required
[
MAX_NUM_CCs
][
NUMBER_OF_UE_MAX
];
uint16_t
nb_rbs_required
[
MAX_NUM_CCs
][
NUMBER_OF_UE_MAX
];
uint16_t
nb_rbs_allowed_slice
[
MAX_NUM_CCs
][
MAX_NUM_SLICES
];
uint16_t
nb_rbs_allowed_slice
[
MAX_NUM_CCs
][
MAX_NUM_SLICES
];
...
@@ -1027,11 +1028,11 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
...
@@ -1027,11 +1028,11 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
int
N_RBG
[
MAX_NUM_CCs
];
int
N_RBG
[
MAX_NUM_CCs
];
unsigned
char
aggregation
;
unsigned
char
aggregation
;
mac_rlc_status_resp_t
rlc_status
;
mac_rlc_status_resp_t
rlc_status
;
unsigned
char
header_len
=
0
,
ta_len
=
0
;
unsigned
char
header_len
=
0
,
header_len_last
=
0
,
ta_len
=
0
;
uint16_t
nb_rb
,
nb_rb_temp
,
total_nb_available_rb
[
MAX_NUM_CCs
],
nb_available_rb
;
uint16_t
nb_rb
,
nb_rb_temp
,
total_nb_available_rb
[
MAX_NUM_CCs
],
nb_available_rb
;
uint16_t
TBS
,
j
,
rnti
;
uint16_t
TBS
,
j
,
rnti
;
u
nsigned
char
round
=
0
;
u
int8_t
round
=
0
;
u
nsigned
char
harq_pid
=
0
;
u
int8_t
harq_pid
=
0
;
uint16_t
sdu_length_total
=
0
;
uint16_t
sdu_length_total
=
0
;
int
mcs
,
mcs_tmp
;
int
mcs
,
mcs_tmp
;
uint16_t
min_rb_unit
[
MAX_NUM_CCs
];
uint16_t
min_rb_unit
[
MAX_NUM_CCs
];
...
@@ -1043,6 +1044,7 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
...
@@ -1043,6 +1044,7 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
static
int32_t
tpc_accumulated
=
0
;
static
int32_t
tpc_accumulated
=
0
;
UE_sched_ctrl
*
ue_sched_ctl
;
UE_sched_ctrl
*
ue_sched_ctl
;
LTE_eNB_UE_stats
*
eNB_UE_stats
=
NULL
;
Protocol__FlexDlData
*
dl_data
[
NUM_MAX_UE
];
Protocol__FlexDlData
*
dl_data
[
NUM_MAX_UE
];
int
num_ues_added
=
0
;
int
num_ues_added
=
0
;
int
channels_added
=
0
;
int
channels_added
=
0
;
...
@@ -1068,7 +1070,7 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
...
@@ -1068,7 +1070,7 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_SCHEDULE_DLSCH
,
VCD_FUNCTION_IN
);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_SCHEDULE_DLSCH
,
VCD_FUNCTION_IN
);
//weight = get_ue_weight(module_idP,UE_id);
//weight = get_ue_weight(module_idP,UE_id);
aggregation
=
2
;
// set to the maximum aggregation level
aggregation
=
1
;
// set to the maximum aggregation level
for
(
CC_id
=
0
;
CC_id
<
MAX_NUM_CCs
;
CC_id
++
)
{
for
(
CC_id
=
0
;
CC_id
<
MAX_NUM_CCs
;
CC_id
++
)
{
min_rb_unit
[
CC_id
]
=
get_min_rb_unit
(
mod_id
,
CC_id
);
min_rb_unit
[
CC_id
]
=
get_min_rb_unit
(
mod_id
,
CC_id
);
...
@@ -1125,8 +1127,11 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
...
@@ -1125,8 +1127,11 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
continue
;
continue
;
}
}
if
((
ue_sched_ctl
->
pre_nb_available_rbs
[
CC_id
]
==
0
)
||
// no RBs allocated
if
((
ue_sched_ctl
->
pre_nb_available_rbs
[
CC_id
]
==
0
)
)
{
CCE_allocation_infeasible
(
mod_id
,
CC_id
,
0
,
subframe
,
aggregation
,
rnti
))
{
continue
;
}
if
(
CCE_allocation_infeasible
(
mod_id
,
CC_id
,
0
,
subframe
,
aggregation
,
rnti
))
{
LOG_D
(
MAC
,
"[eNB %d] Frame %d : no RB allocated for UE %d on CC_id %d: continue
\n
"
,
LOG_D
(
MAC
,
"[eNB %d] Frame %d : no RB allocated for UE %d on CC_id %d: continue
\n
"
,
mod_id
,
frame
,
UE_id
,
CC_id
);
mod_id
,
frame
,
UE_id
,
CC_id
);
//if(mac_xface->get_transmission_mode(module_idP,rnti)==5)
//if(mac_xface->get_transmission_mode(module_idP,rnti)==5)
...
@@ -1160,6 +1165,7 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
...
@@ -1160,6 +1165,7 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
flexran_get_harq
(
mod_id
,
CC_id
,
UE_id
,
frame
,
subframe
,
&
harq_pid
,
&
round
);
flexran_get_harq
(
mod_id
,
CC_id
,
UE_id
,
frame
,
subframe
,
&
harq_pid
,
&
round
);
sdu_length_total
=
0
;
sdu_length_total
=
0
;
mcs
=
cqi_to_mcs
[
flexran_get_ue_wcqi
(
mod_id
,
UE_id
)];
mcs
=
cqi_to_mcs
[
flexran_get_ue_wcqi
(
mod_id
,
UE_id
)];
// LOG_I(FLEXRAN_AGENT, "The MCS is %d\n", mcs);
mcs
=
cmin
(
mcs
,
flexran_slice_maxmcs
(
slice_id
));
mcs
=
cmin
(
mcs
,
flexran_slice_maxmcs
(
slice_id
));
#ifdef EXMIMO
#ifdef EXMIMO
...
@@ -1192,9 +1198,10 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
...
@@ -1192,9 +1198,10 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
dl_dci
->
harq_process
=
harq_pid
;
dl_dci
->
harq_process
=
harq_pid
;
/* process retransmission */
/* process retransmission */
if
(
round
>
0
)
{
if
(
round
>
0
)
{
LOG_D
(
FLEXRAN_AGENT
,
"There was a retransmission just now and the round was %d
\n
"
,
round
);
if
(
flexran_get_duplex_mode
(
mod_id
,
CC_id
)
==
PROTOCOL__FLEX_DUPLEX_MODE__FLDM_TDD
)
{
if
(
flexran_get_duplex_mode
(
mod_id
,
CC_id
)
==
PROTOCOL__FLEX_DUPLEX_MODE__FLDM_TDD
)
{
UE_list
->
UE_template
[
CC_id
][
UE_id
].
DAI
++
;
UE_list
->
UE_template
[
CC_id
][
UE_id
].
DAI
++
;
update_ul_dci
(
mod_id
,
CC_id
,
rnti
,
UE_list
->
UE_template
[
CC_id
][
UE_id
].
DAI
);
update_ul_dci
(
mod_id
,
CC_id
,
rnti
,
UE_list
->
UE_template
[
CC_id
][
UE_id
].
DAI
);
...
@@ -1267,6 +1274,7 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
...
@@ -1267,6 +1274,7 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
//TBS = mac_xface->get_TBS(eNB_UE_stats->DL_cqi[0]<<1,nb_available_rb);
//TBS = mac_xface->get_TBS(eNB_UE_stats->DL_cqi[0]<<1,nb_available_rb);
TBS
=
mac_xface
->
get_TBS_DL
(
mcs
,
nb_available_rb
);
TBS
=
mac_xface
->
get_TBS_DL
(
mcs
,
nb_available_rb
);
dci_tbs
=
TBS
;
dci_tbs
=
TBS
;
LOG_D
(
FLEXRAN_AGENT
,
"TBS is %d
\n
"
,
TBS
);
// check first for RLC data on DCCH
// check first for RLC data on DCCH
// add the length for all the control elements (timing adv, drx, etc) : header + payload
// add the length for all the control elements (timing adv, drx, etc) : header + payload
...
@@ -1274,7 +1282,7 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
...
@@ -1274,7 +1282,7 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
ta_len
=
(
ue_sched_ctl
->
ta_update
!=
0
)
?
2
:
0
;
ta_len
=
(
ue_sched_ctl
->
ta_update
!=
0
)
?
2
:
0
;
dl_data
[
num_ues_added
]
->
n_ce_bitmap
=
2
;
dl_data
[
num_ues_added
]
->
n_ce_bitmap
=
2
;
dl_data
[
num_ues_added
]
->
ce_bitmap
=
(
uint32_t
*
)
malloc
(
sizeof
(
uint32_t
)
*
2
);
dl_data
[
num_ues_added
]
->
ce_bitmap
=
(
uint32_t
*
)
calloc
(
2
,
sizeof
(
uint32_t
)
);
if
(
ta_len
>
0
)
{
if
(
ta_len
>
0
)
{
ce_flags
|=
PROTOCOL__FLEX_CE_TYPE__FLPCET_TA
;
ce_flags
|=
PROTOCOL__FLEX_CE_TYPE__FLPCET_TA
;
...
@@ -1288,9 +1296,11 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
...
@@ -1288,9 +1296,11 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
// TODO : Need to prioritize DRBs
// TODO : Need to prioritize DRBs
// Loop through the UE logical channels (DCCH, DCCH1, DTCH for now)
// Loop through the UE logical channels (DCCH, DCCH1, DTCH for now)
header_len
=
0
;
header_len_last
=
0
;
sdu_length_total
=
0
;
for
(
j
=
1
;
j
<
NB_RB_MAX
;
j
++
)
{
for
(
j
=
1
;
j
<
NB_RB_MAX
;
j
++
)
{
header_len
+=
3
;
header_len
+=
3
;
// Need to see if we have space for data from this channel
// Need to see if we have space for data from this channel
if
(
dci_tbs
-
ta_len
-
header_len
-
sdu_length_total
>
0
)
{
if
(
dci_tbs
-
ta_len
-
header_len
-
sdu_length_total
>
0
)
{
LOG_D
(
MAC
,
"[TEST]Requested %d bytes from RLC buffer on channel %d during first call
\n
"
,
dci_tbs
-
ta_len
-
header_len
);
LOG_D
(
MAC
,
"[TEST]Requested %d bytes from RLC buffer on channel %d during first call
\n
"
,
dci_tbs
-
ta_len
-
header_len
);
...
@@ -1302,15 +1312,19 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
...
@@ -1302,15 +1312,19 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
ENB_FLAG_YES
,
ENB_FLAG_YES
,
MBMS_FLAG_NO
,
MBMS_FLAG_NO
,
j
,
j
,
(
dci_tbs
-
ta_len
-
header_len
));
// transport block set size
(
dci_tbs
-
ta_len
-
header_len
-
sdu_length_total
));
// transport block set size
//If data are available in channel j
//If data are available in channel j
if
(
rlc_status
.
bytes_in_buffer
>
0
)
{
if
(
rlc_status
.
bytes_in_buffer
>
0
)
{
LOG_D
(
MAC
,
"[TEST]Have %d bytes in DCCH buffer during first call
\n
"
,
rlc_status
.
bytes_in_buffer
);
LOG_D
(
MAC
,
"[TEST]Have %d bytes in DCCH buffer during first call
\n
"
,
rlc_status
.
bytes_in_buffer
);
//Fill in as much as possible
//Fill in as much as possible
data_to_request
=
cmin
(
dci_tbs
-
ta_len
-
header_len
,
rlc_status
.
bytes_in_buffer
);
data_to_request
=
cmin
(
dci_tbs
-
ta_len
-
header_len
-
sdu_length_total
,
rlc_status
.
bytes_in_buffer
);
LOG_D
(
FLEXRAN_AGENT
,
"Will request %d bytes from channel %d
\n
"
,
data_to_request
,
j
);
if
(
data_to_request
<
128
)
{
//The header will be one byte less
if
(
data_to_request
<
128
)
{
//The header will be one byte less
header_len
--
;
header_len
--
;
header_len_last
=
2
;
}
else
{
header_len_last
=
3
;
}
}
/* if (j == 1 || j == 2) {
/* if (j == 1 || j == 2) {
data_to_request+=0;
data_to_request+=0;
...
@@ -1350,18 +1364,30 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
...
@@ -1350,18 +1364,30 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
dl_data
[
num_ues_added
]
->
rlc_pdu
[
i
]
=
rlc_pdus
[
i
];
dl_data
[
num_ues_added
]
->
rlc_pdu
[
i
]
=
rlc_pdus
[
i
];
}
}
if
(
header_len
==
0
)
{
LOG_D
(
FLEXRAN_AGENT
,
"Header was empty
\n
"
);
header_len_last
=
0
;
}
// there is a payload
// there is a payload
if
((
dl_data
[
num_ues_added
]
->
n_rlc_pdu
>
0
))
{
if
((
dl_data
[
num_ues_added
]
->
n_rlc_pdu
>
0
))
{
// Now compute number of required RBs for total sdu length
// Now compute number of required RBs for total sdu length
// Assume RAH format 2
// Assume RAH format 2
// adjust header lengths
// adjust header lengths
LOG_D
(
FLEXRAN_AGENT
,
"We have %d bytes to transfer
\n
"
,
sdu_length_total
);
if
(
header_len
==
2
||
header_len
==
3
)
{
//Only one SDU, remove length field
if
(
header_len
!=
0
)
{
header_len
=
1
;
LOG_D
(
FLEXRAN_AGENT
,
"Header length was %d "
,
header_len
);
}
else
{
//Remove length field from the last SDU
header_len_last
--
;
header_len
--
;
header_len
-=
header_len_last
;
LOG_D
(
FLEXRAN_AGENT
,
"so we resized it to %d
\n
"
,
header_len
);
}
}
/* if (header_len == 2 || header_len == 3) { //Only one SDU, remove length field */
/* header_len = 1; */
/* } else { //Remove length field from the last SDU */
/* header_len--; */
/* } */
mcs_tmp
=
mcs
;
mcs_tmp
=
mcs
;
if
(
mcs_tmp
==
0
)
{
if
(
mcs_tmp
==
0
)
{
nb_rb
=
4
;
// don't let the TBS get too small
nb_rb
=
4
;
// don't let the TBS get too small
...
@@ -1434,6 +1460,7 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
...
@@ -1434,6 +1460,7 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
dci_tbs
=
TBS
;
dci_tbs
=
TBS
;
mcs
=
mcs_tmp
;
mcs
=
mcs_tmp
;
LOG_D
(
FLEXRAN_AGENT
,
"Final mcs was %d
\n
"
,
mcs
);
aggregation
=
process_ue_cqi
(
mod_id
,
UE_id
);
aggregation
=
process_ue_cqi
(
mod_id
,
UE_id
);
dl_dci
->
has_aggr_level
=
1
;
dl_dci
->
has_aggr_level
=
1
;
...
@@ -1450,8 +1477,11 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
...
@@ -1450,8 +1477,11 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
// do PUCCH power control
// do PUCCH power control
// this is the normalized RX power
// this is the normalized RX power
normalized_rx_power
=
flexran_get_p0_pucch_dbm
(
mod_id
,
UE_id
,
CC_id
);
//eNB_UE_stats->Po_PUCCH_dBm;
//normalized_rx_power = flexran_get_p0_pucch_dbm(mod_id,UE_id, CC_id); //eNB_UE_stats->Po_PUCCH_dBm;
target_rx_power
=
flexran_get_p0_nominal_pucch
(
mod_id
,
CC_id
)
+
10
;
//mac_xface->get_target_pucch_rx_power(mod_id, CC_id) + 10;
// target_rx_power = flexran_get_p0_nominal_pucch(mod_id, CC_id) + 10; //mac_xface->get_target_pucch_rx_power(mod_id, CC_id) + 10;
eNB_UE_stats
=
mac_xface
->
get_eNB_UE_stats
(
mod_id
,
CC_id
,
rnti
);
normalized_rx_power
=
eNB_UE_stats
->
Po_PUCCH_dBm
;
target_rx_power
=
mac_xface
->
get_target_pucch_rx_power
(
mod_id
,
CC_id
)
+
20
;
// this assumes accumulated tpc
// this assumes accumulated tpc
// make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out
// make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out
...
@@ -1459,8 +1489,9 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
...
@@ -1459,8 +1489,9 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
if
(((
framex10psubframe
+
10
)
<=
(
frame
*
10
+
subframe
))
||
//normal case
if
(((
framex10psubframe
+
10
)
<=
(
frame
*
10
+
subframe
))
||
//normal case
((
framex10psubframe
>
(
frame
*
10
+
subframe
))
&&
(((
10240
-
framex10psubframe
+
frame
*
10
+
subframe
)
>=
10
))))
//frame wrap-around
((
framex10psubframe
>
(
frame
*
10
+
subframe
))
&&
(((
10240
-
framex10psubframe
+
frame
*
10
+
subframe
)
>=
10
))))
//frame wrap-around
if
(
flexran_get_p0_pucch_status
(
mod_id
,
UE_id
,
CC_id
)
==
1
)
{
if
(
eNB_UE_stats
->
Po_PUCCH_update
==
1
){
//flexran_get_p0_pucch_status(mod_id, UE_id, CC_id) == 1) {
flexran_update_p0_pucch
(
mod_id
,
UE_id
,
CC_id
);
// flexran_update_p0_pucch(mod_id, UE_id, CC_id);
eNB_UE_stats
->
Po_PUCCH_update
=
0
;
UE_list
->
UE_template
[
CC_id
][
UE_id
].
pucch_tpc_tx_frame
=
frame
;
UE_list
->
UE_template
[
CC_id
][
UE_id
].
pucch_tpc_tx_frame
=
frame
;
UE_list
->
UE_template
[
CC_id
][
UE_id
].
pucch_tpc_tx_subframe
=
subframe
;
UE_list
->
UE_template
[
CC_id
][
UE_id
].
pucch_tpc_tx_subframe
=
subframe
;
...
...
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