Commit f87977b1 authored by francescomani's avatar francescomani

addressing review comments

parent 19295d0e
......@@ -344,11 +344,6 @@ typedef struct {
#define MAX_NR_OF_DL_ALLOCATIONS 16
#define MAX_NR_OF_UL_ALLOCATIONS (16)
typedef enum {
typeA = 0,
typeB = 1
} mappingType_t;
typedef enum {
pdsch_dmrs_pos0 = 0,
pdsch_dmrs_pos1 = 1,
......@@ -368,12 +363,7 @@ typedef enum {
pusch_dmrs_type1 = 0,
pusch_dmrs_type2 = 1
} pusch_dmrs_type_t;
typedef enum {
pusch_dmrs_pos0 = 0,
pusch_dmrs_pos1 = 1,
pusch_dmrs_pos2 = 2,
pusch_dmrs_pos3 = 3,
} pusch_dmrs_AdditionalPosition_t;
typedef enum {
pusch_len1 = 1,
pusch_len2 = 2
......
......@@ -85,31 +85,22 @@ nrUE_params_t *get_nrUE_params(void) {
int main(int argc, char **argv)
{
char c;
int i; //,j,l,aa;
int i;
double SNR, SNR_lin, snr0 = -2.0, snr1 = 2.0;
double snr_step = 0.1;
uint8_t snr1set = 0;
int **txdata;
double **s_re, **s_im, **r_re, **r_im;
// int sync_pos, sync_pos_slot;
// FILE *rx_frame_file;
FILE *output_fd = NULL;
//uint8_t write_output_file = 0;
// int subframe_offset;
// char fname[40], vname[40];
int trial, n_trials = 1, n_errors = 0, n_false_positive = 0;
uint8_t n_tx = 1, n_rx = 1;
//uint8_t transmission_mode = 1;
uint16_t Nid_cell = 0;
channel_desc_t *gNB2UE;
uint8_t extended_prefix_flag = 0;
//int8_t interf1 = -21, interf2 = -21;
FILE *input_fd = NULL, *pbch_file_fd = NULL;
//char input_val_str[50],input_val_str2[50];
//uint16_t NB_RB=25;
SCM_t channel_model = AWGN; //Rayleigh1_anticorr;
uint16_t N_RB_DL = 106, mu = 1;
//unsigned char frame_type = 0;
unsigned char pbch_phase = 0;
int frame = 0, slot = 0;
int frame_length_complex_samples;
......@@ -120,7 +111,6 @@ int main(int argc, char **argv)
double sigma;
unsigned char qbits = 8;
int ret;
//int run_initial_sync=0;
int loglvl = OAILOG_WARNING;
uint8_t dlsch_threads = 0;
float target_error_rate = 0.01;
......@@ -195,14 +185,6 @@ int main(int argc, char **argv)
break;
/*case 'i':
interf1 = atoi(optarg);
break;
case 'j':
interf2 = atoi(optarg);
break;*/
case 'n':
n_trials = atoi(optarg);
break;
......@@ -312,13 +294,10 @@ int main(int argc, char **argv)
gNBthreads[sizeof(gNBthreads)-1]=0;
break;
/*case 'x':
transmission_mode = atoi(optarg);
break;*/
default:
case 'h':
printf("%s -h(elp) -p(extended_prefix) -N cell_id -f output_filename -F input_filename -g channel_model -n n_frames -t Delayspread -s snr0 -S snr1 -x transmission_mode -y TXant -z RXant -i Intefrence0 -j Interference1 -A interpolation_file -C(alibration offset dB) -N CellId\n", argv[0]);
printf("%s -h(elp) -p(extended_prefix) -N cell_id -f output_filename -F input_filename -g channel_model -n n_frames -t Delayspread -s snr0 -S snr1 -y TXant -z RXant -i Intefrence0 -j Interference1 -A interpolation_file -C(alibration offset dB) -N CellId\n", argv[0]);
printf("-h This message\n");
printf("-p Use extended prefix mode\n");
printf("-V Enable VCD dumb functions\n");
......
......@@ -324,13 +324,12 @@ void nr_dlsim_preprocessor(module_id_t module_id,
current_BWP->mcsTableIdx = g_mcsTableIdx;
sched_pdsch->time_domain_allocation = get_dl_tda(RC.nrmac[module_id], scc, slot);
AssertFatal(sched_pdsch->time_domain_allocation>=0,"Unable to find PDSCH time domain allocation in list\n");
NR_pdsch_tda_info_t *tda_info = &sched_pdsch->tda_info;
nr_get_pdsch_tda_info(current_BWP, sched_pdsch->time_domain_allocation, tda_info);
set_dl_dmrs_params(&sched_pdsch->dmrs_parms,
scc,
sched_pdsch->tda_info = nr_get_pdsch_tda_info(current_BWP, sched_pdsch->time_domain_allocation);
sched_pdsch->dmrs_parms = get_dl_dmrs_params(scc,
current_BWP,
tda_info,
&sched_pdsch->tda_info,
sched_pdsch->nrOfLayers);
sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, current_BWP->mcsTableIdx);
......@@ -338,7 +337,7 @@ void nr_dlsim_preprocessor(module_id_t module_id,
sched_pdsch->tb_size = nr_compute_tbs(sched_pdsch->Qm,
sched_pdsch->R,
sched_pdsch->rbSize,
tda_info->nrOfSymbols,
sched_pdsch->tda_info.nrOfSymbols,
sched_pdsch->dmrs_parms.N_PRB_DMRS * sched_pdsch->dmrs_parms.N_DMRS_SLOT,
0 /* N_PRB_oh, 0 for initialBWP */,
0 /* tb_scaling */,
......
......@@ -3155,7 +3155,7 @@ int is_nr_UL_slot(NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon, sl
else return(slot_in_period >= slots1+tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSlots ? 1 : 0);
}
int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols, int startSymbol, int mappingtype, int length) {
int16_t fill_dmrs_mask(const NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols, int startSymbol, mappingType_t mappingtype, int length) {
int dmrs_AdditionalPosition = 0;
NR_DMRS_DownlinkConfig_t *dmrs_config = NULL;
......
......@@ -38,6 +38,18 @@
#include "openair1/PHY/impl_defs_nr.h"
#include "common/utils/nr/nr_common.h"
typedef enum {
pusch_dmrs_pos0 = 0,
pusch_dmrs_pos1 = 1,
pusch_dmrs_pos2 = 2,
pusch_dmrs_pos3 = 3,
} pusch_dmrs_AdditionalPosition_t;
typedef enum {
typeA = 0,
typeB = 1
} mappingType_t;
uint32_t get_Y(NR_SearchSpace_t *ss, int slot, rnti_t rnti);
uint8_t get_BG(uint32_t A, uint16_t R);
......@@ -46,7 +58,7 @@ uint64_t from_nrarfcn(int nr_bandP, uint8_t scs_index, uint32_t dl_nrarfcn);
uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint8_t scs_index, uint32_t bw);
int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol,int mappingtype_fromDCI,int length);
int16_t fill_dmrs_mask(const NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol,mappingType_t mappingtype,int length);
int is_nr_DL_slot(NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon,slot_t slotP);
......
......@@ -1159,10 +1159,8 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
// Calculate number of symbols
int time_domain_assignment = get_dl_tda(nr_mac, scc, slotP);
NR_pdsch_tda_info_t tda_info;
nr_get_pdsch_tda_info(dl_bwp,
time_domain_assignment,
&tda_info);
NR_tda_info_t tda_info = nr_get_pdsch_tda_info(dl_bwp,
time_domain_assignment);
NR_ControlResourceSet_t *coreset = ra->coreset;
......@@ -1242,9 +1240,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
const int pduindex = nr_mac->pdu_index[CC_id]++;
uint8_t mcsTableIdx = dl_bwp->mcsTableIdx;
NR_pdsch_dmrs_t dmrs_parms;
set_dl_dmrs_params(&dmrs_parms,
scc,
NR_pdsch_dmrs_t dmrs_parms = get_dl_dmrs_params(scc,
dl_bwp,
&tda_info,
1);
......@@ -1531,12 +1527,9 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
}
}
NR_pdsch_tda_info_t msg4_tda;
nr_get_pdsch_tda_info(dl_bwp, time_domain_assignment, &msg4_tda);
NR_tda_info_t msg4_tda = nr_get_pdsch_tda_info(dl_bwp, time_domain_assignment);
NR_pdsch_dmrs_t dmrs_info;
set_dl_dmrs_params(&dmrs_info,
scc,
NR_pdsch_dmrs_t dmrs_info = get_dl_dmrs_params(scc,
dl_bwp,
&msg4_tda,
1);
......
......@@ -282,7 +282,7 @@ uint32_t schedule_control_sib1(module_id_t module_id,
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
int time_domain_allocation,
NR_pdsch_dmrs_t *dmrs_parms,
NR_pdsch_tda_info_t *tda_info,
NR_tda_info_t *tda_info,
uint8_t candidate_idx,
uint16_t num_total_bytes) {
......@@ -580,14 +580,13 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
AssertFatal((startSymbolIndex+nrOfSymbols)<14,"SIB1 TDA %d would cause overlap with CSI-RS. Please select a different SIB1 TDA.\n",time_domain_allocation);
NR_pdsch_tda_info_t tda_info;
tda_info.mapping_type = is_typeA? typeA: typeB;
tda_info.startSymbolIndex = startSymbolIndex;
tda_info.nrOfSymbols = nrOfSymbols;
NR_tda_info_t tda_info = {
.mapping_type = is_typeA ? typeA : typeB,
.startSymbolIndex = startSymbolIndex,
.nrOfSymbols = nrOfSymbols
};
NR_pdsch_dmrs_t dmrs_parms;
set_dl_dmrs_params(&dmrs_parms,
scc,
NR_pdsch_dmrs_t dmrs_parms = get_dl_dmrs_params(scc,
NULL,
&tda_info,
1);
......
......@@ -410,7 +410,7 @@ bool allocate_dl_retransmission(module_id_t module_id,
if (tda == retInfo->time_domain_allocation &&
layers == retInfo->nrOfLayers) {
NR_pdsch_tda_info_t *tda_info = &retInfo->tda_info;
NR_tda_info_t *tda_info = &retInfo->tda_info;
/* Check that there are enough resources for retransmission */
while (rbSize < retInfo->rbSize) {
rbStart += rbSize; /* last iteration rbSize was not enough, skip it */
......@@ -433,11 +433,8 @@ bool allocate_dl_retransmission(module_id_t module_id,
} else {
/* the retransmission will use a different time domain allocation, check
* that we have enough resources */
NR_pdsch_tda_info_t temp_tda;
nr_get_pdsch_tda_info(dl_bwp, tda, &temp_tda);
NR_pdsch_dmrs_t temp_dmrs;
set_dl_dmrs_params(&temp_dmrs,
scc,
NR_tda_info_t temp_tda = nr_get_pdsch_tda_info(dl_bwp, tda);
NR_pdsch_dmrs_t temp_dmrs = get_dl_dmrs_params(scc,
dl_bwp,
&temp_tda,
layers);
......@@ -623,8 +620,7 @@ void pf_dl(module_id_t module_id,
else
sched_pdsch->mcs = get_mcs_from_bler(bo, stats, &sched_ctrl->dl_bler_stats, max_mcs, frame);
sched_pdsch->nrOfLayers = get_dl_nrOfLayers(sched_ctrl, current_BWP->dci_format);
sched_pdsch->pm_index = set_pm_index(UE,
sched_ctrl,
sched_pdsch->pm_index = get_pm_index(UE,
sched_pdsch->nrOfLayers,
mac->xp_pdsch_antenna_ports);
const uint8_t Qm = nr_get_Qm_dl(sched_pdsch->mcs, current_BWP->mcsTableIdx);
......@@ -728,9 +724,9 @@ void pf_dl(module_id_t module_id,
NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
sched_pdsch->time_domain_allocation = get_dl_tda(RC.nrmac[module_id], scc, slot);
AssertFatal(sched_pdsch->time_domain_allocation>=0,"Unable to find PDSCH time domain allocation in list\n");
NR_pdsch_tda_info_t *tda_info = &sched_pdsch->tda_info;
nr_get_pdsch_tda_info(dl_bwp, sched_pdsch->time_domain_allocation, tda_info);
sched_pdsch->tda_info = nr_get_pdsch_tda_info(dl_bwp, sched_pdsch->time_domain_allocation);
NR_tda_info_t *tda_info = &sched_pdsch->tda_info;
const uint16_t slbitmap = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
......@@ -743,8 +739,7 @@ void pf_dl(module_id_t module_id,
while (rbStart + max_rbSize < bwpSize && (rballoc_mask[rbStart + max_rbSize] & slbitmap) == slbitmap)
max_rbSize++;
set_dl_dmrs_params(&sched_pdsch->dmrs_parms,
scc,
sched_pdsch->dmrs_parms = get_dl_dmrs_params(scc,
dl_bwp,
tda_info,
sched_pdsch->nrOfLayers);
......@@ -929,7 +924,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
remove_nr_list(&sched_ctrl->retrans_dl_harq, current_harq_pid);
}
NR_pdsch_tda_info_t *tda_info = &sched_pdsch->tda_info;
NR_tda_info_t *tda_info = &sched_pdsch->tda_info;
NR_pdsch_dmrs_t *dmrs_parms = &sched_pdsch->dmrs_parms;
NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
DevAssert(!harq->is_waiting);
......
......@@ -197,8 +197,8 @@ void nr_preprocessor_phytest(module_id_t module_id,
const int CC_id = 0;
const int tda = get_dl_tda(RC.nrmac[module_id], scc, slot);
NR_pdsch_tda_info_t *tda_info = &sched_ctrl->sched_pdsch.tda_info;
nr_get_pdsch_tda_info(dl_bwp, tda, tda_info);
NR_tda_info_t tda_info = nr_get_pdsch_tda_info(dl_bwp, tda);
sched_ctrl->sched_pdsch.tda_info = tda_info;
sched_ctrl->sched_pdsch.time_domain_allocation = tda;
/* find largest unallocated chunk */
......@@ -214,12 +214,12 @@ void nr_preprocessor_phytest(module_id_t module_id,
while (true) {
/* advance to first free RB */
while (rbStart < bwpSize &&
(vrb_map[rbStart + BWPStart]&SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols)))
(vrb_map[rbStart + BWPStart]&SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols)))
rbStart++;
rbSize = 1;
/* iterate until we are at target_dl_bw or no available RBs */
while (rbStart + rbSize < bwpSize &&
!(vrb_map[rbStart + rbSize + BWPStart]&SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols)) &&
!(vrb_map[rbStart + rbSize + BWPStart]&SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols)) &&
rbSize < target_dl_bw)
rbSize++;
/* found target_dl_bw? */
......@@ -305,10 +305,9 @@ void nr_preprocessor_phytest(module_id_t module_id,
sched_pdsch->rbStart = rbStart;
sched_pdsch->rbSize = rbSize;
set_dl_dmrs_params(&sched_pdsch->dmrs_parms,
scc,
sched_pdsch->dmrs_parms = get_dl_dmrs_params(scc,
dl_bwp,
tda_info,
&tda_info,
target_dl_Nl);
sched_pdsch->mcs = target_dl_mcs;
......@@ -319,7 +318,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
sched_pdsch->tb_size = nr_compute_tbs(sched_pdsch->Qm,
sched_pdsch->R,
sched_pdsch->rbSize,
tda_info->nrOfSymbols,
tda_info.nrOfSymbols,
sched_pdsch->dmrs_parms.N_PRB_DMRS * sched_pdsch->dmrs_parms.N_DMRS_SLOT,
0 /* N_PRB_oh, 0 for initialBWP */,
0 /* tb_scaling */,
......@@ -331,7 +330,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
/* mark the corresponding RBs as used */
for (int rb = 0; rb < sched_pdsch->rbSize; rb++)
vrb_map[rb + sched_pdsch->rbStart + BWPStart] = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
vrb_map[rb + sched_pdsch->rbStart + BWPStart] = SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols);
if ((frame&127) == 0) LOG_D(MAC,"phytest: %d.%d DL mcs %d, DL rbStart %d, DL rbSize %d\n", frame, slot, sched_pdsch->mcs, rbStart,rbSize);
}
......@@ -393,13 +392,13 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
else
rbSize = target_ul_bw;
NR_pusch_tda_info_t *tda_info = &sched_ctrl->sched_pusch.tda_info;
nr_get_pusch_tda_info(ul_bwp, tda, tda_info);
NR_tda_info_t tda_info = nr_get_pusch_tda_info(ul_bwp, tda);
sched_ctrl->sched_pusch.tda_info = tda_info;
uint16_t *vrb_map_UL =
&RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[sched_slot * MAX_BWP_SIZE];
for (int i = rbStart; i < rbStart + rbSize; ++i) {
if ((vrb_map_UL[i+BWPStart] & SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols)) != 0) {
if ((vrb_map_UL[i+BWPStart] & SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols)) != 0) {
LOG_E(MAC,
"%s(): %4d.%2d RB %d is already reserved, cannot schedule UE\n",
__func__,
......@@ -460,18 +459,17 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
sched_pusch->Qm <<= 1;
}
NR_pusch_dmrs_t *dmrs = &sched_ctrl->sched_pusch.dmrs_info;
set_ul_dmrs_params(dmrs,
scc,
NR_pusch_dmrs_t dmrs = get_ul_dmrs_params(scc,
ul_bwp,
tda_info,
&tda_info,
sched_pusch->nrOfLayers);
sched_ctrl->sched_pusch.dmrs_info = dmrs;
sched_pusch->tb_size = nr_compute_tbs(sched_pusch->Qm,
sched_pusch->R,
sched_pusch->rbSize,
tda_info->nrOfSymbols,
dmrs->N_PRB_DMRS * dmrs->num_dmrs_symb,
tda_info.nrOfSymbols,
dmrs.N_PRB_DMRS * dmrs.num_dmrs_symb,
0, // nb_rb_oh
0,
sched_pusch->nrOfLayers /* NrOfLayers */)
......@@ -485,6 +483,6 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
sched_ctrl->aggregation_level);
for (int rb = rbStart; rb < rbStart + rbSize; rb++)
vrb_map_UL[rb+BWPStart] |= SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
vrb_map_UL[rb+BWPStart] |= SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols);
return true;
}
......@@ -53,12 +53,8 @@ const int get_ul_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon
return 0; // if FDD or not mixed slot in TDD, for now use default TDA (TODO handle CSI-RS slots)
}
int compute_bw_factor(int mu, int rb) {
// 38.213 7.1.1
return (10 * log10(rb << mu));
}
int compute_delta_tf(int tbs_bits,
int compute_ph_factor(int mu,
int tbs_bits,
int rb,
int n_layers,
int n_symbols,
......@@ -67,14 +63,18 @@ int compute_delta_tf(int tbs_bits,
// 38.213 7.1.1
// if the PUSCH transmission is over more than one layer delta_tf = 0
if(deltaMCS == NULL || n_layers>1)
return 0;
int delta_tf = 0;
if(deltaMCS != NULL && n_layers == 1) {
const int n_re = (NR_NB_SC_PER_RB * n_symbols - n_dmrs) * rb;
const int BPRE = tbs_bits/n_re; //TODO change for PUSCH with CSI
const float f = pow(2, (float) BPRE * 1.25);
const float beta = 1.0f; //TODO change for PUSCH with CSI
return(10 * log10((f - 1) * beta));
delta_tf = (10 * log10((f - 1) * beta));
}
const int bw_factor = 10 * log10(rb << mu);
return (delta_tf + bw_factor);
}
// For both UL-SCH except:
......@@ -244,8 +244,8 @@ int nr_process_mac_pdu(instance_t module_idP,
// in sched_ctrl we set normalized PH wrt MCS and PRBs
long *deltaMCS = ul_bwp->pusch_Config ? ul_bwp->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
sched_ctrl->ph = PH +
compute_bw_factor(sched_pusch->mu, sched_pusch->rbSize) +
compute_delta_tf(sched_pusch->tb_size<<3,
compute_ph_factor(sched_pusch->mu,
sched_pusch->tb_size<<3,
sched_pusch->rbSize,
sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols, //n_symbols
......@@ -260,6 +260,7 @@ int nr_process_mac_pdu(instance_t module_idP,
case UL_SCH_LCID_MULTI_ENTRY_PHR_1_OCT:
//38.321 section 6.1.3.9
// varialbe length
AssertFatal(1==0,"Multi entry PHR not supported\n");
if (!get_mac_len(pduP, pdu_len, &mac_len, &mac_subheader_len))
return 0;
/* Extract MULTI ENTRY PHR elements from single octet bitmap for PHR calculation */
......@@ -268,6 +269,7 @@ int nr_process_mac_pdu(instance_t module_idP,
case UL_SCH_LCID_MULTI_ENTRY_PHR_4_OCT:
//38.321 section 6.1.3.9
// varialbe length
AssertFatal(1==0,"Multi entry PHR not supported\n");
if (!get_mac_len(pduP, pdu_len, &mac_len, &mac_subheader_len))
return 0;
/* Extract MULTI ENTRY PHR elements from four octets bitmap for PHR calculation */
......@@ -918,8 +920,8 @@ void nr_ue_max_mcs_min_rb(int mu, int ph_limit, NR_sched_pusch_t *sched_pusch, N
update_ul_ue_R_Qm(*mcs, ul_bwp->mcs_table, ul_bwp->pusch_Config, &R, &Qm);
long *deltaMCS = ul_bwp->pusch_Config ? ul_bwp->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
int tx_power = compute_bw_factor(mu, *Rb) +
compute_delta_tf(tbs_bits,
int tx_power = compute_ph_factor(mu,
tbs_bits,
*Rb,
sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols,
......@@ -928,8 +930,8 @@ void nr_ue_max_mcs_min_rb(int mu, int ph_limit, NR_sched_pusch_t *sched_pusch, N
while (ph_limit < tx_power && *Rb >= minRb) {
(*Rb)--;
tx_power = compute_bw_factor(mu, *Rb) +
compute_delta_tf(tbs_bits,
tx_power = compute_ph_factor(mu,
tbs_bits,
*Rb,
sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols,
......@@ -940,8 +942,8 @@ void nr_ue_max_mcs_min_rb(int mu, int ph_limit, NR_sched_pusch_t *sched_pusch, N
while (ph_limit < tx_power && *mcs > 6) {
(*mcs)--;
update_ul_ue_R_Qm(*mcs, ul_bwp->mcs_table, ul_bwp->pusch_Config, &R, &Qm);
tx_power = compute_bw_factor(mu, *Rb) +
compute_delta_tf(tbs_bits,
tx_power = compute_ph_factor(mu,
tbs_bits,
*Rb,
sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols,
......@@ -988,11 +990,8 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac,
LOG_D(NR_MAC, "%s(): retransmission keeping TDA %d and TBS %d\n", __func__, tda, retInfo->tb_size);
} else {
NR_pusch_tda_info_t tda_info;
nr_get_pusch_tda_info(&UE->current_UL_BWP, tda, &tda_info);
NR_pusch_dmrs_t dmrs_info;
set_ul_dmrs_params(&dmrs_info,
scc,
NR_tda_info_t tda_info = nr_get_pusch_tda_info(&UE->current_UL_BWP, tda);
NR_pusch_dmrs_t dmrs_info = get_ul_dmrs_params(scc,
&UE->current_UL_BWP,
&tda_info,
nrOfLayers);
......@@ -1225,18 +1224,15 @@ void pf_ul(module_id_t module_id,
sched_pusch->nrOfLayers = 1;
sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_pusch->slot);
NR_pusch_tda_info_t *tda_info = &sched_pusch->tda_info;
nr_get_pusch_tda_info(current_BWP, sched_pusch->time_domain_allocation, tda_info);
NR_pusch_dmrs_t *dmrs = &sched_pusch->dmrs_info;
set_ul_dmrs_params(dmrs,
scc,
sched_pusch->tda_info = nr_get_pusch_tda_info(current_BWP, sched_pusch->time_domain_allocation);
sched_pusch->dmrs_info = get_ul_dmrs_params(scc,
current_BWP,
tda_info,
&sched_pusch->tda_info,
sched_pusch->nrOfLayers);
LOG_D(NR_MAC,"Looking for min_rb %d RBs, starting at %d num_dmrs_cdm_grps_no_data %d\n",
min_rb, rbStart, dmrs->num_dmrs_cdm_grps_no_data);
const uint16_t slbitmap = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
min_rb, rbStart, sched_pusch->dmrs_info.num_dmrs_cdm_grps_no_data);
const uint16_t slbitmap = SL_to_bitmap(sched_pusch->tda_info.startSymbolIndex, sched_pusch->tda_info.nrOfSymbols);
while (rbStart < bwpSize && (rballoc_mask[rbStart] & slbitmap) != slbitmap)
rbStart++;
if (rbStart + min_rb >= bwpSize) {
......@@ -1260,8 +1256,8 @@ void pf_ul(module_id_t module_id,
sched_pusch->tb_size = nr_compute_tbs(sched_pusch->Qm,
sched_pusch->R,
sched_pusch->rbSize,
tda_info->nrOfSymbols,
dmrs->N_PRB_DMRS * dmrs->num_dmrs_symb,
sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb,
0, // nb_rb_oh
0,
sched_pusch->nrOfLayers)
......@@ -1327,19 +1323,16 @@ void pf_ul(module_id_t module_id,
sched_pusch->nrOfLayers = 1;
sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_pusch->slot);
NR_pusch_tda_info_t *tda_info = &sched_pusch->tda_info;
nr_get_pusch_tda_info(current_BWP, sched_pusch->time_domain_allocation, tda_info);
NR_pusch_dmrs_t *dmrs = &sched_pusch->dmrs_info;
set_ul_dmrs_params(dmrs,
scc,
sched_pusch->tda_info = nr_get_pusch_tda_info(current_BWP, sched_pusch->time_domain_allocation);
sched_pusch->dmrs_info = get_ul_dmrs_params(scc,
current_BWP,
tda_info,
&sched_pusch->tda_info,
sched_pusch->nrOfLayers);
update_ul_ue_R_Qm(sched_pusch->mcs, current_BWP->mcs_table, current_BWP->pusch_Config, &sched_pusch->R, &sched_pusch->Qm);
int rbStart = 0;
const uint16_t slbitmap = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
const uint16_t slbitmap = SL_to_bitmap(sched_pusch->tda_info.startSymbolIndex, sched_pusch->tda_info.nrOfSymbols);
while (rbStart < bwpSize && (rballoc_mask[rbStart] & slbitmap) != slbitmap)
rbStart++;
sched_pusch->rbStart = rbStart;
......@@ -1372,8 +1365,8 @@ void pf_ul(module_id_t module_id,
nr_find_nb_rb(sched_pusch->Qm,
sched_pusch->R,
1, // layers
tda_info->nrOfSymbols,
dmrs->N_PRB_DMRS * dmrs->num_dmrs_symb,
sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb,
B,
min_rbSize,
max_rbSize,
......@@ -1383,7 +1376,8 @@ void pf_ul(module_id_t module_id,
sched_pusch->rbSize = rbSize;
sched_pusch->tb_size = TBS;
LOG_D(NR_MAC,"rbSize %d (max_rbSize %d), TBS %d, est buf %d, sched_ul %d, B %d, CCE %d, num_dmrs_symb %d, N_PRB_DMRS %d\n",
rbSize, max_rbSize,sched_pusch->tb_size, sched_ctrl->estimated_ul_buffer, sched_ctrl->sched_ul_bytes, B,sched_ctrl->cce_index,dmrs->num_dmrs_symb,dmrs->N_PRB_DMRS);
rbSize, max_rbSize,sched_pusch->tb_size, sched_ctrl->estimated_ul_buffer, sched_ctrl->sched_ul_bytes, B,
sched_ctrl->cce_index,sched_pusch->dmrs_info.num_dmrs_symb,sched_pusch->dmrs_info.N_PRB_DMRS);
/* Mark the corresponding RBs as used */
......
......@@ -88,7 +88,7 @@ uint32_t schedule_control_sib1(module_id_t module_id,
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
int time_domain_allocation,
NR_pdsch_dmrs_t *dmrs_parms,
NR_pdsch_tda_info_t *tda_info,
NR_tda_info_t *tda_info,
uint8_t candidate_idx,
uint16_t num_total_bytes);
......@@ -324,19 +324,16 @@ long get_K2(NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList,
int time_domain_assignment,
int mu);
void nr_get_pdsch_tda_info(const NR_UE_DL_BWP_t *dl_bwp,
int tda,
NR_pdsch_tda_info_t *tda_info);
NR_tda_info_t nr_get_pdsch_tda_info(const NR_UE_DL_BWP_t *dl_bwp,
const int tda);
void nr_get_pusch_tda_info(const NR_UE_UL_BWP_t *ul_bwp,
int tda,
NR_pusch_tda_info_t *tda_info);
NR_tda_info_t nr_get_pusch_tda_info(const NR_UE_UL_BWP_t *ul_bwp,
const int tda);
void set_ul_dmrs_params(NR_pusch_dmrs_t *dmrs,
const NR_ServingCellConfigCommon_t *scc,
NR_UE_UL_BWP_t *ul_bwp,
NR_pusch_tda_info_t *tda_info,
int Layers);
NR_pusch_dmrs_t get_ul_dmrs_params(const NR_ServingCellConfigCommon_t *scc,
const NR_UE_UL_BWP_t *ul_bwp,
const NR_tda_info_t *tda_info,
const int Layers);
uint8_t nr_get_tpc(int target, uint8_t cqi, int incr);
......@@ -460,20 +457,18 @@ int16_t ssb_index_from_prach(module_id_t module_idP,
void find_SSB_and_RO_available(module_id_t module_idP);
void set_dl_dmrs_params(NR_pdsch_dmrs_t *dmrs,
const NR_ServingCellConfigCommon_t *scc,
NR_UE_DL_BWP_t *BWP,
NR_pdsch_tda_info_t *tda_info,
int Layers);
NR_pdsch_dmrs_t get_dl_dmrs_params(const NR_ServingCellConfigCommon_t *scc,
const NR_UE_DL_BWP_t *BWP,
const NR_tda_info_t *tda_info,
const int Layers);
uint16_t set_pm_index(NR_UE_info_t *UE,
NR_UE_sched_ctrl_t *sched_ctrl,
uint16_t get_pm_index(const NR_UE_info_t *UE,
int layers,
int xp_pdsch_antenna_ports);
uint8_t get_mcs_from_cqi(int mcs_table, int cqi_table, int cqi_idx);
uint8_t get_dl_nrOfLayers(NR_UE_sched_ctrl_t *sched_ctrl, nr_dci_format_t dci_format);
uint8_t get_dl_nrOfLayers(const NR_UE_sched_ctrl_t *sched_ctrl, const nr_dci_format_t dci_format);
const int get_dl_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot);
const int get_ul_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot);
......
......@@ -373,11 +373,11 @@ typedef struct NR_sched_pucch {
int start_symb;
} NR_sched_pucch_t;
typedef struct NR_pusch_tda_info {
int mapping_type;
typedef struct NR_tda_info {
mappingType_t mapping_type;
int startSymbolIndex;
int nrOfSymbols;
} NR_pusch_tda_info_t;
} NR_tda_info_t;
typedef struct NR_pusch_dmrs {
uint8_t N_PRB_DMRS;
......@@ -409,9 +409,10 @@ typedef struct NR_sched_pusch {
int8_t ul_harq_pid;
uint8_t nrOfLayers;
// time_domain_allocation is the index of a list of tda
int time_domain_allocation;
NR_tda_info_t tda_info;
NR_pusch_dmrs_t dmrs_info;
NR_pusch_tda_info_t tda_info;
} NR_sched_pusch_t;
typedef struct NR_sched_srs {
......@@ -420,12 +421,6 @@ typedef struct NR_sched_srs {
bool srs_scheduled;
} NR_sched_srs_t;
typedef struct NR_pdsch_tda_info {
int mapping_type;
int startSymbolIndex;
int nrOfSymbols;
} NR_pdsch_tda_info_t;
typedef struct NR_pdsch_dmrs {
uint8_t dmrs_ports_id;
uint8_t N_PRB_DMRS;
......@@ -454,12 +449,13 @@ typedef struct NR_sched_pdsch {
// pucch format allocation
uint8_t pucch_allocation;
int time_domain_allocation;
uint16_t pm_index;
uint8_t nrOfLayers;
NR_pdsch_dmrs_t dmrs_parms;
NR_pdsch_tda_info_t tda_info;
// time_domain_allocation is the index of a list of tda
int time_domain_allocation;
NR_tda_info_t tda_info;
} NR_sched_pdsch_t;
typedef struct NR_UE_harq {
......
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