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Commit fa27f9ad authored by francescomani's avatar francescomani
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moving decision on DCI format type from L1 to MAC

parent 1cae1879
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Showing with 575 additions and 602 deletions
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
View file @ fa27f9ad
......@@ -55,6 +55,12 @@ typedef enum {
RLM_in_sync = 2
} rlm_t;
typedef enum {
NFAPI_NR_FORMAT_0_0_AND_1_0,
NFAPI_NR_FORMAT_0_1_AND_1_1,
} nfapi_nr_dci_formats_e;
typedef struct {
uint32_t rsrp;
int rsrp_dBm;
......@@ -94,7 +100,7 @@ typedef struct {
typedef struct {
uint16_t rnti;
uint8_t dci_format;
nfapi_nr_dci_formats_e dci_format;
uint8_t coreset_type;
int ss_type;
// n_CCE index of first CCE for PDCCH reception
......@@ -427,7 +433,7 @@ typedef struct {
// needs to monitor only upto 2 DCI lengths for a given search space.
uint8_t num_dci_options; // Num DCIs the UE actually needs to decode (1 or 2)
uint8_t dci_length_options[2];
uint8_t dci_format_options[2];
nfapi_nr_dci_formats_e dci_format_options[2];
uint8_t ss_type_options[2];
} fapi_nr_dl_config_dci_dl_pdu_rel15_t;
......
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
View file @ fa27f9ad
......@@ -43,15 +43,6 @@
#include "assertions.h"
#include "T.h"
static const char nr_dci_format_string[8][30] = {"NR_DL_DCI_FORMAT_1_0",
"NR_DL_DCI_FORMAT_1_1",
"NR_DL_DCI_FORMAT_2_0",
"NR_DL_DCI_FORMAT_2_1",
"NR_DL_DCI_FORMAT_2_2",
"NR_DL_DCI_FORMAT_2_3",
"NR_UL_DCI_FORMAT_0_0",
"NR_UL_DCI_FORMAT_0_1"};
//#define DEBUG_DCI_DECODING 1
//#define NR_PDCCH_DCI_DEBUG // activates NR_PDCCH_DCI_DEBUG logs
......@@ -699,24 +690,22 @@ static uint16_t nr_dci_false_detection(uint64_t *dci,
int rnti,
int8_t messageType,
uint16_t messageLength,
uint8_t aggregation_level
) {
uint8_t aggregation_level)
{
uint32_t encoder_output[NR_MAX_DCI_SIZE_DWORD];
polar_encoder_fast(dci, (void*)encoder_output, rnti, 1,
messageType, messageLength, aggregation_level);
polar_encoder_fast(dci, (void *)encoder_output, rnti, 1, messageType, messageLength, aggregation_level);
uint8_t *enout_p = (uint8_t*)encoder_output;
uint16_t x = 0;
for (int i=0; i<encoded_length/8; i++) {
x += ( enout_p[i] & 1 ) ^ ( ( soft_in[i*8] >> 15 ) & 1);
x += ( ( enout_p[i] >> 1 ) & 1 ) ^ ( ( soft_in[i*8+1] >> 15 ) & 1 );
x += ( ( enout_p[i] >> 2 ) & 1 ) ^ ( ( soft_in[i*8+2] >> 15 ) & 1 );
x += ( ( enout_p[i] >> 3 ) & 1 ) ^ ( ( soft_in[i*8+3] >> 15 ) & 1 );
x += ( ( enout_p[i] >> 4 ) & 1 ) ^ ( ( soft_in[i*8+4] >> 15 ) & 1 );
x += ( ( enout_p[i] >> 5 ) & 1 ) ^ ( ( soft_in[i*8+5] >> 15 ) & 1 );
x += ( ( enout_p[i] >> 6 ) & 1 ) ^ ( ( soft_in[i*8+6] >> 15 ) & 1 );
x += ( ( enout_p[i] >> 7 ) & 1 ) ^ ( ( soft_in[i*8+7] >> 15 ) & 1 );
x += (enout_p[i] & 1) ^ ((soft_in[i * 8] >> 15) & 1);
x += ((enout_p[i] >> 1) & 1) ^ ((soft_in[i * 8 + 1] >> 15) & 1);
x += ((enout_p[i] >> 2) & 1) ^ ((soft_in[i * 8 + 2] >> 15) & 1);
x += ((enout_p[i] >> 3) & 1) ^ ((soft_in[i * 8 + 3] >> 15) & 1);
x += ((enout_p[i] >> 4) & 1) ^ ((soft_in[i * 8 + 4] >> 15) & 1);
x += ((enout_p[i] >> 5) & 1) ^ ((soft_in[i * 8 + 5] >> 15) & 1);
x += ((enout_p[i] >> 6) & 1) ^ ((soft_in[i * 8 + 6] >> 15) & 1);
x += ((enout_p[i] >> 7) & 1) ^ ((soft_in[i * 8 + 7] >> 15) & 1);
}
return x;
}
......@@ -730,7 +719,7 @@ void nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
int e_rx_cand_idx = 0;
*dci_ind = (fapi_nr_dci_indication_t){.SFN = proc->frame_rx, .slot = proc->nr_slot_rx};
for (int j=0;j<rel15->number_of_candidates;j++) {
for (int j = 0; j < rel15->number_of_candidates; j++) {
int CCEind = rel15->CCE[j];
int L = rel15->L[j];
......@@ -751,7 +740,7 @@ void nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
uint64_t dci_estimation[2]= {0};
LOG_D(NR_PHY_DCI,
"(%i.%i) Trying DCI candidate %d of %d number of candidates, CCE %d (%d), L %d, length %d, format %s\n",
"(%i.%i) Trying DCI candidate %d of %d number of candidates, CCE %d (%d), L %d, length %d, format %d\n",
proc->frame_rx,
proc->nr_slot_rx,
j,
......@@ -760,31 +749,31 @@ void nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
e_rx_cand_idx,
L,
dci_length,
nr_dci_format_string[rel15->dci_format_options[k]]);
rel15->dci_format_options[k]);
int16_t tmp_e[16 * 108];
nr_pdcch_unscrambling(&pdcch_e_rx[e_rx_cand_idx], rel15->coreset.scrambling_rnti, L*108, rel15->coreset.pdcch_dmrs_scrambling_id, tmp_e);
// this polar version decodes 64 bits max, dci_estimation[1] will never be filled
uint16_t crc = polar_decoder_int16(tmp_e,
dci_estimation,
1,
NR_POLAR_DCI_MESSAGE_TYPE, dci_length, L);
nr_pdcch_unscrambling(&pdcch_e_rx[e_rx_cand_idx],
rel15->coreset.scrambling_rnti,
L * 108,
rel15->coreset.pdcch_dmrs_scrambling_id,
tmp_e);
uint16_t crc = polar_decoder_int16(tmp_e, dci_estimation, 1, NR_POLAR_DCI_MESSAGE_TYPE, dci_length, L);
rnti_t n_rnti = rel15->rnti;
if (crc == n_rnti) {
LOG_D(NR_PHY_DCI,
"(%i.%i) dci indication (rnti %x,dci format %s,n_CCE %d,payloadSize %d,payload %lx, is rnti: %d )\n",
"(%i.%i) Received dci indication (rnti %x,dci format %d,n_CCE %d,payloadSize %d,payload %llx)\n",
proc->frame_rx,
proc->nr_slot_rx,
n_rnti,
nr_dci_format_string[rel15->dci_format_options[k]],
rel15->dci_format_options[k],
CCEind,
dci_length,
dci_estimation[0],
crc == n_rnti);
if (crc == n_rnti) {
uint16_t mb = nr_dci_false_detection(dci_estimation,tmp_e,L*108,n_rnti, NR_POLAR_DCI_MESSAGE_TYPE, dci_length, L);
*(unsigned long long *)dci_estimation);
uint16_t mb = nr_dci_false_detection(dci_estimation, tmp_e, L * 108, n_rnti, NR_POLAR_DCI_MESSAGE_TYPE, dci_length, L);
ue->dci_thres = (ue->dci_thres + mb) / 2;
if (mb > (ue->dci_thres+30)) {
if (mb > (ue->dci_thres + 30)) {
LOG_W(NR_PHY_DCI,
"DCI false positive. Dropping DCI index %d. Mismatched bits: %d/%d. Current DCI threshold: %d\n",
j,
......
openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h
View file @ fa27f9ad
......@@ -39,8 +39,6 @@
extern const uint8_t nr_slots_per_frame[5];
extern dci_pdu_rel15_t *def_dci_pdu_rel15;
/* Scheduler */
extern RAN_CONTEXT_t RC;
extern uint8_t nfapi_mode;
......
openair2/LAYER2/NR_MAC_UE/mac_extern.h
View file @ fa27f9ad
......@@ -66,8 +66,6 @@ extern const uint8_t table_7_3_2_3_3_4_twoCodeword[6][14];
extern const uint16_t table_7_2_1[16];
extern dci_pdu_rel15_t *def_dci_pdu_rel15;
extern void mac_rlc_data_ind(const module_id_t module_idP,
const rnti_t rntiP,
const eNB_index_t eNB_index,
......
openair2/LAYER2/NR_MAC_UE/mac_proto.h
View file @ fa27f9ad
......@@ -120,18 +120,8 @@ subframe number \param[in] slotP slot number
*/
int8_t nr_ue_get_SR(NR_UE_MAC_INST_t *mac, frame_t frameP, slot_t slotP);
int8_t nr_ue_process_dci(NR_UE_MAC_INST_t *mac,
int cc_id,
frame_t frame,
int slot,
dci_pdu_rel15_t *dci,
fapi_nr_dci_indication_pdu_t *dci_ind);
int nr_ue_process_dci_indication_pdu(NR_UE_MAC_INST_t *mac,
int cc_id,
int gNB_index,
frame_t frame,
int slot,
fapi_nr_dci_indication_pdu_t *dci);
nr_dci_format_t nr_ue_process_dci_indication_pdu(NR_UE_MAC_INST_t *mac, frame_t frame, int slot, fapi_nr_dci_indication_pdu_t *dci);
int8_t nr_ue_process_csirs_measurements(NR_UE_MAC_INST_t *mac,
frame_t frame,
int slot,
......
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
View file @ fa27f9ad
......@@ -107,7 +107,6 @@ NR_ControlResourceSet_t *ue_get_coreset(const NR_BWP_PDCCH_t *config, const int
return coreset;
}
void config_dci_pdu(NR_UE_MAC_INST_t *mac,
fapi_nr_dl_config_request_t *dl_config,
const int rnti_type,
......@@ -160,36 +159,40 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac,
rel15->coreset.pdcch_dmrs_scrambling_id = mac->physCellId;
}
rel15->num_dci_options = (mac->ra.ra_state == nrRA_WAIT_RAR || rnti_type == TYPE_SI_RNTI_) ? 1 : 2;
int temp_num_dci_options = (mac->ra.ra_state == nrRA_WAIT_RAR || rnti_type == TYPE_SI_RNTI_) ? 1 : 2;
int dci_format[2] = {0};
if (ss->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_ue_Specific) {
if (ss->searchSpaceType->choice.ue_Specific->dci_Formats ==
NR_SearchSpace__searchSpaceType__ue_Specific__dci_Formats_formats0_0_And_1_0) {
rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0;
rel15->dci_format_options[1] = NR_UL_DCI_FORMAT_0_0;
dci_format[0] = NR_DL_DCI_FORMAT_1_0;
dci_format[1] = NR_UL_DCI_FORMAT_0_0;
}
else {
rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_1;
rel15->dci_format_options[1] = NR_UL_DCI_FORMAT_0_1;
dci_format[0] = NR_DL_DCI_FORMAT_1_1;
dci_format[1] = NR_UL_DCI_FORMAT_0_1;
}
}
else { // common
AssertFatal(ss->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0,
"Only supporting format 10 and 00 for common SS\n");
rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0;
rel15->dci_format_options[1] = NR_UL_DCI_FORMAT_0_0;
dci_format[0] = NR_DL_DCI_FORMAT_1_0;
dci_format[1] = NR_UL_DCI_FORMAT_0_0;
}
NR_UE_ServingCell_Info_t *sc_info = &mac->sc_info;
// loop over RNTI type and configure resource allocation for DCI
for (int i = 0; i < rel15->num_dci_options; i++) {
// loop over DCI options and configure resource allocation
// need to configure mac->def_dci_pdu_rel15 for all possible format options
for (int i = 0; i < temp_num_dci_options; i++) {
rel15->ss_type_options[i] = ss->searchSpaceType->present;
const int dci_format = rel15->dci_format_options[i];
if (dci_format[i] == NR_DL_DCI_FORMAT_1_0 || dci_format[i] == NR_UL_DCI_FORMAT_0_0)
rel15->dci_format_options[i] = NFAPI_NR_FORMAT_0_0_AND_1_0;
else
rel15->dci_format_options[i] = NFAPI_NR_FORMAT_0_1_AND_1_1;
uint16_t alt_size = 0;
if(current_DL_BWP) {
// computing alternative size for padding
// computing alternative size for padding or truncation
dci_pdu_rel15_t temp_pdu;
if(dci_format == NR_DL_DCI_FORMAT_1_0)
if (dci_format[i] == NR_DL_DCI_FORMAT_1_0)
alt_size = nr_dci_size(current_DL_BWP,
current_UL_BWP,
sc_info,
......@@ -202,7 +205,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac,
ss->searchSpaceType->present,
mac->type0_PDCCH_CSS_config.num_rbs,
0);
if(dci_format == NR_UL_DCI_FORMAT_0_0)
if (dci_format[i] == NR_UL_DCI_FORMAT_0_0)
alt_size = nr_dci_size(current_DL_BWP,
current_UL_BWP,
sc_info,
......@@ -221,8 +224,8 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac,
current_UL_BWP,
sc_info,
mac->pdsch_HARQ_ACK_Codebook,
&mac->def_dci_pdu_rel15[dl_config->slot][dci_format],
dci_format,
&mac->def_dci_pdu_rel15[dl_config->slot][dci_format[i]],
dci_format[i],
rnti_type,
coreset,
dl_bwp_id,
......@@ -234,6 +237,13 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac,
rel15->dci_length_options[i] = dci_size;
}
// DCI 0_0 and 1_0 are same size, L1 just needs to look for 1 option
// L2 decides format based on format indicator in payload
if (rel15->dci_format_options[0] == NFAPI_NR_FORMAT_0_0_AND_1_0)
rel15->num_dci_options = 1;
else
rel15->num_dci_options = 2;
rel15->BWPStart = coreset_id == 0 ? mac->type0_PDCCH_CSS_config.cset_start_rb : current_DL_BWP->BWPStart;
rel15->BWPSize = coreset_id == 0 ? mac->type0_PDCCH_CSS_config.num_rbs : current_DL_BWP->BWPSize;
......
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
View file @ fa27f9ad
......@@ -1059,14 +1059,9 @@ static int handle_bcch_dlsch(NR_UE_MAC_INST_t *mac,
}
// L2 Abstraction Layer
static int handle_dci(NR_UE_MAC_INST_t *mac,
int cc_id,
unsigned int gNB_index,
frame_t frame,
int slot,
fapi_nr_dci_indication_pdu_t *dci)
static nr_dci_format_t handle_dci(NR_UE_MAC_INST_t *mac, frame_t frame, int slot, fapi_nr_dci_indication_pdu_t *dci)
{
return nr_ue_process_dci_indication_pdu(mac, cc_id, gNB_index, frame, slot, dci);
return nr_ue_process_dci_indication_pdu(mac, frame, slot, dci);
}
static void handle_ssb_meas(NR_UE_MAC_INST_t *mac, uint8_t ssb_index, int16_t rsrp_dbm)
......@@ -1160,26 +1155,18 @@ static uint32_t nr_ue_dl_processing(nr_downlink_indication_t *dl_info)
LOG_T(MAC, "[L2][IF MODULE][DL INDICATION][DCI_IND]\n");
for (int i = 0; i < dl_info->dci_ind->number_of_dcis; i++) {
LOG_T(MAC, ">>>NR_IF_Module i=%d, dl_info->dci_ind->number_of_dcis=%d\n", i, dl_info->dci_ind->number_of_dcis);
int8_t ret = handle_dci(mac,
dl_info->cc_id,
dl_info->gNB_index,
dl_info->frame,
dl_info->slot,
dl_info->dci_ind->dci_list + i);
if (ret < 0)
continue;
fapi_nr_dci_indication_pdu_t *dci_index = dl_info->dci_ind->dci_list + i;
nr_dci_format_t dci_format = handle_dci(mac, dl_info->frame, dl_info->slot, dl_info->dci_ind->dci_list + i);
/* The check below filters out UL_DCIs which are being processed as DL_DCIs. */
if (dci_index->dci_format != NR_DL_DCI_FORMAT_1_0 && dci_index->dci_format != NR_DL_DCI_FORMAT_1_1) {
if (dci_format != NR_DL_DCI_FORMAT_1_0 && dci_format != NR_DL_DCI_FORMAT_1_1) {
LOG_D(NR_MAC, "We are filtering a UL_DCI to prevent it from being treated like a DL_DCI\n");
continue;
}
dci_pdu_rel15_t *def_dci_pdu_rel15 = &mac->def_dci_pdu_rel15[dl_info->slot][dci_index->dci_format];
dci_pdu_rel15_t *def_dci_pdu_rel15 = &mac->def_dci_pdu_rel15[dl_info->slot][dci_format];
g_harq_pid = def_dci_pdu_rel15->harq_pid;
LOG_T(NR_MAC, "Setting harq_pid = %d and dci_index = %d (based on format)\n", g_harq_pid, dci_index->dci_format);
LOG_T(NR_MAC, "Setting harq_pid = %d and dci_index = %d (based on format)\n", g_harq_pid, dci_format);
ret_mask |= (ret << FAPI_NR_DCI_IND);
ret_mask |= (1 << FAPI_NR_DCI_IND);
AssertFatal(nr_ue_if_module_inst[dl_info->module_id] != NULL, "IF module is NULL!\n");
fapi_nr_dl_config_request_t *dl_config = get_dl_config_request(mac, dl_info->slot);
nr_scheduled_response_t scheduled_response = {.dl_config = dl_config,
......
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