Commit 361446fd authored by cig's avatar cig

Consolidation of TA updates changes in the noS1 mode:

- merged nr-schedule_ue_spec into nr_schedule_uss_dlsch_phytest
- enabled nr_ue_send_sdu for S1 mode
- increased ta_timer to 100
- restored NR_UPLINK_SLOT to 2 (as it was in develop-nr)
- fixed logic for S1 and noS1 modes
- code cleanup and formatting
parent 98d2caf5
develop 1 128-ues 256_QAM_demod 459-pusch-based-ta-updates LTE_TRX_on_single_port NCTU_CS_ISIP NCTU_CS_ISIP_CPU NCTU_CS_ISIP_GPU NCTU_OpinConnect_LDPC NR-PHY-MAC-IF-multi-UE NRUE_usedlschparallel NR_10MHz NR_CSI_reporting NR_DCI_01 NR_DLUL_PF NR_DLUL_PF_4UL NR_DLUL_PF_rebased NR_DL_MIMO NR_DL_sched_fixes NR_DL_scheduler NR_FAPI_beamindex_SSB_RO NR_FDD_FIX NR_FR2_RA NR_FR2_RRC_SSB NR_MAC_CE_GlobalEdge NR_MAC_Multi_Rach_GlobalEdge NR_MAC_SSB_RO_GlobalEdge NR_MAC_SSB_RO_UE_IDCC NR_MAC_SSB_RO_merge NR_MAC_TCI_UCI_GlobalEdge NR_NGAP NR_PDCP_noS1 NR_PUCCH_MultiUE NR_RA_cleanup NR_RA_updates NR_RRCConfiguration NR_RRCConfiguration_FR2 NR_RRCConfiguration_S1U NR_RRCConfiguration_merge_develop NR_RRCConfiguration_sync_source NR_RRCConfiguration_trx_thread NR_RRC_CP_bugfix NR_RRC_PDCP NR_RRC_PRACH_procedures NR_RRC_PRACH_procedures_todevelop NR_RRC_TA NR_RRC_X2AP_AMBR_Change_Global_edge NR_RRC_X2AP_RemoveHardcodings_GlobalEdge NR_RRC_config_simplified NR_RRC_harq NR_RRC_harq_b NR_RRC_harq_hacks NR_RRC_harq_newdcipdu NR_SA_F1AP_RFSIMULATOR NR_SA_F1AP_RFSIMULATOR2 NR_SA_F1AP_dev NR_SA_NGAP_RRC NR_SA_NGAP_RRC_wk42 NR_SA_itti_sim_wk48 NR_SA_itti_sim_wk48_hs NR_SA_itti_sim_wk48_hs1 NR_SCHED NR_SCHED_HARQ NR_SCHED_PDCCH_PUCCH_HARQ NR_SCHED_PDCCH_PUCCH_HARQ_rebased NR_SCHED_fixes NR_SRB_Config NR_TRX_on_single_port NR_TRX_on_single_port2 NR_UE_MAC_scheduler NR_UE_RA_fixes NR_UE_UL_DCI_improvements NR_UE_dlsch_bugfix NR_UE_enable_parallelization NR_UE_stability_fixes NR_UL_FAPI_programming NR_UL_scheduler NR_UL_scheduler_rebased NR_UL_scheduling NR_Wireshark NR_beam_simulation NR_gNB_SCF_Indication NR_ipaccess_testing NR_mac_uci_functions_rework NR_msg2_phytest NR_scheduling_CSIRS NR_scheduling_request NR_scheduling_request2 NR_scheduling_request3 NR_test_S1U_RRC_PRACH_procedures NR_ue_dlsch_dmrs_cdm PUSCH_TA_update RA_CI_test UE_DL_DCI_hotfix bch-fixes-bitmap benetel_5g_prach_fix benetel_driver_uldl_pf_merge benetel_driver_update benetel_phase_rotation benetel_phase_rotation_old bugfix-minor-remove-wrong-log bugfix-nr-bands bugfix-nr-ldpc-post-processing bugfix-nr-ldpc-size-typo bugfix-nr-pdcp-sn-size bugfix-nr-rate-matching-assertion bugfix-x2-SgNBAdditionRequest bupt-sa-merge cce_indexing_fix cce_indexing_fix2 ci-deploy-asterix ci-deploy-docker-compose ci-rd-july-improvements ci-test ci-ul-iperf-from-trf-container clean-5G-scope-round2 cleanup_softmodem_main constant_power debug_branch_init_sync develop-SA-RA develop-SnT develop-oriecpriupdates develop-sib1 develop-sib1-local develop-sib1-lts develop-sib1-update develop-sib1-update-test1 develop-sib1-update-ue develop_inria_ci_deployment develop_inria_ci_deployment_gp develop_integration_2020_w15 develop_integration_2020_w19 develop_integration_w08 develop_stable dfts_alternatives dlsch-all-dlslots dlsch_encode_mthread dlsch_parallel docupdate_tools dongzhanyi-zte-develop dongzhanyi-zte-develop2 dreibh/apt-auth-fix dreibh/device-load-fix dreibh/device-load-fix-develop-branch edrx extend_sharedlibusage extend_sharedlibusage2 fapi_for_dmrs_and_ptrs feature-4g-sched feature-support-clang-format feature/make-s1-mme-port-configurable feature/make-s1-mme-port-configurable-with-astyle-fixes fembms-enb-ue finalize-oaicn-integration firas fix-ci-tun fix-itti-segv fix-l2-sim fix-limeSDR-compile fix-softmodem-restart fix-warnings fix_NR_DLUL_PF fix_do_ra_data fix_pdsch_low_prb fix_rfsim_mimo fix_rrc_x2_ticking fixes-CE-RLC-PDU-size fixes-mac-sched-nfapi fixes-mac-sched-tun fixes-tun flexran-apps flexran-repair-mme-mgmt fujitsu_lte_contribution fujitsu_lte_contribution-128 generate_push_ptrs gnb-only-test harq-hotfix hotfix-minor-remove-nr-rlc-cppcheck-error hotfix-nr-rlc-tick hotfix-ocp-executable hotfix-ue-musim-compilation improve_nr_modulation improve_ue_stability integration_2020_wk40 integration_2020_wk41 integration_2020_wk42_2 integration_2020_wk45 integration_2020_wk45_2 integration_2020_wk46 integration_2020_wk46_2 integration_2020_wk47 integration_2020_wk48 integration_2020_wk48_2 integration_2020_wk49 integration_2020_wk50 integration_2020_wk50_1 integration_2020_wk51 integration_2020_wk51_2 integration_2021_wk02 integration_2021_wk02_wMR988 integration_2021_wk04 integration_2021_wk05 inter-RRU-final inter-RRU-nr inter-RRU-oairu inter-rru-UE itti-enhancement l2-fixes ldpc-decoder-codegen ldpc-decoder-codegen2 ldpc-offload ldpc_short_codeword_fixes load_gnb lte-ulsch-bugfix lte_uplink_improvement mac-fixes-wk45_2 minor-fix-doc-basic-sim mosaic5g-oai-ran mosaic5g-oai-sim nasmesh_kernel_5.8 new-gtpu new_rlc_2020 nfapi-bugfix nfapi_nr_develop ngap-dlul ngap-support ngap-w48-merge2 ngap-wf ngap-wf-1120 ngap-wf-1120-srb ngap-wf-1120-srb-gtp ngap-wf-1120-srb-gtp-hs ngap-wf-1120-srb-gtp-hs1 ngap-wf-1120-srb-gtp-hs2 ngap-wf-1120-srb-gtp-yhz ngap-wf-1203-yunsdr ngap-wf-liuyu ngap_lfq_1120 ngap_merge noCore nr-ip-uplink-noS1 nr-mac-pdu-wireshark nr-mac-remove-ue-list nr-rlc-am-bugfix-w44 nr-rlc-bugfix-w44 nrUE nrUE-hs nrUE-upper-layer nr_bsr nr_dl_dmrs_type2 nr_dl_pf nr_dl_pf2 nr_dl_ul_ptrs nr_fdd_if_fix nr_polar_decoder_improvement nr_prach_fr2 nr_pucch nr_pucch2 nr_ue_msg3 nr_ue_tti_cleanup nr_ul_pf nr_ul_scfdma nrue-multi-thread nrue_msg2_reception nsa-ue nsa_remove_band_hardcodings oai-sim oai-ubuntu-docker oai-ubuntu-docker-for-lmssdr oairu oairu-dockerfile-support oc-docker-october-improvements openxg/develop pdcp-benchmark polar8 ptrs_rrc_config pusch-mthread-scaling-fix pusch-retrans-fix-ue ra-dl-ul remove_nos1_hack_pdcp remove_x2_gnb_hardcoding repair-TA revert_memcpy rh-ci-add-ue-parallelization rh_ci_fix_autoterminate rh_ci_fr1_update rh_ci_oc rh_ci_py rh_ci_ra_fr2 rh_ci_rfsim_ra rh_ci_ue_parallel rh_doc_update_3 rh_fr1_newjenkins rh_fr1_update rh_gnb_compile_fix rh_wk50_debug rlc-v2-bugfix-status-reporting rlc-v2-tick rlc_v2_coverity_fixes rrc-enb-phy-testmode s1-subnormal_rewrite s1_subnormal s1_subnormal-robert s1ap-bugfix-rab_setup sa-demo sa-merge-rrc-srb sa-msg4 sa-msg4-rrc sa-msg4-rrc-yihz sa-msg4-rrc-yihz-hs sa_rrc_yihz small-bugfixes-w40 small-config-change smallcleanup split73 testing_2symb_pdcch testing_with_external_txdata tools_5Gadapt tp-ota-test trx_thread_param trx_write_thread ue-csi ue-fixes ue-fixes-ota ue_beam_selection ue_nfapi_mch ul-freq-iq-samps-to-file ul_dl_dci_same_slot ul_harq ulsch_decode_mthread ulsim_changes usrp_fix_adc_shift_and_pps_sync usrp_gpio_test wireshark-T-hack-ueid wireshark-log-scheduling-requests x2-endc-processing xiangwab xiangwan yihongzheng_srb zzs 2021.w04 2021.w02 2020.w51_2 2020.w51 2020.w50 2020.w49 2020.w48_2 2020.w48 2020.w47 2020.w46_2 2020.w46 2020.w45_2 2020.w45 2020.w44 2020.w42_2 2020.w42 2020.w41 2020.w39 2020.w38 2020.w37 2020.w36 2020.w34 2020.w33 2020.w31 2020.w30 2020.w29 2020.w28 2020.w26 2020.w25 2020.w24 2020.w23 2020.w22 2020.w19 2020.w17 2020.w16 2020.w15 2020.w11 2020.w09 2020.w06 2020.w05 benetel_phase_rotation
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...@@ -120,7 +120,7 @@ SystemInformationBlockType1_nr_t; ...@@ -120,7 +120,7 @@ SystemInformationBlockType1_nr_t;
#define NR_TDD_SET_ALL_SYMBOLS (0x3FFF) #define NR_TDD_SET_ALL_SYMBOLS (0x3FFF)
#define NR_DOWNLINK_SLOT (0x01) #define NR_DOWNLINK_SLOT (0x01)
#define NR_UPLINK_SLOT (0x05) #define NR_UPLINK_SLOT (0x02)
#define FRAME_DURATION_MICRO_SEC (10000) /* frame duration in microsecond */ #define FRAME_DURATION_MICRO_SEC (10000) /* frame duration in microsecond */
......
...@@ -2296,8 +2296,7 @@ void nr_ue_process_mac_pdu( ...@@ -2296,8 +2296,7 @@ void nr_ue_process_mac_pdu(
#endif #endif
*/ */
LOG_D(MAC, "Received TA_COMMAND %u TAGID %u CC_id %d\n", LOG_D(MAC, "Received TA_COMMAND %u TAGID %u CC_id %d\n", ul_time_alignment->ta_command, ul_time_alignment->tag_id, CC_id);
ul_time_alignment->ta_command, ul_time_alignment->tag_id, CC_id);
break; break;
case DL_SCH_LCID_CON_RES_ID: case DL_SCH_LCID_CON_RES_ID:
......
...@@ -299,7 +299,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -299,7 +299,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
protocol_ctxt_t ctxt; protocol_ctxt_t ctxt;
int CC_id, i = -1, UE_id = 0, ta_update; int CC_id, i = -1, UE_id = 0;
gNB_MAC_INST *gNB = RC.nrmac[module_idP]; gNB_MAC_INST *gNB = RC.nrmac[module_idP];
UE_list_t *UE_list = &gNB->UE_list; UE_list_t *UE_list = &gNB->UE_list;
rnti_t rnti; rnti_t rnti;
...@@ -377,9 +377,9 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -377,9 +377,9 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
if (ue_sched_ctl->ta_timer == 0) { if (ue_sched_ctl->ta_timer == 0) {
gNB->ta_command = ue_sched_ctl->ta_update; gNB->ta_command = ue_sched_ctl->ta_update;
/* if time is up, then set the timer to not send it for 4 frames /* if time is up, then set the timer to not send it for 5 frames
// regardless of the TA value */ // regardless of the TA value */
ue_sched_ctl->ta_timer = 80; ue_sched_ctl->ta_timer = 100;
/* reset ta_update */ /* reset ta_update */
ue_sched_ctl->ta_update = 31; ue_sched_ctl->ta_update = 31;
/* MAC CE flag indicating TA length */ /* MAC CE flag indicating TA length */
...@@ -391,8 +391,9 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -391,8 +391,9 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
} }
if (slot_txP == NR_DOWNLINK_SLOT){ if (slot_txP == NR_DOWNLINK_SLOT){
nr_schedule_ue_spec(module_idP, frame_txP, slot_txP);
nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP,NULL); nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP,NULL);
// resetting ta flag
gNB->ta_len = 0;
} }
/* /*
......
...@@ -103,9 +103,6 @@ int nr_generate_dlsch_pdu(module_id_t module_idP, ...@@ -103,9 +103,6 @@ int nr_generate_dlsch_pdu(module_id_t module_idP,
memcpy((void *) mac_pdu_ptr, (void *) ce_ptr, mac_ce_size); memcpy((void *) mac_pdu_ptr, (void *) ce_ptr, mac_ce_size);
ce_ptr += mac_ce_size; ce_ptr += mac_ce_size;
mac_pdu_ptr += (unsigned char) mac_ce_size; mac_pdu_ptr += (unsigned char) mac_ce_size;
// resetting ta flag
gNB->ta_len = 0;
} }
...@@ -179,147 +176,6 @@ int nr_generate_dlsch_pdu(module_id_t module_idP, ...@@ -179,147 +176,6 @@ int nr_generate_dlsch_pdu(module_id_t module_idP,
return offset; return offset;
} }
/*TODO expand the scheduling functionalities /* functionalities of this function have been moved to nr_schedule_uss_dlsch_phytest */
this function is just generating a dummy MAC PDU and is used to transmit the TA void nr_schedule_ue_spec(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
The structure of the algorithm is taken from the schedule_ue_spec function in LTE
and is preserved for future reference.*/
void
nr_schedule_ue_spec(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
gNB_MAC_INST *gNB = RC.nrmac[module_idP];
UE_list_t *UE_list = &gNB->UE_list;
nfapi_nr_dl_config_request_body_t *dl_req;
// TODO size corretly the arrays
// at present, preserved the array length from lte code
// however not sure why NR_MAX_NB_RB was used here
unsigned char sdu_lcids[NR_MAX_NB_RB] = {0};
uint16_t sdu_lengths[NR_MAX_NB_RB] = {0};
int padding = 0, post_padding = 0, ta_len = 0, header_length_total = 0, sdu_length_total = 0, num_sdus = 0;
int CC_id, sub_pdu_id, lcid, offset, i, j=0, k=0, ta_command;
// hardcoded parameters
// for DMRS configuration type 1
// sdus should come from RLC
static unsigned char dlsch_buffer[MAX_NR_DLSCH_PAYLOAD_BYTES];
uint8_t Qm = 2;
uint16_t R = 697;
uint16_t nb_rb = 50 ;
uint32_t TBS = nr_compute_tbs(Qm, R, nb_rb, 12, 6, 0, 1)/8; // this is in bits TODO use nr_get_tbs
int UE_id = 0; // UE_list->head is -1 !
UE_sched_ctrl_t *ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
//ta_update = ue_sched_ctl->ta_update;
for (CC_id = 0; CC_id < RC.nb_nr_mac_CC[module_idP]; CC_id++) {
LOG_D(MAC, "doing nr_schedule_ue_spec for UE_id %d CC_id %d frame %d slot %d\n", UE_id, CC_id, frameP, slotP);
dl_req = &gNB->DL_req[CC_id].dl_config_request_body;
//for (UE_id = UE_list->head; UE_id >= -1; UE_id = UE_list->next[UE_id]) {
/*
//process retransmission
if (round != 8) {
} else { // This is a potentially new SDU opportunity */
//ta_len = (ta_update != 31) ? 2 : 0;
// fill dlsch_buffer with random data
for (i = 0; i < MAX_NR_DLSCH_PAYLOAD_BYTES; i++){
dlsch_buffer[i] = (unsigned char) rand();
}
/*
//Sending SDUs with size 1
//Initialize elements of sdu_lcids and sdu_lengths
//TODO this will be eventually be removed
for (j = 0; j < NB_RB_MAX; j++){
sdu_lcids[j] = 0x05; // DRB
}
for (k = 0; k < NB_RB_MAX; k++){
sdu_lengths[k] = 1;
header_length_total += 2;
sdu_length_total += 1;
}*/
//Sending SDUs with size 1
//Initialize elements of sdu_lcids and sdu_lengths
//TODO this will be eventually be removed
while (TBS >= 3 + header_length_total + sdu_length_total + ta_len){
if (k < NR_MAX_NB_RB && j < NR_MAX_NB_RB){
sdu_lcids[j] = 0x05; // DRB
sdu_lengths[k] = 1;
header_length_total += 2;
sdu_length_total += 1;
num_sdus +=1;
k++, j++;
}
else {
break;
}
}
/*
// RLC data on DCCH
if (TBS - ta_len - header_length_total - sdu_length_total - 3 > 0) {
}
// RLC data on DCCH1
if (TBS - ta_len - header_length_total - sdu_length_total - 3 > 0) {
}
// looping over lcid
for (lcid = NB_RB_MAX - 1; lcid >= DTCH; lcid--) {
// here sdu_lcids[num_sdus] is populated
}*/
// there is at least one SDU or TA command
// if (num_sdus > 0 ){
if (ta_len + sdu_length_total + header_length_total > 0) {
// Check if there is data from RLC or CE
if (TBS >= 2 + header_length_total + sdu_length_total + ta_len) {
// we have to consider padding
// padding param currently not in use
padding = TBS - header_length_total - sdu_length_total - ta_len - 1;
post_padding = 1;
} else {
post_padding = 0;
}
offset = nr_generate_dlsch_pdu(module_idP,
(unsigned char *) dlsch_buffer,
(unsigned char *) UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0],
num_sdus, //num_sdus
sdu_lengths,
sdu_lcids,
255, // no drx
NULL, // contention res id
post_padding);
// Padding: fill remainder of DLSCH with 0
if (post_padding > 0){
for (int j = 0; j < (TBS - offset); j++)
UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0][offset + j] = 0;
}
// Printing bit by bit for debugging purpose
/*for (int k = 0; k < TBS; k++){
printf("MAC PDU %u\n",((( UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0][k/8]) & (1 << (k & 7))) >> (k & 7)));
if ((k+1)%8 == 0)
printf("\n");
}*/
}
else { // There is no data from RLC or MAC header, so don't schedule
}
//}
//} // UE_id loop
} // CC_id loop
} }
...@@ -260,68 +260,70 @@ int configure_fapi_dl_Tx(nfapi_nr_dl_config_request_body_t *dl_req, ...@@ -260,68 +260,70 @@ int configure_fapi_dl_Tx(nfapi_nr_dl_config_request_body_t *dl_req,
return TBS/8; //Return TBS in bytes return TBS/8; //Return TBS in bytes
} }
void nr_schedule_uss_dlsch_phytest(module_id_t module_idP, void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
frame_t frameP, frame_t frameP,
sub_frame_t slotP, sub_frame_t slotP,
nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config) { nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config) {
LOG_D(MAC, "In nr_schedule_uss_dlsch_phytest \n");
uint8_t CC_id; gNB_MAC_INST *gNB_mac = RC.nrmac[module_idP];
gNB_MAC_INST *nr_mac = RC.nrmac[module_idP]; UE_list_t *UE_list = &gNB_mac->UE_list;
//NR_COMMON_channels_t *cc = nr_mac->common_channels; nfapi_nr_dl_config_request_body_t *dl_req;
nfapi_nr_dl_config_request_body_t *dl_req; nfapi_tx_request_pdu_t *TX_req;
nfapi_tx_request_pdu_t *TX_req; mac_rlc_status_resp_t rlc_status;
nfapi_nr_config_request_t *cfg = &gNB_mac->config[0];
// TODO not sure why NR_MAX_NB_RB was used here
unsigned char sdu_lcids[NB_RB_MAX] = {0};
uint16_t sdu_lengths[NB_RB_MAX] = {0};
int padding = 0, post_padding = 0, ta_len = 0, header_length_total = 0, sdu_length_total = 0, num_sdus = 0;
int CC_id, lcid, offset, i, j=0, k=0, header_length_last, TBS_bytes;
// hardcoded parameters to 30 kHz
// for DMRS configuration type 1
unsigned char dlsch_buffer[MAX_NR_DLSCH_PAYLOAD_BYTES];
uint8_t Qm = 2;
uint16_t R = 697;
uint16_t nb_rb = 50;
uint32_t TBS = nr_compute_tbs(Qm, R, nb_rb, 12, 6, 0, 1)/8; // this is in bits TODO use nr_get_tbs
int UE_id = 0; // UE_list->head is -1 !
uint16_t rnti = 0x1234; uint16_t rnti = 0x1234;
nfapi_nr_config_request_t *cfg = &nr_mac->config[0];
uint16_t sfn_sf = frameP << 7 | slotP; uint16_t sfn_sf = frameP << 7 | slotP;
// everything here is hard-coded to 30 kHz
//int scs = get_dlscs(cfg);
//int slots_per_frame = get_spf(cfg);
int TBS;
int TBS_bytes;
int lcid;
int ta_len = 0;
int header_length_total=0;
int header_length_last;
int sdu_length_total = 0;
mac_rlc_status_resp_t rlc_status;
uint16_t sdu_lengths[NB_RB_MAX];
int num_sdus = 0;
unsigned char dlsch_buffer[MAX_DLSCH_PAYLOAD_BYTES];
int offset;
int UE_id = 0;
unsigned char sdu_lcids[NB_RB_MAX];
int padding = 0, post_padding = 0;
UE_list_t *UE_list = &nr_mac->UE_list;
DLSCH_PDU DLSCH_pdu;
//DLSCH_PDU *DLSCH_pdu = (DLSCH_PDU*) malloc(sizeof(DLSCH_PDU));
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) { UE_sched_ctrl_t *ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
LOG_D(MAC, "Scheduling UE specific search space DCI type 1 for CC_id %d\n",CC_id); //ta_update = ue_sched_ctl->ta_update;
dl_req = &nr_mac->DL_req[CC_id].dl_config_request_body;
TX_req = &nr_mac->TX_req[CC_id].tx_request_body.tx_pdu_list[nr_mac->TX_req[CC_id].tx_request_body.number_of_pdus]; for (CC_id = 0; CC_id < RC.nb_nr_mac_CC[module_idP]; CC_id++) {
LOG_D(MAC, "Scheduling UE specific search space DCI type 1 for UE_id %d CC_id %d frame %d slot %d\n", UE_id, CC_id, frameP, slotP);
dl_req = &gNB_mac->DL_req[CC_id].dl_config_request_body;
TX_req = &gNB_mac->TX_req[CC_id].tx_request_body.tx_pdu_list[gNB_mac->TX_req[CC_id].tx_request_body.number_of_pdus];
ta_len = gNB_mac->ta_len;
//The --NOS1 use case currently schedules DLSCH transmissions only when there is IP traffic arriving //The --NOS1 use case currently schedules DLSCH transmissions only when there is IP traffic arriving
//through the LTE stack //through the LTE stack
if (IS_SOFTMODEM_NOS1) { if (IS_SOFTMODEM_NOS1){
memset(&DLSCH_pdu, 0, sizeof(DLSCH_pdu));
int ta_update = 31;
ta_len = 0;
// Hardcode it for now // Hardcode it for now
TBS = 6784/8; //TBS in bytes //TBS = 6784/8; //TBS in bytes
//nr_get_tbs_dl(&dl_config_dlsch_pdu->dlsch_pdu, dl_config_dci_pdu->dci_dl_pdu, *cfg); //nr_get_tbs_dl(&dl_config_dlsch_pdu->dlsch_pdu, dl_config_dci_pdu->dci_dl_pdu, *cfg);
//TBS = dl_config_dlsch_pdu->dlsch_pdu.dlsch_pdu_rel15.transport_block_size; //TBS = dl_config_dlsch_pdu->dlsch_pdu.dlsch_pdu_rel15.transport_block_size;
/* TODO
// RLC data on DCCH
if (TBS - ta_len - header_length_total - sdu_length_total - 3 > 0) {
}*/
/* TODO
// RLC data on DCCH1
if (TBS - ta_len - header_length_total - sdu_length_total - 3 > 0) {
}*/
for (lcid = NB_RB_MAX - 1; lcid >= DTCH; lcid--) { for (lcid = NB_RB_MAX - 1; lcid >= DTCH; lcid--) {
// TODO: check if the lcid is active LOG_D(MAC, "[gNB %d], Frame %d, DTCH%d->DLSCH, Checking RLC status (tbs %d, len %d)\n",
LOG_D(MAC, "[eNB %d], Frame %d, DTCH%d->DLSCH, Checking RLC status (tbs %d, len %d)\n", module_idP, frameP, lcid, TBS, TBS - ta_len - header_length_total - sdu_length_total - 3);
module_idP, frameP, lcid, TBS,
TBS - ta_len - header_length_total - sdu_length_total - 3);
if (TBS - ta_len - header_length_total - sdu_length_total - 3 > 0) { if (TBS - ta_len - header_length_total - sdu_length_total - 3 > 0) {
rlc_status = mac_rlc_status_ind(module_idP, rlc_status = mac_rlc_status_ind(module_idP,
...@@ -337,103 +339,148 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP, ...@@ -337,103 +339,148 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
0); 0);
if (rlc_status.bytes_in_buffer > 0) { if (rlc_status.bytes_in_buffer > 0) {
LOG_D(MAC, LOG_D(MAC, "[gNB %d][USER-PLANE DEFAULT DRB] Frame %d : DTCH->DLSCH, Requesting %d bytes from RLC (lcid %d total hdr len %d), TBS: %d \n \n",
"[eNB %d][USER-PLANE DEFAULT DRB] Frame %d : DTCH->DLSCH, Requesting %d bytes from RLC (lcid %d total hdr len %d), TBS: %d \n \n", module_idP, frameP, TBS - ta_len - header_length_total - sdu_length_total - 3,
module_idP, frameP, lcid, header_length_total, TBS);
TBS - ta_len - header_length_total - sdu_length_total - 3,
lcid,
header_length_total,
TBS);
sdu_lengths[num_sdus] = mac_rlc_data_req(module_idP, sdu_lengths[num_sdus] = mac_rlc_data_req(module_idP,
rnti, rnti,
module_idP, module_idP,
frameP, frameP,
ENB_FLAG_YES, ENB_FLAG_YES,
MBMS_FLAG_NO, MBMS_FLAG_NO,
lcid, lcid,
TBS, TBS,
(char *)&dlsch_buffer[sdu_length_total], (char *)&dlsch_buffer[sdu_length_total],
0, 0,
0); 0);
LOG_D(MAC,
"[eNB %d][USER-PLANE DEFAULT DRB] Got %d bytes for DTCH %d \n", LOG_D(MAC, "[gNB %d][USER-PLANE DEFAULT DRB] Got %d bytes for DTCH %d \n", module_idP, sdu_lengths[num_sdus], lcid);
module_idP, sdu_lengths[num_sdus], lcid);
sdu_lcids[num_sdus] = lcid; sdu_lcids[num_sdus] = lcid;
sdu_length_total += sdu_lengths[num_sdus]; sdu_length_total += sdu_lengths[num_sdus];
UE_list->eNB_UE_stats[CC_id][UE_id].num_pdu_tx[lcid]++; UE_list->eNB_UE_stats[CC_id][UE_id].num_pdu_tx[lcid]++;
UE_list->eNB_UE_stats[CC_id][UE_id].lcid_sdu[num_sdus] = lcid; UE_list->eNB_UE_stats[CC_id][UE_id].lcid_sdu[num_sdus] = lcid;
UE_list->eNB_UE_stats[CC_id][UE_id].sdu_length_tx[lcid] = sdu_lengths[num_sdus]; UE_list->eNB_UE_stats[CC_id][UE_id].sdu_length_tx[lcid] = sdu_lengths[num_sdus];
UE_list->eNB_UE_stats[CC_id][UE_id].num_bytes_tx[lcid] += sdu_lengths[num_sdus]; UE_list->eNB_UE_stats[CC_id][UE_id].num_bytes_tx[lcid] += sdu_lengths[num_sdus];
header_length_last = 1 + 1 + (sdu_lengths[num_sdus] >= 128); header_length_last = 1 + 1 + (sdu_lengths[num_sdus] >= 128);
header_length_total += header_length_last; header_length_total += header_length_last;
num_sdus++; num_sdus++;
UE_list->UE_sched_ctrl[UE_id].uplane_inactivity_timer = 0;
ue_sched_ctl->uplane_inactivity_timer = 0;
} }
} else { } else { // no TBS left
// no TBS left break;
break;
} }
} }
// last header does not have length field // // last header does not have length field
if (header_length_total) { // if (header_length_total) {
header_length_total -= header_length_last; // header_length_total -= header_length_last;
header_length_total++; // header_length_total++;
} // }
if (ta_len + sdu_length_total + header_length_total > 0) { } //if (IS_SOFTMODEM_NOS1)
if (TBS - header_length_total - sdu_length_total - ta_len <= 2) { else {
padding = TBS - header_length_total - sdu_length_total - ta_len; //When the --NOS1 option is not enabled, DLSCH transmissions with random data
post_padding = 0; //occur every time that the current function is called (dlsch phytest mode)
} else {
padding = 0;
post_padding = 1;
}
TBS_bytes = configure_fapi_dl_Tx(dl_req, TX_req, cfg, &nr_mac->coreset[CC_id][1], &nr_mac->search_space[CC_id][1], nr_mac->pdu_index[CC_id], dlsch_config); // fill dlsch_buffer with random data
#if defined(ENABLE_MAC_PAYLOAD_DEBUG) for (i = 0; i < MAX_NR_DLSCH_PAYLOAD_BYTES; i++){
LOG_I(MAC, "Printing first 10 payload bytes at the gNB side, Frame: %d, slot: %d, , TBS size: %d \n \n", frameP, slotP, TBS_bytes); dlsch_buffer[i] = (unsigned char) rand();
}
for(int i = 0; i < 10; i++) { // TBS_bytes dlsch_pdu_rel15->transport_block_size/8 6784/8 //Sending SDUs with size 1
LOG_I(MAC, "%x. ", ((uint8_t *)nr_mac->UE_list.DLSCH_pdu[CC_id][0][0].payload[0])[i]); //Initialize elements of sdu_lcids and sdu_lengths
//TODO this will be eventually be removed
while (TBS >= 3 + header_length_total + sdu_length_total + ta_len){
if (k < NR_MAX_NB_RB && j < NR_MAX_NB_RB){
sdu_lcids[j] = 0x05; // DRB
sdu_lengths[k] = 1;
header_length_total += 2;
sdu_length_total += 1;
num_sdus +=1;
k++, j++;
}
else {
break;
} }
}
} // else IS_SOFTMODEM_NOS1
// there is at least one SDU or TA command
// if (num_sdus > 0 ){
if (ta_len + sdu_length_total + header_length_total > 0) {
// Check if there is data from RLC or CE
if (TBS >= 2 + header_length_total + sdu_length_total + ta_len) {
// we have to consider padding
// padding param currently not in use
padding = TBS - header_length_total - sdu_length_total - ta_len - 1;
post_padding = 1;
} else {
padding = 0;
post_padding = 0;
}
#endif
//TX_req->segments[0].segment_length = 8;
TX_req->segments[0].segment_length = TBS_bytes +2;
TX_req->segments[0].segment_data = nr_mac->UE_list.DLSCH_pdu[CC_id][0][0].payload[0];
nr_mac->TX_req[CC_id].tx_request_body.number_of_pdus++;
nr_mac->TX_req[CC_id].sfn_sf = sfn_sf;
nr_mac->TX_req[CC_id].tx_request_body.tl.tag = NFAPI_TX_REQUEST_BODY_TAG;
nr_mac->TX_req[CC_id].header.message_id = NFAPI_TX_REQUEST;
} //if (ta_len + sdu_length_total + header_length_total > 0)
} //if (IS_SOFTMODEM_NOS1)
//When the --NOS1 option is not enabled, DLSCH transmissions with random data
//occur every time that the current function is called (dlsch phytest mode)
else {
TBS_bytes = configure_fapi_dl_Tx(dl_req, TX_req, cfg, &nr_mac->coreset[CC_id][1], &nr_mac->search_space[CC_id][1], nr_mac->pdu_index[CC_id], dlsch_config);
#if defined(ENABLE_MAC_PAYLOAD_DEBUG) offset = nr_generate_dlsch_pdu(module_idP,
(unsigned char *) dlsch_buffer,
(unsigned char *) UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0],
num_sdus, //num_sdus
sdu_lengths,
sdu_lcids,
255, // no drx
NULL, // contention res id
post_padding);
// Padding: fill remainder of DLSCH with 0
if (post_padding > 0){
for (int j = 0; j < (TBS - offset); j++)
UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0][offset + j] = 0;
}
if (frameP%100 == 0) { TBS_bytes = configure_fapi_dl_Tx(dl_req, TX_req, cfg, &gNB_mac->coreset[CC_id][1], &gNB_mac->search_space[CC_id][1], gNB_mac->pdu_index[CC_id], dlsch_config);
LOG_I(MAC, "Printing first 10 payload bytes at the gNB side, Frame: %d, slot: %d, TBS size: %d \n", frameP, slotP, TBS_bytes);
for(int i = 0; i < 10; i++) { //TX_req->segments[0].segment_length = 8;
LOG_I(MAC, "%x. ", ((uint8_t *)nr_mac->UE_list.DLSCH_pdu[CC_id][0][0].payload[0])[i]); TX_req->segments[0].segment_length = TBS_bytes + 2;
TX_req->segments[0].segment_data = gNB_mac->UE_list.DLSCH_pdu[CC_id][0][UE_id].payload[0];
gNB_mac->TX_req[CC_id].tx_request_body.number_of_pdus++;
gNB_mac->TX_req[CC_id].sfn_sf = sfn_sf;
gNB_mac->TX_req[CC_id].tx_request_body.tl.tag = NFAPI_TX_REQUEST_BODY_TAG;
gNB_mac->TX_req[CC_id].header.message_id = NFAPI_TX_REQUEST;
if(IS_SOFTMODEM_NOS1){
#if defined(ENABLE_MAC_PAYLOAD_DEBUG)
LOG_I(MAC, "Printing first 10 payload bytes at the gNB side, Frame: %d, slot: %d, TBS size: %d \n \n", frameP, slotP, TBS_bytes);
for(int i = 0; i < 10; i++) { // TBS_bytes dlsch_pdu_rel15->transport_block_size/8 6784/8
LOG_I(MAC, "%x. ", ((uint8_t *)gNB_mac->UE_list.DLSCH_pdu[CC_id][0][UE_id].payload[0])[i]);
}
#endif
} else {
#if defined(ENABLE_MAC_PAYLOAD_DEBUG)
if (frameP%100 == 0){
LOG_I(MAC, "Printing first 10 payload bytes at the gNB side, Frame: %d, slot: %d, TBS size: %d \n", frameP, slotP, TBS_bytes);
for(int i = 0; i < 10; i++) {
LOG_I(MAC, "%x. ", ((uint8_t *)gNB_mac->UE_list.DLSCH_pdu[CC_id][0][UE_id].payload[0])[i]);
}
} }
#endif
} }
// Printing bit by bit for debugging purpose
#endif /*for (int k = 0; k < TBS; k++){
//TX_req->segments[0].segment_length = 8; printf("MAC PDU %u\n",((( UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0][k/8]) & (1 << (k & 7))) >> (k & 7)));
TX_req->segments[0].segment_length = TBS_bytes +2; if ((k+1)%8 == 0)
TX_req->segments[0].segment_data = nr_mac->UE_list.DLSCH_pdu[CC_id][0][0].payload[0]; printf("\n");
}*/
nr_mac->TX_req[CC_id].tx_request_body.number_of_pdus++; }
nr_mac->TX_req[CC_id].sfn_sf = sfn_sf; else { // There is no data from RLC or MAC header, so don't schedule
nr_mac->TX_req[CC_id].tx_request_body.tl.tag = NFAPI_TX_REQUEST_BODY_TAG;
nr_mac->TX_req[CC_id].header.message_id = NFAPI_TX_REQUEST;
} }
} //for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) } // CC_id loop
} }
......
...@@ -118,7 +118,7 @@ nr_rx_sdu(const module_id_t gnb_mod_idP, ...@@ -118,7 +118,7 @@ nr_rx_sdu(const module_id_t gnb_mod_idP,
// uint8_t lcgid = 0; // uint8_t lcgid = 0;
// int lcgid_updated[4] = {0, 0, 0, 0}; // int lcgid_updated[4] = {0, 0, 0, 0};
// rrc_eNB_ue_context_t *ue_contextP = NULL; // rrc_eNB_ue_context_t *ue_contextP = NULL;
gNB_MAC_INST *gNB = NULL; gNB_MAC_INST *gNB_mac = NULL;
UE_list_t *UE_list = NULL; UE_list_t *UE_list = NULL;
UE_sched_ctrl_t *UE_scheduling_control = NULL; UE_sched_ctrl_t *UE_scheduling_control = NULL;
// UE_TEMPLATE *UE_template_ptr = NULL; // UE_TEMPLATE *UE_template_ptr = NULL;
...@@ -126,8 +126,9 @@ nr_rx_sdu(const module_id_t gnb_mod_idP, ...@@ -126,8 +126,9 @@ nr_rx_sdu(const module_id_t gnb_mod_idP,
/* Init */ /* Init */
current_rnti = rntiP; current_rnti = rntiP;
UE_id = find_nrUE_id(gnb_mod_idP, current_rnti); UE_id = find_nrUE_id(gnb_mod_idP, current_rnti);
gNB = RC.nrmac[gnb_mod_idP]; gNB_mac = RC.nrmac[gnb_mod_idP];
UE_list = &gNB->UE_list; UE_list = &gNB_mac->UE_list;
// harq_pid = subframe2harqpid(&mac->common_channels[CC_idP], frameP, subframeP); // harq_pid = subframe2harqpid(&mac->common_channels[CC_idP], frameP, subframeP);
// memset(rx_ces, 0, MAX_NUM_CE * sizeof(unsigned char)); // memset(rx_ces, 0, MAX_NUM_CE * sizeof(unsigned char));
...@@ -176,6 +177,7 @@ nr_rx_sdu(const module_id_t gnb_mod_idP, ...@@ -176,6 +177,7 @@ nr_rx_sdu(const module_id_t gnb_mod_idP,
* NR: smoothing removed * NR: smoothing removed
*/ */
//UE_scheduling_control->ta_update = (UE_scheduling_control->ta_update * 3 + timing_advance) / 4; //UE_scheduling_control->ta_update = (UE_scheduling_control->ta_update * 3 + timing_advance) / 4;
UE_scheduling_control->ta_update = timing_advance; UE_scheduling_control->ta_update = timing_advance;
// printf("UE_scheduling_control->ta_update %u\n", UE_scheduling_control->ta_update); // printf("UE_scheduling_control->ta_update %u\n", UE_scheduling_control->ta_update);
// UE_scheduling_control->pusch_snr[CC_idP] = ul_cqi; // UE_scheduling_control->pusch_snr[CC_idP] = ul_cqi;
......
...@@ -118,7 +118,7 @@ typedef struct gNB_MAC_INST_s { ...@@ -118,7 +118,7 @@ typedef struct gNB_MAC_INST_s {
int ta_command; int ta_command;
/// MAC CE flag indicating TA length /// MAC CE flag indicating TA length
int ta_len; int ta_len;
/// Common cell resources /// Common cell resources
NR_COMMON_channels_t common_channels[NFAPI_CC_MAX]; NR_COMMON_channels_t common_channels[NFAPI_CC_MAX];
/// current PDU index (BCH,DLSCH) /// current PDU index (BCH,DLSCH)
uint16_t pdu_index[NFAPI_CC_MAX]; uint16_t pdu_index[NFAPI_CC_MAX];
......
...@@ -74,7 +74,8 @@ int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, fapi_nr ...@@ -74,7 +74,8 @@ int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, fapi_nr
// L2 Abstraction Layer // L2 Abstraction Layer
int8_t handle_dlsch (module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_indication_t *dci_ind, uint8_t *pduP, uint32_t pdu_len, frame_t frame, int slot, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment){ int8_t handle_dlsch (module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_indication_t *dci_ind, uint8_t *pduP, uint32_t pdu_len, frame_t frame, int slot, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment){
if (IS_SOFTMODEM_NOS1 || IS_SOFTMODEM_RFSIM) //if (IS_SOFTMODEM_NOS1 || IS_SOFTMODEM_RFSIM)
// sdu should be processed even when is S1 mode because data and timing advance updates are transmitted by the UE
nr_ue_send_sdu(module_id, cc_id, frame, slot, nr_ue_send_sdu(module_id, cc_id, frame, slot,
pduP, pduP,
pdu_len, pdu_len,
......
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