Commit 630e39ae authored by Elena_Lukashova's avatar Elena_Lukashova

Intermediate commit. Adding HARQ support for SIC receiver. Changes in...

Intermediate commit. Adding HARQ support for SIC receiver. Changes in dci_tools.c to map TB to CW in a proper way.
Enable different options for TB1 retransmissions. Needs further improvements.
parent 64116b90
This diff is collapsed.
...@@ -172,6 +172,8 @@ typedef struct { ...@@ -172,6 +172,8 @@ typedef struct {
uint8_t Nlayers; uint8_t Nlayers;
/// First layer for this PSCH transmission /// First layer for this PSCH transmission
uint8_t first_layer; uint8_t first_layer;
/// codeword this transport block is mapped to
uint8_t codeword;
} LTE_DL_eNB_HARQ_t; } LTE_DL_eNB_HARQ_t;
typedef struct { typedef struct {
...@@ -575,6 +577,8 @@ typedef struct { ...@@ -575,6 +577,8 @@ typedef struct {
uint32_t trials[8]; uint32_t trials[8];
/// error statistics per round /// error statistics per round
uint32_t errors[8]; uint32_t errors[8];
/// codeword this transport block is mapped to
uint8_t codeword;
} LTE_DL_UE_HARQ_t; } LTE_DL_UE_HARQ_t;
typedef struct { typedef struct {
......
...@@ -120,6 +120,8 @@ int rx_pdsch(PHY_VARS_UE *phy_vars_ue, ...@@ -120,6 +120,8 @@ int rx_pdsch(PHY_VARS_UE *phy_vars_ue,
int32_t **rxdataF_comp_ptr; int32_t **rxdataF_comp_ptr;
int32_t **dl_ch_mag_ptr; int32_t **dl_ch_mag_ptr;
int32_t codeword_TB0;
int32_t codeword_TB1;
...@@ -139,8 +141,10 @@ int rx_pdsch(PHY_VARS_UE *phy_vars_ue, ...@@ -139,8 +141,10 @@ int rx_pdsch(PHY_VARS_UE *phy_vars_ue,
case PDSCH: case PDSCH:
lte_ue_pdsch_vars = &phy_vars_ue->lte_ue_pdsch_vars[eNB_id]; lte_ue_pdsch_vars = &phy_vars_ue->lte_ue_pdsch_vars[eNB_id];
dlsch_ue = phy_vars_ue->dlsch_ue[eNB_id]; dlsch_ue = phy_vars_ue->dlsch_ue[eNB_id];
dlsch0_harq = dlsch_ue[0]->harq_processes[harq_pid]; codeword_TB0 = dlsch_ue[0]->harq_processes[harq_pid]->codeword;
dlsch1_harq = dlsch_ue[1]->harq_processes[harq_pid]; codeword_TB1 = dlsch_ue[1]->harq_processes[harq_pid]->codeword;
dlsch0_harq = dlsch_ue[codeword_TB0]->harq_processes[harq_pid];
dlsch1_harq = dlsch_ue[codeword_TB1]->harq_processes[harq_pid];
break; break;
default: default:
......
...@@ -155,13 +155,13 @@ int allocate_REs_in_RB(LTE_DL_FRAME_PARMS *frame_parms, ...@@ -155,13 +155,13 @@ int allocate_REs_in_RB(LTE_DL_FRAME_PARMS *frame_parms,
{ {
uint8_t *x0 = dlsch0_harq->e; uint8_t *x0 = NULL; //dlsch0_harq->e;
MIMO_mode_t mimo_mode = dlsch0_harq->mimo_mode; MIMO_mode_t mimo_mode = dlsch0_harq->mimo_mode;
int first_layer0 = dlsch0_harq->first_layer; int first_layer0; //= dlsch0_harq->first_layer;
int Nlayers0 = dlsch0_harq->Nlayers; int Nlayers0; // = dlsch0_harq->Nlayers;
uint8_t mod_order0 = get_Qm(dlsch0_harq->mcs); uint8_t mod_order0; // = get_Qm(dlsch0_harq->mcs);
uint8_t mod_order1=2; uint8_t mod_order1; //=2;
uint8_t precoder_index0,precoder_index1; uint8_t precoder_index0,precoder_index1;
uint8_t *x1=NULL; uint8_t *x1=NULL;
...@@ -199,15 +199,40 @@ int allocate_REs_in_RB(LTE_DL_FRAME_PARMS *frame_parms, ...@@ -199,15 +199,40 @@ int allocate_REs_in_RB(LTE_DL_FRAME_PARMS *frame_parms,
gain_lin_QPSK = (int16_t)((amp*ONE_OVER_SQRT2_Q15)>>15); gain_lin_QPSK = (int16_t)((amp*ONE_OVER_SQRT2_Q15)>>15);
// if (mimo_mode == LARGE_CDD) gain_lin_QPSK>>=1; // if (mimo_mode == LARGE_CDD) gain_lin_QPSK>>=1;
if (dlsch1_harq) {
if ((dlsch0_harq != NULL) && (dlsch1_harq != NULL)) { //this is for TM3, TM4
x0 = dlsch0_harq->e;
mimo_mode = dlsch0_harq->mimo_mode;
first_layer0 = dlsch0_harq->first_layer;
Nlayers0 = dlsch0_harq->Nlayers;
mod_order0 = get_Qm(dlsch0_harq->mcs);
x1 = dlsch1_harq->e; x1 = dlsch1_harq->e;
// Fill these in later for TM8-10 // Fill these in later for TM8-10
// Nlayers1 = dlsch1_harq->Nlayers; // Nlayers1 = dlsch1_harq->Nlayers;
// first_layer1 = dlsch1_harq->first_layer; // first_layer1 = dlsch1_harq->first_layer;
mod_order1 = get_Qm(dlsch1_harq->mcs); mod_order1 = get_Qm(dlsch1_harq->mcs);
} else if ((dlsch0_harq != NULL) && (dlsch1_harq == NULL)){ //This is for SIS0 TM1, TM6, etc
x0 = dlsch0_harq->e;
mimo_mode = dlsch0_harq->mimo_mode;
first_layer0 = dlsch0_harq->first_layer;
Nlayers0 = dlsch0_harq->Nlayers;
mod_order0 = get_Qm(dlsch0_harq->mcs);
} else if ((dlsch0_harq == NULL) && (dlsch1_harq != NULL)){ // This is for TM4 retransmission
x0 = dlsch1_harq->e;
mimo_mode = dlsch1_harq->mimo_mode;
first_layer0 = dlsch1_harq->first_layer;
Nlayers0 = dlsch1_harq->Nlayers;
mod_order0 = get_Qm(dlsch1_harq->mcs);
} }
/* /*
switch (mod_order) { switch (mod_order) {
case 2: case 2:
...@@ -229,9 +254,16 @@ int allocate_REs_in_RB(LTE_DL_FRAME_PARMS *frame_parms, ...@@ -229,9 +254,16 @@ int allocate_REs_in_RB(LTE_DL_FRAME_PARMS *frame_parms,
} }
*/ */
#ifdef DEBUG_DLSCH_MODULATION if (dlsch0_harq != NULL){
#ifdef DEBUG_DLSCH_MODULATION
printf("allocate_re (mod %d): symbol_offset %d re_offset %d (%d,%d), jj %d -> %d,%d\n",mod_order0,symbol_offset,re_offset,skip_dc,skip_half,*jj, x0[*jj], x0[1+*jj]); printf("allocate_re (mod %d): symbol_offset %d re_offset %d (%d,%d), jj %d -> %d,%d\n",mod_order0,symbol_offset,re_offset,skip_dc,skip_half,*jj, x0[*jj], x0[1+*jj]);
#endif #endif
} else{
#ifdef DEBUG_DLSCH_MODULATION
printf("allocate_re (mod %d): symbol_offset %d re_offset %d (%d,%d), jj %d -> %d,%d\n",mod_order0,symbol_offset,re_offset,skip_dc,skip_half,*jj, x0[*jj], x0[1+*jj]);
#endif
}
first_re=0; first_re=0;
last_re=12; last_re=12;
...@@ -1097,7 +1129,6 @@ int allocate_REs_in_RB(LTE_DL_FRAME_PARMS *frame_parms, ...@@ -1097,7 +1129,6 @@ int allocate_REs_in_RB(LTE_DL_FRAME_PARMS *frame_parms,
return(0); return(0);
} }
int allocate_REs_in_RB_MCH(int32_t **txdataF, int allocate_REs_in_RB_MCH(int32_t **txdataF,
uint32_t *jj, uint32_t *jj,
uint16_t re_offset, uint16_t re_offset,
...@@ -1305,32 +1336,75 @@ int dlsch_modulation(int32_t **txdataF, ...@@ -1305,32 +1336,75 @@ int dlsch_modulation(int32_t **txdataF,
{ {
uint8_t nsymb; uint8_t nsymb;
uint8_t harq_pid = dlsch0->current_harq_pid; uint8_t harq_pid; //= dlsch0->current_harq_pid;
LTE_DL_eNB_HARQ_t *dlsch0_harq = dlsch0->harq_processes[harq_pid]; LTE_DL_eNB_HARQ_t *dlsch0_harq;
LTE_DL_eNB_HARQ_t *dlsch1_harq; //= dlsch1->harq_processes[harq_pid]; LTE_DL_eNB_HARQ_t *dlsch1_harq; //= dlsch1->harq_processes[harq_pid];
uint32_t i,jj,jj2,re_allocated,symbol_offset; uint32_t i,jj,jj2,re_allocated,symbol_offset;
uint16_t l,rb,re_offset; uint16_t l,rb,re_offset;
uint32_t rb_alloc_ind; uint32_t rb_alloc_ind;
uint32_t *rb_alloc = dlsch0_harq->rb_alloc; uint32_t *rb_alloc; //=dlsch0_harq->rb_alloc;
uint8_t pilots=0; uint8_t pilots=0;
uint8_t skip_dc,skip_half; uint8_t skip_dc,skip_half;
uint8_t mod_order0 = get_Qm(dlsch0_harq->mcs); uint8_t mod_order0 = 0;
uint8_t mod_order1 = 0; uint8_t mod_order1 = 0;
int16_t amp_rho_a, amp_rho_b; int16_t amp_rho_a, amp_rho_b;
int16_t qam16_table_a0[4],qam64_table_a0[8],qam16_table_b0[4],qam64_table_b0[8]; int16_t qam16_table_a0[4],qam64_table_a0[8],qam16_table_b0[4],qam64_table_b0[8];
int16_t qam16_table_a1[4],qam64_table_a1[8],qam16_table_b1[4],qam64_table_b1[8]; int16_t qam16_table_a1[4],qam64_table_a1[8],qam16_table_b1[4],qam64_table_b1[8];
int16_t *qam_table_s0,*qam_table_s1; int16_t *qam_table_s0,*qam_table_s1;
uint8_t get_pmi_temp;
#ifdef DEBUG_DLSCH_MODULATION #ifdef DEBUG_DLSCH_MODULATION
uint8_t Nl0 = dlsch0_harq->Nl; uint8_t Nl0; //= dlsch0_harq->Nl;
uint8_t Nl1; uint8_t Nl1;
#endif #endif
if (dlsch1) { if ((dlsch0 != NULL) && (dlsch1 != NULL)){
harq_pid = dlsch0->current_harq_pid;
dlsch0_harq = dlsch0->harq_processes[harq_pid];
mod_order0 = get_Qm(dlsch0_harq->mcs);
rb_alloc = dlsch0_harq->rb_alloc;
#ifdef DEBUG_DLSCH_MODULATION
Nl0 = dlsch0_harq->Nl;
#endif
dlsch1_harq = dlsch1->harq_processes[harq_pid]; dlsch1_harq = dlsch1->harq_processes[harq_pid];
mod_order1 = get_Qm(dlsch1_harq->mcs); mod_order1 = get_Qm(dlsch1_harq->mcs);
#ifdef DEBUG_DLSCH_MODULATION #ifdef DEBUG_DLSCH_MODULATION
Nl1 = dlsch1_harq->Nl; Nl1 = dlsch1_harq->Nl;
#endif #endif
}else if ((dlsch0 != NULL) && (dlsch1 == NULL)){
harq_pid = dlsch0->current_harq_pid;
dlsch0_harq = dlsch0->harq_processes[harq_pid];
mod_order0 = get_Qm(dlsch0_harq->mcs);
rb_alloc = dlsch0_harq->rb_alloc;
#ifdef DEBUG_DLSCH_MODULATION
Nl0 = dlsch0_harq->Nl;
#endif
dlsch1_harq = NULL;
mod_order1 = 0;
#ifdef DEBUG_DLSCH_MODULATION
Nl1 = 0;
#endif
}else if ((dlsch0 == NULL) && (dlsch1 != NULL)){
harq_pid = dlsch1->current_harq_pid;
dlsch1_harq = dlsch1->harq_processes[harq_pid];
mod_order0 = get_Qm(dlsch1_harq->mcs);
rb_alloc = dlsch1_harq->rb_alloc;
#ifdef DEBUG_DLSCH_MODULATION
Nl0 = dlsch1_harq->Nl;
#endif
dlsch0_harq = NULL;
mod_order1 = 0;
#ifdef DEBUG_DLSCH_MODULATION
Nl1 = NULL;
#endif
} }
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_MODULATION, VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_MODULATION, VCD_FUNCTION_IN);
......
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