Commit 859aa1d2 authored by Guy De Souza's avatar Guy De Souza

Initial BWP config

parent 271303c5
develop 1 128-ues 256_QAM_demod 375-syrtem-sdr-platform 408-reworked 408-ue-main-threads 445-LDPC-implementation-on-GPU 459-pusch-based-ta-updates 464-ru_beamforming_in_gpu 464-ru_beamforming_in_gpu-CPUsubfunction 472-add-pusch-dmrs-modes 481-ldpc-decoder-on-gpu 5g_fapi_scf LTE_TRX_on_single_port NCTU_CS_ISIP NCTU_CS_ISIP_CPU NCTU_CS_ISIP_GPU NCTU_OpinConnect_LDPC NR-PHY-MAC-IF-multi-UE NRUE_usedlschparallel NR_10MHz NR_CSI_reporting NR_DCI_01 NR_DLUL_PF NR_DLUL_PF_4UL NR_DLUL_PF_rebased NR_DL_MIMO NR_DL_sched_fixes NR_DL_scheduler NR_FAPI_beamindex_SSB_RO NR_FDD_FIX NR_FR2_RA NR_FR2_RRC_SSB NR_MAC_CE_GlobalEdge NR_MAC_Multi_Rach_GlobalEdge NR_MAC_SSB_RO_GlobalEdge NR_MAC_SSB_RO_UE_IDCC NR_MAC_SSB_RO_merge NR_MAC_TCI_UCI_GlobalEdge NR_NGAP NR_PDCP_noS1 NR_PUCCH_MultiUE NR_RA_cleanup NR_RA_updates NR_RRCConfiguragion_FR2 NR_RRCConfiguration NR_RRCConfiguration_FR2 NR_RRCConfiguration_S1U NR_RRCConfiguration_merge_develop NR_RRCConfiguration_sync_source NR_RRCConfiguration_trx_thread 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ldpc-decoder-codegen ldpc-decoder-codegen2 ldpc-decoder-improvements ldpc-offload ldpc_short_codeword_fixes load_gnb lte-ulsch-bugfix lte_uplink_improvement mac-fixes-wk45_2 mbms-fix-develop-nr merging-2019-w51-to-develop-nr minor-fix-doc-basic-sim mosaic5g-oai-ran mosaic5g-oai-sim nasmesh_kernel_5.8 new-gtpu new_rlc_2020 nfapi-bugfix nfapi_nr_develop ngap-dlul ngap-support ngap-w48-merge2 ngap-wf ngap-wf-1120 ngap-wf-1120-srb ngap-wf-1120-srb-gtp ngap-wf-1120-srb-gtp-hs ngap-wf-1120-srb-gtp-hs1 ngap-wf-1120-srb-gtp-hs2 ngap-wf-1120-srb-gtp-yhz ngap-wf-1203-yunsdr ngap-wf-liuyu ngap_lfq_1120 ngap_merge noCore nr-coreset-bug-fix nr-dlsch-multi-thread nr-dlsch-thread nr-dual-connectivity nr-interdigital-test nr-ip-uplink-noS1 nr-mac-pdu-wireshark nr-mac-remove-ue-list nr-multiple-ssb nr-pdcp nr-pdsch-extraction-bugfix nr-physim-update nr-rlc-am-bugfix-w44 nr-rlc-bugfix-w44 nr-ssb-measurements nr-timing-measurement nr-timing-measurement-merge nr-ue-buffer-status nr-ue-slot-based nr-uldci nrUE nrUE-hs nrUE-upper-layer nr_beamforming nr_bsr nr_ci_dlsim nr_csi_newbranch nr_dci_procedures nr_demo_wsa2019 nr_dl_dmrs_type2 nr_dl_pf nr_dl_pf2 nr_dl_ul_ptrs nr_dlsch_parallel_measurements nr_dlsim_plot nr_fapi_for_push_tmp nr_fdd_if_fix nr_fix_easycppcheck nr_flexible_NRBDL nr_improve_build_procedures nr_increase_tp nr_mib_vsa_test nr_pdcch_testing nr_pdcch_updates nr_pdsch_integration nr_polar_decoder_improvement nr_prach nr_prach_fr2 nr_pucch nr_pucch2 nr_segmentation_fixes nr_sim_fix nr_tdd_configuration nr_ue_msg3 nr_ue_tti_cleanup nr_ul_pf nr_ul_scfdma nr_vcd nrue-multi-thread nrue_msg2_reception nsa-ue nsa_remove_band_hardcodings oai-sim oai-ubuntu-docker oai-ubuntu-docker-for-lmssdr oairu oairu-dockerfile-support oc-docker-october-improvements openxg/develop pdcp-benchmark pdsch-ch-est polar8 ptrs_rrc_config pusch-mthread-scaling-fix pusch-retrans-fix-ue ra-dl-ul reduce_memory_footprint remove-ci-workaround remove_nos1_hack_pdcp remove_x2_gnb_hardcoding repair-TA revert-f5c94279 revert_memcpy rh-ci-add-ue-parallelization rh_ci_fix_autoterminate rh_ci_fr1_update rh_ci_oc rh_ci_py rh_ci_ra_fr2 rh_ci_rfsim_ra rh_ci_ue_parallel rh_doc_update_3 rh_fr1_newjenkins rh_fr1_update rh_gnb_compile_fix rh_wk50_debug rlc-v2-bugfix-status-reporting rlc-v2-tick rlc_v2_coverity_fixes rrc-enb-phy-testmode ru-parallel-beamforming runel runel-reverse-test s1-subnormal_rewrite s1_subnormal s1_subnormal-robert s1ap-bugfix-rab_setup sa-demo sa-merge-rrc-srb sa-msg4 sa-msg4-rrc sa-msg4-rrc-yihz sa-msg4-rrc-yihz-hs sa_rrc_yihz small-bugfixes-w40 small-config-change smallcleanup softmodem_cleanup split73 test-x310-perf testing_2symb_pdcch testing_with_external_txdata thread-pool tools_5Gadapt tp-ota-test trx_thread_param trx_write_thread ue-csi ue-fixes ue-fixes-ota ue-updates-runel-test ue_adjust_gain ue_beam_selection ue_dlsch-multi-threading ue_dlsch_decoding_ldpc_offload ue_nfapi_mch uhd_priority_set_cleanup ul-freq-iq-samps-to-file ul_dl_dci_same_slot ul_harq ulsch_decode_mthread ulsim_changes update-to-2019-march-june-release usrp_fix_adc_shift_and_pps_sync usrp_gpio_test wireshark-T-hack-ueid wireshark-log-scheduling-requests x2-endc-processing xiangwab xiangwan yihongzheng_srb zzs 2021.w04 2021.w02 2020.w51_2 2020.w51 2020.w50 2020.w49 2020.w48_2 2020.w48 2020.w47 2020.w46_2 2020.w46 2020.w45_2 2020.w45 2020.w44 2020.w42_2 2020.w42 2020.w41 2020.w39 2020.w38 2020.w37 2020.w36 2020.w34 2020.w33 2020.w31 2020.w30 2020.w29 2020.w28 2020.w26 2020.w25 2020.w24 2020.w23 2020.w22 2020.w19 2020.w17 2020.w16 2020.w15 2020.w11 2020.w09 2020.w06 2020.w05 2020.w04 2020.w03 osa-etsi-ws-ue osa-etsi-ws-try2 osa-etsi-ws-try1 osa-etsi-ws-gNB nr-ip-over-lte nr-ip-over-lte-v.1.5 nr-ip-over-lte-v.1.4 nr-ip-over-lte-v.1.3 nr-ip-over-lte-v.1.2 nr-ip-over-lte-v.1.1 nr-ip-over-lte-v.1.0 develop-nr-pdcch develop-nr-2020w03 develop-nr-2020w02 develop-nr-2019w51 develop-nr-2019w50 develop-nr-2019w48 develop-nr-2019w47 develop-nr-2019w45 develop-nr-2019w43 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...@@ -40,7 +40,7 @@ int nr_init_frame_parms(nfapi_nr_config_request_t* config, ...@@ -40,7 +40,7 @@ int nr_init_frame_parms(nfapi_nr_config_request_t* config,
LOG_I(PHY,"Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",mu, N_RB, Ncp); LOG_I(PHY,"Initializing frame parms for mu %d, N_RB %d, Ncp %d\n",mu, N_RB, Ncp);
#endif #endif
if (Ncp == EXTENDED) if (Ncp == NFAPI_CP_EXTENDED)
AssertFatal(mu == NR_MU_2,"Invalid cyclic prefix %d for numerology index %d\n", Ncp, mu); AssertFatal(mu == NR_MU_2,"Invalid cyclic prefix %d for numerology index %d\n", Ncp, mu);
switch(mu) { switch(mu) {
...@@ -148,6 +148,14 @@ int nr_init_frame_parms(nfapi_nr_config_request_t* config, ...@@ -148,6 +148,14 @@ int nr_init_frame_parms(nfapi_nr_config_request_t* config,
frame_parms->samples_per_frame = 10 * frame_parms->samples_per_subframe; frame_parms->samples_per_frame = 10 * frame_parms->samples_per_subframe;
frame_parms->freq_range = (frame_parms->dl_CarrierFreq < 6e9)? nr_FR1 : nr_FR2; frame_parms->freq_range = (frame_parms->dl_CarrierFreq < 6e9)? nr_FR1 : nr_FR2;
// Initial bandwidth part configuration -- full carrier bandwidth
frame_parms->initial_bwp_dl.bwp_id = 0;
frame_parms->initial_bwp_dl.scs = frame_parms->subcarrier_spacing;
frame_parms->initial_bwp_dl.location = 0;
frame_parms->initial_bwp_dl.N_RB = N_RB;
frame_parms->initial_bwp_dl.cyclic_prefix = Ncp;
frame_parms->initial_bwp_dl.ofdm_symbol_size = frame_parms->ofdm_symbol_size;
return 0; return 0;
} }
...@@ -300,4 +308,10 @@ void nr_dump_frame_parms(NR_DL_FRAME_PARMS *frame_parms) ...@@ -300,4 +308,10 @@ void nr_dump_frame_parms(NR_DL_FRAME_PARMS *frame_parms)
LOG_I(PHY,"frame_parms->samples_per_frame_wCP=%d\n",frame_parms->samples_per_frame_wCP); LOG_I(PHY,"frame_parms->samples_per_frame_wCP=%d\n",frame_parms->samples_per_frame_wCP);
LOG_I(PHY,"frame_parms->samples_per_subframe=%d\n",frame_parms->samples_per_subframe); LOG_I(PHY,"frame_parms->samples_per_subframe=%d\n",frame_parms->samples_per_subframe);
LOG_I(PHY,"frame_parms->samples_per_frame=%d\n",frame_parms->samples_per_frame); LOG_I(PHY,"frame_parms->samples_per_frame=%d\n",frame_parms->samples_per_frame);
LOG_I(PHY,"frame_parms->initial_bwp_dl.bwp_id=%d\n",frame_parms->initial_bwp_dl.bwp_id);
LOG_I(PHY,"frame_parms->initial_bwp_dl.scs=%d\n",frame_parms->initial_bwp_dl.scs);
LOG_I(PHY,"frame_parms->initial_bwp_dl.N_RB=%d\n",frame_parms->initial_bwp_dl.N_RB);
LOG_I(PHY,"frame_parms->initial_bwp_dl.cyclic_prefix=%d\n",frame_parms->initial_bwp_dl.cyclic_prefix);
LOG_I(PHY,"frame_parms->initial_bwp_dl.location=%d\n",frame_parms->initial_bwp_dl.location);
LOG_I(PHY,"frame_parms->initial_bwp_dl.ofdm_symbol_size=%d\n",frame_parms->initial_bwp_dl.ofdm_symbol_size);
} }
...@@ -32,6 +32,7 @@ ...@@ -32,6 +32,7 @@
#include "nr_dci.h" #include "nr_dci.h"
void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB, void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
int frame, int frame,
int subframe, int subframe,
...@@ -77,6 +78,9 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB, ...@@ -77,6 +78,9 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
break; break;
} }
LOG_I(MAC, "DCI PDU: [0]->0x%08x \t [0]->0x%08x [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
dci_pdu[0], dci_pdu[1], dci_pdu[2], dci_pdu[3]);
/// rest of DCI alloc /// rest of DCI alloc
memcpy((void*)&dci_alloc->pdcch_params, (void*)params_rel15, sizeof(nfapi_nr_dl_config_pdcch_parameters_rel15_t)); memcpy((void*)&dci_alloc->pdcch_params, (void*)params_rel15, sizeof(nfapi_nr_dl_config_pdcch_parameters_rel15_t));
dci_alloc->size = nr_get_dci_size(NFAPI_NR_DL_DCI_FORMAT_1_0, dci_alloc->size = nr_get_dci_size(NFAPI_NR_DL_DCI_FORMAT_1_0,
......
...@@ -106,14 +106,18 @@ typedef enum { ...@@ -106,14 +106,18 @@ typedef enum {
} nr_frequency_range_e; } nr_frequency_range_e;
typedef struct NR_BWP_PARMS { typedef struct NR_BWP_PARMS {
/// Associated numerology index /// BWP ID
uint8_t numerology_index; uint8_t bwp_id;
/// Freq domain location /// Subcarrier spacing
nr_scs_e scs;
/// Freq domain location -- 1st CRB index
uint8_t location; uint8_t location;
/// Bandwidth in PRB /// Bandwidth in PRB
uint16_t N_RB; uint16_t N_RB;
/// Size of FFT/IFFT /// Size of FFT/IFFT
uint16_t ofdm_symbol_size; uint16_t ofdm_symbol_size;
/// Cyclic prefix
uint8_t cyclic_prefix;
} NR_BWP_PARMS; } NR_BWP_PARMS;
typedef struct { typedef struct {
...@@ -191,7 +195,6 @@ typedef struct NR_DL_FRAME_PARMS { ...@@ -191,7 +195,6 @@ typedef struct NR_DL_FRAME_PARMS {
uint8_t ttis_per_subframe; uint8_t ttis_per_subframe;
/// NR number of slots per tti . Assumption only 2 Slot per TTI is supported (Slot Config 1 in 38.211) /// NR number of slots per tti . Assumption only 2 Slot per TTI is supported (Slot Config 1 in 38.211)
uint8_t slots_per_tti; uint8_t slots_per_tti;
//#endif
/// Number of Physical transmit antennas in node /// Number of Physical transmit antennas in node
uint8_t nb_antennas_tx; uint8_t nb_antennas_tx;
/// Number of Receive antennas in node /// Number of Receive antennas in node
......
...@@ -53,11 +53,11 @@ gNBs = ...@@ -53,11 +53,11 @@ gNBs =
DL_FreqBandIndicatorNR = 15; DL_FreqBandIndicatorNR = 15;
DL_absoluteFrequencyPointA = 15; DL_absoluteFrequencyPointA = 15;
DL_offsetToCarrier = 15; DL_offsetToCarrier = 15;
DL_SCS_SubcarrierSpacing = "kHz15"; DL_SCS_SubcarrierSpacing = "kHz30";
DL_SCS_SpecificCarrier_k0 = 0; DL_SCS_SpecificCarrier_k0 = 0;
DL_carrierBandwidth = 15; DL_carrierBandwidth = 15;
DL_locationAndBandwidth = 15; DL_locationAndBandwidth = 15;
DL_BWP_SubcarrierSpacing = "kHz15"; DL_BWP_SubcarrierSpacing = "kHz30";
DL_BWP_prefix_type = "NORMAL"; DL_BWP_prefix_type = "NORMAL";
UL_FreqBandIndicatorNR = 15; UL_FreqBandIndicatorNR = 15;
UL_absoluteFrequencyPointA = 13; UL_absoluteFrequencyPointA = 13;
...@@ -65,11 +65,11 @@ gNBs = ...@@ -65,11 +65,11 @@ gNBs =
UL_p_Max = -1; UL_p_Max = -1;
UL_frequencyShift7p5khz = "TRUE"; UL_frequencyShift7p5khz = "TRUE";
UL_offsetToCarrier = 10; UL_offsetToCarrier = 10;
UL_SCS_SubcarrierSpacing = "kHz15"; UL_SCS_SubcarrierSpacing = "kHz30";
UL_SCS_SpecificCarrier_k0 = 0; UL_SCS_SpecificCarrier_k0 = 0;
UL_carrierBandwidth = 15; UL_carrierBandwidth = 15;
UL_locationAndBandwidth = 15; UL_locationAndBandwidth = 15;
UL_BWP_SubcarrierSpacing = "kHz15"; UL_BWP_SubcarrierSpacing = "kHz30";
UL_BWP_prefix_type = "NORMAL"; UL_BWP_prefix_type = "NORMAL";
ServingCellConfigCommon__ssb_PositionsInBurst_PR = "shortBitmap"; ServingCellConfigCommon__ssb_PositionsInBurst_PR = "shortBitmap";
ServingCellConfigCommon_ssb_periodicityServingCell = 10; ServingCellConfigCommon_ssb_periodicityServingCell = 10;
...@@ -102,7 +102,7 @@ gNBs = ...@@ -102,7 +102,7 @@ gNBs =
prach_RootSequenceIndex_choice = "l839"; prach_RootSequenceIndex_choice = "l839";
prach_RootSequenceIndex_l839 = 0; prach_RootSequenceIndex_l839 = 0;
prach_RootSequenceIndex_l139 = 0; prach_RootSequenceIndex_l139 = 0;
prach_msg1_SubcarrierSpacing = "kHz15"; prach_msg1_SubcarrierSpacing = "kHz30";
restrictedSetConfig = "unrestrictedSet"; restrictedSetConfig = "unrestrictedSet";
msg3_transformPrecoding = "ENABLE"; msg3_transformPrecoding = "ENABLE";
prach_ConfigurationIndex = 10; prach_ConfigurationIndex = 10;
...@@ -127,7 +127,7 @@ gNBs = ...@@ -127,7 +127,7 @@ gNBs =
symbolsInResourceBlock = "oneSlot"; symbolsInResourceBlock = "oneSlot";
periodicityAndPattern = 2; periodicityAndPattern = 2;
RateMatchPattern_controlResourceSet = 5; RateMatchPattern_controlResourceSet = 5;
RateMatchPattern_subcarrierSpacing = "kHz15"; RateMatchPattern_subcarrierSpacing = "kHz30";
RateMatchPattern_mode = "dynamic"; RateMatchPattern_mode = "dynamic";
searchSpaceSIB1 = 10; searchSpaceSIB1 = 10;
searchSpaceOtherSystemInformation = 10; searchSpaceOtherSystemInformation = 10;
......
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