Commit 864fa84b authored by Robert Schmidt's avatar Robert Schmidt

Default SCHED RR algo: optimize algo and defer RB calc.

- Loop only to next UE instead of jumping multiple

- mark used RBGs in rbg_mask

- Only calculate number of RBs based on CQI when UE is selected, instead
of calculating for all UEs which might be unnecessary.

- When looping the list of UEs for RB allocation, remove UEs that have
no data anymore instead of skipping them.
parent 82194319
develop 1 128-ues 256_QAM_demod NCTU_OpinConnect_LDPC NR-PHY-MAC-IF-multi-UE NRUE_usedlschparallel NR_10MHz NR_CSI_reporting NR_DLUL_PF NR_DLUL_PF_4UL NR_DLUL_PF_rebased NR_DL_MIMO NR_DL_sched_fixes NR_DL_scheduler NR_FAPI_beamindex_SSB_RO NR_FDD_FIX NR_FR2_RA NR_FR2_RRC_SSB NR_MAC_Multi_Rach_GlobalEdge NR_MAC_SSB_RO_GlobalEdge NR_MAC_SSB_RO_UE_IDCC NR_MAC_SSB_RO_merge NR_MAC_TCI_UCI_GlobalEdge NR_NGAP NR_PUCCH_MultiUE NR_RA_cleanup NR_RA_updates NR_RRCConfiguration_FR2 NR_RRC_config_simplified NR_SA_F1AP_RFSIMULATOR NR_SA_F1AP_RFSIMULATOR2 NR_SA_F1AP_dev NR_SA_NGAP_RRC NR_SA_NGAP_RRC_wk42 NR_SA_itti_sim_wk48 NR_SA_itti_sim_wk48_hs NR_SA_itti_sim_wk48_hs1 NR_SCHED_HARQ NR_SCHED_PDCCH_PUCCH_HARQ NR_SCHED_PDCCH_PUCCH_HARQ_rebased NR_SCHED_fixes NR_SRB_Config NR_UE_MAC_scheduler NR_UE_RA_fixes NR_UE_UL_DCI_improvements NR_UE_dlsch_bugfix NR_UE_enable_parallelization NR_UE_stability_fixes NR_UL_scheduler NR_UL_scheduler_rebased NR_Wireshark NR_beam_simulation NR_mac_uci_functions_rework NR_scheduling_CSIRS NR_scheduling_request NR_scheduling_request2 NR_scheduling_request3 PUSCH_TA_update RA_CI_test UE_DL_DCI_hotfix bch-fixes-bitmap benetel_5g_prach_fix benetel_driver_uldl_pf_merge benetel_driver_update benetel_phase_rotation benetel_phase_rotation_old bugfix-nr-bands bugfix-nr-ldpc-post-processing bugfix-nr-ldpc-size-typo bugfix-nr-pdcp-sn-size bugfix-nr-rate-matching-assertion bugfix-x2-SgNBAdditionRequest bupt-sa-merge cce_indexing_fix cce_indexing_fix2 ci-deploy-asterix ci-deploy-docker-compose ci-test ci-ul-iperf-from-trf-container cleanup_softmodem_main constant_power develop-SA-RA develop-SnT develop-oriecpriupdates develop-sib1 develop-sib1-local develop-sib1-lts develop-sib1-update develop-sib1-update-test1 develop-sib1-update-ue develop_stable dfts_alternatives dlsch_encode_mthread dlsch_parallel dongzhanyi-zte-develop2 feature/make-s1-mme-port-configurable feature/make-s1-mme-port-configurable-with-astyle-fixes fembms-enb-ue finalize-oaicn-integration firas fix-ci-tun fix-itti-segv fix-softmodem-restart fix_NR_DLUL_PF fix_do_ra_data fix_pdsch_low_prb fix_rfsim_mimo fix_rrc_x2_ticking fixes-CE-RLC-PDU-size fixes-mac-sched-nfapi fixes-mac-sched-tun fixes-tun flexran-apps flexran-repair-mme-mgmt fujitsu_lte_contribution fujitsu_lte_contribution-128 gnb-only-test harq-hotfix hotfix-minor-remove-nr-rlc-cppcheck-error hotfix-nr-rlc-tick hotfix-ocp-executable improve_nr_modulation integration_2020_wk40 integration_2020_wk41 integration_2020_wk42_2 integration_2020_wk45 integration_2020_wk45_2 integration_2020_wk46 integration_2020_wk46_2 integration_2020_wk47 integration_2020_wk48 integration_2020_wk48_2 integration_2020_wk49 integration_2020_wk50 integration_2020_wk50_1 integration_2020_wk51 integration_2020_wk51_2 integration_2021_wk02 integration_2021_wk02_wMR988 integration_2021_wk04 integration_2021_wk05 inter-RRU-final itti-enhancement ldpc-decoder-codegen ldpc-decoder-codegen2 ldpc_short_codeword_fixes load_gnb lte-ulsch-bugfix lte_uplink_improvement mac-fixes-wk45_2 minor-fix-doc-basic-sim mosaic5g-oai-ran mosaic5g-oai-sim nasmesh_kernel_5.8 new-gtpu nfapi_nr_develop ngap-dlul ngap-support ngap-w48-merge2 ngap-wf ngap-wf-1120 ngap-wf-1120-srb ngap-wf-1120-srb-gtp ngap-wf-1120-srb-gtp-hs ngap-wf-1120-srb-gtp-hs1 ngap-wf-1120-srb-gtp-hs2 ngap-wf-1120-srb-gtp-yhz ngap-wf-1203-yunsdr ngap-wf-liuyu ngap_lfq_1120 ngap_merge noCore nr-mac-pdu-wireshark nr-mac-remove-ue-list nr-rlc-am-bugfix-w44 nr-rlc-bugfix-w44 nrUE nrUE-hs nrUE-upper-layer nr_bsr nr_dl_dmrs_type2 nr_dl_pf nr_dl_pf2 nr_dl_ul_ptrs nr_fdd_if_fix nr_prach_fr2 nr_ue_msg3 nr_ue_tti_cleanup nr_ul_pf nr_ul_scfdma nrue_msg2_reception nsa-ue nsa_remove_band_hardcodings oai-sim oairu oairu-dockerfile-support oc-docker-october-improvements openxg/develop ptrs_rrc_config pusch-mthread-scaling-fix pusch-retrans-fix-ue ra-dl-ul remove_nos1_hack_pdcp remove_x2_gnb_hardcoding repair-TA revert_memcpy rh-ci-add-ue-parallelization rh_ci_fix_autoterminate rh_ci_fr1_update rh_ci_oc rh_ci_py rh_ci_ra_fr2 rh_ci_rfsim_ra rh_ci_ue_parallel rh_fr1_newjenkins rh_fr1_update rh_gnb_compile_fix rh_wk50_debug rlc-v2-bugfix-status-reporting rlc-v2-tick rrc-enb-phy-testmode s1-subnormal_rewrite s1_subnormal s1_subnormal-robert s1ap-bugfix-rab_setup sa-demo sa-merge-rrc-srb sa-msg4 sa-msg4-rrc sa-msg4-rrc-yihz sa-msg4-rrc-yihz-hs sa_rrc_yihz small-bugfixes-w40 small-config-change smallcleanup testing_with_external_txdata ue-fixes ue_beam_selection ul-freq-iq-samps-to-file ul_dl_dci_same_slot ulsch_decode_mthread ulsim_changes wireshark-T-hack-ueid wireshark-log-scheduling-requests x2-endc-processing xiangwab xiangwan yihongzheng_srb zzs 2021.w04 2021.w02 2020.w51_2 2020.w51 2020.w50 2020.w49 2020.w48_2 2020.w48 2020.w47 2020.w46_2 2020.w46 2020.w45_2 2020.w45 2020.w44 2020.w42_2 2020.w42 2020.w41 2020.w39 2020.w38 2020.w37 2020.w36 2020.w34 2020.w33 2020.w31 2020.w30 benetel_phase_rotation
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...@@ -86,9 +86,6 @@ int round_robin_dl(module_id_t Mod_id, ...@@ -86,9 +86,6 @@ int round_robin_dl(module_id_t Mod_id,
int num_ue_req = 0; int num_ue_req = 0;
UE_info_t *UE_info = &RC.mac[Mod_id]->UE_info; UE_info_t *UE_info = &RC.mac[Mod_id]->UE_info;
int rb_required[MAX_MOBILES_PER_ENB]; // how much UEs request
memset(rb_required, 0, sizeof(rb_required));
int rbg = 0; int rbg = 0;
for (; !rbgalloc_mask[rbg]; rbg++) for (; !rbgalloc_mask[rbg]; rbg++)
; /* fast-forward to first allowed RBG */ ; /* fast-forward to first allowed RBG */
...@@ -133,6 +130,7 @@ int round_robin_dl(module_id_t Mod_id, ...@@ -133,6 +130,7 @@ int round_robin_dl(module_id_t Mod_id,
if (!rbgalloc_mask[rbg]) if (!rbgalloc_mask[rbg])
continue; continue;
ue_ctrl->rballoc_sub_UE[CC_id][rbg] = 1; ue_ctrl->rballoc_sub_UE[CC_id][rbg] = 1;
rbgalloc_mask[rbg] = 0;
nb_rbg--; nb_rbg--;
} }
LOG_D(MAC, LOG_D(MAC,
...@@ -150,22 +148,8 @@ int round_robin_dl(module_id_t Mod_id, ...@@ -150,22 +148,8 @@ int round_robin_dl(module_id_t Mod_id,
return n_rbg_sched; return n_rbg_sched;
for (; !rbgalloc_mask[rbg]; rbg++) /* fast-forward */ ; for (; !rbgalloc_mask[rbg]; rbg++) /* fast-forward */ ;
} else { } else {
const int dlsch_mcs1 = cqi_to_mcs[UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id]]; if (UE_info->UE_template[CC_id][UE_id].dl_buffer_total > 0)
UE_info->eNB_UE_stats[CC_id][UE_id].dlsch_mcs1 = dlsch_mcs1;
rb_required[UE_id] =
find_nb_rb_DL(dlsch_mcs1,
UE_info->UE_template[CC_id][UE_id].dl_buffer_total,
n_rbg_sched * RBGsize,
RBGsize);
if (rb_required[UE_id] > 0)
num_ue_req++; num_ue_req++;
LOG_D(MAC,
"%d/%d UE_id %d rb_required %d n_rbg_sched %d\n",
frame,
subframe,
UE_id,
rb_required[UE_id],
n_rbg_sched);
} }
} }
...@@ -178,12 +162,13 @@ int round_robin_dl(module_id_t Mod_id, ...@@ -178,12 +162,13 @@ int round_robin_dl(module_id_t Mod_id,
g_start_ue_dl = UE_list->head; g_start_ue_dl = UE_list->head;
int UE_id = g_start_ue_dl; int UE_id = g_start_ue_dl;
UE_list_t UE_sched; UE_list_t UE_sched;
int rb_required_total = 0; int *cur_UE = &UE_sched.head;
int num_ue_sched = 0; int num_ue_sched = 0;
max_num_ue = min(min(max_num_ue, num_ue_req), n_rbg_sched); max_num_ue = min(min(max_num_ue, num_ue_req), n_rbg_sched);
int *cur_UE = &UE_sched.head; int rb_required[MAX_MOBILES_PER_ENB]; // how much UEs request
while (num_ue_sched < max_num_ue) { while (num_ue_sched < max_num_ue) {
while (rb_required[UE_id] == 0) while (UE_info->UE_template[CC_id][UE_id].dl_buffer_total <= 0)
UE_id = next_ue_list_looped(UE_list, UE_id); UE_id = next_ue_list_looped(UE_list, UE_id);
const uint8_t cqi = UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id]; const uint8_t cqi = UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id];
const int idx = CCE_try_allocate_dlsch(Mod_id, CC_id, subframe, UE_id, cqi); const int idx = CCE_try_allocate_dlsch(Mod_id, CC_id, subframe, UE_id, cqi);
...@@ -195,42 +180,42 @@ int round_robin_dl(module_id_t Mod_id, ...@@ -195,42 +180,42 @@ int round_robin_dl(module_id_t Mod_id,
continue; continue;
} }
UE_info->UE_sched_ctrl[UE_id].pre_dci_dl_pdu_idx = idx; UE_info->UE_sched_ctrl[UE_id].pre_dci_dl_pdu_idx = idx;
const int mcs = cqi_to_mcs[cqi];
UE_info->eNB_UE_stats[CC_id][UE_id].dlsch_mcs1 = mcs;
const uint32_t B = UE_info->UE_template[CC_id][UE_id].dl_buffer_total;
rb_required[UE_id] = find_nb_rb_DL(mcs, B, n_rbg_sched * RBGsize, RBGsize);
*cur_UE = UE_id; *cur_UE = UE_id;
cur_UE = &UE_sched.next[UE_id]; cur_UE = &UE_sched.next[UE_id];
rb_required_total += rb_required[UE_id];
num_ue_sched++; num_ue_sched++;
UE_id = next_ue_list_looped(UE_list, UE_id); // next candidate UE_id = next_ue_list_looped(UE_list, UE_id); // next candidate
} }
*cur_UE = -1; *cur_UE = -1;
/* for one UE after the next: allocate resources */ /* for one UE after the next: allocate resources */
for (int UE_id = UE_sched.head; UE_id >= 0; cur_UE = &UE_sched.head;
UE_id = next_ue_list_looped(&UE_sched, UE_id)) { while (*cur_UE >= 0) {
if (rb_required[UE_id] <= 0) const int UE_id = *cur_UE;
continue;
UE_sched_ctrl_t *ue_ctrl = &UE_info->UE_sched_ctrl[UE_id]; UE_sched_ctrl_t *ue_ctrl = &UE_info->UE_sched_ctrl[UE_id];
ue_ctrl->rballoc_sub_UE[CC_id][rbg] = 1; ue_ctrl->rballoc_sub_UE[CC_id][rbg] = 1;
rbgalloc_mask[rbg] = 0;
const int sRBG = rbg == N_RBG - 1 ? RBGlastsize : RBGsize; const int sRBG = rbg == N_RBG - 1 ? RBGlastsize : RBGsize;
ue_ctrl->pre_nb_available_rbs[CC_id] += sRBG; ue_ctrl->pre_nb_available_rbs[CC_id] += sRBG;
rb_required[UE_id] -= sRBG; rb_required[UE_id] -= sRBG;
rb_required_total -= sRBG; if (rb_required[UE_id] <= 0) {
if (rb_required_total <= 0) *cur_UE = UE_sched.next[*cur_UE];
break; if (*cur_UE < 0)
cur_UE = &UE_sched.head;
} else {
cur_UE = UE_sched.next[*cur_UE] < 0 ? &UE_sched.head : &UE_sched.next[*cur_UE];
}
n_rbg_sched--; n_rbg_sched--;
if (n_rbg_sched <= 0) if (n_rbg_sched <= 0)
break; break;
for (rbg++; !rbgalloc_mask[rbg]; rbg++) /* fast-forward */ ; for (rbg++; !rbgalloc_mask[rbg]; rbg++) /* fast-forward */ ;
} }
/* if not all UEs could be allocated in this round */ /* just start with the next UE next time */
if (num_ue_req > max_num_ue) {
/* go to the first one we missed */
for (int i = 0; i < max_num_ue; ++i)
g_start_ue_dl = next_ue_list_looped(UE_list, g_start_ue_dl);
} else {
/* else, just start with the next UE next time */
g_start_ue_dl = next_ue_list_looped(UE_list, g_start_ue_dl); g_start_ue_dl = next_ue_list_looped(UE_list, g_start_ue_dl);
}
return n_rbg_sched; return n_rbg_sched;
} }
...@@ -742,15 +727,8 @@ int round_robin_ul(module_id_t Mod_id, ...@@ -742,15 +727,8 @@ int round_robin_ul(module_id_t Mod_id,
} }
} }
/* if not all UEs could be allocated in this round */ /* just start with the next UE next time */
if (num_ue_req > max_num_ue) {
/* go to the first one we missed */
for (int i = 0; i < max_num_ue; ++i)
g_start_ue_ul = next_ue_list_looped(UE_list, g_start_ue_ul); g_start_ue_ul = next_ue_list_looped(UE_list, g_start_ue_ul);
} else {
/* else, just start with the next UE next time */
g_start_ue_ul = next_ue_list_looped(UE_list, g_start_ue_ul);
}
return rbs[0].length + (num_contig_rb > 1 ? rbs[1].length : 0); return rbs[0].length + (num_contig_rb > 1 ? rbs[1].length : 0);
} }
......
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