Commit a1472f67 authored by Florian Kaltenberger's avatar Florian Kaltenberger

Merge remote-tracking branch 'origin/nr-timing-measurement' into integration_develop-nr_w37

Conflicts:
	executables/nr-ru.c
	nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
parents 8466c0c5 9249cd1c
develop 1 128-ues 256_QAM_demod 445-LDPC-implementation-on-GPU 459-pusch-based-ta-updates 464-ru_beamforming_in_gpu 464-ru_beamforming_in_gpu-CPUsubfunction 472-add-pusch-dmrs-modes 481-ldpc-decoder-on-gpu LTE_TRX_on_single_port NCTU_CS_ISIP NCTU_CS_ISIP_CPU NCTU_CS_ISIP_GPU NCTU_OpinConnect_LDPC NR-PHY-MAC-IF-multi-UE NRUE_usedlschparallel NR_10MHz NR_CSI_reporting NR_DCI_01 NR_DLUL_PF NR_DLUL_PF_4UL NR_DLUL_PF_rebased NR_DL_MIMO NR_DL_sched_fixes NR_DL_scheduler NR_FAPI_beamindex_SSB_RO NR_FDD_FIX NR_FR2_RA NR_FR2_RRC_SSB NR_MAC_CE_GlobalEdge NR_MAC_Multi_Rach_GlobalEdge NR_MAC_SSB_RO_GlobalEdge NR_MAC_SSB_RO_UE_IDCC NR_MAC_SSB_RO_merge NR_MAC_TCI_UCI_GlobalEdge NR_NGAP NR_PDCP_noS1 NR_PUCCH_MultiUE NR_RA_cleanup NR_RA_updates NR_RRCConfiguragion_FR2 NR_RRCConfiguration NR_RRCConfiguration_FR2 NR_RRCConfiguration_S1U NR_RRCConfiguration_merge_develop NR_RRCConfiguration_sync_source NR_RRCConfiguration_trx_thread NR_RRC_CP_bugfix NR_RRC_PDCP NR_RRC_PRACH_procedures NR_RRC_PRACH_procedures_todevelop NR_RRC_PUSCH NR_RRC_TA NR_RRC_X2AP_AMBR_Change_Global_edge NR_RRC_X2AP_RemoveHardcodings_GlobalEdge NR_RRC_config_simplified NR_RRC_harq NR_RRC_harq_b NR_RRC_harq_hacks NR_RRC_harq_newdcipdu NR_SA_F1AP_RFSIMULATOR NR_SA_F1AP_RFSIMULATOR2 NR_SA_F1AP_dev NR_SA_NGAP_RRC NR_SA_NGAP_RRC_wk42 NR_SA_itti_sim_wk48 NR_SA_itti_sim_wk48_hs NR_SA_itti_sim_wk48_hs1 NR_SCHED NR_SCHED_HARQ NR_SCHED_PDCCH_PUCCH_HARQ NR_SCHED_PDCCH_PUCCH_HARQ_rebased NR_SCHED_fixes NR_SRB_Config NR_TRX_on_single_port NR_TRX_on_single_port2 NR_UE_MAC_scheduler NR_UE_RA_fixes NR_UE_UL_DCI_improvements NR_UE_dlsch_bugfix NR_UE_enable_parallelization NR_UE_stability_fixes NR_UL_FAPI_programming NR_UL_scheduler NR_UL_scheduler_rebased NR_UL_scheduling NR_Wireshark NR_beam_simulation NR_beamforming_test NR_gNB_SCF_Indication NR_ipaccess_testing NR_mac_uci_functions_rework NR_msg2_phytest NR_scheduling_CSIRS NR_scheduling_request NR_scheduling_request2 NR_scheduling_request3 NR_test_S1U_RRC_PRACH_procedures NR_ue_dlsch_dmrs_cdm OpInConnect_ISIP PUSCH_TA_update RA_CI_test UE_DL_DCI_hotfix addoptions_nr_USRPdevice bch-fixes-bitmap benetel_5g_prach_fix benetel_driver_uldl_pf_merge benetel_driver_update benetel_phase_rotation benetel_phase_rotation_old bugfix-minor-remove-wrong-log bugfix-nr-bands bugfix-nr-ldpc-post-processing bugfix-nr-ldpc-size-typo bugfix-nr-pdcp-sn-size bugfix-nr-rate-matching-assertion bugfix-x2-SgNBAdditionRequest bupt-sa-merge cce_indexing_fix cce_indexing_fix2 ci-deploy-asterix ci-deploy-docker-compose ci-rd-july-improvements ci-test ci-ul-iperf-from-trf-container clean-5G-scope-round2 cleanup_softmodem_main constant_power debug_branch_init_sync develop-SA-RA develop-SnT develop-ci develop-nr develop-nr-fr2 develop-nr-fr2-rework develop-nr_cppcheck develop-oriecpriupdates develop-sib1 develop-sib1-local develop-sib1-lts develop-sib1-update develop-sib1-update-test1 develop-sib1-update-ue develop_inria_ci_deployment develop_inria_ci_deployment_gp develop_integration_2020_w15 develop_integration_2020_w19 develop_integration_w08 develop_stable dfts_alternatives dlsch-all-dlslots dlsch_encode_mthread dlsch_parallel docupdate_tools dongzhanyi-zte-develop dongzhanyi-zte-develop2 dreibh/apt-auth-fix dreibh/device-load-fix dreibh/device-load-fix-develop-branch edrx extend_sharedlibusage extend_sharedlibusage2 fapi_for_dmrs_and_ptrs feature-4g-sched feature-nr-4g-nfapi-modifications feature-support-clang-format feature/make-s1-mme-port-configurable feature/make-s1-mme-port-configurable-with-astyle-fixes fembms-enb-ue finalize-oaicn-integration firas fix-ci-tun fix-clock-source fix-itti-segv fix-l2-sim fix-limeSDR-compile fix-softmodem-restart fix-warnings fix_NR_DLUL_PF fix_do_ra_data fix_pdsch_low_prb fix_rfsim_mimo fix_rrc_x2_ticking fixes-CE-RLC-PDU-size fixes-mac-sched-nfapi fixes-mac-sched-tun fixes-tun flexran-apps flexran-improvements flexran-repair-mme-mgmt fr2-hw-test fujitsu_lte_contribution fujitsu_lte_contribution-128 generate_push_ptrs gnb-only-test harq-hotfix hotfix-minor-remove-nr-rlc-cppcheck-error hotfix-nr-rlc-tick hotfix-ocp-executable hotfix-ue-musim-compilation hotfix_usrp_lib improve_build_nr_lte_merge improve_nr_modulation improve_ue_stability integration-develop-nr-2019w45 integration_2020_wk40 integration_2020_wk41 integration_2020_wk42_2 integration_2020_wk45 integration_2020_wk45_2 integration_2020_wk46 integration_2020_wk46_2 integration_2020_wk47 integration_2020_wk48 integration_2020_wk48_2 integration_2020_wk49 integration_2020_wk50 integration_2020_wk50_1 integration_2020_wk51 integration_2020_wk51_2 integration_2021_wk02 integration_2021_wk02_wMR988 integration_2021_wk04 integration_2021_wk05 inter-RRU-final inter-RRU-nr inter-RRU-oairu inter-rru-UE isip_nr itti-enhancement l2-fixes ldpc-dec-layering ldpc-decoder-codegen ldpc-decoder-codegen2 ldpc-decoder-improvements ldpc-offload ldpc_short_codeword_fixes load_gnb lte-ulsch-bugfix lte_uplink_improvement mac-fixes-wk45_2 mbms-fix-develop-nr merging-2019-w51-to-develop-nr minor-fix-doc-basic-sim mosaic5g-oai-ran mosaic5g-oai-sim nasmesh_kernel_5.8 new-gtpu new_rlc_2020 nfapi-bugfix nfapi_nr_develop ngap-dlul ngap-support ngap-w48-merge2 ngap-wf ngap-wf-1120 ngap-wf-1120-srb ngap-wf-1120-srb-gtp ngap-wf-1120-srb-gtp-hs ngap-wf-1120-srb-gtp-hs1 ngap-wf-1120-srb-gtp-hs2 ngap-wf-1120-srb-gtp-yhz ngap-wf-1203-yunsdr ngap-wf-liuyu ngap_lfq_1120 ngap_merge noCore nr-coreset-bug-fix nr-dlsch-multi-thread nr-dlsch-thread nr-dual-connectivity nr-interdigital-test nr-ip-uplink-noS1 nr-mac-pdu-wireshark nr-mac-remove-ue-list nr-pdcp nr-pdsch-extraction-bugfix nr-physim-update nr-rlc-am-bugfix-w44 nr-rlc-bugfix-w44 nr-timing-measurement-merge nr-ue-buffer-status nr-uldci nrUE nrUE-hs nrUE-upper-layer nr_beamforming nr_bsr nr_csi_newbranch nr_dl_dmrs_type2 nr_dl_pf nr_dl_pf2 nr_dl_ul_ptrs nr_fapi_for_push_tmp nr_fdd_if_fix nr_fix_easycppcheck nr_improve_build_procedures nr_increase_tp nr_pdcch_testing nr_polar_decoder_improvement nr_prach_fr2 nr_pucch nr_pucch2 nr_segmentation_fixes nr_tdd_configuration nr_ue_msg3 nr_ue_tti_cleanup nr_ul_pf nr_ul_scfdma nr_vcd nrue-multi-thread nrue_msg2_reception nsa-ue nsa_remove_band_hardcodings oai-sim oai-ubuntu-docker oai-ubuntu-docker-for-lmssdr oairu oairu-dockerfile-support oc-docker-october-improvements openxg/develop pdcp-benchmark pdsch-ch-est polar8 ptrs_rrc_config pusch-mthread-scaling-fix pusch-retrans-fix-ue ra-dl-ul remove_nos1_hack_pdcp remove_x2_gnb_hardcoding repair-TA revert_memcpy rh-ci-add-ue-parallelization rh_ci_fix_autoterminate rh_ci_fr1_update rh_ci_oc rh_ci_py rh_ci_ra_fr2 rh_ci_rfsim_ra rh_ci_ue_parallel rh_doc_update_3 rh_fr1_newjenkins rh_fr1_update rh_gnb_compile_fix rh_wk50_debug rlc-v2-bugfix-status-reporting rlc-v2-tick rlc_v2_coverity_fixes rrc-enb-phy-testmode ru-parallel-beamforming runel runel-reverse-test s1-subnormal_rewrite s1_subnormal s1_subnormal-robert s1ap-bugfix-rab_setup sa-demo sa-merge-rrc-srb sa-msg4 sa-msg4-rrc sa-msg4-rrc-yihz sa-msg4-rrc-yihz-hs sa_rrc_yihz small-bugfixes-w40 small-config-change smallcleanup softmodem_cleanup split73 testing_2symb_pdcch testing_with_external_txdata tools_5Gadapt tp-ota-test trx_thread_param trx_write_thread ue-csi ue-fixes ue-fixes-ota ue-updates-runel-test ue_beam_selection ue_nfapi_mch uhd_priority_set_cleanup ul-freq-iq-samps-to-file ul_dl_dci_same_slot ul_harq ulsch_decode_mthread ulsim_changes usrp_fix_adc_shift_and_pps_sync usrp_gpio_test wireshark-T-hack-ueid wireshark-log-scheduling-requests x2-endc-processing xiangwab xiangwan yihongzheng_srb zzs 2021.w04 2021.w02 2020.w51_2 2020.w51 2020.w50 2020.w49 2020.w48_2 2020.w48 2020.w47 2020.w46_2 2020.w46 2020.w45_2 2020.w45 2020.w44 2020.w42_2 2020.w42 2020.w41 2020.w39 2020.w38 2020.w37 2020.w36 2020.w34 2020.w33 2020.w31 2020.w30 2020.w29 2020.w28 2020.w26 2020.w25 2020.w24 2020.w23 2020.w22 2020.w19 2020.w17 2020.w16 2020.w15 2020.w11 2020.w09 2020.w06 2020.w05 2020.w04 2020.w03 nr-ip-over-lte-v.1.5 nr-ip-over-lte-v.1.4 nr-ip-over-lte-v.1.3 nr-ip-over-lte-v.1.2 nr-ip-over-lte-v.1.1 develop-nr-2020w03 develop-nr-2020w02 develop-nr-2019w51 develop-nr-2019w50 develop-nr-2019w48 develop-nr-2019w47 develop-nr-2019w45 develop-nr-2019w43 develop-nr-2019w42 develop-nr-2019w40 benetel_phase_rotation
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...@@ -682,6 +682,27 @@ static void* gNB_thread_prach( void* param ) { ...@@ -682,6 +682,27 @@ static void* gNB_thread_prach( void* param ) {
extern void init_td_thread(PHY_VARS_gNB *); extern void init_td_thread(PHY_VARS_gNB *);
extern void init_te_thread(PHY_VARS_gNB *); extern void init_te_thread(PHY_VARS_gNB *);
static void* process_stats_thread(void* param) {
PHY_VARS_gNB *gNB = (PHY_VARS_gNB*)param;
reset_meas(&gNB->dlsch_encoding_stats);
reset_meas(&gNB->dlsch_scrambling_stats);
reset_meas(&gNB->dlsch_modulation_stats);
wait_sync("process_stats_thread");
while(!oai_exit)
{
sleep(1);
print_meas(&gNB->dlsch_encoding_stats, "pdsch_encoding", NULL, NULL);
print_meas(&gNB->dlsch_scrambling_stats, "pdsch_scrambling", NULL, NULL);
print_meas(&gNB->dlsch_modulation_stats, "pdsch_modulation", NULL, NULL);
}
return(NULL);
}
void init_gNB_proc(int inst) { void init_gNB_proc(int inst) {
int i=0; int i=0;
int CC_id; int CC_id;
...@@ -729,6 +750,7 @@ void init_gNB_proc(int inst) { ...@@ -729,6 +750,7 @@ void init_gNB_proc(int inst) {
threadCreate( &L1_proc_tx->pthread, gNB_L1_thread_tx, gNB,"L1_proc_tx", -1, OAI_PRIORITY_RT); threadCreate( &L1_proc_tx->pthread, gNB_L1_thread_tx, gNB,"L1_proc_tx", -1, OAI_PRIORITY_RT);
} }
if(opp_enabled == 1) threadCreate(&proc->L1_stats_thread, process_stats_thread,(void *)gNB, "time_meas", -1, OAI_PRIORITY_RT_LOW);
//pthread_create( &proc->pthread_prach, attr_prach, gNB_thread_prach, gNB ); //pthread_create( &proc->pthread_prach, attr_prach, gNB_thread_prach, gNB );
char name[16]; char name[16];
......
...@@ -1077,30 +1077,42 @@ void fill_rf_config(RU_t *ru, char *rf_config_file) { ...@@ -1077,30 +1077,42 @@ void fill_rf_config(RU_t *ru, char *rf_config_file) {
cfg->rx_bw = 1.5e6; cfg->rx_bw = 1.5e6;
} else AssertFatal(1==0,"Unknown N_RB %d\n",N_RB); } else AssertFatal(1==0,"Unknown N_RB %d\n",N_RB);
} else if (mu == NR_MU_1) { } else if (mu == NR_MU_1) {
if(N_RB == 217) { if(N_RB == 273) {
if (fp->threequarter_fs) {
cfg->sample_rate=115.2e6;
cfg->samples_per_frame = 1152000;
cfg->tx_bw = 100e6;
cfg->rx_bw = 100e6;
} else {
cfg->sample_rate=153.6e6;
cfg->samples_per_frame = 1536000;
cfg->tx_bw = 100e6;
cfg->rx_bw = 100e6;
}
} else if(N_RB == 217) {
if (fp->threequarter_fs) { if (fp->threequarter_fs) {
cfg->sample_rate=92.16e6; cfg->sample_rate=92.16e6;
cfg->samples_per_frame = 921600; cfg->samples_per_frame = 921600;
cfg->tx_bw = 40e6; cfg->tx_bw = 80e6;
cfg->rx_bw = 40e6; cfg->rx_bw = 80e6;
} else { } else {
cfg->sample_rate=122.88e6; cfg->sample_rate=122.88e6;
cfg->samples_per_frame = 1228800; cfg->samples_per_frame = 1228800;
cfg->tx_bw = 40e6; cfg->tx_bw = 80e6;
cfg->rx_bw = 40e6; cfg->rx_bw = 80e6;
} }
} else if(N_RB == 106) { } else if(N_RB == 106) {
if (fp->threequarter_fs) { if (fp->threequarter_fs) {
cfg->sample_rate=46.08e6; cfg->sample_rate=46.08e6;
cfg->samples_per_frame = 460800; cfg->samples_per_frame = 460800;
cfg->tx_bw = 20e6; cfg->tx_bw = 40e6;
cfg->rx_bw = 20e6; cfg->rx_bw = 40e6;
} }
else { else {
cfg->sample_rate=61.44e6; cfg->sample_rate=61.44e6;
cfg->samples_per_frame = 614400; cfg->samples_per_frame = 614400;
cfg->tx_bw = 20e6; cfg->tx_bw = 40e6;
cfg->rx_bw = 20e6; cfg->rx_bw = 40e6;
} }
} else { } else {
AssertFatal(0==1,"N_RB %d not yet supported for numerology %d\n",N_RB,mu); AssertFatal(0==1,"N_RB %d not yet supported for numerology %d\n",N_RB,mu);
...@@ -1623,7 +1635,7 @@ extern void nr_feptx_ofdm(RU_t *ru,int frame_tx,int tti_tx); ...@@ -1623,7 +1635,7 @@ extern void nr_feptx_ofdm(RU_t *ru,int frame_tx,int tti_tx);
extern void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx); extern void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx);
extern void feptx_prec(RU_t *ru, int frame_tx,int tti_tx); extern void feptx_prec(RU_t *ru, int frame_tx,int tti_tx);
extern void init_fep_thread(RU_t *ru); extern void init_fep_thread(RU_t *ru);
extern void init_nr_feptx_thread(RU_t *ru); extern void nr_init_feptx_thread(RU_t *ru);
void init_RU_proc(RU_t *ru) { void init_RU_proc(RU_t *ru) {
int i=0; int i=0;
...@@ -1688,7 +1700,7 @@ void init_RU_proc(RU_t *ru) { ...@@ -1688,7 +1700,7 @@ void init_RU_proc(RU_t *ru) {
threadCreate( &proc->pthread_prach, ru_thread_prach, (void *)ru,"RACH", -1, OAI_PRIORITY_RT ); threadCreate( &proc->pthread_prach, ru_thread_prach, (void *)ru,"RACH", -1, OAI_PRIORITY_RT );
} }
if (get_nprocs()>=2) { if (get_thread_worker_conf() == WORKER_ENABLE) {
if (ru->feprx) init_fep_thread(ru); if (ru->feprx) init_fep_thread(ru);
if (ru->feptx_ofdm) nr_init_feptx_thread(ru); if (ru->feptx_ofdm) nr_init_feptx_thread(ru);
...@@ -1982,8 +1994,8 @@ void set_function_spec_param(RU_t *ru) { ...@@ -1982,8 +1994,8 @@ void set_function_spec_param(RU_t *ru) {
ru->fh_north_out = fh_if4p5_north_out; // send_IF4p5 on reception ru->fh_north_out = fh_if4p5_north_out; // send_IF4p5 on reception
ru->fh_south_out = tx_rf; // send output to RF ru->fh_south_out = tx_rf; // send output to RF
ru->fh_north_asynch_in = fh_if4p5_north_asynch_in; // TX packets come asynchronously ru->fh_north_asynch_in = fh_if4p5_north_asynch_in; // TX packets come asynchronously
ru->feprx = (get_nprocs()<=2) ? fep_full :ru_fep_full_2thread; // RX DFTs ru->feprx = (get_thread_worker_conf() == WORKER_ENABLE) ? ru_fep_full_2thread : fep_full; // RX DFTs
ru->feptx_ofdm = (get_nprocs()<=2) ? nr_feptx_ofdm : nr_feptx_ofdm_2thread; // this is fep with idft only (no precoding in RRU) ru->feptx_ofdm = (get_thread_worker_conf() == WORKER_ENABLE) ? nr_feptx_ofdm_2thread : nr_feptx_ofdm; // this is fep with idft only (no precoding in RRU)
ru->feptx_prec = NULL; ru->feptx_prec = NULL;
ru->nr_start_if = nr_start_if; // need to start the if interface for if4p5 ru->nr_start_if = nr_start_if; // need to start the if interface for if4p5
ru->ifdevice.host_type = RRU_HOST; ru->ifdevice.host_type = RRU_HOST;
...@@ -2004,8 +2016,8 @@ void set_function_spec_param(RU_t *ru) { ...@@ -2004,8 +2016,8 @@ void set_function_spec_param(RU_t *ru) {
malloc_IF4p5_buffer(ru); malloc_IF4p5_buffer(ru);
} else if (ru->function == gNodeB_3GPP) { } else if (ru->function == gNodeB_3GPP) {
ru->do_prach = 0; // no prach processing in RU ru->do_prach = 0; // no prach processing in RU
ru->feprx = (get_nprocs()<=2) ? fep_full : ru_fep_full_2thread; // RX DFTs ru->feprx = (get_thread_worker_conf() == WORKER_ENABLE) ? ru_fep_full_2thread : fep_full; // RX DFTs
ru->feptx_ofdm = (get_nprocs()<=2) ? nr_feptx_ofdm : nr_feptx_ofdm_2thread; // this is fep with idft and precoding ru->feptx_ofdm = (get_thread_worker_conf() == WORKER_ENABLE) ? nr_feptx_ofdm_2thread : nr_feptx_ofdm; // this is fep with idft and precoding
ru->feptx_prec = NULL; // this is fep with idft and precoding ru->feptx_prec = NULL; // this is fep with idft and precoding
ru->fh_north_in = NULL; // no incoming fronthaul from north ru->fh_north_in = NULL; // no incoming fronthaul from north
ru->fh_north_out = NULL; // no outgoing fronthaul to north ru->fh_north_out = NULL; // no outgoing fronthaul to north
...@@ -2034,9 +2046,9 @@ void set_function_spec_param(RU_t *ru) { ...@@ -2034,9 +2046,9 @@ void set_function_spec_param(RU_t *ru) {
case REMOTE_IF5: // the remote unit is IF5 RRU case REMOTE_IF5: // the remote unit is IF5 RRU
ru->do_prach = 0; ru->do_prach = 0;
ru->feprx = (get_nprocs()<=2) ? fep_full : fep_full; // this is frequency-shift + DFTs ru->feprx = fep_full; // this is frequency-shift + DFTs
ru->feptx_prec = feptx_prec; // need to do transmit Precoding + IDFTs ru->feptx_prec = feptx_prec; // need to do transmit Precoding + IDFTs
ru->feptx_ofdm = (get_nprocs()<=2) ? nr_feptx_ofdm : nr_feptx_ofdm_2thread; // need to do transmit Precoding + IDFTs ru->feptx_ofdm = (get_thread_worker_conf() == WORKER_ENABLE) ? nr_feptx_ofdm_2thread : nr_feptx_ofdm; // need to do transmit Precoding + IDFTs
ru->fh_south_in = fh_if5_south_in; // synchronous IF5 reception ru->fh_south_in = fh_if5_south_in; // synchronous IF5 reception
ru->fh_south_out = fh_if5_south_out; // synchronous IF5 transmission ru->fh_south_out = fh_if5_south_out; // synchronous IF5 transmission
ru->fh_south_asynch_in = NULL; // no asynchronous UL ru->fh_south_asynch_in = NULL; // no asynchronous UL
......
...@@ -581,8 +581,8 @@ typedef struct { ...@@ -581,8 +581,8 @@ typedef struct {
uint16_t nb_mod_symbols; uint16_t nb_mod_symbols;
uint8_t time_allocation_type; uint8_t time_allocation_type;
uint8_t freq_allocation_type; uint8_t freq_allocation_type;
uint8_t start_prb; uint16_t start_prb;
uint8_t n_prb; uint16_t n_prb;
uint8_t start_symbol; uint8_t start_symbol;
uint8_t nb_symbols; uint8_t nb_symbols;
uint8_t mcs_idx; uint8_t mcs_idx;
......
...@@ -271,17 +271,17 @@ int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,sh ...@@ -271,17 +271,17 @@ int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,sh
memset(c,0,sizeof(unsigned char) * ncols * Zc); memset(c,0,sizeof(unsigned char) * ncols * Zc);
memset(d,0,sizeof(unsigned char) * nrows * Zc); memset(d,0,sizeof(unsigned char) * nrows * Zc);
start_meas(tinput); if(tinput != NULL) start_meas(tinput);
for (i=0; i<block_length; i++) { for (i=0; i<block_length; i++) {
c[i] = (test_input[i/8]&(1<<(i&7)))>>(i&7); c[i] = (test_input[i/8]&(1<<(i&7)))>>(i&7);
//printf("c(%d,%d)=%d\n",j,i,temp); //printf("c(%d,%d)=%d\n",j,i,temp);
} }
stop_meas(tinput); if(tinput != NULL) stop_meas(tinput);
if ((BG==1 && Zc>176) || (BG==2 && Zc>64)) { if ((BG==1 && Zc>176) || (BG==2 && Zc>64)) {
// extend matrix // extend matrix
start_meas(tprep); if(tprep != NULL) start_meas(tprep);
for (i1=0; i1 < ncols; i1++) for (i1=0; i1 < ncols; i1++)
{ {
memcpy(&c_extension[2*i1*Zc], &c[i1*Zc], Zc*sizeof(unsigned char)); memcpy(&c_extension[2*i1*Zc], &c[i1*Zc], Zc*sizeof(unsigned char));
...@@ -296,11 +296,11 @@ int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,sh ...@@ -296,11 +296,11 @@ int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,sh
printf("\n"); printf("\n");
*/ */
} }
stop_meas(tprep); if(tprep != NULL) stop_meas(tprep);
//parity check part //parity check part
start_meas(tparity); if(tparity != NULL) start_meas(tparity);
encode_parity_check_part_optim(c_extension, d, BG, Zc, Kb); encode_parity_check_part_optim(c_extension, d, BG, Zc, Kb);
stop_meas(tparity); if(tparity != NULL) stop_meas(tparity);
} }
else { else {
if (encode_parity_check_part_orig(c, d, BG, Zc, Kb, block_length)!=0) { if (encode_parity_check_part_orig(c, d, BG, Zc, Kb, block_length)!=0) {
...@@ -308,12 +308,12 @@ int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,sh ...@@ -308,12 +308,12 @@ int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,sh
return(-1); return(-1);
} }
} }
start_meas(toutput); if(toutput != NULL) start_meas(toutput);
// information part and puncture columns // information part and puncture columns
memcpy(&channel_input[0], &c[2*Zc], (block_length-2*Zc)*sizeof(unsigned char)); memcpy(&channel_input[0], &c[2*Zc], (block_length-2*Zc)*sizeof(unsigned char));
memcpy(&channel_input[block_length-2*Zc], &d[0], ((nrows-no_punctured_columns) * Zc-removed_bit)*sizeof(unsigned char)); memcpy(&channel_input[block_length-2*Zc], &d[0], ((nrows-no_punctured_columns) * Zc-removed_bit)*sizeof(unsigned char));
stop_meas(toutput); if(toutput != NULL) stop_meas(toutput);
return 0; return 0;
} }
...@@ -408,7 +408,7 @@ int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_i ...@@ -408,7 +408,7 @@ int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_i
memset(c,0,sizeof(unsigned char) * ncols * Zc); memset(c,0,sizeof(unsigned char) * ncols * Zc);
memset(d,0,sizeof(unsigned char) * nrows * Zc); memset(d,0,sizeof(unsigned char) * nrows * Zc);
start_meas(tinput); if(tinput != NULL) start_meas(tinput);
#if 0 #if 0
for (i=0; i<block_length; i++) { for (i=0; i<block_length; i++) {
for (j=0; j<n_segments; j++) { for (j=0; j<n_segments; j++) {
...@@ -441,11 +441,11 @@ int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_i ...@@ -441,11 +441,11 @@ int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_i
#endif #endif
#endif #endif
stop_meas(tinput); if(tinput != NULL) stop_meas(tinput);
if ((BG==1 && Zc>176) || (BG==2 && Zc>64)) { if ((BG==1 && Zc>176) || (BG==2 && Zc>64)) {
// extend matrix // extend matrix
start_meas(tprep); if(tprep != NULL) start_meas(tprep);
for (i1=0; i1 < ncols; i1++) for (i1=0; i1 < ncols; i1++)
{ {
memcpy(&c_extension[2*i1*Zc], &c[i1*Zc], Zc*sizeof(unsigned char)); memcpy(&c_extension[2*i1*Zc], &c[i1*Zc], Zc*sizeof(unsigned char));
...@@ -460,11 +460,11 @@ int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_i ...@@ -460,11 +460,11 @@ int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_i
printf("\n"); printf("\n");
*/ */
} }
stop_meas(tprep); if(tprep != NULL) stop_meas(tprep);
//parity check part //parity check part
start_meas(tparity); if(tparity != NULL) start_meas(tparity);
encode_parity_check_part_optim(c_extension, d, BG, Zc, Kb); encode_parity_check_part_optim(c_extension, d, BG, Zc, Kb);
stop_meas(tparity); if(tparity != NULL) stop_meas(tparity);
} }
else { else {
if (encode_parity_check_part_orig(c, d, BG, Zc, Kb, block_length)!=0) { if (encode_parity_check_part_orig(c, d, BG, Zc, Kb, block_length)!=0) {
...@@ -472,7 +472,7 @@ int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_i ...@@ -472,7 +472,7 @@ int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_i
return(-1); return(-1);
} }
} }
start_meas(toutput); if(toutput != NULL) start_meas(toutput);
// information part and puncture columns // information part and puncture columns
/* /*
memcpy(&channel_input[0], &c[2*Zc], (block_length-2*Zc)*sizeof(unsigned char)); memcpy(&channel_input[0], &c[2*Zc], (block_length-2*Zc)*sizeof(unsigned char));
...@@ -513,7 +513,7 @@ int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_i ...@@ -513,7 +513,7 @@ int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_i
AssertFatal(1==0,"Need AVX2 for now\n"); AssertFatal(1==0,"Need AVX2 for now\n");
#endif #endif
stop_meas(toutput); if(toutput != NULL) stop_meas(toutput);
return 0; return 0;
} }
...@@ -613,7 +613,7 @@ int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **cha ...@@ -613,7 +613,7 @@ int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **cha
memset(c,0,sizeof(unsigned char) * ncols * Zc); memset(c,0,sizeof(unsigned char) * ncols * Zc);
memset(d,0,sizeof(unsigned char) * nrows * Zc); memset(d,0,sizeof(unsigned char) * nrows * Zc);
start_meas(tinput); if(tinput != NULL) start_meas(tinput);
#if 0 #if 0
for (i=0; i<block_length; i++) { for (i=0; i<block_length; i++) {
//for (j=0; j<n_segments; j++) { //for (j=0; j<n_segments; j++) {
...@@ -649,11 +649,11 @@ int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **cha ...@@ -649,11 +649,11 @@ int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **cha
#endif #endif
#endif #endif
stop_meas(tinput); if(tinput != NULL) stop_meas(tinput);
if ((BG==1 && Zc>176) || (BG==2 && Zc>64)) { if ((BG==1 && Zc>176) || (BG==2 && Zc>64)) {
// extend matrix // extend matrix
start_meas(tprep); if(tprep != NULL) start_meas(tprep);
for (i1=0; i1 < ncols; i1++) for (i1=0; i1 < ncols; i1++)
{ {
memcpy(&c_extension[2*i1*Zc], &c[i1*Zc], Zc*sizeof(unsigned char)); memcpy(&c_extension[2*i1*Zc], &c[i1*Zc], Zc*sizeof(unsigned char));
...@@ -668,11 +668,11 @@ int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **cha ...@@ -668,11 +668,11 @@ int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **cha
printf("\n"); printf("\n");
*/ */
} }
stop_meas(tprep); if(tprep != NULL) stop_meas(tprep);
//parity check part //parity check part
start_meas(tparity); if(tparity != NULL) start_meas(tparity);
encode_parity_check_part_optim(c_extension, d, BG, Zc, Kb); encode_parity_check_part_optim(c_extension, d, BG, Zc, Kb);
stop_meas(tparity); if(tparity != NULL) stop_meas(tparity);
} }
else { else {
if (encode_parity_check_part_orig(c, d, BG, Zc, Kb, block_length)!=0) { if (encode_parity_check_part_orig(c, d, BG, Zc, Kb, block_length)!=0) {
...@@ -680,7 +680,7 @@ int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **cha ...@@ -680,7 +680,7 @@ int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **cha
return(-1); return(-1);
} }
} }
start_meas(toutput); if(toutput != NULL) start_meas(toutput);
// information part and puncture columns // information part and puncture columns
/* /*
memcpy(&channel_input[0], &c[2*Zc], (block_length-2*Zc)*sizeof(unsigned char)); memcpy(&channel_input[0], &c[2*Zc], (block_length-2*Zc)*sizeof(unsigned char));
...@@ -726,7 +726,7 @@ int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **cha ...@@ -726,7 +726,7 @@ int ldpc_encoder_optim_8seg_multi(unsigned char **test_input,unsigned char **cha
AssertFatal(1==0,"Need AVX2 for now\n"); AssertFatal(1==0,"Need AVX2 for now\n");
#endif #endif
stop_meas(toutput); if(toutput != NULL) stop_meas(toutput);
return 0; return 0;
} }
...@@ -74,7 +74,10 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch, ...@@ -74,7 +74,10 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch,
int frame, int frame,
uint8_t slot, uint8_t slot,
NR_DL_FRAME_PARMS *frame_parms, NR_DL_FRAME_PARMS *frame_parms,
nfapi_nr_config_request_t *config) { nfapi_nr_config_request_t *config,
time_stats_t *dlsch_encoding_stats,
time_stats_t *dlsch_scrambling_stats,
time_stats_t *dlsch_modulation_stats) {
NR_DL_gNB_HARQ_t *harq = dlsch->harq_processes[dci_alloc->harq_pid]; NR_DL_gNB_HARQ_t *harq = dlsch->harq_processes[dci_alloc->harq_pid];
nfapi_nr_dl_config_dlsch_pdu_rel15_t *rel15 = &harq->dlsch_pdu.dlsch_pdu_rel15; nfapi_nr_dl_config_dlsch_pdu_rel15_t *rel15 = &harq->dlsch_pdu.dlsch_pdu_rel15;
...@@ -89,7 +92,9 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch, ...@@ -89,7 +92,9 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch,
/// CRC, coding, interleaving and rate matching /// CRC, coding, interleaving and rate matching
AssertFatal(harq->pdu!=NULL,"harq->pdu is null\n"); AssertFatal(harq->pdu!=NULL,"harq->pdu is null\n");
start_meas(dlsch_encoding_stats);
nr_dlsch_encoding(harq->pdu, frame, slot, dlsch, frame_parms); nr_dlsch_encoding(harq->pdu, frame, slot, dlsch, frame_parms);
stop_meas(dlsch_encoding_stats);
#ifdef DEBUG_DLSCH #ifdef DEBUG_DLSCH
printf("PDSCH encoding:\nPayload:\n"); printf("PDSCH encoding:\nPayload:\n");
for (int i=0; i<harq->B>>7; i++) { for (int i=0; i<harq->B>>7; i++) {
...@@ -107,6 +112,7 @@ printf("\n"); ...@@ -107,6 +112,7 @@ printf("\n");
#endif #endif
/// scrambling /// scrambling
start_meas(dlsch_scrambling_stats);
for (int q=0; q<rel15->nb_codewords; q++) for (int q=0; q<rel15->nb_codewords; q++)
memset((void*)scrambled_output[q], 0, (encoded_length>>5)*sizeof(uint32_t)); memset((void*)scrambled_output[q], 0, (encoded_length>>5)*sizeof(uint32_t));
uint16_t n_RNTI = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? \ uint16_t n_RNTI = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? \
...@@ -120,6 +126,7 @@ printf("\n"); ...@@ -120,6 +126,7 @@ printf("\n");
Nid, Nid,
n_RNTI, n_RNTI,
scrambled_output[q]); scrambled_output[q]);
stop_meas(dlsch_scrambling_stats);
#ifdef DEBUG_DLSCH #ifdef DEBUG_DLSCH
printf("PDSCH scrambling:\n"); printf("PDSCH scrambling:\n");
for (int i=0; i<encoded_length>>8; i++) { for (int i=0; i<encoded_length>>8; i++) {
...@@ -130,12 +137,13 @@ for (int i=0; i<encoded_length>>8; i++) { ...@@ -130,12 +137,13 @@ for (int i=0; i<encoded_length>>8; i++) {
#endif #endif
/// Modulation /// Modulation
start_meas(dlsch_modulation_stats);
for (int q=0; q<rel15->nb_codewords; q++) for (int q=0; q<rel15->nb_codewords; q++)
nr_modulation(scrambled_output[q], nr_modulation(scrambled_output[q],
encoded_length, encoded_length,
Qm, Qm,
mod_symbs[q]); mod_symbs[q]);
stop_meas(dlsch_modulation_stats);
#ifdef DEBUG_DLSCH #ifdef DEBUG_DLSCH
printf("PDSCH Modulation: Qm %d(%d)\n", Qm, nb_symbols); printf("PDSCH Modulation: Qm %d(%d)\n", Qm, nb_symbols);
for (int i=0; i<nb_symbols>>3; i++) { for (int i=0; i<nb_symbols>>3; i++) {
......
...@@ -74,7 +74,11 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch, ...@@ -74,7 +74,11 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch,
int frame, int frame,
uint8_t slot, uint8_t slot,
NR_DL_FRAME_PARMS *frame_parms, NR_DL_FRAME_PARMS *frame_parms,
nfapi_nr_config_request_t *config); nfapi_nr_config_request_t *config,
time_stats_t *dlsch_encoding_stats,
time_stats_t *dlsch_scrambling_stats,
time_stats_t *dlsch_modulation_stats);
void free_gNB_dlsch(NR_gNB_DLSCH_t *dlsch); void free_gNB_dlsch(NR_gNB_DLSCH_t *dlsch);
......
...@@ -366,7 +366,6 @@ int nr_dlsch_encoding(unsigned char *a,int frame, ...@@ -366,7 +366,6 @@ int nr_dlsch_encoding(unsigned char *a,int frame,
//printf("segment Z %d k %d Kr %d BG %d\n", *pz,dlsch->harq_processes[harq_pid]->K,Kr,BG); //printf("segment Z %d k %d Kr %d BG %d\n", *pz,dlsch->harq_processes[harq_pid]->K,Kr,BG);
//start_meas(te_stats);
for (r=0; r<dlsch->harq_processes[harq_pid]->C; r++) { for (r=0; r<dlsch->harq_processes[harq_pid]->C; r++) {
//d_tmp[r] = &dlsch->harq_processes[harq_pid]->d[r][0]; //d_tmp[r] = &dlsch->harq_processes[harq_pid]->d[r][0];
//channel_input[r] = &dlsch->harq_processes[harq_pid]->d[r][0]; //channel_input[r] = &dlsch->harq_processes[harq_pid]->d[r][0];
...@@ -398,7 +397,6 @@ int nr_dlsch_encoding(unsigned char *a,int frame, ...@@ -398,7 +397,6 @@ int nr_dlsch_encoding(unsigned char *a,int frame,
//ldpc_encoder_optim_8seg(dlsch->harq_processes[harq_pid]->c,d_tmp,Kr,BG,dlsch->harq_processes[harq_pid]->C,NULL,NULL,NULL,NULL); //ldpc_encoder_optim_8seg(dlsch->harq_processes[harq_pid]->c,d_tmp,Kr,BG,dlsch->harq_processes[harq_pid]->C,NULL,NULL,NULL,NULL);
ldpc_encoder_optim_8seg(dlsch->harq_processes[harq_pid]->c,dlsch->harq_processes[harq_pid]->d,Kr,BG,dlsch->harq_processes[harq_pid]->C,NULL,NULL,NULL,NULL); ldpc_encoder_optim_8seg(dlsch->harq_processes[harq_pid]->c,dlsch->harq_processes[harq_pid]->d,Kr,BG,dlsch->harq_processes[harq_pid]->C,NULL,NULL,NULL,NULL);
//stop_meas(te_stats);
//printf("end ldpc encoder -- output\n"); //printf("end ldpc encoder -- output\n");
#ifdef DEBUG_DLSCH_CODING #ifdef DEBUG_DLSCH_CODING
...@@ -425,7 +423,6 @@ int nr_dlsch_encoding(unsigned char *a,int frame, ...@@ -425,7 +423,6 @@ int nr_dlsch_encoding(unsigned char *a,int frame,
mod_order,nb_rb); mod_order,nb_rb);
#endif #endif
//start_meas(rm_stats);
#ifdef DEBUG_DLSCH_CODING #ifdef DEBUG_DLSCH_CODING
printf("rvidx in encoding = %d\n", rel15.redundancy_version); printf("rvidx in encoding = %d\n", rel15.redundancy_version);
#endif #endif
...@@ -447,14 +444,11 @@ int nr_dlsch_encoding(unsigned char *a,int frame, ...@@ -447,14 +444,11 @@ int nr_dlsch_encoding(unsigned char *a,int frame,
for (int i =0; i<16; i++) for (int i =0; i<16; i++)
printf("output ratematching e[%d]= %d r_offset %d\n", i,dlsch->harq_processes[harq_pid]->e[i+r_offset], r_offset); printf("output ratematching e[%d]= %d r_offset %d\n", i,dlsch->harq_processes[harq_pid]->e[i+r_offset], r_offset);
#endif #endif
//stop_meas(rm_stats);
//start_meas(i_stats);
nr_interleaving_ldpc(E, nr_interleaving_ldpc(E,
mod_order, mod_order,
dlsch->harq_processes[harq_pid]->e+r_offset, dlsch->harq_processes[harq_pid]->e+r_offset,
dlsch->harq_processes[harq_pid]->f+r_offset); dlsch->harq_processes[harq_pid]->f+r_offset);
//stop_meas(i_stats);
#ifdef DEBUG_DLSCH_CODING #ifdef DEBUG_DLSCH_CODING
......
...@@ -465,6 +465,8 @@ typedef struct gNB_L1_proc_t_s { ...@@ -465,6 +465,8 @@ typedef struct gNB_L1_proc_t_s {
pthread_t pthread_single; pthread_t pthread_single;
/// pthread structure for asychronous RX/TX processing thread /// pthread structure for asychronous RX/TX processing thread
pthread_t pthread_asynch_rxtx; pthread_t pthread_asynch_rxtx;
/// pthread structure for printing time meas
pthread_t L1_stats_thread;
/// flag to indicate first RX acquisition /// flag to indicate first RX acquisition
int first_rx; int first_rx;
/// flag to indicate first TX transmission /// flag to indicate first TX transmission
......
...@@ -196,7 +196,11 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, ...@@ -196,7 +196,11 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
&gNB->pdcch_vars.dci_alloc[0], &gNB->pdcch_vars.dci_alloc[0],
gNB->nr_gold_pdsch_dmrs[slot], gNB->nr_gold_pdsch_dmrs[slot],
gNB->common_vars.txdataF, gNB->common_vars.txdataF,
AMP, frame, slot, fp, cfg); AMP, frame, slot, fp, cfg,
&gNB->dlsch_encoding_stats,
&gNB->dlsch_scrambling_stats,
&gNB->dlsch_modulation_stats);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_DLSCH,0); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_GENERATE_DLSCH,0);
} }
} }
......
...@@ -810,8 +810,9 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) { ...@@ -810,8 +810,9 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
NRRRC_CONFIGURATION_REQ (msg_p).N_RB_DL[j]= N_RB_DL; NRRRC_CONFIGURATION_REQ (msg_p).N_RB_DL[j]= N_RB_DL;
if(N_RB_DL == 217) sf_ahead = 2; if(N_RB_DL == 217) sf_ahead = 2;
else if(N_RB_DL == 106) sf_ahead = 4; else if(N_RB_DL == 106) sf_ahead = 4;
else AssertFatal (0,"Failed to parse gNB configuration file %s, gnb %d unknown value \"%d\" for N_RB_DL choice: 106, 217 !\n", else sf_ahead = 4;
RC.config_file_name, i, N_RB_DL); /*else AssertFatal (0,"Failed to parse gNB configuration file %s, gnb %d unknown value \"%d\" for N_RB_DL choice: 106, 217 !\n",
RC.config_file_name, i, N_RB_DL);*/
/* /*
if ((N_RB_DL!=6) && (N_RB_DL!=15) && (N_RB_DL!=25) && (N_RB_DL!=50) && (N_RB_DL!=75) && (N_RB_DL!=100)) { if ((N_RB_DL!=6) && (N_RB_DL!=15) && (N_RB_DL!=25) && (N_RB_DL!=50) && (N_RB_DL!=75) && (N_RB_DL!=100)) {
......
...@@ -1191,6 +1191,22 @@ extern "C" { ...@@ -1191,6 +1191,22 @@ extern "C" {
LOG_I(HW,"%s() sample_rate:%u\n", __FUNCTION__, (int)openair0_cfg[0].sample_rate); LOG_I(HW,"%s() sample_rate:%u\n", __FUNCTION__, (int)openair0_cfg[0].sample_rate);
switch ((int)openair0_cfg[0].sample_rate) { switch ((int)openair0_cfg[0].sample_rate) {
case 153600000:
// from usrp_time_offset
//openair0_cfg[0].samples_per_packet = 2048;
openair0_cfg[0].tx_sample_advance = 15; //to be checked
openair0_cfg[0].tx_bw = 100e6;
openair0_cfg[0].rx_bw = 100e6;
break;
case 115200000:
// from usrp_time_offset
//openair0_cfg[0].samples_per_packet = 2048;
openair0_cfg[0].tx_sample_advance = 15; //to be checked
openair0_cfg[0].tx_bw = 100e6;
openair0_cfg[0].rx_bw = 100e6;
break;
case 122880000: case 122880000:
// from usrp_time_offset // from usrp_time_offset
//openair0_cfg[0].samples_per_packet = 2048; //openair0_cfg[0].samples_per_packet = 2048;
......
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