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lizhongxiao
OpenXG UE
Commits
e40c33a5
Commit
e40c33a5
authored
Apr 16, 2020
by
Francesco Mani
Browse files
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Plain Diff
fix in CCEs function
parent
e4dae9cb
Changes
4
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4 changed files
with
58 additions
and
44 deletions
+58
-44
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+4
-3
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+33
-22
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+14
-12
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+7
-7
No files found.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
View file @
e40c33a5
...
@@ -366,7 +366,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
...
@@ -366,7 +366,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
uint64_t
*
ulsch_in_slot_bitmap
=
NULL
;
uint64_t
*
ulsch_in_slot_bitmap
=
NULL
;
NR_sched_pucch
*
pucch_sched
=
(
NR_sched_pucch
*
)
malloc
(
sizeof
(
NR_sched_pucch
));
NR_sched_pucch
*
pucch_sched
=
(
NR_sched_pucch
*
)
malloc
(
sizeof
(
NR_sched_pucch
));
if
(
get_softmodem_params
()
->
phy_test
)
UE_id
=
0
;
UE_id
=
0
;
int
bwp_id
=
1
;
gNB_MAC_INST
*
gNB
=
RC
.
nrmac
[
module_idP
];
gNB_MAC_INST
*
gNB
=
RC
.
nrmac
[
module_idP
];
NR_UE_list_t
*
UE_list
=
&
gNB
->
UE_list
;
NR_UE_list_t
*
UE_list
=
&
gNB
->
UE_list
;
...
@@ -407,8 +408,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
...
@@ -407,8 +408,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
// Check if there are downlink symbols in the slot,
// Check if there are downlink symbols in the slot,
if
(
is_nr_DL_slot
(
cc
->
ServingCellConfigCommon
,
slot_txP
))
{
if
(
is_nr_DL_slot
(
cc
->
ServingCellConfigCommon
,
slot_txP
))
{
memset
(
RC
.
nrmac
[
module_idP
]
->
cce_list
[
bwp_id
][
0
],
0
,
MAX_NUM_CCE
*
sizeof
(
int
));
// coreset0
memset
(
RC
.
nrmac
[
module_idP
]
->
cce_list
[
1
][
0
],
0
,
MAX_NUM_CCE
*
sizeof
(
int
));
memset
(
RC
.
nrmac
[
module_idP
]
->
cce_list
[
bwp_id
][
1
],
0
,
MAX_NUM_CCE
*
sizeof
(
int
));
// coresetid 1
for
(
CC_id
=
0
;
CC_id
<
MAX_NUM_CCs
;
CC_id
++
)
{
for
(
CC_id
=
0
;
CC_id
<
MAX_NUM_CCs
;
CC_id
++
)
{
//mbsfn_status[CC_id] = 0;
//mbsfn_status[CC_id] = 0;
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @
e40c33a5
...
@@ -410,13 +410,17 @@ int configure_fapi_dl_pdu(int Mod_idP,
...
@@ -410,13 +410,17 @@ int configure_fapi_dl_pdu(int Mod_idP,
}
}
AssertFatal
(
found
==
1
,
"Couldn't find an adequate searchspace
\n
"
);
AssertFatal
(
found
==
1
,
"Couldn't find an adequate searchspace
\n
"
);
nr_configure_pdcch
(
nr_mac
,
int
ret
=
nr_configure_pdcch
(
nr_mac
,
pdcch_pdu_rel15
,
pdcch_pdu_rel15
,
UE_list
->
rnti
[
UE_id
],
UE_list
->
rnti
[
UE_id
],
1
,
// ue-specific
1
,
// ue-specific
ss
,
ss
,
scc
,
scc
,
bwp
);
bwp
);
if
(
ret
<
0
)
{
LOG_I
(
MAC
,
"CCE list not empty, couldn't schedule PDSCH
\n
"
);
return
(
0
);
}
int
dci_formats
[
2
];
int
dci_formats
[
2
];
int
rnti_types
[
2
];
int
rnti_types
[
2
];
...
@@ -570,6 +574,9 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
...
@@ -570,6 +574,9 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
dlsch_config
!=
NULL
?
&
dlsch_config
->
rbSize
:
NULL
,
dlsch_config
!=
NULL
?
&
dlsch_config
->
rbSize
:
NULL
,
dlsch_config
!=
NULL
?
&
dlsch_config
->
rbStart
:
NULL
);
dlsch_config
!=
NULL
?
&
dlsch_config
->
rbStart
:
NULL
);
if
(
TBS_bytes
==
0
)
return
;
//The --NOS1 use case currently schedules DLSCH transmissions only when there is IP traffic arriving
//The --NOS1 use case currently schedules DLSCH transmissions only when there is IP traffic arriving
//through the LTE stack
//through the LTE stack
if
(
IS_SOFTMODEM_NOS1
){
if
(
IS_SOFTMODEM_NOS1
){
...
@@ -866,7 +873,7 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP,
...
@@ -866,7 +873,7 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP,
rnti_types
[
0
]
=
NR_RNTI_C
;
rnti_types
[
0
]
=
NR_RNTI_C
;
LOG_D
(
MAC
,
"Configuring ULDCI/PDCCH in %d.%d
\n
"
,
frameP
,
slotP
);
LOG_D
(
MAC
,
"Configuring ULDCI/PDCCH in %d.%d
\n
"
,
frameP
,
slotP
);
nr_configure_pdcch
(
nr_mac
,
int
ret
=
nr_configure_pdcch
(
nr_mac
,
pdcch_pdu_rel15
,
pdcch_pdu_rel15
,
UE_list
->
rnti
[
UE_id
],
UE_list
->
rnti
[
UE_id
],
1
,
// ue-specific,
1
,
// ue-specific,
...
@@ -874,11 +881,15 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP,
...
@@ -874,11 +881,15 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP,
scc
,
scc
,
bwp
);
bwp
);
if
(
ret
<
0
)
{
LOG_I
(
MAC
,
"CCE list not empty, couldn't schedule PUSCH
\n
"
);
UL_tti_req
->
n_pdus
-=
1
;
return
;
}
else
{
dci_pdu_rel15_t
dci_pdu_rel15
[
MAX_DCI_CORESET
];
dci_pdu_rel15_t
dci_pdu_rel15
[
MAX_DCI_CORESET
];
config_uldci
(
ubwp
,
pusch_pdu
,
pdcch_pdu_rel15
,
&
dci_pdu_rel15
[
0
],
dci_formats
,
rnti_types
);
config_uldci
(
ubwp
,
pusch_pdu
,
pdcch_pdu_rel15
,
&
dci_pdu_rel15
[
0
],
dci_formats
,
rnti_types
);
fill_dci_pdu_rel15
(
secondaryCellGroup
,
pdcch_pdu_rel15
,
dci_pdu_rel15
,
dci_formats
,
rnti_types
,
pusch_pdu
->
bwp_size
,
bwp_id
);
fill_dci_pdu_rel15
(
secondaryCellGroup
,
pdcch_pdu_rel15
,
dci_pdu_rel15
,
dci_formats
,
rnti_types
,
pusch_pdu
->
bwp_size
,
bwp_id
);
}
}
}
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @
e40c33a5
...
@@ -131,7 +131,7 @@ static inline uint8_t get_max_cces(uint8_t scs) {
...
@@ -131,7 +131,7 @@ static inline uint8_t get_max_cces(uint8_t scs) {
int
allocate_nr_CCEs
(
gNB_MAC_INST
*
nr_mac
,
int
allocate_nr_CCEs
(
gNB_MAC_INST
*
nr_mac
,
int
bwp_id
,
int
bwp_id
,
int
corese
t_id
,
int
lis
t_id
,
int
aggregation
,
int
aggregation
,
int
search_space
,
// 0 common, 1 ue-specific
int
search_space
,
// 0 common, 1 ue-specific
int
UE_id
,
int
UE_id
,
...
@@ -152,15 +152,15 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
...
@@ -152,15 +152,15 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
bwp
=
secondaryCellGroup
->
spCellConfig
->
spCellConfigDedicated
->
downlinkBWP_ToAddModList
->
list
.
array
[
bwp_id
-
1
];
bwp
=
secondaryCellGroup
->
spCellConfig
->
spCellConfigDedicated
->
downlinkBWP_ToAddModList
->
list
.
array
[
bwp_id
-
1
];
if
(
search_space
==
1
)
{
if
(
search_space
==
1
)
{
coreset
=
bwp
->
bwp_Dedicated
->
pdcch_Config
->
choice
.
setup
->
controlResourceSetToAddModList
->
list
.
array
[
corese
t_id
];
coreset
=
bwp
->
bwp_Dedicated
->
pdcch_Config
->
choice
.
setup
->
controlResourceSetToAddModList
->
list
.
array
[
lis
t_id
];
}
}
else
{
else
{
coreset
=
bwp
->
bwp_Common
->
pdcch_ConfigCommon
->
choice
.
setup
->
commonControlResourceSet
;
coreset
=
bwp
->
bwp_Common
->
pdcch_ConfigCommon
->
choice
.
setup
->
commonControlResourceSet
;
}
}
int
coreset_id
=
coreset
->
controlResourceSetId
;
int
*
cce_list
=
nr_mac
->
cce_list
[
bwp_id
][
coreset_id
];
int
*
cce_list
=
nr_mac
->
cce_list
[
bwp_id
][
coreset_id
];
int
n_rb
=
0
;
int
n_rb
=
0
;
for
(
int
i
=
0
;
i
<
6
;
i
++
)
for
(
int
i
=
0
;
i
<
6
;
i
++
)
for
(
int
j
=
0
;
j
<
8
;
j
++
)
{
for
(
int
j
=
0
;
j
<
8
;
j
++
)
{
...
@@ -409,7 +409,7 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu,
...
@@ -409,7 +409,7 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu,
}
}
void
nr_configure_pdcch
(
gNB_MAC_INST
*
nr_mac
,
int
nr_configure_pdcch
(
gNB_MAC_INST
*
nr_mac
,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu
,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu
,
uint16_t
rnti
,
uint16_t
rnti
,
int
ss_type
,
int
ss_type
,
...
@@ -418,7 +418,7 @@ void nr_configure_pdcch(gNB_MAC_INST *nr_mac,
...
@@ -418,7 +418,7 @@ void nr_configure_pdcch(gNB_MAC_INST *nr_mac,
NR_BWP_Downlink_t
*
bwp
){
NR_BWP_Downlink_t
*
bwp
){
int
CCEIndex
=
-
1
;
int
CCEIndex
=
-
1
;
int
cid
;
int
cid
=
0
;
NR_ControlResourceSet_t
*
coreset
=
NULL
;
NR_ControlResourceSet_t
*
coreset
=
NULL
;
if
(
bwp
)
{
// This is not the InitialBWP
if
(
bwp
)
{
// This is not the InitialBWP
...
@@ -524,7 +524,8 @@ void nr_configure_pdcch(gNB_MAC_INST *nr_mac,
...
@@ -524,7 +524,8 @@ void nr_configure_pdcch(gNB_MAC_INST *nr_mac,
0
,
// UE-id
0
,
// UE-id
0
);
// m
0
);
// m
AssertFatal
(
CCEIndex
>=
0
,
"CCEIndex is negative
\n
"
);
if
(
CCEIndex
<
0
)
return
(
CCEIndex
);
pdcch_pdu
->
dci_pdu
.
AggregationLevel
[
pdcch_pdu
->
numDlDci
]
=
aggregation_level
;
pdcch_pdu
->
dci_pdu
.
AggregationLevel
[
pdcch_pdu
->
numDlDci
]
=
aggregation_level
;
pdcch_pdu
->
dci_pdu
.
CceIndex
[
pdcch_pdu
->
numDlDci
]
=
CCEIndex
;
pdcch_pdu
->
dci_pdu
.
CceIndex
[
pdcch_pdu
->
numDlDci
]
=
CCEIndex
;
...
@@ -534,6 +535,7 @@ void nr_configure_pdcch(gNB_MAC_INST *nr_mac,
...
@@ -534,6 +535,7 @@ void nr_configure_pdcch(gNB_MAC_INST *nr_mac,
pdcch_pdu
->
dci_pdu
.
powerControlOffsetSS
[
pdcch_pdu
->
numDlDci
]
=
1
;
pdcch_pdu
->
dci_pdu
.
powerControlOffsetSS
[
pdcch_pdu
->
numDlDci
]
=
1
;
pdcch_pdu
->
numDlDci
++
;
pdcch_pdu
->
numDlDci
++
;
return
(
0
);
}
}
else
{
// this is for InitialBWP
else
{
// this is for InitialBWP
AssertFatal
(
1
==
0
,
"Fill in InitialBWP PDCCH configuration
\n
"
);
AssertFatal
(
1
==
0
,
"Fill in InitialBWP PDCCH configuration
\n
"
);
...
...
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
View file @
e40c33a5
...
@@ -195,7 +195,7 @@ void find_search_space(int ss_type,
...
@@ -195,7 +195,7 @@ void find_search_space(int ss_type,
NR_BWP_Downlink_t
*
bwp
,
NR_BWP_Downlink_t
*
bwp
,
NR_SearchSpace_t
*
ss
);
NR_SearchSpace_t
*
ss
);
void
nr_configure_pdcch
(
gNB_MAC_INST
*
nr_mac
,
int
nr_configure_pdcch
(
gNB_MAC_INST
*
nr_mac
,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu
,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu
,
uint16_t
rnti
,
uint16_t
rnti
,
int
ss_type
,
int
ss_type
,
...
...
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