Commit 291c94d3 authored by Thomas Schlichter's avatar Thomas Schlichter

Merge remote-tracking branch 'origin/nr_ue_tti_cleanup' into integration_2020_wk48

Conflicts:
	openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
	openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
	openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
parents 4c3ee5f0 f41502cd
...@@ -48,6 +48,7 @@ ...@@ -48,6 +48,7 @@
#include "SCHED_NR/sched_nr.h" #include "SCHED_NR/sched_nr.h"
#include "SCHED_NR/fapi_nr_l1.h" #include "SCHED_NR/fapi_nr_l1.h"
#include "PHY/NR_TRANSPORT/nr_transport_proto.h" #include "PHY/NR_TRANSPORT/nr_transport_proto.h"
#include "PHY/MODULATION/nr_modulation.h"
#undef MALLOC //there are two conflicting definitions, so we better make sure we don't use it at all #undef MALLOC //there are two conflicting definitions, so we better make sure we don't use it at all
//#undef FRAME_LENGTH_COMPLEX_SAMPLES //there are two conflicting definitions, so we better make sure we don't use it at all //#undef FRAME_LENGTH_COMPLEX_SAMPLES //there are two conflicting definitions, so we better make sure we don't use it at all
......
...@@ -355,7 +355,7 @@ static void UE_synch(void *arg) { ...@@ -355,7 +355,7 @@ static void UE_synch(void *arg) {
void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
fapi_nr_config_request_t *cfg = &UE->nrUE_config; fapi_nr_config_request_t *cfg = &UE->nrUE_config;
int tx_slot_type = nr_ue_slot_select(cfg, proc->frame_tx, proc->nr_tti_tx); int tx_slot_type = nr_ue_slot_select(cfg, proc->frame_tx, proc->nr_slot_tx);
uint8_t gNB_id = 0; uint8_t gNB_id = 0;
if (tx_slot_type == NR_UPLINK_SLOT || tx_slot_type == NR_MIXED_SLOT){ if (tx_slot_type == NR_UPLINK_SLOT || tx_slot_type == NR_MIXED_SLOT){
...@@ -370,16 +370,16 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { ...@@ -370,16 +370,16 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
ul_indication.gNB_index = gNB_id; ul_indication.gNB_index = gNB_id;
ul_indication.cc_id = UE->CC_id; ul_indication.cc_id = UE->CC_id;
ul_indication.frame_rx = proc->frame_rx; ul_indication.frame_rx = proc->frame_rx;
ul_indication.slot_rx = proc->nr_tti_rx; ul_indication.slot_rx = proc->nr_slot_rx;
ul_indication.frame_tx = proc->frame_tx; ul_indication.frame_tx = proc->frame_tx;
ul_indication.slot_tx = proc->nr_tti_tx; ul_indication.slot_tx = proc->nr_slot_tx;
ul_indication.thread_id = proc->thread_id;
UE->if_inst->ul_indication(&ul_indication); UE->if_inst->ul_indication(&ul_indication);
} }
if (UE->mode != loop_through_memory) { if (UE->mode != loop_through_memory) {
uint8_t thread_id = PHY_vars_UE_g[UE->Mod_id][0]->current_thread_id[proc->nr_tti_rx]; phy_procedures_nrUE_TX(UE,proc,0);
phy_procedures_nrUE_TX(UE,proc,0,thread_id);
} }
} }
} }
...@@ -387,7 +387,7 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { ...@@ -387,7 +387,7 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
fapi_nr_config_request_t *cfg = &UE->nrUE_config; fapi_nr_config_request_t *cfg = &UE->nrUE_config;
int rx_slot_type = nr_ue_slot_select(cfg, proc->frame_rx, proc->nr_tti_rx); int rx_slot_type = nr_ue_slot_select(cfg, proc->frame_rx, proc->nr_slot_rx);
uint8_t gNB_id = 0; uint8_t gNB_id = 0;
if (rx_slot_type == NR_DOWNLINK_SLOT || rx_slot_type == NR_MIXED_SLOT){ if (rx_slot_type == NR_DOWNLINK_SLOT || rx_slot_type == NR_MIXED_SLOT){
...@@ -400,7 +400,8 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { ...@@ -400,7 +400,8 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
dl_indication.gNB_index = gNB_id; dl_indication.gNB_index = gNB_id;
dl_indication.cc_id = UE->CC_id; dl_indication.cc_id = UE->CC_id;
dl_indication.frame = proc->frame_rx; dl_indication.frame = proc->frame_rx;
dl_indication.slot = proc->nr_tti_rx; dl_indication.slot = proc->nr_slot_rx;
dl_indication.thread_id = proc->thread_id;
UE->if_inst->dl_indication(&dl_indication, NULL); UE->if_inst->dl_indication(&dl_indication, NULL);
} }
...@@ -411,16 +412,16 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { ...@@ -411,16 +412,16 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
#else #else
uint64_t a=rdtsc(); uint64_t a=rdtsc();
phy_procedures_nrUE_RX( UE, proc, 0, UE->mode); phy_procedures_nrUE_RX( UE, proc, 0, UE->mode);
LOG_D(PHY,"phy_procedures_nrUE_RX: slot:%d, time %lu\n", proc->nr_tti_rx, (rdtsc()-a)/3500); LOG_D(PHY,"phy_procedures_nrUE_RX: slot:%d, time %lu\n", proc->nr_slot_rx, (rdtsc()-a)/3500);
//printf(">>> nr_ue_pdcch_procedures ended\n"); //printf(">>> nr_ue_pdcch_procedures ended\n");
#endif #endif
if(IS_SOFTMODEM_NOS1){ //&& proc->nr_tti_rx==1 if(IS_SOFTMODEM_NOS1){ //&& proc->nr_slot_rx==1
//Hardcoded rnti value //Hardcoded rnti value
protocol_ctxt_t ctxt; protocol_ctxt_t ctxt;
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, UE->Mod_id, ENB_FLAG_NO, PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, UE->Mod_id, ENB_FLAG_NO,
0x1234, proc->frame_rx, 0x1234, proc->frame_rx,
proc->nr_tti_rx, 0); proc->nr_slot_rx, 0);
pdcp_run(&ctxt); pdcp_run(&ctxt);
} }
} }
...@@ -435,7 +436,8 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { ...@@ -435,7 +436,8 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
UE->ul_indication.gNB_index = 0; UE->ul_indication.gNB_index = 0;
UE->ul_indication.cc_id = 0; UE->ul_indication.cc_id = 0;
UE->ul_indication.frame = proc->frame_rx; UE->ul_indication.frame = proc->frame_rx;
UE->ul_indication.slot = proc->nr_tti_rx; UE->ul_indication.slot = proc->nr_slot_rx;
UE->ul_indication.thread_id = proc->thread_id;
UE->if_inst->ul_indication(&UE->ul_indication); UE->if_inst->ul_indication(&UE->ul_indication);
} }
} }
...@@ -470,7 +472,7 @@ void UE_processing(void *arg) { ...@@ -470,7 +472,7 @@ void UE_processing(void *arg) {
if (UE->mac_enabled == 1) { if (UE->mac_enabled == 1) {
uint8_t gNB_id = 0; uint8_t gNB_id = 0;
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &UE->ul_time_alignment[gNB_id]; NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &UE->ul_time_alignment[gNB_id];
int slot_tx = proc->nr_tti_tx; int slot_tx = proc->nr_slot_tx;
int frame_tx = proc->frame_tx; int frame_tx = proc->frame_tx;
if (frame_tx == ul_time_alignment->ta_frame && slot_tx == ul_time_alignment->ta_slot) { if (frame_tx == ul_time_alignment->ta_frame && slot_tx == ul_time_alignment->ta_slot) {
...@@ -688,12 +690,10 @@ void *UE_thread(void *arg) { ...@@ -688,12 +690,10 @@ void *UE_thread(void *arg) {
processingData_t *curMsg=(processingData_t *)NotifiedFifoData(msgToPush); processingData_t *curMsg=(processingData_t *)NotifiedFifoData(msgToPush);
curMsg->UE=UE; curMsg->UE=UE;
// update thread index for received subframe // update thread index for received subframe
curMsg->UE->current_thread_id[slot_nr] = thread_idx; curMsg->proc.thread_id = thread_idx;
curMsg->proc.CC_id = UE->CC_id; curMsg->proc.CC_id = UE->CC_id;
curMsg->proc.nr_tti_rx= slot_nr; curMsg->proc.nr_slot_rx = slot_nr;
curMsg->proc.subframe_rx=slot_nr/(nb_slot_frame/10); curMsg->proc.nr_slot_tx = (absolute_slot + DURATION_RX_TO_TX) % nb_slot_frame;
curMsg->proc.nr_tti_tx = (absolute_slot + DURATION_RX_TO_TX) % nb_slot_frame;
curMsg->proc.subframe_tx=curMsg->proc.nr_tti_rx;
curMsg->proc.frame_rx = (absolute_slot/nb_slot_frame) % MAX_FRAME_NUMBER; curMsg->proc.frame_rx = (absolute_slot/nb_slot_frame) % MAX_FRAME_NUMBER;
curMsg->proc.frame_tx = ((absolute_slot+DURATION_RX_TO_TX)/nb_slot_frame) % MAX_FRAME_NUMBER; curMsg->proc.frame_tx = ((absolute_slot+DURATION_RX_TO_TX)/nb_slot_frame) % MAX_FRAME_NUMBER;
curMsg->proc.decoded_frame_rx=-1; curMsg->proc.decoded_frame_rx=-1;
......
...@@ -49,12 +49,14 @@ int slot_fep(PHY_VARS_UE *phy_vars_ue, ...@@ -49,12 +49,14 @@ int slot_fep(PHY_VARS_UE *phy_vars_ue,
int reset_freq_est); int reset_freq_est);
int nr_slot_fep(PHY_VARS_NR_UE *phy_vars_ue, int nr_slot_fep(PHY_VARS_NR_UE *phy_vars_ue,
UE_nr_rxtx_proc_t *proc,
unsigned char l, unsigned char l,
unsigned char Ns, unsigned char Ns,
int sample_offset, int sample_offset,
int no_prefix); int no_prefix);
int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue, int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
unsigned char symbol, unsigned char symbol,
unsigned char Ns, unsigned char Ns,
int sample_offset, int sample_offset,
......
...@@ -37,6 +37,7 @@ ...@@ -37,6 +37,7 @@
#endif*/ #endif*/
int nr_slot_fep(PHY_VARS_NR_UE *ue, int nr_slot_fep(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
unsigned char symbol, unsigned char symbol,
unsigned char Ns, unsigned char Ns,
int sample_offset, int sample_offset,
...@@ -125,7 +126,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, ...@@ -125,7 +126,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
} }
for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) { for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
memset(&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int)); memset(&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
rx_offset = sample_offset + slot_offset - SOFFSET; rx_offset = sample_offset + slot_offset - SOFFSET;
// Align with 256 bit // Align with 256 bit
...@@ -157,14 +158,14 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, ...@@ -157,14 +158,14 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
(void *) &common_vars->rxdata[aa][rx_offset % frame_length_samples], (void *) &common_vars->rxdata[aa][rx_offset % frame_length_samples],
frame_parms->ofdm_symbol_size*sizeof(int)); frame_parms->ofdm_symbol_size*sizeof(int));
dft(dftsize,(int16_t *)tmp_dft_in, dft(dftsize,(int16_t *)tmp_dft_in,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1); (int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} else { // use dft input from RX buffer directly } else { // use dft input from RX buffer directly
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
start_meas(&ue->rx_dft_stats); start_meas(&ue->rx_dft_stats);
#endif #endif
dft(dftsize,(int16_t *) &common_vars->rxdata[aa][(rx_offset) % frame_length_samples], dft(dftsize,(int16_t *) &common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1); (int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
stop_meas(&ue->rx_dft_stats); stop_meas(&ue->rx_dft_stats);
#endif #endif
...@@ -185,11 +186,11 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, ...@@ -185,11 +186,11 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
(void *) &common_vars->rxdata[aa][(rx_offset) % frame_length_samples], (void *) &common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
frame_parms->ofdm_symbol_size*sizeof(int)); frame_parms->ofdm_symbol_size*sizeof(int));
dft(dftsize,(int16_t *)tmp_dft_in, dft(dftsize,(int16_t *)tmp_dft_in,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1); (int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} else { // use dft input from RX buffer directly } else { // use dft input from RX buffer directly
dft(dftsize,(int16_t *) &common_vars->rxdata[aa][(rx_offset) % frame_length_samples], dft(dftsize,(int16_t *) &common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1); (int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} }
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
stop_meas(&ue->rx_dft_stats); stop_meas(&ue->rx_dft_stats);
...@@ -206,9 +207,9 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, ...@@ -206,9 +207,9 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
int symb_offset = (Ns%frame_parms->slots_per_subframe)*frame_parms->symbols_per_slot; int symb_offset = (Ns%frame_parms->slots_per_subframe)*frame_parms->symbols_per_slot;
int32_t rot2 = ((uint32_t*)frame_parms->symbol_rotation)[symbol+symb_offset]; int32_t rot2 = ((uint32_t*)frame_parms->symbol_rotation)[symbol+symb_offset];
((int16_t*)&rot2)[1]=-((int16_t*)&rot2)[1]; ((int16_t*)&rot2)[1]=-((int16_t*)&rot2)[1];
rotate_cpx_vector((int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol], rotate_cpx_vector((int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
(int16_t*)&rot2, (int16_t*)&rot2,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol], (int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
frame_parms->ofdm_symbol_size, frame_parms->ofdm_symbol_size,
15); 15);
...@@ -222,6 +223,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, ...@@ -222,6 +223,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
} }
int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue, int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
unsigned char symbol, unsigned char symbol,
unsigned char Ns, unsigned char Ns,
int sample_offset, int sample_offset,
...@@ -310,7 +312,7 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue, ...@@ -310,7 +312,7 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
} }
for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) { for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
memset(&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int)); memset(&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
rx_offset = sample_offset + slot_offset - SOFFSET; rx_offset = sample_offset + slot_offset - SOFFSET;
// Align with 256 bit // Align with 256 bit
...@@ -342,7 +344,7 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue, ...@@ -342,7 +344,7 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
(void *) &common_vars->rxdata[aa][rx_offset], (void *) &common_vars->rxdata[aa][rx_offset],
frame_parms->ofdm_symbol_size*sizeof(int)); frame_parms->ofdm_symbol_size*sizeof(int));
dft(dftsize,(int16_t *)tmp_dft_in, dft(dftsize,(int16_t *)tmp_dft_in,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1); (int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} else { // use dft input from RX buffer directly } else { // use dft input from RX buffer directly
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
start_meas(&ue->rx_dft_stats); start_meas(&ue->rx_dft_stats);
...@@ -350,7 +352,7 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue, ...@@ -350,7 +352,7 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
dft(dftsize,(int16_t *) &common_vars->rxdata[aa][rx_offset], dft(dftsize,(int16_t *) &common_vars->rxdata[aa][rx_offset],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1); (int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
stop_meas(&ue->rx_dft_stats); stop_meas(&ue->rx_dft_stats);
#endif #endif
...@@ -371,10 +373,10 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue, ...@@ -371,10 +373,10 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
(void *) &common_vars->rxdata[aa][rx_offset], (void *) &common_vars->rxdata[aa][rx_offset],
frame_parms->ofdm_symbol_size*sizeof(int)); frame_parms->ofdm_symbol_size*sizeof(int));
dft(dftsize,(int16_t *)tmp_dft_in, dft(dftsize,(int16_t *)tmp_dft_in,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1); (int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} else { // use dft input from RX buffer directly } else { // use dft input from RX buffer directly
dft(dftsize,(int16_t *) &common_vars->rxdata[aa][rx_offset], dft(dftsize,(int16_t *) &common_vars->rxdata[aa][rx_offset],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1); (int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} }
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
stop_meas(&ue->rx_dft_stats); stop_meas(&ue->rx_dft_stats);
...@@ -393,9 +395,9 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue, ...@@ -393,9 +395,9 @@ int nr_slot_fep_init_sync(PHY_VARS_NR_UE *ue,
symbol+symb_offset,((int16_t*)&rot2)[0],((int16_t*)&rot2)[1]); symbol+symb_offset,((int16_t*)&rot2)[0],((int16_t*)&rot2)[1]);
#endif #endif
rotate_cpx_vector((int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol], rotate_cpx_vector((int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
(int16_t*)&rot2, (int16_t*)&rot2,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol], (int16_t *)&common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],
frame_parms->ofdm_symbol_size, frame_parms->ofdm_symbol_size,
15); 15);
......
...@@ -92,13 +92,7 @@ int pss_ch_est_nr(PHY_VARS_NR_UE *ue, ...@@ -92,13 +92,7 @@ int pss_ch_est_nr(PHY_VARS_NR_UE *ue,
int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR], int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR],
int32_t sss_ext[NB_ANTENNAS_RX][LENGTH_SSS_NR]); int32_t sss_ext[NB_ANTENNAS_RX][LENGTH_SSS_NR]);
int _do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue, int rx_sss_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int32_t *tot_metric, uint8_t *phase_max);
int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR],
int32_t sss_ext[NB_ANTENNAS_RX][LENGTH_SSS_NR],
uint8_t doPss, uint8_t doSss,
uint8_t subframe);
int rx_sss_nr(PHY_VARS_NR_UE *ue, int32_t *tot_metric, uint8_t *phase_max);
#undef INIT_VARIABLES_SSS_NR_H #undef INIT_VARIABLES_SSS_NR_H
#undef EXTERN #undef EXTERN
......
...@@ -44,7 +44,7 @@ ...@@ -44,7 +44,7 @@
void nr_group_sequence_hopping(pucch_GroupHopping_t PUCCH_GroupHopping, void nr_group_sequence_hopping(pucch_GroupHopping_t PUCCH_GroupHopping,
uint32_t n_id, uint32_t n_id,
uint8_t n_hop, uint8_t n_hop,
int nr_tti_tx, int nr_slot_tx,
uint8_t *u, uint8_t *u,
uint8_t *v); uint8_t *v);
...@@ -53,7 +53,7 @@ double nr_cyclic_shift_hopping(uint32_t n_id, ...@@ -53,7 +53,7 @@ double nr_cyclic_shift_hopping(uint32_t n_id,
uint8_t mcs, uint8_t mcs,
uint8_t lnormal, uint8_t lnormal,
uint8_t lprime, uint8_t lprime,
int nr_tti_tx); int nr_slot_tx);
/** \brief Computes available bits G. */ /** \brief Computes available bits G. */
uint32_t nr_get_G(uint16_t nb_rb, uint16_t nb_symb_sch, uint8_t nb_re_dmrs, uint16_t length_dmrs, uint8_t Qm, uint8_t Nl); uint32_t nr_get_G(uint16_t nb_rb, uint16_t nb_symb_sch, uint8_t nb_re_dmrs, uint16_t length_dmrs, uint8_t Qm, uint8_t Nl);
......
...@@ -35,7 +35,7 @@ ...@@ -35,7 +35,7 @@
void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping, void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping,
uint32_t n_id, uint32_t n_id,
uint8_t n_hop, uint8_t n_hop,
int nr_tti_tx, int nr_slot_tx,
uint8_t *u, uint8_t *u,
uint8_t *v) { uint8_t *v) {
/* /*
...@@ -65,7 +65,7 @@ void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping, ...@@ -65,7 +65,7 @@ void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping,
*v=0; *v=0;
uint32_t c_init = 0; uint32_t c_init = 0;
uint32_t x1,s; // TS 38.211 Subclause 5.2.1 uint32_t x1,s; // TS 38.211 Subclause 5.2.1
int l = 32, minShift = ((2*nr_tti_tx+n_hop)<<3); int l = 32, minShift = ((2*nr_slot_tx+n_hop)<<3);
int tmpShift =0; int tmpShift =0;
#ifdef DEBUG_NR_PUCCH_TX #ifdef DEBUG_NR_PUCCH_TX
printf("\t\t [nr_group_sequence_hopping] calculating u,v -> "); printf("\t\t [nr_group_sequence_hopping] calculating u,v -> ");
...@@ -92,7 +92,7 @@ void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping, ...@@ -92,7 +92,7 @@ void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping,
f_gh = f_gh%30; f_gh = f_gh%30;
f_ss = n_id%30; f_ss = n_id%30;
/* for (int m=0; m<8; m++){ /* for (int m=0; m<8; m++){
f_gh = f_gh + ((1<<m)*((uint8_t)((s>>(8*(2*nr_tti_tx+n_hop)+m))&1))); // Not sure we have to use nr_tti_tx FIXME!!! f_gh = f_gh + ((1<<m)*((uint8_t)((s>>(8*(2*nr_slot_tx+n_hop)+m))&1))); // Not sure we have to use nr_slot_tx FIXME!!!
} }
f_gh = f_gh%30; f_gh = f_gh%30;
f_ss = n_id%30;*/ f_ss = n_id%30;*/
...@@ -102,7 +102,7 @@ void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping, ...@@ -102,7 +102,7 @@ void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping,
c_init = (1<<5)*floor(n_id/30)+(n_id%30); // we initialize c_init to calculate u,v c_init = (1<<5)*floor(n_id/30)+(n_id%30); // we initialize c_init to calculate u,v
s = lte_gold_generic(&x1, &c_init, 1); // TS 38.211 Subclause 5.2.1 s = lte_gold_generic(&x1, &c_init, 1); // TS 38.211 Subclause 5.2.1
f_ss = n_id%30; f_ss = n_id%30;
l = 32, minShift = (2*nr_tti_tx+n_hop); l = 32, minShift = (2*nr_slot_tx+n_hop);
while(minShift >= l) { while(minShift >= l) {
s = lte_gold_generic(&x1, &c_init, 0); s = lte_gold_generic(&x1, &c_init, 0);
...@@ -111,7 +111,7 @@ void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping, ...@@ -111,7 +111,7 @@ void nr_group_sequence_hopping (pucch_GroupHopping_t PUCCH_GroupHopping,
tmpShift = (minShift&((1<<5)-1)); //minShift%32; tmpShift = (minShift&((1<<5)-1)); //minShift%32;
*v = (uint8_t)((s>>tmpShift)&1); *v = (uint8_t)((s>>tmpShift)&1);
// *v = (uint8_t)((s>>(2*nr_tti_tx+n_hop))&1); // Not sure we have to use nr_tti_tx FIXME!!! // *v = (uint8_t)((s>>(2*nr_slot_tx+n_hop))&1); // Not sure we have to use nr_slot_tx FIXME!!!
} }
*u = (f_gh+f_ss)%30; *u = (f_gh+f_ss)%30;
...@@ -125,7 +125,7 @@ double nr_cyclic_shift_hopping(uint32_t n_id, ...@@ -125,7 +125,7 @@ double nr_cyclic_shift_hopping(uint32_t n_id,
uint8_t mcs, uint8_t mcs,
uint8_t lnormal, uint8_t lnormal,
uint8_t lprime, uint8_t lprime,
int nr_tti_tx) { int nr_slot_tx) {
/* /*
* Implements TS 38.211 subclause 6.3.2.2.2 Cyclic shift hopping * Implements TS 38.211 subclause 6.3.2.2.2 Cyclic shift hopping
* - n_id: higher-layer parameter hoppingId * - n_id: higher-layer parameter hoppingId
...@@ -140,7 +140,7 @@ double nr_cyclic_shift_hopping(uint32_t n_id, ...@@ -140,7 +140,7 @@ double nr_cyclic_shift_hopping(uint32_t n_id,
uint32_t x1,s = lte_gold_generic(&x1, &c_init, 1); // TS 38.211 Subclause 5.2.1 uint32_t x1,s = lte_gold_generic(&x1, &c_init, 1); // TS 38.211 Subclause 5.2.1
uint8_t n_cs=0; uint8_t n_cs=0;
int l = 32, minShift = (14*8*nr_tti_tx )+ 8*(lnormal+lprime); int l = 32, minShift = (14*8*nr_slot_tx )+ 8*(lnormal+lprime);
int tmpShift =0; int tmpShift =0;
#ifdef DEBUG_NR_PUCCH_TX #ifdef DEBUG_NR_PUCCH_TX
printf("\t\t [nr_cyclic_shift_hopping] calculating alpha (cyclic shift) using c_init=%u -> \n",c_init); printf("\t\t [nr_cyclic_shift_hopping] calculating alpha (cyclic shift) using c_init=%u -> \n",c_init);
...@@ -155,8 +155,8 @@ double nr_cyclic_shift_hopping(uint32_t n_id, ...@@ -155,8 +155,8 @@ double nr_cyclic_shift_hopping(uint32_t n_id,
tmpShift = (minShift&((1<<5)-1)); //minShift%32; tmpShift = (minShift&((1<<5)-1)); //minShift%32;
minShift ++; minShift ++;
n_cs = n_cs+((1<<m)*((uint8_t)((s>>tmpShift)&1))); n_cs = n_cs+((1<<m)*((uint8_t)((s>>tmpShift)&1)));
// calculating n_cs (Not sure we have to use nr_tti_tx FIXME!!!) // calculating n_cs (Not sure we have to use nr_slot_tx FIXME!!!)
// n_cs = n_cs+((1<<m)*((uint8_t)((s>>((14*8*nr_tti_tx) + 8*(lnormal+lprime) + m))&1))); // n_cs = n_cs+((1<<m)*((uint8_t)((s>>((14*8*nr_slot_tx) + 8*(lnormal+lprime) + m))&1)));
} }
alpha = (alpha * (double)((m0+mcs+n_cs)%12)); alpha = (alpha * (double)((m0+mcs+n_cs)%12));
......
...@@ -103,7 +103,7 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms, ...@@ -103,7 +103,7 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
if (ue->mac_enabled==1) { if (ue->mac_enabled==1) {
LOG_I(PHY,"[UE%d] Sending synch status to higher layers\n",ue->Mod_id); LOG_I(PHY,"[UE%d] Sending synch status to higher layers\n",ue->Mod_id);
//mac_resynch(); //mac_resynch();
//dl_phy_sync_success(ue->Mod_id,ue->proc.proc_rxtx[0].frame_rx,0,1);//ue->common_vars.eNb_id); //dl_phy_sync_success(ue->Mod_id,frame,0,1);//ue->common_vars.eNb_id);
ue->UE_mode[0] = PRACH; ue->UE_mode[0] = PRACH;
ue->prach_resources[gNB_id]->sync_frame = frame; ue->prach_resources[gNB_id]->sync_frame = frame;
ue->prach_resources[gNB_id]->init_msg1 = 0; ue->prach_resources[gNB_id]->init_msg1 = 0;
...@@ -122,9 +122,8 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms, ...@@ -122,9 +122,8 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
#ifdef DEBUG_PHY #ifdef DEBUG_PHY
LOG_D(PHY,"AbsSubframe %d: ThreadId %d diff =%i rx_offset (final) = %i : clear %d,max_pos = %d,max_pos_fil = %d (peak %d) max_val %d target_pos %d \n", LOG_D(PHY,"AbsSubframe %d: diff =%i rx_offset (final) = %i : clear %d,max_pos = %d,max_pos_fil = %d (peak %d) max_val %d target_pos %d \n",
subframe, subframe,
ue->current_thread_id[subframe],
diff, diff,
ue->rx_offset, ue->rx_offset,
clear, clear,
......
...@@ -32,6 +32,7 @@ ...@@ -32,6 +32,7 @@
int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue, int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset, uint8_t eNB_offset,
unsigned char Ns, unsigned char Ns,
unsigned char symbol, unsigned char symbol,
...@@ -49,7 +50,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue, ...@@ -49,7 +50,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
uint8_t nushift; uint8_t nushift;
uint8_t ssb_index=current_ssb->i_ssb; uint8_t ssb_index=current_ssb->i_ssb;
uint8_t n_hf=current_ssb->n_hf; uint8_t n_hf=current_ssb->n_hf;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF; int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
nushift = ue->frame_parms.Nid_cell%4; nushift = ue->frame_parms.Nid_cell%4;
ue->frame_parms.nushift = nushift; ue->frame_parms.nushift = nushift;
...@@ -66,7 +67,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue, ...@@ -66,7 +67,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
k = nushift; k = nushift;
#ifdef DEBUG_CH #ifdef DEBUG_CH
printf("PBCH DMRS Correlation : ThreadId %d, eNB_offset %d , OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns], eNB_offset,ue->frame_parms.ofdm_symbol_size, printf("PBCH DMRS Correlation : ThreadId %d, eNB_offset %d , OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",proc->thread_id, eNB_offset,ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,Ns,k, symbol); ue->frame_parms.Ncp,Ns,k, symbol);
#endif #endif
...@@ -193,6 +194,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue, ...@@ -193,6 +194,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue, int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset, uint8_t eNB_offset,
unsigned char Ns, unsigned char Ns,
unsigned char symbol, unsigned char symbol,
...@@ -212,7 +214,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -212,7 +214,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t nushift; uint8_t nushift;
int **dl_ch_estimates =ue->pbch_vars[eNB_offset]->dl_ch_estimates; int **dl_ch_estimates =ue->pbch_vars[eNB_offset]->dl_ch_estimates;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF; int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
nushift = ue->frame_parms.Nid_cell%4; nushift = ue->frame_parms.Nid_cell%4;
ue->frame_parms.nushift = nushift; ue->frame_parms.nushift = nushift;
...@@ -234,7 +236,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -234,7 +236,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
k = nushift; k = nushift;
#ifdef DEBUG_CH #ifdef DEBUG_CH
printf("PBCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns], eNB_offset,ch_offset,ue->frame_parms.ofdm_symbol_size, printf("PBCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",proc->thread_id, eNB_offset,ch_offset,ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,Ns,k, symbol); ue->frame_parms.Ncp,Ns,k, symbol);
#endif #endif
...@@ -453,7 +455,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -453,7 +455,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
for (p=0; p<ue->frame_parms.nb_antenna_ports_gNB; p++) { for (p=0; p<ue->frame_parms.nb_antenna_ports_gNB; p++) {
if (ue->pbch_vars[eNB_offset]->dl_ch_estimates[(p<<1)+aarx]) if (ue->pbch_vars[eNB_offset]->dl_ch_estimates[(p<<1)+aarx])
{ {
LOG_D(PHY,"Channel Impulse Computation Slot %d ThreadId %d Symbol %d ch_offset %d\n", Ns, ue->current_thread_id[Ns], symbol, ch_offset); LOG_D(PHY,"Channel Impulse Computation Slot %d ThreadId %d Symbol %d ch_offset %d\n", Ns, proc->thread_id, symbol, ch_offset);
idft(idftsizeidx, idft(idftsizeidx,
(int16_t*) &ue->pbch_vars[eNB_offset]->dl_ch_estimates[(p<<1)+aarx][ch_offset], (int16_t*) &ue->pbch_vars[eNB_offset]->dl_ch_estimates[(p<<1)+aarx][ch_offset],
(int16_t*) ue->pbch_vars[eNB_offset]->dl_ch_estimates_time[(p<<1)+aarx],1); (int16_t*) ue->pbch_vars[eNB_offset]->dl_ch_estimates_time[(p<<1)+aarx],1);
...@@ -468,6 +470,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -468,6 +470,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
} }
int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue, int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset, uint8_t eNB_offset,
unsigned char Ns, unsigned char Ns,
unsigned char symbol, unsigned char symbol,
...@@ -483,8 +486,8 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -483,8 +486,8 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1]; //uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
int **dl_ch_estimates =ue->pdcch_vars[ue->current_thread_id[Ns]][eNB_offset]->dl_ch_estimates; int **dl_ch_estimates =ue->pdcch_vars[proc->thread_id][eNB_offset]->dl_ch_estimates;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF; int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
if (ue->high_speed_flag == 0) // use second channel estimate position for temporary storage if (ue->high_speed_flag == 0) // use second channel estimate position for temporary storage
...@@ -497,7 +500,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -497,7 +500,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
k = coreset_start_subcarrier; k = coreset_start_subcarrier;
#ifdef DEBUG_PDCCH #ifdef DEBUG_PDCCH
printf("PDCCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns], eNB_offset,ch_offset,ue->frame_parms.ofdm_symbol_size, printf("PDCCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",proc->thread_id, eNB_offset,ch_offset,ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,Ns,k, symbol); ue->frame_parms.Ncp,Ns,k, symbol);
#endif #endif
...@@ -642,6 +645,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -642,6 +645,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
} }
int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue, int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset, uint8_t eNB_offset,
unsigned char Ns, unsigned char Ns,
unsigned short p, unsigned short p,
...@@ -660,8 +664,8 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -660,8 +664,8 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1]; //uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
uint8_t nushift; uint8_t nushift;
int **dl_ch_estimates =ue->pdsch_vars[ue->current_thread_id[Ns]][eNB_offset]->dl_ch_estimates; int **dl_ch_estimates =ue->pdsch_vars[proc->thread_id][eNB_offset]->dl_ch_estimates;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF; int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
if (ue->high_speed_flag == 0) // use second channel estimate position for temporary storage if (ue->high_speed_flag == 0) // use second channel estimate position for temporary storage
ch_offset = ue->frame_parms.ofdm_symbol_size ; ch_offset = ue->frame_parms.ofdm_symbol_size ;
...@@ -674,7 +678,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -674,7 +678,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
int re_offset = k; int re_offset = k;
#ifdef DEBUG_CH #ifdef DEBUG_CH
printf("PDSCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, symbol_offset %d OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns], eNB_offset,ch_offset,symbol_offset,ue->frame_parms.ofdm_symbol_size, printf("PDSCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, symbol_offset %d OFDM size %d, Ncp=%d, Ns=%d, k=%d symbol %d\n",proc->thread_id, eNB_offset,ch_offset,symbol_offset,ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,Ns,k, symbol); ue->frame_parms.Ncp,Ns,k, symbol);
#endif #endif
......
...@@ -43,6 +43,7 @@ ...@@ -43,6 +43,7 @@
\param symbol symbol within frame \param symbol symbol within frame
*/ */
int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue, int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset, uint8_t eNB_offset,
unsigned char Ns, unsigned char Ns,
unsigned char symbol, unsigned char symbol,
...@@ -50,6 +51,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -50,6 +51,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
unsigned short nb_rb_coreset); unsigned short nb_rb_coreset);
int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue, int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset, uint8_t eNB_offset,
unsigned char Ns, unsigned char Ns,
unsigned char symbol, unsigned char symbol,
...@@ -57,6 +59,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue, ...@@ -57,6 +59,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
NR_UE_SSB *current_ssb); NR_UE_SSB *current_ssb);
int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue, int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset, uint8_t eNB_offset,
unsigned char Ns, unsigned char Ns,
unsigned char symbol, unsigned char symbol,
...@@ -65,6 +68,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -65,6 +68,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t n_hf); uint8_t n_hf);
int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue, int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset, uint8_t eNB_offset,
unsigned char Ns, unsigned char Ns,
unsigned short p, unsigned short p,
...@@ -81,6 +85,7 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms, ...@@ -81,6 +85,7 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
short coef); short coef);
void nr_ue_measurements(PHY_VARS_NR_UE *ue, void nr_ue_measurements(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
unsigned int subframe_offset, unsigned int subframe_offset,
unsigned char N0_symbol, unsigned char N0_symbol,
unsigned char abstraction_flag, unsigned char abstraction_flag,
...@@ -88,6 +93,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue, ...@@ -88,6 +93,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
uint8_t subframe); uint8_t subframe);
void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue, void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t slot, uint8_t slot,
uint8_t abstraction_flag); uint8_t abstraction_flag);
......
...@@ -107,6 +107,7 @@ float_t get_nr_RSRP(module_id_t Mod_id,uint8_t CC_id,uint8_t gNB_index) ...@@ -107,6 +107,7 @@ float_t get_nr_RSRP(module_id_t Mod_id,uint8_t CC_id,uint8_t gNB_index)
void nr_ue_measurements(PHY_VARS_NR_UE *ue, void nr_ue_measurements(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
unsigned int subframe_offset, unsigned int subframe_offset,
unsigned char N0_symbol, unsigned char N0_symbol,
unsigned char abstraction_flag, unsigned char abstraction_flag,
...@@ -131,7 +132,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue, ...@@ -131,7 +132,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
ue->measurements.nb_antennas_rx = frame_parms->nb_antennas_rx; ue->measurements.nb_antennas_rx = frame_parms->nb_antennas_rx;
/*int16_t *dl_ch; /*int16_t *dl_ch;
dl_ch = (int16_t *)&ue->pdsch_vars[ue->current_thread_id[subframe]][0]->dl_ch_estimates[eNB_id][ch_offset];*/ dl_ch = (int16_t *)&ue->pdsch_vars[proc->thread_id][0]->dl_ch_estimates[eNB_id][ch_offset];*/
ch_offset = ue->frame_parms.ofdm_symbol_size*2; ch_offset = ue->frame_parms.ofdm_symbol_size*2;
...@@ -142,7 +143,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue, ...@@ -142,7 +143,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) { for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
for (aatx=0; aatx<frame_parms->nb_antenna_ports_gNB; aatx++) { for (aatx=0; aatx<frame_parms->nb_antenna_ports_gNB; aatx++) {
ue->measurements.rx_spatial_power[eNB_id][aatx][aarx] = ue->measurements.rx_spatial_power[eNB_id][aatx][aarx] =
(signal_energy_nodc(&ue->pdsch_vars[ue->current_thread_id[subframe]][0]->dl_ch_estimates[eNB_id][ch_offset], (signal_energy_nodc(&ue->pdsch_vars[proc->thread_id][0]->dl_ch_estimates[eNB_id][ch_offset],
(50*12))); (50*12)));
//- ue->measurements.n0_power[aarx]; //- ue->measurements.n0_power[aarx];
...@@ -224,6 +225,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue, ...@@ -224,6 +225,7 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
} }
void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue, void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t slot, uint8_t slot,
uint8_t abstraction_flag) uint8_t abstraction_flag)
{ {
...@@ -234,7 +236,7 @@ void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue, ...@@ -234,7 +236,7 @@ void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset=0,l,nushift; uint8_t eNB_offset=0,l,nushift;
uint16_t off,nb_rb; uint16_t off,nb_rb;
// NR_UE_MAC_INST_t *mac = get_mac_inst(0); // NR_UE_MAC_INST_t *mac = get_mac_inst(0);
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[slot]].rxdataF; int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
nushift = ue->frame_parms.Nid_cell%4; nushift = ue->frame_parms.Nid_cell%4;
ue->frame_parms.nushift = nushift; ue->frame_parms.nushift = nushift;
......
This diff is collapsed.
...@@ -131,7 +131,7 @@ int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_ini ...@@ -131,7 +131,7 @@ int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_ini
#endif #endif
// computing correlation between received DMRS symbols and transmitted sequence for current i_ssb and n_hf // computing correlation between received DMRS symbols and transmitted sequence for current i_ssb and n_hf
for(int i=pbch_initial_symbol; i<pbch_initial_symbol+3;i++) for(int i=pbch_initial_symbol; i<pbch_initial_symbol+3;i++)
nr_pbch_dmrs_correlation(ue,0,0,i,i-pbch_initial_symbol,current_ssb); nr_pbch_dmrs_correlation(ue,proc,0,0,i,i-pbch_initial_symbol,current_ssb);
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
stop_meas(&ue->dlsch_channel_estimation_stats); stop_meas(&ue->dlsch_channel_estimation_stats);
#endif #endif
...@@ -155,7 +155,7 @@ int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_ini ...@@ -155,7 +155,7 @@ int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_ini
#endif #endif
// computing channel estimation for selected best ssb // computing channel estimation for selected best ssb
for(int i=pbch_initial_symbol; i<pbch_initial_symbol+3;i++) for(int i=pbch_initial_symbol; i<pbch_initial_symbol+3;i++)
nr_pbch_channel_estimation(ue,0,0,i,i-pbch_initial_symbol,temp_ptr->i_ssb,temp_ptr->n_hf); nr_pbch_channel_estimation(ue,proc,0,0,i,i-pbch_initial_symbol,temp_ptr->i_ssb,temp_ptr->n_hf);
#if UE_TIMING_TRACE #if UE_TIMING_TRACE
stop_meas(&ue->dlsch_channel_estimation_stats); stop_meas(&ue->dlsch_channel_estimation_stats);
#endif #endif
...@@ -286,6 +286,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode, ...@@ -286,6 +286,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode,
for(int i=0; i<4;i++) for(int i=0; i<4;i++)
nr_slot_fep_init_sync(ue, nr_slot_fep_init_sync(ue,
proc,
i, i,
0, 0,
is*fp->samples_per_frame+ue->ssb_offset, is*fp->samples_per_frame+ue->ssb_offset,
...@@ -295,7 +296,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode, ...@@ -295,7 +296,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode,
LOG_I(PHY,"Calling sss detection (normal CP)\n"); LOG_I(PHY,"Calling sss detection (normal CP)\n");
#endif #endif
rx_sss_nr(ue,&metric_tdd_ncp,&phase_tdd_ncp); rx_sss_nr(ue, proc, &metric_tdd_ncp, &phase_tdd_ncp);
nr_gold_pbch(ue); nr_gold_pbch(ue);
ret = nr_pbch_detection(proc, ue,1,mode); // start pbch detection at first symbol after pss ret = nr_pbch_detection(proc, ue,1,mode); // start pbch detection at first symbol after pss
...@@ -318,8 +319,8 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode, ...@@ -318,8 +319,8 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode,
int nb_prefix_samples0 = fp->nb_prefix_samples0; int nb_prefix_samples0 = fp->nb_prefix_samples0;
fp->nb_prefix_samples0 = fp->nb_prefix_samples; fp->nb_prefix_samples0 = fp->nb_prefix_samples;
nr_slot_fep(ue,0, 0, ue->ssb_offset, 0, NR_PDCCH_EST); nr_slot_fep(ue, proc, 0, 0, ue->ssb_offset, 0, NR_PDCCH_EST);
nr_slot_fep(ue,1, 0, ue->ssb_offset, 0, NR_PDCCH_EST); nr_slot_fep(ue, proc, 1, 0, ue->ssb_offset, 0, NR_PDCCH_EST);
fp->nb_prefix_samples0 = nb_prefix_samples0; fp->nb_prefix_samples0 = nb_prefix_samples0;
LOG_I(PHY,"[UE %d] AUTOTEST Cell Sync : frame = %d, rx_offset %d, freq_offset %d \n", LOG_I(PHY,"[UE %d] AUTOTEST Cell Sync : frame = %d, rx_offset %d, freq_offset %d \n",
......
...@@ -418,12 +418,11 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue, ...@@ -418,12 +418,11 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc, UE_nr_rxtx_proc_t *proc,
NR_UE_PBCH *nr_ue_pbch_vars, NR_UE_PBCH *nr_ue_pbch_vars,
NR_DL_FRAME_PARMS *frame_parms, NR_DL_FRAME_PARMS *frame_parms,
uint8_t eNB_id, uint8_t gNB_id,
uint8_t i_ssb, uint8_t i_ssb,
MIMO_mode_t mimo_mode, MIMO_mode_t mimo_mode,
uint32_t high_speed_flag) { uint32_t high_speed_flag) {
int Ns = proc->nr_tti_rx;
NR_UE_COMMON *nr_ue_common_vars = &ue->common_vars; NR_UE_COMMON *nr_ue_common_vars = &ue->common_vars;
int max_h=0; int max_h=0;
int symbol; int symbol;
...@@ -457,15 +456,15 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue, ...@@ -457,15 +456,15 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
#ifdef DEBUG_PBCH #ifdef DEBUG_PBCH
//printf("address dataf %p",nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF); //printf("address dataf %p",nr_ue_common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF);
write_output("rxdataF0_pbch.m","rxF0pbch", write_output("rxdataF0_pbch.m","rxF0pbch",
&nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[0][(symbol_offset+1)*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size*3,1,1); &nr_ue_common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF[0][(symbol_offset+1)*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size*3,1,1);
#endif #endif
// symbol refers to symbol within SSB. symbol_offset is the offset of the SSB wrt start of slot // symbol refers to symbol within SSB. symbol_offset is the offset of the SSB wrt start of slot
for (symbol=1; symbol<4; symbol++) { for (symbol=1; symbol<4; symbol++) {
nr_pbch_extract(nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF, nr_pbch_extract(nr_ue_common_vars->common_vars_rx_data_per_thread[proc->thread_id].rxdataF,
nr_ue_pbch_vars->dl_ch_estimates, nr_ue_pbch_vars->dl_ch_estimates,
nr_ue_pbch_vars->rxdataF_ext, nr_ue_pbch_vars->rxdataF_ext,
nr_ue_pbch_vars->dl_ch_estimates_ext, nr_ue_pbch_vars->dl_ch_estimates_ext,
...@@ -609,11 +608,14 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue, ...@@ -609,11 +608,14 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
nr_downlink_indication_t dl_indication; nr_downlink_indication_t dl_indication;
fapi_nr_rx_indication_t rx_ind; fapi_nr_rx_indication_t rx_ind;
dl_indication.module_id = ue->Mod_id;
dl_indication.gNB_index = gNB_id;
dl_indication.cc_id = proc->CC_id;
dl_indication.frame = proc->frame_rx;
dl_indication.slot = proc->nr_slot_rx;
dl_indication.thread_id = proc->thread_id;
dl_indication.rx_ind = &rx_ind; // hang on rx_ind instance dl_indication.rx_ind = &rx_ind; // hang on rx_ind instance
dl_indication.dci_ind = NULL; dl_indication.dci_ind = NULL;
dl_indication.proc=proc;
dl_indication.module_id=0;
dl_indication.cc_id=proc->CC_id;
rx_ind.rx_indication_body[0].pdu_type = FAPI_NR_RX_PDU_TYPE_MIB; rx_ind.rx_indication_body[0].pdu_type = FAPI_NR_RX_PDU_TYPE_MIB;
rx_ind.rx_indication_body[0].mib_pdu.pdu = &decoded_output[0]; //not good as it is pointing to a memory that can change rx_ind.rx_indication_body[0].mib_pdu.pdu = &decoded_output[0]; //not good as it is pointing to a memory that can change
......
...@@ -678,7 +678,7 @@ void dlsch_detection_mrc_TM34(NR_DL_FRAME_PARMS *frame_parms, ...@@ -678,7 +678,7 @@ void dlsch_detection_mrc_TM34(NR_DL_FRAME_PARMS *frame_parms,
uint8_t *pmi_ext, uint8_t *pmi_ext,
uint32_t *rb_alloc, uint32_t *rb_alloc,
uint8_t symbol, uint8_t symbol,
uint8_t subframe, uint8_t nr_slot_rx,
NR_DL_FRAME_PARMS *frame_parms) NR_DL_FRAME_PARMS *frame_parms)
\brief This function extracts the received resource blocks, both channel estimates and data symbols, \brief This function extracts the received resource blocks, both channel estimates and data symbols,
for the current allocation and for single antenna eNB transmission. for the current allocation and for single antenna eNB transmission.
...@@ -690,23 +690,10 @@ void dlsch_detection_mrc_TM34(NR_DL_FRAME_PARMS *frame_parms, ...@@ -690,23 +690,10 @@ void dlsch_detection_mrc_TM34(NR_DL_FRAME_PARMS *frame_parms,
@param pmi_ext Extracted PMI for chosen RBs @param pmi_ext Extracted PMI for chosen RBs
@param rb_alloc RB allocation vector @param rb_alloc RB allocation vector
@param symbol Symbol to extract @param symbol Symbol to extract
@param subframe Subframe number @param nr_slot_rx Slot number
@param vrb_type Flag to indicate distributed VRB type
@param high_speed_flag @param high_speed_flag
@param frame_parms Pointer to frame descriptor @param frame_parms Pointer to frame descriptor
*/ */
/*uint16_t nr_dlsch_extract_rbs_single(int32_t **rxdataF,
int32_t **dl_ch_estimates,
int32_t **rxdataF_ext,
int32_t **dl_ch_estimates_ext,
uint16_t pmi,
uint8_t *pmi_ext,
uint32_t *rb_alloc,
uint8_t symbol,
uint8_t subframe,
uint32_t high_speed_flag,
NR_DL_FRAME_PARMS *frame_parms);*/
unsigned short nr_dlsch_extract_rbs_single(int **rxdataF, unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
int **dl_ch_estimates, int **dl_ch_estimates,
int **rxdataF_ext, int **rxdataF_ext,
...@@ -718,7 +705,7 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF, ...@@ -718,7 +705,7 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
uint8_t config_type, uint8_t config_type,
unsigned short start_rb, unsigned short start_rb,
unsigned short nb_pdsch_rb, unsigned short nb_pdsch_rb,
unsigned char nr_tti_rx, unsigned char nr_slot_rx,
uint32_t high_speed_flag, uint32_t high_speed_flag,
NR_DL_FRAME_PARMS *frame_parms); NR_DL_FRAME_PARMS *frame_parms);
...@@ -741,7 +728,7 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF, ...@@ -741,7 +728,7 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
@param pmi_ext Extracted PMI for chosen RBs @param pmi_ext Extracted PMI for chosen RBs
@param rb_alloc RB allocation vector @param rb_alloc RB allocation vector
@param symbol Symbol to extract @param symbol Symbol to extract
@param subframe Subframe index @param nr_slot_rx Slot index
@param high_speed_flag @param high_speed_flag
@param frame_parms Pointer to frame descriptor @param frame_parms Pointer to frame descriptor
*/ */
...@@ -755,7 +742,7 @@ unsigned short nr_dlsch_extract_rbs_dual(int **rxdataF, ...@@ -755,7 +742,7 @@ unsigned short nr_dlsch_extract_rbs_dual(int **rxdataF,
uint8_t pilots, uint8_t pilots,
unsigned short start_rb, unsigned short start_rb,
unsigned short nb_rb_pdsch, unsigned short nb_rb_pdsch,
unsigned char nr_tti_rx, unsigned char nr_slot_rx,
uint32_t high_speed_flag, uint32_t high_speed_flag,
NR_DL_FRAME_PARMS *frame_parms, NR_DL_FRAME_PARMS *frame_parms,
MIMO_mode_t mimo_mode); MIMO_mode_t mimo_mode);
...@@ -1019,7 +1006,7 @@ void nr_dlsch_scale_channel(int32_t **dl_ch_estimates_ext, ...@@ -1019,7 +1006,7 @@ void nr_dlsch_scale_channel(int32_t **dl_ch_estimates_ext,
@param lte_frame_parms Pointer to frame descriptor @param lte_frame_parms Pointer to frame descriptor
@param dlsch Pointer to DLSCH descriptor @param dlsch Pointer to DLSCH descriptor
@param frame Frame number @param frame Frame number
@param subframe Subframe number @param nr_slot_rx Slot number
@param num_pdcch_symbols Number of PDCCH symbols @param num_pdcch_symbols Number of PDCCH symbols
@param is_crnti indicates if PDSCH belongs to a CRNTI (necessary for parallelizing decoding threads) @param is_crnti indicates if PDSCH belongs to a CRNTI (necessary for parallelizing decoding threads)
@param llr8_flag If 1, indicate that the 8-bit turbo decoder should be used @param llr8_flag If 1, indicate that the 8-bit turbo decoder should be used
...@@ -1027,13 +1014,15 @@ void nr_dlsch_scale_channel(int32_t **dl_ch_estimates_ext, ...@@ -1027,13 +1014,15 @@ void nr_dlsch_scale_channel(int32_t **dl_ch_estimates_ext,
*/ */
uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue, uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
UE_nr_rxtx_proc_t *proc,
int eNB_id,
short *dlsch_llr, short *dlsch_llr,
NR_DL_FRAME_PARMS *frame_parms, NR_DL_FRAME_PARMS *frame_parms,
NR_UE_DLSCH_t *dlsch, NR_UE_DLSCH_t *dlsch,
NR_DL_UE_HARQ_t *harq_process, NR_DL_UE_HARQ_t *harq_process,
uint32_t frame, uint32_t frame,
uint16_t nb_symb_sch, uint16_t nb_symb_sch,
uint8_t nr_tti_rx, uint8_t nr_slot_rx,
uint8_t harq_pid, uint8_t harq_pid,
uint8_t is_crnti, uint8_t is_crnti,
uint8_t llr8_flag); uint8_t llr8_flag);
...@@ -1091,7 +1080,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue, ...@@ -1091,7 +1080,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
NR_DL_UE_HARQ_t *harq_process, NR_DL_UE_HARQ_t *harq_process,
uint32_t frame, uint32_t frame,
uint16_t nb_symb_sch, uint16_t nb_symb_sch,
uint8_t nr_tti_rx, uint8_t nr_slot_rx,
uint8_t harq_pid, uint8_t harq_pid,
uint8_t is_crnti, uint8_t is_crnti,
uint8_t llr8_flag); uint8_t llr8_flag);
...@@ -1113,8 +1102,7 @@ uint32_t dlsch_decoding_emul(PHY_VARS_NR_UE *phy_vars_ue, ...@@ -1113,8 +1102,7 @@ uint32_t dlsch_decoding_emul(PHY_VARS_NR_UE *phy_vars_ue,
uint8_t eNB_id); uint8_t eNB_id);
int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue, int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
uint32_t frame, UE_nr_rxtx_proc_t *proc);
uint32_t slot);
/*! \brief Extract PSS and SSS resource elements /*! \brief Extract PSS and SSS resource elements
...@@ -1480,25 +1468,6 @@ void nr_rf_card_config(openair0_config_t *openair0_cfg, ...@@ -1480,25 +1468,6 @@ void nr_rf_card_config(openair0_config_t *openair0_cfg,
int freq_offset); int freq_offset);
/*!
\brief Encoding of PUSCH/ACK/RI/ACK from 36-212.
@param a Pointer to ulsch SDU
@param frame_parms Pointer to Frame parameters
@param ulsch Pointer to ulsch descriptor
@param harq_pid HARQ process ID
@param tmode Transmission mode (1-7)
@param control_only_flag Generate PUSCH with control information only
@param Nbundled Parameter for ACK/NAK bundling (36.213 Section 7.3)
*/
uint32_t ulsch_encoding(uint8_t *a,
PHY_VARS_NR_UE *phy_vars_ue,
uint8_t harq_pid,
uint8_t eNB_id,
uint8_t subframe_rx,
uint8_t tmode,
uint8_t control_only_flag,
uint8_t Nbundled);
void print_CQI(void *o,UCI_format_t uci_format,uint8_t eNB_id,int N_RB_DL); void print_CQI(void *o,UCI_format_t uci_format,uint8_t eNB_id,int N_RB_DL);
void fill_CQI(NR_UE_ULSCH_t *ulsch,PHY_NR_MEASUREMENTS *meas,uint8_t eNB_id, uint8_t harq_pid,int N_RB_DL, rnti_t rnti, uint8_t trans_mode,double sinr_eff); void fill_CQI(NR_UE_ULSCH_t *ulsch,PHY_NR_MEASUREMENTS *meas,uint8_t eNB_id, uint8_t harq_pid,int N_RB_DL, rnti_t rnti, uint8_t trans_mode,double sinr_eff);
...@@ -1722,8 +1691,7 @@ uint8_t get_prach_prb_offset(NR_DL_FRAME_PARMS *frame_parms, ...@@ -1722,8 +1691,7 @@ uint8_t get_prach_prb_offset(NR_DL_FRAME_PARMS *frame_parms,
uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset); uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset);
uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue, uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
int frame, UE_nr_rxtx_proc_t *proc,
int slot,
fapi_nr_dci_indication_t *dci_ind); fapi_nr_dci_indication_t *dci_ind);
...@@ -1739,36 +1707,25 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue, ...@@ -1739,36 +1707,25 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
@param eNB_id eNb index (Nid1) 0,1,2 @param eNB_id eNb index (Nid1) 0,1,2
@param eNB_id_i Interfering eNB index (Nid1) 0,1,2, or 3 in case of MU-MIMO IC receiver @param eNB_id_i Interfering eNB index (Nid1) 0,1,2, or 3 in case of MU-MIMO IC receiver
@param frame Frame number @param frame Frame number
@param nr_tti_rx Subframe number @param nr_slot_rx Slot number
@param symbol Symbol on which to act (within sub-frame) @param symbol Symbol on which to act (within sub-frame)
@param first_symbol_flag set to 1 on first DLSCH symbol @param first_symbol_flag set to 1 on first DLSCH symbol
@param rx_type. rx_type=RX_IC_single_stream will enable interference cancellation of a second stream when decoding the first stream. In case of TM1, 2, 5, and this can cancel interference from a neighbouring cell given by eNB_id_i. In case of TM5, eNB_id_i should be set to n_connected_eNB to perform multi-user interference cancellation. In case of TM3, eNB_id_i should be set to eNB_id to perform co-channel interference cancellation; this option should be used together with an interference cancellation step [...]. In case of TM3, if rx_type=RX_IC_dual_stream, both streams will be decoded by applying the IC single stream receiver twice. @param rx_type. rx_type=RX_IC_single_stream will enable interference cancellation of a second stream when decoding the first stream. In case of TM1, 2, 5, and this can cancel interference from a neighbouring cell given by eNB_id_i. In case of TM5, eNB_id_i should be set to n_connected_eNB to perform multi-user interference cancellation. In case of TM3, eNB_id_i should be set to eNB_id to perform co-channel interference cancellation; this option should be used together with an interference cancellation step [...]. In case of TM3, if rx_type=RX_IC_dual_stream, both streams will be decoded by applying the IC single stream receiver twice.
@param i_mod Modulation order of the interfering stream @param i_mod Modulation order of the interfering stream
*/ */
int nr_rx_pdsch(PHY_VARS_NR_UE *ue, int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
PDSCH_t type, PDSCH_t type,
unsigned char eNB_id, unsigned char eNB_id,
unsigned char eNB_id_i, //if this == ue->n_connected_eNB, we assume MU interference unsigned char eNB_id_i, //if this == ue->n_connected_eNB, we assume MU interference
uint32_t frame, uint32_t frame,
uint8_t nr_tti_rx, uint8_t nr_slot_rx,
unsigned char symbol, unsigned char symbol,
unsigned char first_symbol_flag, unsigned char first_symbol_flag,
RX_type_t rx_type, RX_type_t rx_type,
unsigned char i_mod, unsigned char i_mod,
unsigned char harq_pid); unsigned char harq_pid);
uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
short *dlsch_llr,
NR_DL_FRAME_PARMS *frame_parms,
NR_UE_DLSCH_t *dlsch,
NR_DL_UE_HARQ_t *harq_process,
uint32_t frame,
uint16_t nb_symb_sch,
uint8_t nr_tti_rx,
uint8_t harq_pid,
uint8_t is_crnti,
uint8_t llr8_flag);
int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t subframe); int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t subframe);
void *dlsch_thread(void *arg); void *dlsch_thread(void *arg);
......
This diff is collapsed.
...@@ -52,7 +52,7 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue, ...@@ -52,7 +52,7 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
long pucch_GroupHopping, long pucch_GroupHopping,
long hoppingId, long hoppingId,
int16_t amp, int16_t amp,
int nr_tti_tx, int nr_slot_tx,
uint8_t m0, uint8_t m0,
uint8_t mcs, uint8_t mcs,
uint8_t nrofSymbols, uint8_t nrofSymbols,
...@@ -64,7 +64,7 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue, ...@@ -64,7 +64,7 @@ void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated, PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload, uint64_t payload,
int16_t amp, int16_t amp,
int nr_tti_tx, int nr_slot_tx,
uint8_t m0, uint8_t m0,
uint8_t nrofSymbols, uint8_t nrofSymbols,
uint8_t startingSymbolIndex, uint8_t startingSymbolIndex,
...@@ -81,7 +81,7 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue, ...@@ -81,7 +81,7 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated, PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload, uint64_t payload,
int16_t amp, int16_t amp,
int nr_tti_tx, int nr_slot_tx,
uint8_t nrofSymbols, uint8_t nrofSymbols,
uint8_t startingSymbolIndex, uint8_t startingSymbolIndex,
uint8_t nrofPRB, uint8_t nrofPRB,
...@@ -95,7 +95,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue, ...@@ -95,7 +95,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated, PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload, uint64_t payload,
int16_t amp, int16_t amp,
int nr_tti_tx, int nr_slot_tx,
uint8_t nrofSymbols, uint8_t nrofSymbols,
uint8_t startingSymbolIndex, uint8_t startingSymbolIndex,
uint8_t nrofPRB, uint8_t nrofPRB,
......
...@@ -84,7 +84,7 @@ int32_t generate_srs_nr(SRS_ResourceSet_t *p_srs_resource_set, ...@@ -84,7 +84,7 @@ int32_t generate_srs_nr(SRS_ResourceSet_t *p_srs_resource_set,
uint32_t f_gh = 0; uint32_t f_gh = 0;
SRS_Resource_t *p_SRS_Resource; SRS_Resource_t *p_SRS_Resource;
int frame_number = proc->frame_tx; int frame_number = proc->frame_tx;
int slot_number = proc->nr_tti_tx; int slot_number = proc->nr_slot_tx;
uint16_t n_SRS, n_SRS_cs_i; uint16_t n_SRS, n_SRS_cs_i;
double alpha_i; double alpha_i;
uint8_t K_TC_p; uint8_t K_TC_p;
...@@ -445,7 +445,7 @@ int ue_srs_procedure_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB ...@@ -445,7 +445,7 @@ int ue_srs_procedure_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB
/* SRS resource configurated ? */ /* SRS resource configurated ? */
if (p_srs_resource != NULL) { if (p_srs_resource != NULL) {
if (p_srs_resource_set->resourceType == periodic) { if (p_srs_resource_set->resourceType == periodic) {
if (is_srs_period_nr(p_srs_resource, frame_parms, proc->frame_tx, proc->nr_tti_tx) == 0) { if (is_srs_period_nr(p_srs_resource, frame_parms, proc->frame_tx, proc->nr_slot_tx) == 0) {
generate_srs = 1; generate_srs = 1;
} }
} }
...@@ -459,7 +459,7 @@ int ue_srs_procedure_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB ...@@ -459,7 +459,7 @@ int ue_srs_procedure_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB
if (generate_srs == 1) { if (generate_srs == 1) {
int16_t txptr = AMP; int16_t txptr = AMP;
uint16_t nsymb = (ue->frame_parms.Ncp==0) ? 14:12; uint16_t nsymb = (ue->frame_parms.Ncp==0) ? 14:12;
uint16_t symbol_offset = (int)ue->frame_parms.ofdm_symbol_size*((proc->nr_tti_tx*nsymb)+(nsymb-1)); uint16_t symbol_offset = (int)ue->frame_parms.ofdm_symbol_size*((proc->nr_slot_tx*nsymb)+(nsymb-1));
if (generate_srs_nr(p_srs_resource_set, frame_parms, &ue->common_vars.txdataF[eNB_id][symbol_offset], txptr, proc) == 0) { if (generate_srs_nr(p_srs_resource_set, frame_parms, &ue->common_vars.txdataF[eNB_id][symbol_offset], txptr, proc) == 0) {
return 0; return 0;
} }
......
...@@ -314,6 +314,7 @@ int pss_ch_est_nr(PHY_VARS_NR_UE *ue, ...@@ -314,6 +314,7 @@ int pss_ch_est_nr(PHY_VARS_NR_UE *ue,
*********************************************************************/ *********************************************************************/
int do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue, int do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR], int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR],
int32_t sss_ext[NB_ANTENNAS_RX][LENGTH_SSS_NR], int32_t sss_ext[NB_ANTENNAS_RX][LENGTH_SSS_NR],
uint8_t doPss, uint8_t doSss, uint8_t doPss, uint8_t doSss,
...@@ -331,7 +332,7 @@ int do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue, ...@@ -331,7 +332,7 @@ int do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue,
pss_symbol = 0; pss_symbol = 0;
sss_symbol = SSS_SYMBOL_NB-PSS_SYMBOL_NB; sss_symbol = SSS_SYMBOL_NB-PSS_SYMBOL_NB;
rxdataF = ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].rxdataF; rxdataF = ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF;
unsigned int ofdm_symbol_size = frame_parms->ofdm_symbol_size; unsigned int ofdm_symbol_size = frame_parms->ofdm_symbol_size;
...@@ -386,7 +387,7 @@ int do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue, ...@@ -386,7 +387,7 @@ int do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue,
/******************************************************************* /*******************************************************************
* *
* NAME : rx_sss_nr * NAME : pss_sss_extract_nr
* *
* PARAMETERS : none * PARAMETERS : none
* *
...@@ -397,11 +398,12 @@ int do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue, ...@@ -397,11 +398,12 @@ int do_pss_sss_extract_nr(PHY_VARS_NR_UE *ue,
*********************************************************************/ *********************************************************************/
int pss_sss_extract_nr(PHY_VARS_NR_UE *phy_vars_ue, int pss_sss_extract_nr(PHY_VARS_NR_UE *phy_vars_ue,
UE_nr_rxtx_proc_t *proc,
int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR], int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR],
int32_t sss_ext[NB_ANTENNAS_RX][LENGTH_SSS_NR], int32_t sss_ext[NB_ANTENNAS_RX][LENGTH_SSS_NR],
uint8_t subframe) uint8_t subframe)
{ {
return do_pss_sss_extract_nr(phy_vars_ue, pss_ext, sss_ext, 1 /* doPss */, 1 /* doSss */, subframe); return do_pss_sss_extract_nr(phy_vars_ue, proc, pss_ext, sss_ext, 1 /* doPss */, 1 /* doSss */, subframe);
} }
/******************************************************************* /*******************************************************************
...@@ -417,7 +419,7 @@ int pss_sss_extract_nr(PHY_VARS_NR_UE *phy_vars_ue, ...@@ -417,7 +419,7 @@ int pss_sss_extract_nr(PHY_VARS_NR_UE *phy_vars_ue,
* *
*********************************************************************/ *********************************************************************/
int rx_sss_nr(PHY_VARS_NR_UE *ue, int32_t *tot_metric,uint8_t *phase_max) int rx_sss_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int32_t *tot_metric, uint8_t *phase_max)
{ {
uint8_t i; uint8_t i;
int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR]; int32_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR];
...@@ -433,6 +435,7 @@ int rx_sss_nr(PHY_VARS_NR_UE *ue, int32_t *tot_metric,uint8_t *phase_max) ...@@ -433,6 +435,7 @@ int rx_sss_nr(PHY_VARS_NR_UE *ue, int32_t *tot_metric,uint8_t *phase_max)
// pss sss extraction // pss sss extraction
pss_sss_extract_nr(ue, pss_sss_extract_nr(ue,
proc,
pss_ext, pss_ext,
sss_ext, sss_ext,
0); /* subframe */ 0); /* subframe */
...@@ -440,8 +443,8 @@ int rx_sss_nr(PHY_VARS_NR_UE *ue, int32_t *tot_metric,uint8_t *phase_max) ...@@ -440,8 +443,8 @@ int rx_sss_nr(PHY_VARS_NR_UE *ue, int32_t *tot_metric,uint8_t *phase_max)
#ifdef DEBUG_PLOT_SSS #ifdef DEBUG_PLOT_SSS
write_output("rxsig0.m","rxs0",&ue->common_vars.rxdata[0][0],ue->frame_parms.samples_per_subframe,1,1); write_output("rxsig0.m","rxs0",&ue->common_vars.rxdata[0][0],ue->frame_parms.samples_per_subframe,1,1);
write_output("rxdataF0_pss.m","rxF0_pss",&ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[0]].rxdataF[0][0],frame_parms->ofdm_symbol_size,1,1); write_output("rxdataF0_pss.m","rxF0_pss",&ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF[0][0],frame_parms->ofdm_symbol_size,1,1);
write_output("rxdataF0_sss.m","rxF0_sss",&ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[0]].rxdataF[0][(SSS_SYMBOL_NB-PSS_SYMBOL_NB)*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size,1,1); write_output("rxdataF0_sss.m","rxF0_sss",&ue->common_vars.common_vars_rx_data_per_thread[proc->thread_id].rxdataF[0][(SSS_SYMBOL_NB-PSS_SYMBOL_NB)*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size,1,1);
write_output("pss_ext.m","pss_ext",pss_ext,LENGTH_PSS_NR,1,1); write_output("pss_ext.m","pss_ext",pss_ext,LENGTH_PSS_NR,1,1);
#endif #endif
......
...@@ -848,9 +848,6 @@ typedef struct { ...@@ -848,9 +848,6 @@ typedef struct {
/// UE FAPI indication for DCI reception /// UE FAPI indication for DCI reception
//fapi_nr_dci_indication_t dci_ind; //fapi_nr_dci_indication_t dci_ind;
// point to the current rxTx thread index
uint8_t current_thread_id[NR_MAX_SLOTS_PER_FRAME];
t_nrPolar_params *polarList; t_nrPolar_params *polarList;
NR_UE_PDSCH *pdsch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_eNB_MAX+1]; // two RxTx Threads NR_UE_PDSCH *pdsch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_eNB_MAX+1]; // two RxTx Threads
NR_UE_PBCH *pbch_vars[NUMBER_OF_CONNECTED_eNB_MAX]; NR_UE_PBCH *pbch_vars[NUMBER_OF_CONNECTED_eNB_MAX];
......
...@@ -4,26 +4,18 @@ ...@@ -4,26 +4,18 @@
#include <targets/ARCH/COMMON/common_lib.h> #include <targets/ARCH/COMMON/common_lib.h>
/// Context data structure for RX/TX portion of subframe processing /// Context data structure for RX/TX portion of subframe processing
typedef struct { typedef struct {
/// index of the current UE RX/TX proc /// index of the current UE RX/TX thread
int proc_id; int thread_id;
/// Component Carrier index /// Component Carrier index
uint8_t CC_id; uint8_t CC_id;
/// timestamp transmitted to HW /// timestamp transmitted to HW
openair0_timestamp timestamp_tx; openair0_timestamp timestamp_tx;
//#ifdef UE_NR_PHY_DEMO //#ifdef UE_NR_PHY_DEMO
/// NR TTI index within subframe_tx [0 .. slots_per_subframe - 1] to act upon for transmission
int nr_tti_tx;
/// NR TTI index within subframe_rx [0 .. slots_per_subframe - 1] to act upon for reception
int nr_tti_rx;
/// NR slot index within frame_tx [0 .. slots_per_frame - 1] to act upon for transmission /// NR slot index within frame_tx [0 .. slots_per_frame - 1] to act upon for transmission
int nr_slot_tx; int nr_slot_tx;
/// NR slot index within frame_rx [0 .. slots_per_frame - 1] to act upon for transmission /// NR slot index within frame_rx [0 .. slots_per_frame - 1] to act upon for transmission
int nr_slot_rx; int nr_slot_rx;
//#endif //#endif
/// subframe to act upon for transmission
int subframe_tx;
/// subframe to act upon for reception
int subframe_rx;
/// frame to act upon for transmission /// frame to act upon for transmission
int frame_tx; int frame_tx;
/// frame to act upon for reception /// frame to act upon for reception
......
...@@ -308,7 +308,7 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms) { ...@@ -308,7 +308,7 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms) {
* *
*********************************************************************/ *********************************************************************/
int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti) { int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_slot) {
/* for FFD all slot can be considered as an uplink */ /* for FFD all slot can be considered as an uplink */
int mu = cfg->ssb_config.scs_common.value,check_slot=0; int mu = cfg->ssb_config.scs_common.value,check_slot=0;
...@@ -318,7 +318,7 @@ int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti) ...@@ -318,7 +318,7 @@ int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti)
if (nr_frame%2 == 0) { if (nr_frame%2 == 0) {
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) { for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==1) { if (cfg->tdd_table.max_tdd_periodicity_list[nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==1) {
check_slot++; check_slot++;
} }
} }
...@@ -330,7 +330,7 @@ int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti) ...@@ -330,7 +330,7 @@ int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti)
check_slot = 0; check_slot = 0;
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) { for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==0) { if (cfg->tdd_table.max_tdd_periodicity_list[nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==0) {
check_slot++; check_slot++;
} }
} }
...@@ -342,7 +342,7 @@ int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti) ...@@ -342,7 +342,7 @@ int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti)
} }
} else { } else {
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) { for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==1) { if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==1) {
check_slot++; check_slot++;
} }
} }
...@@ -354,7 +354,7 @@ int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti) ...@@ -354,7 +354,7 @@ int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti)
check_slot = 0; check_slot = 0;
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) { for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==0) { if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config.value==0) {
check_slot++; check_slot++;
} }
} }
......
...@@ -75,10 +75,10 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms); ...@@ -75,10 +75,10 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms);
/** \brief This function checks nr slot direction : downlink or uplink /** \brief This function checks nr slot direction : downlink or uplink
* @param frame_parms NR DL Frame parameters * @param frame_parms NR DL Frame parameters
* @param nr_frame : frame number * @param nr_frame : frame number
* @param nr_tti : slot number * @param nr_slot : slot number
@returns int : downlink, uplink or mixed slot type*/ @returns int : downlink, uplink or mixed slot type*/
int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti); int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_slot);
/** \brief This function frees tdd configuration for nr /** \brief This function frees tdd configuration for nr
* @param frame_parms NR DL Frame parameters * @param frame_parms NR DL Frame parameters
......
...@@ -257,7 +257,7 @@ void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) { ...@@ -257,7 +257,7 @@ void nr_postDecode(PHY_VARS_gNB *gNB, notifiedFIFO_elt_t *req) {
// if all segments are done // if all segments are done
if (rdata->nbSegments == ulsch_harq->processedSegments) { if (rdata->nbSegments == ulsch_harq->processedSegments) {
if (decodeSuccess) { if (decodeSuccess) {
LOG_D(PHY,"[gNB %d] ULSCH: Setting ACK for nr_tti_rx %d TBS %d\n", LOG_D(PHY,"[gNB %d] ULSCH: Setting ACK for slot %d TBS %d\n",
gNB->Mod_id,ulsch_harq->slot,ulsch_harq->TBS); gNB->Mod_id,ulsch_harq->slot,ulsch_harq->TBS);
ulsch_harq->status = SCH_IDLE; ulsch_harq->status = SCH_IDLE;
ulsch_harq->round = 0; ulsch_harq->round = 0;
......
...@@ -103,14 +103,11 @@ void phy_procedures_UE_lte(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN ...@@ -103,14 +103,11 @@ void phy_procedures_UE_lte(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
int phy_procedures_RN_UE_RX(unsigned char last_slot, unsigned char next_slot, relaying_type_t r_type); int phy_procedures_RN_UE_RX(unsigned char last_slot, unsigned char next_slot, relaying_type_t r_type);
/*! \brief Scheduling for UE TX procedures in normal subframes. /*! \brief Scheduling for UE TX procedures in normal subframes.
@param phy_vars_ue Pointer to UE variables on which to act @param ue Pointer to UE variables on which to act
@param proc Pointer to RXn-TXnp4 proc information @param proc Pointer to RXn-TXnp4 proc information
@param eNB_id Local id of eNB on which to act @param eNB_id Local id of eNB on which to act
@param abstraction_flag Indicator of PHY abstraction
@param mode calib/normal mode
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
*/ */
void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id, uint8_t thread_id); void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB_id);
/*! \brief Scheduling for UE RX procedures in normal subframes. /*! \brief Scheduling for UE RX procedures in normal subframes.
@param ue Pointer to UE variables on which to act @param ue Pointer to UE variables on which to act
...@@ -306,7 +303,7 @@ int8_t nr_find_ue(uint16_t rnti, PHY_VARS_eNB *phy_vars_eNB); ...@@ -306,7 +303,7 @@ int8_t nr_find_ue(uint16_t rnti, PHY_VARS_eNB *phy_vars_eNB);
@param mu numerology index (0,1,2..) @param mu numerology index (0,1,2..)
*/ */
void nr_process_timing_advance(module_id_t Mod_id,uint8_t CC_id,uint8_t ta_command, uint8_t mu, uint16_t bwp_ul_NB_RB); void nr_process_timing_advance(module_id_t Mod_id,uint8_t CC_id,uint8_t ta_command, uint8_t mu, uint16_t bwp_ul_NB_RB);
void nr_process_timing_advance_rar(PHY_VARS_NR_UE *phy_vars_ue,UE_nr_rxtx_proc_t *proc,uint16_t timing_advance); void nr_process_timing_advance_rar(PHY_VARS_NR_UE *ue, int frame_rx, int nr_slot_rx, uint16_t ta_command);
unsigned int nr_get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb); unsigned int nr_get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb);
......
...@@ -52,7 +52,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ ...@@ -52,7 +52,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
int slot = scheduled_response->slot; int slot = scheduled_response->slot;
// Note: we have to handle the thread IDs for this. To be revisited completely. // Note: we have to handle the thread IDs for this. To be revisited completely.
thread_id = PHY_vars_UE_g[module_id][cc_id]->current_thread_id[slot]; thread_id = scheduled_response->thread_id;
NR_UE_DLSCH_t *dlsch0 = NULL; NR_UE_DLSCH_t *dlsch0 = NULL;
NR_UE_PDCCH *pdcch_vars = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0]; NR_UE_PDCCH *pdcch_vars = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0];
NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[thread_id][0][0]; NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[thread_id][0][0];
......
...@@ -73,12 +73,12 @@ ...@@ -73,12 +73,12 @@
@param nr_dci_info_extracted extracted information from dci @param nr_dci_info_extracted extracted information from dci
@param dlsch downlink context @param dlsch downlink context
@param ulsch uplink context @param ulsch uplink context
@param nr_tti_rx rx slot @param nr_slot_rx rx slot
@param tx_offset slot offset for tx @param tx_offset slot offset for tx
@returns none */ @returns none */
void get_dci_info_for_harq(PHY_VARS_NR_UE *ue, NR_DCI_INFO_EXTRACTED_t *nr_dci_info_extracted, void get_dci_info_for_harq(PHY_VARS_NR_UE *ue, NR_DCI_INFO_EXTRACTED_t *nr_dci_info_extracted,
NR_UE_DLSCH_t **dlsch, NR_UE_ULSCH_t *ulsch, uint8_t nr_tti_rx, uint8_t tx_offset); NR_UE_DLSCH_t **dlsch, NR_UE_ULSCH_t *ulsch, uint8_t nr_slot_rx, uint8_t tx_offset);
/** \brief This function configures uplink HARQ context /** \brief This function configures uplink HARQ context
@param PHY_VARS_NR_UE ue context @param PHY_VARS_NR_UE ue context
......
...@@ -61,18 +61,18 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms); ...@@ -61,18 +61,18 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms);
/** \brief This function checks nr slot direction : downlink or uplink /** \brief This function checks nr slot direction : downlink or uplink
* @param frame_parms NR DL Frame parameters * @param frame_parms NR DL Frame parameters
* @param nr_frame : frame number * @param nr_frame : frame number
* @param nr_tti : slot number * @param nr_slot : slot number
@returns int : downlink or uplink */ @returns int : downlink or uplink */
int slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti); int slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_slot);
/** \brief This function checks nr UE slot direction : downlink or uplink /** \brief This function checks nr UE slot direction : downlink or uplink
* @param cfg : FAPI Config Request * @param cfg : FAPI Config Request
* @param nr_frame : frame number * @param nr_frame : frame number
* @param nr_tti : slot number * @param nr_slot : slot number
@returns int : downlink, uplink or mixed slot type */ @returns int : downlink, uplink or mixed slot type */
int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti); int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_slot);
/** \brief This function frees tdd configuration for nr /** \brief This function frees tdd configuration for nr
* @param frame_parms NR DL Frame parameters * @param frame_parms NR DL Frame parameters
......
...@@ -39,7 +39,7 @@ ...@@ -39,7 +39,7 @@
* *
*********************************************************************/ *********************************************************************/
int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) { int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_slot) {
/* for FFD all slot can be considered as an uplink */ /* for FFD all slot can be considered as an uplink */
int mu = cfg->ssb_config.scs_common, check_slot = 0; int mu = cfg->ssb_config.scs_common, check_slot = 0;
...@@ -49,7 +49,7 @@ int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) { ...@@ -49,7 +49,7 @@ int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) {
if (nr_frame%2 == 0) { if (nr_frame%2 == 0) {
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) { for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 1) { if (cfg->tdd_table.max_tdd_periodicity_list[nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 1) {
check_slot++; check_slot++;
} }
} }
...@@ -61,7 +61,7 @@ int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) { ...@@ -61,7 +61,7 @@ int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) {
check_slot = 0; check_slot = 0;
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) { for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 0) { if (cfg->tdd_table.max_tdd_periodicity_list[nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 0) {
check_slot++; check_slot++;
} }
} }
...@@ -73,7 +73,7 @@ int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) { ...@@ -73,7 +73,7 @@ int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) {
} }
} else { } else {
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) { for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 1) { if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 1) {
check_slot++; check_slot++;
} }
} }
...@@ -85,7 +85,7 @@ int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) { ...@@ -85,7 +85,7 @@ int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) {
check_slot = 0; check_slot = 0;
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) { for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 0) { if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 0) {
check_slot++; check_slot++;
} }
} }
......
This diff is collapsed.
...@@ -97,7 +97,7 @@ int16_t get_pucch_tx_power_ue(PHY_VARS_NR_UE *ue, ...@@ -97,7 +97,7 @@ int16_t get_pucch_tx_power_ue(PHY_VARS_NR_UE *ue,
G_b_f_c = 0; G_b_f_c = 0;
} }
else { else {
G_b_f_c = ue->dlsch[ue->current_thread_id[proc->subframe_rx]][gNB_id][0]->g_pucch; G_b_f_c = ue->dlsch[proc->thread_id][gNB_id][0]->g_pucch;
LOG_W(PHY,"PUCCH Transmit power control command not yet implemented for NR : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__); LOG_W(PHY,"PUCCH Transmit power control command not yet implemented for NR : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__);
return (PUCCH_POWER_DEFAULT); return (PUCCH_POWER_DEFAULT);
} }
...@@ -169,7 +169,7 @@ int16_t get_pucch_tx_power_ue(PHY_VARS_NR_UE *ue, ...@@ -169,7 +169,7 @@ int16_t get_pucch_tx_power_ue(PHY_VARS_NR_UE *ue,
//int K_PUCCH = 0; //int K_PUCCH = 0;
if (O_ACK != 0) { if (O_ACK != 0) {
/* it assumes that PDCCH is in the first symbol of receive slot FFS TDDO NR */ /* it assumes that PDCCH is in the first symbol of receive slot FFS TDDO NR */
//int slots_gap = (proc->nr_tti_tx > proc->nr_tti_rx ? (proc->nr_tti_tx - proc->nr_tti_rx - 1) : ((proc->nr_tti_tx + ue->frame_parms.slots_per_subframe) - proc->nr_tti_rx - 1)); //int slots_gap = (proc->nr_slot_tx > proc->nr_slot_rx ? (proc->nr_slot_tx - proc->nr_slot_rx - 1) : ((proc->nr_slot_tx + ue->frame_parms.slots_per_subframe) - proc->nr_slot_rx - 1));
//K_PUCCH = (slots_gap * (ue->frame_parms.symbols_per_tti)) - 1; //K_PUCCH = (slots_gap * (ue->frame_parms.symbols_per_tti)) - 1;
} }
else { else {
......
This diff is collapsed.
...@@ -52,6 +52,7 @@ ...@@ -52,6 +52,7 @@
PHY_VARS_gNB *gNB; PHY_VARS_gNB *gNB;
PHY_VARS_NR_UE *UE; PHY_VARS_NR_UE *UE;
RAN_CONTEXT_t RC; RAN_CONTEXT_t RC;
UE_nr_rxtx_proc_t proc;
int32_t uplink_frequency_offset[MAX_NUM_CCs][4]; int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
double cpuf; double cpuf;
...@@ -559,7 +560,7 @@ int main(int argc, char **argv) ...@@ -559,7 +560,7 @@ int main(int argc, char **argv)
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_DECODING0, VCD_FUNCTION_IN); vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_DECODING0, VCD_FUNCTION_IN);
ret = nr_dlsch_decoding(UE, channel_output_fixed, &UE->frame_parms, ret = nr_dlsch_decoding(UE, &proc, 0, channel_output_fixed, &UE->frame_parms,
dlsch0_ue, dlsch0_ue->harq_processes[0], frame, nb_symb_sch, dlsch0_ue, dlsch0_ue->harq_processes[0], frame, nb_symb_sch,
slot,harq_pid, is_crnti, llr8_flag); slot,harq_pid, is_crnti, llr8_flag);
......
...@@ -686,7 +686,6 @@ int main(int argc, char **argv) ...@@ -686,7 +686,6 @@ int main(int argc, char **argv)
else {UE->is_synchronized = 1; UE->UE_mode[0]=PUSCH;} else {UE->is_synchronized = 1; UE->UE_mode[0]=PUSCH;}
UE->perfect_ce = 0; UE->perfect_ce = 0;
for (i=0;i<10;i++) UE->current_thread_id[i] = 0;
if (init_nr_ue_signal(UE, 1, 0) != 0) if (init_nr_ue_signal(UE, 1, 0) != 0)
{ {
...@@ -748,7 +747,7 @@ int main(int argc, char **argv) ...@@ -748,7 +747,7 @@ int main(int argc, char **argv)
scheduled_response.CC_id = 0; scheduled_response.CC_id = 0;
scheduled_response.frame = frame; scheduled_response.frame = frame;
scheduled_response.slot = slot; scheduled_response.slot = slot;
scheduled_response.thread_id = UE_proc.thread_id;
nr_ue_phy_config_request(&UE_mac->phy_config); nr_ue_phy_config_request(&UE_mac->phy_config);
NR_UE_info_t *UE_info = &RC.nrmac[0]->UE_info; NR_UE_info_t *UE_info = &RC.nrmac[0]->UE_info;
...@@ -787,14 +786,14 @@ int main(int argc, char **argv) ...@@ -787,14 +786,14 @@ int main(int argc, char **argv)
//multipath_channel(gNB2UE,s_re,s_im,r_re,r_im,frame_length_complex_samples,0); //multipath_channel(gNB2UE,s_re,s_im,r_re,r_im,frame_length_complex_samples,0);
UE->rx_offset=0; UE->rx_offset=0;
UE_proc.thread_id = 0;
UE_proc.frame_rx = frame; UE_proc.frame_rx = frame;
UE_proc.nr_tti_rx= slot; UE_proc.nr_slot_rx = slot;
UE_proc.subframe_rx = slot;
dcireq.frame = frame; dcireq.frame = frame;
dcireq.slot = slot; dcireq.slot = slot;
NR_UE_DLSCH_t *dlsch0 = UE->dlsch[UE->current_thread_id[UE_proc.nr_tti_rx]][0][0]; NR_UE_DLSCH_t *dlsch0 = UE->dlsch[UE_proc.thread_id][0][0];
int harq_pid = slot; int harq_pid = slot;
NR_DL_UE_HARQ_t *UE_harq_process = dlsch0->harq_processes[harq_pid]; NR_DL_UE_HARQ_t *UE_harq_process = dlsch0->harq_processes[harq_pid];
...@@ -927,11 +926,11 @@ int main(int argc, char **argv) ...@@ -927,11 +926,11 @@ int main(int argc, char **argv)
//---------------------- count errors ---------------------- //---------------------- count errors ----------------------
//---------------------------------------------------------- //----------------------------------------------------------
if (UE->dlsch[UE->current_thread_id[slot]][0][0]->last_iteration_cnt >= if (UE->dlsch[UE_proc.thread_id][0][0]->last_iteration_cnt >=
UE->dlsch[UE->current_thread_id[slot]][0][0]->max_ldpc_iterations+1) UE->dlsch[UE_proc.thread_id][0][0]->max_ldpc_iterations+1)
n_errors++; n_errors++;
NR_UE_PDSCH **pdsch_vars = UE->pdsch_vars[UE->current_thread_id[UE_proc.nr_tti_rx]]; NR_UE_PDSCH **pdsch_vars = UE->pdsch_vars[UE_proc.thread_id];
int16_t *UE_llr = pdsch_vars[0]->llr[0]; int16_t *UE_llr = pdsch_vars[0]->llr[0];
TBS = UE_harq_process->TBS;//rel15->TBSize[0]; TBS = UE_harq_process->TBS;//rel15->TBSize[0];
...@@ -1030,9 +1029,9 @@ int main(int argc, char **argv) ...@@ -1030,9 +1029,9 @@ int main(int argc, char **argv)
printStatIndent(&UE->dlsch_unscrambling_stats,"DLSCH unscrambling time"); printStatIndent(&UE->dlsch_unscrambling_stats,"DLSCH unscrambling time");
printStatIndent(&UE->dlsch_rate_unmatching_stats,"DLSCH Rate Unmatching"); printStatIndent(&UE->dlsch_rate_unmatching_stats,"DLSCH Rate Unmatching");
printf("|__ DLSCH Turbo Decoding(%d bits), avg iterations: %.1f %.2f us (%d cycles, %d trials)\n", printf("|__ DLSCH Turbo Decoding(%d bits), avg iterations: %.1f %.2f us (%d cycles, %d trials)\n",
UE->dlsch[UE->current_thread_id[subframe]][0][0]->harq_processes[0]->Cminus ? UE->dlsch[UE_proc.thread_id][0][0]->harq_processes[0]->Cminus ?
UE->dlsch[UE->current_thread_id[subframe]][0][0]->harq_processes[0]->Kminus : UE->dlsch[UE_proc.thread_id][0][0]->harq_processes[0]->Kminus :
UE->dlsch[UE->current_thread_id[subframe]][0][0]->harq_processes[0]->Kplus, UE->dlsch[UE_proc.thread_id][0][0]->harq_processes[0]->Kplus,
UE->dlsch_tc_intl1_stats.trials/(double)UE->dlsch_tc_init_stats.trials, UE->dlsch_tc_intl1_stats.trials/(double)UE->dlsch_tc_init_stats.trials,
(double)UE->dlsch_turbo_decoding_stats.diff/UE->dlsch_turbo_decoding_stats.trials*timeBase, (double)UE->dlsch_turbo_decoding_stats.diff/UE->dlsch_turbo_decoding_stats.trials*timeBase,
(int)((double)UE->dlsch_turbo_decoding_stats.diff/UE->dlsch_turbo_decoding_stats.trials), (int)((double)UE->dlsch_turbo_decoding_stats.diff/UE->dlsch_turbo_decoding_stats.trials),
...@@ -1054,7 +1053,7 @@ int main(int argc, char **argv) ...@@ -1054,7 +1053,7 @@ int main(int argc, char **argv)
LOG_M("rxsig1.m","rxs1", UE->common_vars.rxdata[1], frame_length_complex_samples, 1, 1); LOG_M("rxsig1.m","rxs1", UE->common_vars.rxdata[1], frame_length_complex_samples, 1, 1);
LOG_M("chestF0.m","chF0",UE->pdsch_vars[0][0]->dl_ch_estimates_ext,N_RB_DL*12*14,1,1); LOG_M("chestF0.m","chF0",UE->pdsch_vars[0][0]->dl_ch_estimates_ext,N_RB_DL*12*14,1,1);
write_output("rxF_comp.m","rxFc",&UE->pdsch_vars[0][0]->rxdataF_comp0[0][0],N_RB_DL*12*14,1,1); write_output("rxF_comp.m","rxFc",&UE->pdsch_vars[0][0]->rxdataF_comp0[0][0],N_RB_DL*12*14,1,1);
LOG_M("rxF_llr.m","rxFllr",UE->pdsch_vars[UE->current_thread_id[UE_proc.nr_tti_rx]][0]->llr[0],available_bits,1,0); LOG_M("rxF_llr.m","rxFllr",UE->pdsch_vars[UE_proc.thread_id][0]->llr[0],available_bits,1,0);
break; break;
} }
......
...@@ -680,6 +680,7 @@ int main(int argc, char **argv) ...@@ -680,6 +680,7 @@ int main(int argc, char **argv)
if (ret<0) n_errors++; if (ret<0) n_errors++;
} }
else { else {
UE_nr_rxtx_proc_t proc={0};
UE->rx_offset=0; UE->rx_offset=0;
uint8_t ssb_index = 0; uint8_t ssb_index = 0;
while (!((SSB_positions >> ssb_index) & 0x01)) ssb_index++; // to select the first transmitted ssb while (!((SSB_positions >> ssb_index) & 0x01)) ssb_index++; // to select the first transmitted ssb
...@@ -689,15 +690,15 @@ int main(int argc, char **argv) ...@@ -689,15 +690,15 @@ int main(int argc, char **argv)
int ssb_slot = (ssb_index>>1)+(n_hf*frame_parms->slots_per_frame); int ssb_slot = (ssb_index>>1)+(n_hf*frame_parms->slots_per_frame);
for (int i=UE->symbol_offset+1; i<UE->symbol_offset+4; i++) { for (int i=UE->symbol_offset+1; i<UE->symbol_offset+4; i++) {
nr_slot_fep(UE, nr_slot_fep(UE,
&proc,
i%frame_parms->symbols_per_slot, i%frame_parms->symbols_per_slot,
ssb_slot, ssb_slot,
0, 0,
0); 0);
nr_pbch_channel_estimation(UE,0,ssb_slot,i%frame_parms->symbols_per_slot,i-(UE->symbol_offset+1),ssb_index%8,n_hf); nr_pbch_channel_estimation(UE,&proc,0,ssb_slot,i%frame_parms->symbols_per_slot,i-(UE->symbol_offset+1),ssb_index%8,n_hf);
} }
UE_nr_rxtx_proc_t proc={0};
ret = nr_rx_pbch(UE, ret = nr_rx_pbch(UE,
&proc, &proc,
......
...@@ -628,7 +628,7 @@ int main(int argc, char **argv){ ...@@ -628,7 +628,7 @@ int main(int argc, char **argv){
UE_nr_rxtx_proc_t proc={0}; UE_nr_rxtx_proc_t proc={0};
proc.frame_tx = frame; proc.frame_tx = frame;
proc.nr_tti_tx = slot; proc.nr_slot_tx = slot;
nr_ue_prach_procedures(UE,&proc,0,0); nr_ue_prach_procedures(UE,&proc,0,0);
/* tx_lev_dB not used later, no need to set */ /* tx_lev_dB not used later, no need to set */
......
...@@ -90,7 +90,7 @@ int main(int argc, char **argv) ...@@ -90,7 +90,7 @@ int main(int argc, char **argv)
FILE *input_fd=NULL; FILE *input_fd=NULL;
//uint8_t nacktoack_flag=0; //uint8_t nacktoack_flag=0;
int16_t amp=0x7FFF; int16_t amp=0x7FFF;
int nr_tti_tx=0; int nr_slot_tx=0;
uint64_t actual_payload=0,payload_received; uint64_t actual_payload=0,payload_received;
int nr_bit=1; // maximum value possible is 2 int nr_bit=1; // maximum value possible is 2
uint8_t m0=0;// higher layer paramater initial cyclic shift uint8_t m0=0;// higher layer paramater initial cyclic shift
...@@ -501,13 +501,13 @@ int main(int argc, char **argv) ...@@ -501,13 +501,13 @@ int main(int argc, char **argv)
for (trial=0; trial<n_trials; trial++) { for (trial=0; trial<n_trials; trial++) {
bzero(txdataF[aa],frame_parms->ofdm_symbol_size*sizeof(int)); bzero(txdataF[aa],frame_parms->ofdm_symbol_size*sizeof(int));
if(format==0){ if(format==0){
nr_generate_pucch0(UE,txdataF,frame_parms,PUCCH_GroupHopping,hopping_id,amp,nr_tti_tx,m0,mcs,nrofSymbols,startingSymbolIndex,startingPRB); nr_generate_pucch0(UE,txdataF,frame_parms,PUCCH_GroupHopping,hopping_id,amp,nr_slot_tx,m0,mcs,nrofSymbols,startingSymbolIndex,startingPRB);
} }
else if (format == 1){ else if (format == 1){
nr_generate_pucch1(UE,txdataF,frame_parms,UE->pucch_config_dedicated,actual_payload,amp,nr_tti_tx,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,0,nr_bit); nr_generate_pucch1(UE,txdataF,frame_parms,UE->pucch_config_dedicated,actual_payload,amp,nr_slot_tx,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,0,nr_bit);
} }
else { else {
nr_generate_pucch2(UE,0x1234,dmrs_scrambling_id,data_scrambling_id,txdataF,frame_parms,UE->pucch_config_dedicated,actual_payload,amp,nr_tti_tx,nrofSymbols,startingSymbolIndex,nrofPRB,startingPRB,nr_bit); nr_generate_pucch2(UE,0x1234,dmrs_scrambling_id,data_scrambling_id,txdataF,frame_parms,UE->pucch_config_dedicated,actual_payload,amp,nr_slot_tx,nrofSymbols,startingSymbolIndex,nrofPRB,startingPRB,nr_bit);
} }
int txlev = signal_energy(&txdataF[aa][startingSymbolIndex*frame_parms->ofdm_symbol_size], int txlev = signal_energy(&txdataF[aa][startingSymbolIndex*frame_parms->ofdm_symbol_size],
...@@ -550,7 +550,7 @@ int main(int argc, char **argv) ...@@ -550,7 +550,7 @@ int main(int argc, char **argv)
pucch_pdu.initial_cyclic_shift = 0; pucch_pdu.initial_cyclic_shift = 0;
pucch_pdu.start_symbol_index = startingSymbolIndex; pucch_pdu.start_symbol_index = startingSymbolIndex;
pucch_pdu.prb_start = startingPRB; pucch_pdu.prb_start = startingPRB;
nr_decode_pucch0(gNB,nr_tti_tx,&uci_pdu,&pucch_pdu); nr_decode_pucch0(gNB,nr_slot_tx,&uci_pdu,&pucch_pdu);
if(sr_flag==1){ if(sr_flag==1){
if (uci_pdu.sr->sr_indication == 0 || uci_pdu.sr->sr_confidence_level == 1) if (uci_pdu.sr->sr_indication == 0 || uci_pdu.sr->sr_confidence_level == 1)
sr_errors+=1; sr_errors+=1;
...@@ -565,7 +565,7 @@ int main(int argc, char **argv) ...@@ -565,7 +565,7 @@ int main(int argc, char **argv)
} }
else if (format==1) { else if (format==1) {
nr_decode_pucch1(rxdataF,PUCCH_GroupHopping,hopping_id, nr_decode_pucch1(rxdataF,PUCCH_GroupHopping,hopping_id,
&(payload_received),frame_parms,amp,nr_tti_tx, &(payload_received),frame_parms,amp,nr_slot_tx,
m0,nrofSymbols,startingSymbolIndex,startingPRB, m0,nrofSymbols,startingSymbolIndex,startingPRB,
startingPRB_intraSlotHopping,timeDomainOCC,nr_bit); startingPRB_intraSlotHopping,timeDomainOCC,nr_bit);
if(nr_bit==1) if(nr_bit==1)
...@@ -592,7 +592,7 @@ int main(int argc, char **argv) ...@@ -592,7 +592,7 @@ int main(int argc, char **argv)
pucch_pdu.prb_start = startingPRB; pucch_pdu.prb_start = startingPRB;
pucch_pdu.dmrs_scrambling_id = dmrs_scrambling_id; pucch_pdu.dmrs_scrambling_id = dmrs_scrambling_id;
pucch_pdu.data_scrambling_id = data_scrambling_id; pucch_pdu.data_scrambling_id = data_scrambling_id;
nr_decode_pucch2(gNB,nr_tti_tx,&uci_pdu,&pucch_pdu); nr_decode_pucch2(gNB,nr_slot_tx,&uci_pdu,&pucch_pdu);
int csi_part1_bytes=pucch_pdu.bit_len_csi_part1>>3; int csi_part1_bytes=pucch_pdu.bit_len_csi_part1>>3;
if ((pucch_pdu.bit_len_csi_part1&7) > 0) csi_part1_bytes++; if ((pucch_pdu.bit_len_csi_part1&7) > 0) csi_part1_bytes++;
for (int i=0;i<csi_part1_bytes;i++) { for (int i=0;i<csi_part1_bytes;i++) {
......
...@@ -833,7 +833,8 @@ int main(int argc, char **argv) ...@@ -833,7 +833,8 @@ int main(int argc, char **argv)
gNB->ulsch[0][0]->harq_processes[harq_pid]->round = round; gNB->ulsch[0][0]->harq_processes[harq_pid]->round = round;
rv_index = nr_rv_round_map[round]; rv_index = nr_rv_round_map[round];
UE_proc.nr_tti_tx = slot; UE_proc.thread_id = 0;
UE_proc.nr_slot_tx = slot;
UE_proc.frame_tx = frame; UE_proc.frame_tx = frame;
UL_tti_req->SFN = frame; UL_tti_req->SFN = frame;
...@@ -904,6 +905,7 @@ int main(int argc, char **argv) ...@@ -904,6 +905,7 @@ int main(int argc, char **argv)
scheduled_response.CC_id = 0; scheduled_response.CC_id = 0;
scheduled_response.frame = frame; scheduled_response.frame = frame;
scheduled_response.slot = slot; scheduled_response.slot = slot;
scheduled_response.thread_id = UE_proc.thread_id;
scheduled_response.dl_config = NULL; scheduled_response.dl_config = NULL;
scheduled_response.ul_config = &ul_config; scheduled_response.ul_config = &ul_config;
scheduled_response.tx_request = &tx_req; scheduled_response.tx_request = &tx_req;
...@@ -959,7 +961,7 @@ int main(int argc, char **argv) ...@@ -959,7 +961,7 @@ int main(int argc, char **argv)
/////////////////////////phy_procedures_nr_ue_TX/////////////////////// /////////////////////////phy_procedures_nr_ue_TX///////////////////////
/////////// ///////////
phy_procedures_nrUE_TX(UE, &UE_proc, gNB_id, 0); phy_procedures_nrUE_TX(UE, &UE_proc, gNB_id);
if (n_trials==1) { if (n_trials==1) {
......
...@@ -94,6 +94,7 @@ extern int pbch_detection(PHY_VARS_NR_UE *ue, runmode_t mode); ...@@ -94,6 +94,7 @@ extern int pbch_detection(PHY_VARS_NR_UE *ue, runmode_t mode);
int test_synchro_pss_sss_nr(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, int pss_sequence_number) int test_synchro_pss_sss_nr(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, int pss_sequence_number)
{ {
NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms); NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms);
UE_nr_rxtx_proc_t proc = {0};
int synchro_position; int synchro_position;
int offset; int offset;
int16_t *tmp; int16_t *tmp;
...@@ -130,7 +131,7 @@ int test_synchro_pss_sss_nr(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, in ...@@ -130,7 +131,7 @@ int test_synchro_pss_sss_nr(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, in
#endif #endif
rx_sss_nr(PHY_vars_UE, &metric_fdd_ncp, &phase_fdd_ncp); rx_sss_nr(PHY_vars_UE, &proc, &metric_fdd_ncp, &phase_fdd_ncp);
#if TEST_SYNCHRO_TIMING_PSS #if TEST_SYNCHRO_TIMING_PSS
...@@ -244,7 +245,7 @@ void set_sequence_sss(PHY_VARS_NR_UE *PHY_vars_UE, int offset, int slot_offset) ...@@ -244,7 +245,7 @@ void set_sequence_sss(PHY_VARS_NR_UE *PHY_vars_UE, int offset, int slot_offset)
void insert_sequence_sss(PHY_VARS_NR_UE *PHY_vars_UE, int offset) void insert_sequence_sss(PHY_VARS_NR_UE *PHY_vars_UE, int offset)
{ {
NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms); NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms);
int samples_for_half_frame = (LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_tti)>>1; int samples_for_half_frame = frame_parms->samples_per_frame / 2;
set_sequence_sss(PHY_vars_UE, offset, 0); set_sequence_sss(PHY_vars_UE, offset, 0);
...@@ -327,7 +328,7 @@ int test_synchro_pss_sss(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, int s ...@@ -327,7 +328,7 @@ int test_synchro_pss_sss(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, int s
int sync_pos2 = synchro_position - frame_parms->nb_prefix_samples; int sync_pos2 = synchro_position - frame_parms->nb_prefix_samples;
int sync_pos_slot = (frame_parms->samples_per_tti>>1) - frame_parms->ofdm_symbol_size - frame_parms->nb_prefix_samples; int sync_pos_slot = (frame_parms->samples_per_slot>>1) - frame_parms->ofdm_symbol_size - frame_parms->nb_prefix_samples;
if (sync_pos2 >= sync_pos_slot) if (sync_pos2 >= sync_pos_slot)
PHY_vars_UE->rx_offset = sync_pos2 - sync_pos_slot; PHY_vars_UE->rx_offset = sync_pos2 - sync_pos_slot;
......
...@@ -300,7 +300,7 @@ typedef enum { ...@@ -300,7 +300,7 @@ typedef enum {
void set_random_rx_buffer(PHY_VARS_NR_UE *PHY_vars_UE, int amp) { void set_random_rx_buffer(PHY_VARS_NR_UE *PHY_vars_UE, int amp) {
NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms); NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms);
int samples_for_frame = (LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_tti); int samples_for_frame = frame_parms->samples_per_frame;
int16_t random; int16_t random;
int16_t *data_p; int16_t *data_p;
random_data_format_t data_format = SINUSOIDAL_DATA; random_data_format_t data_format = SINUSOIDAL_DATA;
...@@ -394,7 +394,7 @@ void set_random_rx_buffer(PHY_VARS_NR_UE *PHY_vars_UE, int amp) { ...@@ -394,7 +394,7 @@ void set_random_rx_buffer(PHY_VARS_NR_UE *PHY_vars_UE, int amp) {
int set_pss_in_rx_buffer_from_external_buffer(PHY_VARS_NR_UE *PHY_vars_UE, short *input_buffer) { int set_pss_in_rx_buffer_from_external_buffer(PHY_VARS_NR_UE *PHY_vars_UE, short *input_buffer) {
NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms); NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms);
int samples_for_frame = LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_subframe; /* both i and q */ int samples_for_frame = frame_parms->samples_per_frame; /* both i and q */
for (int aa=0; aa<PHY_vars_UE->frame_parms.nb_antennas_rx; aa++) { for (int aa=0; aa<PHY_vars_UE->frame_parms.nb_antennas_rx; aa++) {
for (int i = 0; i < samples_for_frame; i++) { for (int i = 0; i < samples_for_frame; i++) {
......
...@@ -69,12 +69,6 @@ typedef struct { ...@@ -69,12 +69,6 @@ typedef struct {
int number_of_fail; int number_of_fail;
} test_t; } test_t;
typedef struct {
uint16_t ofdm_symbol_size;
uint32_t samples_per_tti;
uint32_t samples_per_subframe;
} save_frame_parms_t;
/*************** GLOBAL VARIABLES***********************************/ /*************** GLOBAL VARIABLES***********************************/
EXTERN PHY_VARS_eNB *PHY_vars_eNB; EXTERN PHY_VARS_eNB *PHY_vars_eNB;
......
...@@ -58,7 +58,7 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) { ...@@ -58,7 +58,7 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) {
int occ_Index = 0; int occ_Index = 0;
uint64_t pucch_payload = 0; uint64_t pucch_payload = 0;
int tx_amp = 512; int tx_amp = 512;
int nr_tti_tx = 0; int nr_slot_tx = 0;
int N_UCI = 0; /* size in bits for Uplink Control Information */ int N_UCI = 0; /* size in bits for Uplink Control Information */
switch(format) { switch(format) {
...@@ -67,7 +67,7 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) { ...@@ -67,7 +67,7 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) {
&ue->frame_parms, &ue->frame_parms,
&ue->pucch_config_dedicated_nr[gNB_id], &ue->pucch_config_dedicated_nr[gNB_id],
tx_amp, tx_amp,
nr_tti_tx, nr_slot_tx,
(uint8_t)m_0, (uint8_t)m_0,
(uint8_t)m_CS, (uint8_t)m_CS,
nb_symbols_total, nb_symbols_total,
...@@ -82,7 +82,7 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) { ...@@ -82,7 +82,7 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) {
&ue->pucch_config_dedicated_nr[gNB_id], &ue->pucch_config_dedicated_nr[gNB_id],
pucch_payload, pucch_payload,
tx_amp, tx_amp,
nr_tti_tx, nr_slot_tx,
(uint8_t)m_0, (uint8_t)m_0,
nb_symbols_total, nb_symbols_total,
starting_symbol_index, starting_symbol_index,
...@@ -95,13 +95,13 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) { ...@@ -95,13 +95,13 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) {
case pucch_format2_nr: { case pucch_format2_nr: {
nr_generate_pucch2(ue, nr_generate_pucch2(ue,
ue->pdcch_vars[ue->current_thread_id[nr_tti_tx]][gNB_id]->crnti, ue->pdcch_vars[thread_number][gNB_id]->crnti,
ue->common_vars.txdataF, ue->common_vars.txdataF,
&ue->frame_parms, &ue->frame_parms,
&ue->pucch_config_dedicated_nr[gNB_id], &ue->pucch_config_dedicated_nr[gNB_id],
pucch_payload, pucch_payload,
tx_amp, tx_amp,
nr_tti_tx, nr_slot_tx,
nb_symbols_total, nb_symbols_total,
starting_symbol_index, starting_symbol_index,
nb_of_prbs, nb_of_prbs,
...@@ -113,14 +113,14 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) { ...@@ -113,14 +113,14 @@ int test_pucch_generators(PHY_VARS_NR_UE *ue) {
case pucch_format3_nr: case pucch_format3_nr:
case pucch_format4_nr: { case pucch_format4_nr: {
nr_generate_pucch3_4(ue, nr_generate_pucch3_4(ue,
ue->pdcch_vars[ue->current_thread_id[nr_tti_tx]][gNB_id]->crnti, ue->pdcch_vars[thread_number][gNB_id]->crnti,
ue->common_vars.txdataF, ue->common_vars.txdataF,
&ue->frame_parms, &ue->frame_parms,
format, format,
&ue->pucch_config_dedicated_nr[gNB_id], &ue->pucch_config_dedicated_nr[gNB_id],
pucch_payload, pucch_payload,
tx_amp, tx_amp,
nr_tti_tx, nr_slot_tx,
nb_symbols_total, nb_symbols_total,
starting_symbol_index, starting_symbol_index,
nb_of_prbs, nb_of_prbs,
......
...@@ -229,7 +229,6 @@ int test_srs_periodicity(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc) ...@@ -229,7 +229,6 @@ int test_srs_periodicity(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc)
for (int slot_tx = 0; slot_tx < frame_parms->slots_per_frame; slot_tx++) { for (int slot_tx = 0; slot_tx < frame_parms->slots_per_frame; slot_tx++) {
proc->frame_tx = frame_tx; proc->frame_tx = frame_tx;
proc->nr_slot_tx = slot_tx; proc->nr_slot_tx = slot_tx;
proc->nr_tti_tx = slot_tx % frame_parms->slots_per_subframe;
if (ue_srs_procedure_nr( ue, proc, 0) == 0) { if (ue_srs_procedure_nr( ue, proc, 0) == 0) {
printf("test_srs_periodicity srs at frame %d slot %d \n", frame_tx, slot_tx); printf("test_srs_periodicity srs at frame %d slot %d \n", frame_tx, slot_tx);
} }
...@@ -373,7 +372,7 @@ int test_srs(PHY_VARS_NR_UE *PHY_vars_UE) ...@@ -373,7 +372,7 @@ int test_srs(PHY_VARS_NR_UE *PHY_vars_UE)
/* start test of sounding reference signals */ /* start test of sounding reference signals */
default_srs_configuration(frame_parms); default_srs_configuration(frame_parms);
txptr = calloc(frame_parms->samples_per_tti , sizeof(int32_t)); txptr = calloc(frame_parms->samples_per_slot , sizeof(int32_t));
if (txptr == NULL) { if (txptr == NULL) {
printf("Error test_srs: memory allocation problem txptr \n"); printf("Error test_srs: memory allocation problem txptr \n");
assert(0); assert(0);
......
...@@ -84,6 +84,7 @@ ...@@ -84,6 +84,7 @@
int test_synchro_pss_sss_nr(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, NR_DL_FRAME_PARMS *frame_parms_gNB, test_t *test) int test_synchro_pss_sss_nr(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, NR_DL_FRAME_PARMS *frame_parms_gNB, test_t *test)
{ {
UE_nr_rxtx_proc_t proc = {0};
VOID_PARAMETER test; VOID_PARAMETER test;
int synchro_position; int synchro_position;
int offset; int offset;
...@@ -133,7 +134,7 @@ int test_synchro_pss_sss_nr(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, NR ...@@ -133,7 +134,7 @@ int test_synchro_pss_sss_nr(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, NR
#endif #endif
rx_sss_nr(PHY_vars_UE, &metric_fdd_ncp, &phase_fdd_ncp); rx_sss_nr(PHY_vars_UE, &proc, &metric_fdd_ncp, &phase_fdd_ncp);
#if TEST_SYNCHRO_TIMING_PSS #if TEST_SYNCHRO_TIMING_PSS
......
...@@ -96,7 +96,8 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -96,7 +96,8 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
@param module_id_t mod_id module ID @param module_id_t mod_id module ID
@param int cc_id CC ID @param int cc_id CC ID
@param frame_t frame frame number @param frame_t frame frame number
@param int slot reference number */ @param int slot reference number
@param UE_nr_rxtx_proc_t *proc pointer to process context */
void fill_scheduled_response(nr_scheduled_response_t *scheduled_response, void fill_scheduled_response(nr_scheduled_response_t *scheduled_response,
fapi_nr_dl_config_request_t *dl_config, fapi_nr_dl_config_request_t *dl_config,
fapi_nr_ul_config_request_t *ul_config, fapi_nr_ul_config_request_t *ul_config,
...@@ -104,7 +105,8 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response, ...@@ -104,7 +105,8 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response,
module_id_t mod_id, module_id_t mod_id,
int cc_id, int cc_id,
frame_t frame, frame_t frame,
int slot); int slot,
int thread_id);
/* \brief Get SR payload (0,1) from UE MAC /* \brief Get SR payload (0,1) from UE MAC
@param Mod_id Instance id of UE in machine @param Mod_id Instance id of UE in machine
...@@ -211,9 +213,10 @@ and fills the PRACH PDU per each FD occasion. ...@@ -211,9 +213,10 @@ and fills the PRACH PDU per each FD occasion.
@param module_idP Index of UE instance @param module_idP Index of UE instance
@param frameP Frame index @param frameP Frame index
@param slotP Slot index @param slotP Slot index
@param thread_id RX/TX Thread ID
@returns void @returns void
*/ */
void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t slotP); void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, int thread_id);
/* \brief This function schedules the Msg3 transmission /* \brief This function schedules the Msg3 transmission
@param @param
...@@ -264,7 +267,7 @@ andom-access to transmit a BSR along with the C-RNTI control element (see 5.1.4 ...@@ -264,7 +267,7 @@ andom-access to transmit a BSR along with the C-RNTI control element (see 5.1.4
@param CC_id Component Carrier Index @param CC_id Component Carrier Index
@param frame @param frame
@param gNB_id gNB index @param gNB_id gNB index
@param nr_tti_tx slot for PRACH transmission @param nr_slot_tx slot for PRACH transmission
@returns indication to generate PRACH to phy */ @returns indication to generate PRACH to phy */
uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources, uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
fapi_nr_ul_config_prach_pdu *prach_pdu, fapi_nr_ul_config_prach_pdu *prach_pdu,
...@@ -273,7 +276,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources, ...@@ -273,7 +276,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
UE_MODE_t UE_mode, UE_MODE_t UE_mode,
frame_t frame, frame_t frame,
uint8_t gNB_id, uint8_t gNB_id,
int nr_tti_tx); int nr_slot_tx);
/* \brief Function implementing the routine for the selection of Random Access resources (5.1.2 TS 38.321). /* \brief Function implementing the routine for the selection of Random Access resources (5.1.2 TS 38.321).
@param module_idP Index of UE instance @param module_idP Index of UE instance
......
...@@ -401,7 +401,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources, ...@@ -401,7 +401,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
UE_MODE_t UE_mode, UE_MODE_t UE_mode,
frame_t frame, frame_t frame,
uint8_t gNB_id, uint8_t gNB_id,
int nr_tti_tx){ int nr_slot_tx){
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
uint8_t mac_sdus[MAX_NR_ULSCH_PAYLOAD_BYTES]; uint8_t mac_sdus[MAX_NR_ULSCH_PAYLOAD_BYTES];
...@@ -489,9 +489,9 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources, ...@@ -489,9 +489,9 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
} }
//mac->RA_tx_frame = frame; //mac->RA_tx_frame = frame;
//mac->RA_tx_subframe = nr_tti_tx; //mac->RA_tx_slot = nr_slot_tx;
//mac->RA_backoff_frame = frame; //mac->RA_backoff_frame = frame;
//mac->RA_backoff_subframe = nr_tti_tx; //mac->RA_backoff_slot = nr_slot_tx;
if (size_sdu > 0) { if (size_sdu > 0) {
...@@ -510,7 +510,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources, ...@@ -510,7 +510,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
// Fill in preamble and PRACH resources // Fill in preamble and PRACH resources
if (mac->generate_nr_prach == 1) if (mac->generate_nr_prach == 1)
nr_get_prach_resources(mod_id, CC_id, gNB_id, nr_tti_tx, prach_resources, prach_pdu, rach_ConfigDedicated); nr_get_prach_resources(mod_id, CC_id, gNB_id, nr_slot_tx, prach_resources, prach_pdu, rach_ConfigDedicated);
offset = nr_generate_ulsch_pdu((uint8_t *) mac_sdus, // sdus buffer offset = nr_generate_ulsch_pdu((uint8_t *) mac_sdus, // sdus buffer
(uint8_t *) payload, // UL MAC pdu pointer (uint8_t *) payload, // UL MAC pdu pointer
...@@ -544,7 +544,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources, ...@@ -544,7 +544,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
// - handle backoff and raResponseWindow params // - handle backoff and raResponseWindow params
// LOG_D(MAC, "[MAC][UE %d][RAPROC] frame %d, subframe %d: RA Active, window cnt %d (RA_tx_frame %d, RA_tx_subframe %d)\n", // LOG_D(MAC, "[MAC][UE %d][RAPROC] frame %d, subframe %d: RA Active, window cnt %d (RA_tx_frame %d, RA_tx_subframe %d)\n",
// mod_id, frame, nr_tti_tx, mac->RA_window_cnt, mac->RA_tx_frame, mac->RA_tx_subframe); // mod_id, frame, nr_slot_tx, mac->RA_window_cnt, mac->RA_tx_frame, mac->RA_tx_subframe);
if (mac->RA_BI_found){ if (mac->RA_BI_found){
prach_resources->RA_PREAMBLE_BACKOFF = prach_resources->RA_SCALING_FACTOR_BI * mac->RA_backoff_indicator; prach_resources->RA_PREAMBLE_BACKOFF = prach_resources->RA_SCALING_FACTOR_BI * mac->RA_backoff_indicator;
...@@ -564,7 +564,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources, ...@@ -564,7 +564,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
} else if (mac->RA_window_cnt == 0 && !mac->RA_RAPID_found) { } else if (mac->RA_window_cnt == 0 && !mac->RA_RAPID_found) {
LOG_I(MAC, "[MAC][UE %d][RAPROC] Frame %d: nr_tti_tx %d: RAR reception failed \n", mod_id, frame, nr_tti_tx); LOG_I(MAC, "[MAC][UE %d][RAPROC] Frame %d: nr_slot_tx %d: RAR reception failed \n", mod_id, frame, nr_slot_tx);
mac->ra_state = RA_UE_IDLE; mac->ra_state = RA_UE_IDLE;
mac->RA_PREAMBLE_TRANSMISSION_COUNTER++; mac->RA_PREAMBLE_TRANSMISSION_COUNTER++;
...@@ -622,22 +622,22 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources, ...@@ -622,22 +622,22 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
// frame_diff = (sframe_t) frame - mac->RA_backoff_frame; // frame_diff = (sframe_t) frame - mac->RA_backoff_frame;
// if (frame_diff < 0) frame_diff = -frame_diff; // if (frame_diff < 0) frame_diff = -frame_diff;
// mac->RA_backoff_frame = frame; // mac->RA_backoff_frame = frame;
// mac->RA_backoff_subframe = nr_tti_tx; // mac->RA_backoff_slot = nr_slot_tx;
// } // }
// compute RA window parameters // compute RA window parameters
// if (mac->RA_window_cnt > 0){ // if (mac->RA_window_cnt > 0){
// frame_diff = (frame_t) frame - mac->RA_tx_frame; // frame_diff = (frame_t) frame - mac->RA_tx_frame;
// if (frame_diff < 0) frame_diff = -frame_diff; // if (frame_diff < 0) frame_diff = -frame_diff;
// mac->RA_window_cnt -= ((10 * frame_diff) + (nr_tti_tx - mac->RA_tx_subframe)); // mac->RA_window_cnt -= ((10 * frame_diff) + (nr_slot_tx - mac->RA_tx_subframe));
// LOG_D(MAC, "[MAC][UE %d][RAPROC] Frame %d, subframe %d: RA Active, adjusted window cnt %d\n", mod_id, frame, nr_tti_tx, mac->RA_window_cnt); // LOG_D(MAC, "[MAC][UE %d][RAPROC] Frame %d, subframe %d: RA Active, adjusted window cnt %d\n", mod_id, frame, nr_slot_tx, mac->RA_window_cnt);
// } // }
// mac->RA_tx_frame = frame; // mac->RA_tx_frame = frame;
// mac->RA_tx_subframe = nr_tti_tx; // mac->RA_tx_slot = nr_slot_tx;
// Fill in preamble and PRACH resources // Fill in preamble and PRACH resources
if (mac->generate_nr_prach == 1) if (mac->generate_nr_prach == 1)
nr_get_prach_resources(mod_id, CC_id, gNB_id, nr_tti_tx, prach_resources, prach_pdu, rach_ConfigDedicated); nr_get_prach_resources(mod_id, CC_id, gNB_id, nr_slot_tx, prach_resources, prach_pdu, rach_ConfigDedicated);
} else { } else {
...@@ -646,12 +646,12 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources, ...@@ -646,12 +646,12 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
LOG_D(MAC, "[MAC][UE %d][RAPROC][%d.%d]: RAR not received yet (RA window count %d) \n", LOG_D(MAC, "[MAC][UE %d][RAPROC][%d.%d]: RAR not received yet (RA window count %d) \n",
mod_id, mod_id,
frame, frame,
nr_tti_tx, nr_slot_tx,
mac->RA_window_cnt); mac->RA_window_cnt);
// Fill in preamble and PRACH resources // Fill in preamble and PRACH resources
if (mac->generate_nr_prach == 1) if (mac->generate_nr_prach == 1)
nr_get_prach_resources(mod_id, CC_id, gNB_id, nr_tti_tx, prach_resources, prach_pdu, rach_ConfigDedicated); nr_get_prach_resources(mod_id, CC_id, gNB_id, nr_slot_tx, prach_resources, prach_pdu, rach_ConfigDedicated);
} }
} }
......
...@@ -775,7 +775,8 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response, ...@@ -775,7 +775,8 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response,
module_id_t mod_id, module_id_t mod_id,
int cc_id, int cc_id,
frame_t frame, frame_t frame,
int slot){ int slot,
int thread_id){
scheduled_response->dl_config = dl_config; scheduled_response->dl_config = dl_config;
scheduled_response->ul_config = ul_config; scheduled_response->ul_config = ul_config;
...@@ -784,7 +785,7 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response, ...@@ -784,7 +785,7 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response,
scheduled_response->CC_id = cc_id; scheduled_response->CC_id = cc_id;
scheduled_response->frame = frame; scheduled_response->frame = frame;
scheduled_response->slot = slot; scheduled_response->slot = slot;
scheduled_response->thread_id = thread_id;
} }
uint32_t get_ssb_slot(uint32_t ssb_index){ uint32_t get_ssb_slot(uint32_t ssb_index){
...@@ -1471,7 +1472,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -1471,7 +1472,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
*/ */
dl_config->number_pdus = dl_config->number_pdus + 1; dl_config->number_pdus = dl_config->number_pdus + 1;
fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot); fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->thread_id);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL) if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL)
mac->if_module->scheduled_response(&scheduled_response); mac->if_module->scheduled_response(&scheduled_response);
} }
...@@ -1485,7 +1486,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -1485,7 +1486,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
dcireq.dl_config_req.number_pdus = 0; dcireq.dl_config_req.number_pdus = 0;
nr_ue_dcireq(&dcireq); //to be replaced with function pointer later nr_ue_dcireq(&dcireq); //to be replaced with function pointer later
fill_scheduled_response(&scheduled_response, &dcireq.dl_config_req, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot); fill_scheduled_response(&scheduled_response, &dcireq.dl_config_req, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->thread_id);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL){ if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL){
mac->if_module->scheduled_response(&scheduled_response); mac->if_module->scheduled_response(&scheduled_response);
} }
...@@ -1649,7 +1650,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -1649,7 +1650,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
} }
} }
fill_scheduled_response(&scheduled_response, NULL, ul_config_req, &tx_req, mod_id, cc_id, rx_frame, rx_slot); fill_scheduled_response(&scheduled_response, NULL, ul_config_req, &tx_req, mod_id, cc_id, rx_frame, rx_slot, ul_info->thread_id);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL){ if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL){
mac->if_module->scheduled_response(&scheduled_response); mac->if_module->scheduled_response(&scheduled_response);
} }
...@@ -1718,7 +1719,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -1718,7 +1719,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
ul_config_list->pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH; ul_config_list->pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
ul_config->number_pdus++; ul_config->number_pdus++;
// scheduled_response // scheduled_response
fill_scheduled_response(&scheduled_response, NULL, ul_config, &tx_req, ul_info->module_id, ul_info->cc_id, ul_info->frame_rx, ul_info->slot_rx); fill_scheduled_response(&scheduled_response, NULL, ul_config, &tx_req, ul_info->module_id, ul_info->cc_id, ul_info->frame_rx, ul_info->slot_rx, ul_info->thread_id);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL){ if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL){
mac->if_module->scheduled_response(&scheduled_response); mac->if_module->scheduled_response(&scheduled_response);
} }
...@@ -1773,7 +1774,7 @@ void nr_ue_msg3_scheduler(NR_UE_MAC_INST_t *mac, ...@@ -1773,7 +1774,7 @@ void nr_ue_msg3_scheduler(NR_UE_MAC_INST_t *mac,
// PRACH formats 9, 10, 11 are corresponding to dual PRACH format configurations A1/B1, A2/B2, A3/B3. // PRACH formats 9, 10, 11 are corresponding to dual PRACH format configurations A1/B1, A2/B2, A3/B3.
// - todo: // - todo:
// - Partial configuration is actually already stored in (fapi_nr_prach_config_t) &mac->phy_config.config_req->prach_config // - Partial configuration is actually already stored in (fapi_nr_prach_config_t) &mac->phy_config.config_req->prach_config
void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) { void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, int thread_id) {
uint16_t format, format0, format1, ncs; uint16_t format, format0, format1, ncs;
int is_nr_prach_slot; int is_nr_prach_slot;
...@@ -1901,7 +1902,7 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s ...@@ -1901,7 +1902,7 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s
} // if format1 } // if format1
} // is_nr_prach_slot } // is_nr_prach_slot
fill_scheduled_response(&scheduled_response, NULL, ul_config, NULL, module_idP, 0 /*TBR fix*/, frameP, slotP); fill_scheduled_response(&scheduled_response, NULL, ul_config, NULL, module_idP, 0 /*TBR fix*/, frameP, slotP, thread_id);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL) if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL)
mac->if_module->scheduled_response(&scheduled_response); mac->if_module->scheduled_response(&scheduled_response);
} // if is_nr_UL_slot } // if is_nr_UL_slot
...@@ -1967,7 +1968,7 @@ uint16_t nr_dci_format_size (PHY_VARS_NR_UE *ue, ...@@ -1967,7 +1968,7 @@ uint16_t nr_dci_format_size (PHY_VARS_NR_UE *ue,
csi_MeasConfig_t csi_MeasConfig = ue->csi_MeasConfig; csi_MeasConfig_t csi_MeasConfig = ue->csi_MeasConfig;
PUSCH_ServingCellConfig_t PUSCH_ServingCellConfig= ue->PUSCH_ServingCellConfig; PUSCH_ServingCellConfig_t PUSCH_ServingCellConfig= ue->PUSCH_ServingCellConfig;
PDSCH_ServingCellConfig_t PDSCH_ServingCellConfig= ue->PDSCH_ServingCellConfig; PDSCH_ServingCellConfig_t PDSCH_ServingCellConfig= ue->PDSCH_ServingCellConfig;
NR_UE_PDCCH *pdcch_vars2 = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]; NR_UE_PDCCH *pdcch_vars2 = ue->pdcch_vars[proc->thread_id][eNB_id];
// 1 CARRIER_IN // 1 CARRIER_IN
// crossCarrierSchedulingConfig from higher layers, variable crossCarrierSchedulingConfig indicates if 'cross carrier scheduling' is enabled or not: // crossCarrierSchedulingConfig from higher layers, variable crossCarrierSchedulingConfig indicates if 'cross carrier scheduling' is enabled or not:
// if No cross carrier scheduling: number of bits for CARRIER_IND is 0 // if No cross carrier scheduling: number of bits for CARRIER_IND is 0
......
...@@ -110,7 +110,7 @@ int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){ ...@@ -110,7 +110,7 @@ int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
ret = nr_ue_scheduler(NULL, ul_info); ret = nr_ue_scheduler(NULL, ul_info);
if (is_nr_UL_slot(mac->scc, ul_info->slot_tx) && get_softmodem_params()->do_ra) if (is_nr_UL_slot(mac->scc, ul_info->slot_tx) && get_softmodem_params()->do_ra)
nr_ue_prach_scheduler(module_id, ul_info->frame_tx, ul_info->slot_tx); nr_ue_prach_scheduler(module_id, ul_info->frame_tx, ul_info->slot_tx, ul_info->thread_id);
switch(ret){ switch(ret){
case UE_CONNECTION_OK: case UE_CONNECTION_OK:
...@@ -157,7 +157,7 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_ ...@@ -157,7 +157,7 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_
if (ret >= 0) { if (ret >= 0) {
AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is NULL!\n" ); AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is NULL!\n" );
AssertFatal( nr_ue_if_module_inst[module_id]->scheduled_response != NULL, "scheduled_response is NULL!\n" ); AssertFatal( nr_ue_if_module_inst[module_id]->scheduled_response != NULL, "scheduled_response is NULL!\n" );
fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, dl_info->module_id, dl_info->cc_id, dl_info->frame, dl_info->slot); fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, dl_info->module_id, dl_info->cc_id, dl_info->frame, dl_info->slot, dl_info->thread_id);
nr_ue_if_module_inst[module_id]->scheduled_response(&scheduled_response); nr_ue_if_module_inst[module_id]->scheduled_response(&scheduled_response);
} }
} }
......
...@@ -66,8 +66,8 @@ typedef struct { ...@@ -66,8 +66,8 @@ typedef struct {
frame_t frame; frame_t frame;
/// slot /// slot
int slot; int slot;
/// proc is needed to signal back decoded frame number to PHY. However, this is not really FAPI procedure and should be done differently /// index of the current UE RX/TX thread
UE_nr_rxtx_proc_t * proc; int thread_id;
/// NR UE FAPI-like P7 message, direction: L1 to L2 /// NR UE FAPI-like P7 message, direction: L1 to L2
/// data reception indication structure /// data reception indication structure
...@@ -95,6 +95,9 @@ typedef struct { ...@@ -95,6 +95,9 @@ typedef struct {
frame_t frame_tx; frame_t frame_tx;
/// slot tx /// slot tx
uint32_t slot_tx; uint32_t slot_tx;
/// index of the current UE RX/TX thread
int thread_id;
/// dci reception indication structure /// dci reception indication structure
fapi_nr_dci_indication_t *dci_ind; fapi_nr_dci_indication_t *dci_ind;
} nr_uplink_indication_t; } nr_uplink_indication_t;
...@@ -111,6 +114,8 @@ typedef struct { ...@@ -111,6 +114,8 @@ typedef struct {
frame_t frame; frame_t frame;
/// slot /// slot
int slot; int slot;
/// index of the current UE RX/TX thread
int thread_id;
/// NR UE FAPI-like P7 message, direction: L2 to L1 /// NR UE FAPI-like P7 message, direction: L2 to L1
/// downlink transmission configuration request structure /// downlink transmission configuration request structure
......
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