Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
O
OpenXG-RAN
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Analytics
Analytics
CI / CD
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
常顺宇
OpenXG-RAN
Commits
2d97eb4b
Commit
2d97eb4b
authored
7 years ago
by
Raymond Knopp
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
more debugging of RA procedure for eMTC
parent
97097a8c
Changes
5
Show whitespace changes
Inline
Side-by-side
Showing
5 changed files
with
374 additions
and
379 deletions
+374
-379
openair1/PHY/LTE_TRANSPORT/dci_tools.c
openair1/PHY/LTE_TRANSPORT/dci_tools.c
+18
-6
openair1/PHY/LTE_TRANSPORT/edci.c
openair1/PHY/LTE_TRANSPORT/edci.c
+326
-352
openair1/SCHED/fapi_l1.c
openair1/SCHED/fapi_l1.c
+9
-3
openair1/SCHED/phy_procedures_lte_eNb.c
openair1/SCHED/phy_procedures_lte_eNb.c
+17
-14
openair2/LAYER2/MAC/eNB_scheduler_RA.c
openair2/LAYER2/MAC/eNB_scheduler_RA.c
+4
-4
No files found.
openair1/PHY/LTE_TRANSPORT/dci_tools.c
View file @
2d97eb4b
...
...
@@ -1065,7 +1065,7 @@ fill_dci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, DCI_ALLOC_t * dc
dlsch0
->
subframe_tx
[
subframe
]
=
1
;
if
(
dlsch0
->
rnti
!=
rel8
->
rnti
)
{
// if rnti of dlsch is not the same as in the config, this is a new entry
dlsch0_harq
->
round
=
0
;
dlsch0
->
harq_mask
=
0
;
dlsch0
->
harq_mask
=
0
;
}
if
((
dlsch0
->
harq_mask
&
(
1
<<
rel8
->
harq_process
))
>
0
)
{
if
(
rel8
->
new_data_indicator_1
!=
dlsch0_harq
->
ndi
)
...
...
@@ -2353,30 +2353,42 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t *
dlsch0_harq
->
dl_power_off
=
1
;
dlsch0
->
active
=
1
;
dlsch0
->
harq_mask
|=
(
1
<<
rel13
->
harq_process
);
dlsch0
->
subframe_tx
[
subframe
]
=
1
;
if
(
dlsch0
->
rnti
!=
rel13
->
rnti
)
{
// if rnti of dlsch is not the same as in the config, this is a new entry
dlsch0_harq
->
round
=
0
;
dlsch0
->
harq_mask
=
0
;
}
if
((
dlsch0
->
harq_mask
&
(
1
<<
rel13
->
harq_process
))
>
0
)
{
if
(
rel13
->
new_data_indicator
!=
dlsch0_harq
->
ndi
)
dlsch0_harq
->
round
=
0
;
}
else
{
// process is inactive, so activate and set round to 0
dlsch0_harq
->
round
=
0
;
}
dlsch0_harq
->
ndi
=
rel13
->
new_data_indicator
;
if
(
dlsch0_harq
->
round
==
0
)
{
dlsch0_harq
->
status
=
ACTIVE
;
// printf("Setting DLSCH process %d to ACTIVE\n",rel8->harq_process);
// MCS and TBS don't change across HARQ rounds
dlsch0_harq
->
mcs
=
rel13
->
mcs
;
dlsch0_harq
->
TBS
=
TBStable
[
get_I_TBS
(
dlsch0_harq
->
mcs
)][
dlsch0_harq
->
nb_rb
-
1
];
}
dlsch0
->
active
=
1
;
dlsch0
->
harq_mask
|=
(
1
<<
rel13
->
harq_process
);
dlsch0
->
harq_ids
[(
subframe
+
2
)
%
10
]
=
rel13
->
harq_process
;
dlsch0_harq
->
frame
=
(
subframe
>=
8
)
?
((
frame
+
1
)
&
1023
)
:
frame
;
dlsch0_harq
->
subframe
=
(
subframe
+
2
)
%
10
;
dlsch0
->
harq_ids
[
dlsch0_harq
->
subframe
]
=
rel13
->
harq_process
;
dlsch0_harq
->
pdsch_start
=
rel13
->
start_symbol
;
LOG_I
(
PHY
,
"Setting DLSCH harq %d to active for %d.%d
\n
"
,
rel13
->
harq_process
,
dlsch0_harq
->
frame
,
dlsch0_harq
->
subframe
);
dlsch0
->
rnti
=
rel13
->
rnti
;
dlsch0_harq
->
Qm
=
get_Qm
(
rel13
->
mcs
);
...
...
This diff is collapsed.
Click to expand it.
openair1/PHY/LTE_TRANSPORT/edci.c
View file @
2d97eb4b
...
...
@@ -49,14 +49,12 @@
//#define DEBUG_PHY
#ifdef Rel14
void
generate_edci_top
(
PHY_VARS_eNB
*
eNB
,
int
frame
,
int
subframe
)
void
generate_edci_top
(
PHY_VARS_eNB
*
eNB
,
int
frame
,
int
subframe
)
{
}
void
mpdcch_scrambling
(
LTE_DL_FRAME_PARMS
*
frame_parms
,
mDCI_ALLOC_t
*
mdci
,
uint16_t
i
,
uint8_t
*
e
,
uint32_t
length
)
void
mpdcch_scrambling
(
LTE_DL_FRAME_PARMS
*
frame_parms
,
mDCI_ALLOC_t
*
mdci
,
uint16_t
i
,
uint8_t
*
e
,
uint32_t
length
)
{
int
n
;
uint8_t
reset
;
...
...
@@ -89,7 +87,7 @@ mpdcch_scrambling (LTE_DL_FRAME_PARMS * frame_parms, mDCI_ALLOC_t * mdci, uint16
for
(
n
=
0
;
n
<
length
;
n
++
)
{
if
((
i
&
0x1f
)
==
0
)
{
s
=
lte_gold_generic
(
&
x1
,
&
x2
,
reset
);
s
=
lte_gold_generic
(
&
x1
,
&
x2
,
reset
);
//printf("lte_gold[%d]=%x\n",i,s);
reset
=
0
;
}
...
...
@@ -105,33 +103,30 @@ mpdcch_scrambling (LTE_DL_FRAME_PARMS * frame_parms, mDCI_ALLOC_t * mdci, uint16
static
uint16_t
mpdcch5ss1p107108tab
[
864
];
static
uint16_t
mpdcch5ss1p109110tab
[
864
];
void
init_mpdcch5ss1tab_normal_regular_subframe_evenNRBDL
(
PHY_VARS_eNB
*
eNB
)
{
int
l
,
k
,
kmod
,
re107108
=
0
,
re109110
=
0
;
void
init_mpdcch5ss1tab_normal_regular_subframe_evenNRBDL
(
PHY_VARS_eNB
*
eNB
)
{
int
l
,
k
,
kmod
,
re107108
=
0
,
re109110
=
0
;
LOG_I
(
PHY
,
"Inititalizing mpdcchss15tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL
\n
"
);
LOG_I
(
PHY
,
"Inititalizing mpdcchss15tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL
\n
"
);
for
(
l
=
1
;
l
<
14
;
l
++
)
{
for
(
k
=
0
;
k
<
72
;
k
++
)
{
for
(
l
=
1
;
l
<
14
;
l
++
)
{
for
(
k
=
0
;
k
<
72
;
k
++
)
{
kmod
=
k
%
12
;
if
(((
l
!=
5
)
&&
(
l
!=
6
)
&&
(
l
!=
12
)
&&
(
l
!=
13
))
||
(
kmod
==
2
)
||
(
kmod
==
3
)
||
(
kmod
==
4
)
||
(
kmod
==
7
)
||
(
kmod
==
8
)
||
(
kmod
==
9
))
{
mpdcch5ss1p109110tab
[
re109110
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
mpdcch5ss1p107108tab
[
re107108
]
=
mpdcch5ss1p109110tab
[
re109110
];
if
(((
l
!=
5
)
&&
(
l
!=
6
)
&&
(
l
!=
12
)
&&
(
l
!=
13
))
||
(
kmod
==
2
)
||
(
kmod
==
3
)
||
(
kmod
==
4
)
||
(
kmod
==
7
)
||
(
kmod
==
8
)
||
(
kmod
==
9
))
{
mpdcch5ss1p109110tab
[
re109110
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
mpdcch5ss1p107108tab
[
re107108
]
=
mpdcch5ss1p109110tab
[
re109110
];
re107108
++
;
re109110
++
;
printf
(
"l %d, k %d (kmod %d) => re %d
\n
"
,
l
,
k
,
kmod
,
re107108
);
}
else
if
((
kmod
==
0
)
||
(
kmod
==
5
)
||
(
kmod
==
10
))
{
mpdcch5ss1p109110tab
[
re109110
++
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
}
else
if
((
kmod
==
1
)
||
(
kmod
==
6
)
||
(
kmod
==
11
))
{
mpdcch5ss1p107108tab
[
re107108
++
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
printf
(
"l %d, k %d (kmod %d) => re %d
\n
"
,
l
,
k
,
kmod
,
re107108
);
printf
(
"l %d, k %d (kmod %d) => re %d
\n
"
,
l
,
k
,
kmod
,
re107108
);
}
else
if
((
kmod
==
0
)
||
(
kmod
==
5
)
||
(
kmod
==
10
))
{
mpdcch5ss1p109110tab
[
re109110
++
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
}
else
if
((
kmod
==
1
)
||
(
kmod
==
6
)
||
(
kmod
==
11
))
{
mpdcch5ss1p107108tab
[
re107108
++
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
printf
(
"l %d, k %d (kmod %d) => re %d
\n
"
,
l
,
k
,
kmod
,
re107108
);
}
}
}
AssertFatal
(
re107108
==
864
,
"RE count not equal to 864 (%d)
\n
"
,
re107108
);
AssertFatal
(
re107108
==
864
,
"RE count not equal to 864 (%d)
\n
"
,
re107108
);
}
// this table is the allocation of modulated MPDCCH format 5 symbols to REs, antenna ports 107,108
...
...
@@ -141,32 +136,29 @@ void init_mpdcch5ss1tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB *eNB) {
// Total = 576+216 = 792 REs = 1584 bits
static
uint16_t
mpdcch5ss2p107108tab
[
792
];
static
uint16_t
mpdcch5ss2p109110tab
[
792
];
void
init_mpdcch5ss2tab_normal_regular_subframe_evenNRBDL
(
PHY_VARS_eNB
*
eNB
)
{
int
l
,
k
,
kmod
,
re107108
=
0
,
re109110
=
0
;
void
init_mpdcch5ss2tab_normal_regular_subframe_evenNRBDL
(
PHY_VARS_eNB
*
eNB
)
{
int
l
,
k
,
kmod
,
re107108
=
0
,
re109110
=
0
;
LOG_I
(
PHY
,
"Inititalizing mpdcch5ss2tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL
\n
"
);
for
(
l
=
2
;
l
<
14
;
l
++
)
{
for
(
k
=
0
;
k
<
72
;
k
++
)
{
LOG_I
(
PHY
,
"Inititalizing mpdcch5ss2tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL
\n
"
);
for
(
l
=
2
;
l
<
14
;
l
++
)
{
for
(
k
=
0
;
k
<
72
;
k
++
)
{
kmod
=
k
%
12
;
if
(((
l
!=
5
)
&&
(
l
!=
6
)
&&
(
l
!=
12
)
&&
(
l
!=
13
))
||
(
kmod
==
2
)
||
(
kmod
==
3
)
||
(
kmod
==
4
)
||
(
kmod
==
7
)
||
(
kmod
==
8
)
||
(
kmod
==
9
))
{
mpdcch5ss2p109110tab
[
re109110
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
mpdcch5ss2p107108tab
[
re107108
]
=
mpdcch5ss2p109110tab
[
re109110
];
if
(((
l
!=
5
)
&&
(
l
!=
6
)
&&
(
l
!=
12
)
&&
(
l
!=
13
))
||
(
kmod
==
2
)
||
(
kmod
==
3
)
||
(
kmod
==
4
)
||
(
kmod
==
7
)
||
(
kmod
==
8
)
||
(
kmod
==
9
))
{
mpdcch5ss2p109110tab
[
re109110
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
mpdcch5ss2p107108tab
[
re107108
]
=
mpdcch5ss2p109110tab
[
re109110
];
re107108
++
;
re109110
++
;
printf
(
"l %d, k %d (kmod %d) => re %d
\n
"
,
l
,
k
,
kmod
,
re107108
);
}
else
if
((
kmod
==
0
)
||
(
kmod
==
5
)
||
(
kmod
==
10
))
{
mpdcch5ss2p109110tab
[
re109110
++
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
}
else
if
((
kmod
==
1
)
||
(
kmod
==
6
)
||
(
kmod
==
11
))
{
mpdcch5ss2p107108tab
[
re107108
++
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
printf
(
"l %d, k %d (kmod %d) => re %d
\n
"
,
l
,
k
,
kmod
,
re107108
);
printf
(
"l %d, k %d (kmod %d) => re %d
\n
"
,
l
,
k
,
kmod
,
re107108
);
}
else
if
((
kmod
==
0
)
||
(
kmod
==
5
)
||
(
kmod
==
10
))
{
mpdcch5ss2p109110tab
[
re109110
++
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
}
else
if
((
kmod
==
1
)
||
(
kmod
==
6
)
||
(
kmod
==
11
))
{
mpdcch5ss2p107108tab
[
re107108
++
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
printf
(
"l %d, k %d (kmod %d) => re %d
\n
"
,
l
,
k
,
kmod
,
re107108
);
}
}
}
AssertFatal
(
re107108
==
792
,
"RE count not equal to 792
\n
"
);
AssertFatal
(
re107108
==
792
,
"RE count not equal to 792
\n
"
);
}
// this table is the allocation of modulated MPDCCH format 5 symbols to REs, antenna ports 107,108
...
...
@@ -176,32 +168,29 @@ void init_mpdcch5ss2tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB *eNB) {
// Total = 504+216 = 720 REs = 1440 bits
static
uint16_t
mpdcch5ss3p107108tab
[
720
];
static
uint16_t
mpdcch5ss3p109110tab
[
720
];
void
init_mpdcch5ss3tab_normal_regular_subframe_evenNRBDL
(
PHY_VARS_eNB
*
eNB
)
{
int
l
,
k
,
kmod
,
re107108
=
0
,
re109110
=
0
;
void
init_mpdcch5ss3tab_normal_regular_subframe_evenNRBDL
(
PHY_VARS_eNB
*
eNB
)
{
int
l
,
k
,
kmod
,
re107108
=
0
,
re109110
=
0
;
LOG_I
(
PHY
,
"Inititalizing mpdcch5ss3tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL
\n
"
);
for
(
l
=
3
;
l
<
14
;
l
++
)
{
for
(
k
=
0
;
k
<
72
;
k
++
)
{
LOG_I
(
PHY
,
"Inititalizing mpdcch5ss3tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL
\n
"
);
for
(
l
=
3
;
l
<
14
;
l
++
)
{
for
(
k
=
0
;
k
<
72
;
k
++
)
{
kmod
=
k
%
12
;
if
(((
l
!=
5
)
&&
(
l
!=
6
)
&&
(
l
!=
12
)
&&
(
l
!=
13
))
||
(
kmod
==
2
)
||
(
kmod
==
3
)
||
(
kmod
==
4
)
||
(
kmod
==
7
)
||
(
kmod
==
8
)
||
(
kmod
==
9
))
{
mpdcch5ss3p109110tab
[
re109110
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
mpdcch5ss3p107108tab
[
re107108
]
=
mpdcch5ss3p109110tab
[
re109110
];
if
(((
l
!=
5
)
&&
(
l
!=
6
)
&&
(
l
!=
12
)
&&
(
l
!=
13
))
||
(
kmod
==
2
)
||
(
kmod
==
3
)
||
(
kmod
==
4
)
||
(
kmod
==
7
)
||
(
kmod
==
8
)
||
(
kmod
==
9
))
{
mpdcch5ss3p109110tab
[
re109110
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
mpdcch5ss3p107108tab
[
re107108
]
=
mpdcch5ss3p109110tab
[
re109110
];
re107108
++
;
re109110
++
;
printf
(
"l %d, k %d (kmod %d) => re %d
\n
"
,
l
,
k
,
kmod
,
re107108
);
}
else
if
((
kmod
==
0
)
||
(
kmod
==
5
)
||
(
kmod
==
10
))
{
mpdcch5ss3p109110tab
[
re109110
++
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
}
else
if
((
kmod
==
1
)
||
(
kmod
==
6
)
||
(
kmod
==
11
))
{
mpdcch5ss3p107108tab
[
re107108
++
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
printf
(
"l %d, k %d (kmod %d) => re %d
\n
"
,
l
,
k
,
kmod
,
re107108
);
printf
(
"l %d, k %d (kmod %d) => re %d
\n
"
,
l
,
k
,
kmod
,
re107108
);
}
else
if
((
kmod
==
0
)
||
(
kmod
==
5
)
||
(
kmod
==
10
))
{
mpdcch5ss3p109110tab
[
re109110
++
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
}
else
if
((
kmod
==
1
)
||
(
kmod
==
6
)
||
(
kmod
==
11
))
{
mpdcch5ss3p107108tab
[
re107108
++
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
printf
(
"l %d, k %d (kmod %d) => re %d
\n
"
,
l
,
k
,
kmod
,
re107108
);
}
}
}
AssertFatal
(
re107108
==
720
,
"RE count not equal to 792
\n
"
);
AssertFatal
(
re107108
==
720
,
"RE count not equal to 792
\n
"
);
}
// this table is the allocation of modulated MPDCCH format 3 symbols to REs, antenna ports 107,108
...
...
@@ -212,22 +201,22 @@ void init_mpdcch5ss3tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB *eNB) {
static
uint16_t
mpdcch3ss1p107108tab
[
576
];
static
uint16_t
mpdcch3ss1p109110tab
[
576
];
void
init_mpdcch3ss1tab_normal_regular_subframe_evenNRBDL
(
PHY_VARS_eNB
*
eNB
)
{
int
l
,
k
,
kmod
,
re
;
void
init_mpdcch3ss1tab_normal_regular_subframe_evenNRBDL
(
PHY_VARS_eNB
*
eNB
)
{
int
l
,
k
,
kmod
,
re
;
LOG_I
(
PHY
,
"Inititalizing mpdcch3ss1tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL
\n
"
);
for
(
l
=
1
,
re
=
0
;
l
<
14
;
l
++
)
{
for
(
k
=
0
;
k
<
48
;
k
++
)
{
LOG_I
(
PHY
,
"Inititalizing mpdcch3ss1tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL
\n
"
);
for
(
l
=
1
,
re
=
0
;
l
<
14
;
l
++
)
{
for
(
k
=
0
;
k
<
48
;
k
++
)
{
kmod
=
k
%
12
;
if
(((
l
!=
5
)
&&
(
l
!=
6
)
&&
(
l
!=
12
)
&&
(
l
!=
13
))
||
(((
l
==
5
)
||
(
l
==
6
)
||
(
l
==
12
)
||
(
l
==
13
))
&&
(
kmod
!=
0
)
&&
(
kmod
!=
5
)
&&
(
kmod
!=
10
)))
{
mpdcch3ss1p109110tab
[
re
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
mpdcch3ss1p107108tab
[
re
]
=
1
+
mpdcch3ss1p109110tab
[
re
];
if
(((
l
!=
5
)
&&
(
l
!=
6
)
&&
(
l
!=
12
)
&&
(
l
!=
13
))
||
(((
l
==
5
)
||
(
l
==
6
)
||
(
l
==
12
)
||
(
l
==
13
))
&&
(
kmod
!=
0
)
&&
(
kmod
!=
5
)
&&
(
kmod
!=
10
)))
{
mpdcch3ss1p109110tab
[
re
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
mpdcch3ss1p107108tab
[
re
]
=
1
+
mpdcch3ss1p109110tab
[
re
];
re
++
;
}
}
}
AssertFatal
(
re
==
576
,
"RE count not equal to 864
\n
"
);
AssertFatal
(
re
==
576
,
"RE count not equal to 864
\n
"
);
}
// this table is the allocation of modulated MPDCCH format 2 symbols to REs, antenna ports 107,108
...
...
@@ -237,63 +226,61 @@ void init_mpdcch3ss1tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB *eNB) {
// Total = 216+72 = 288 = 8CCE*36RE/CCE
static
uint16_t
mpdcch2ss1p107108tab
[
288
];
static
uint16_t
mpdcch2ss1p109110tab
[
288
];
void
init_mpdcch2ss1tab_normal_regular_subframe_evenNRBDL
(
PHY_VARS_eNB
*
eNB
)
{
int
l
,
k
,
kmod
,
re
;
void
init_mpdcch2ss1tab_normal_regular_subframe_evenNRBDL
(
PHY_VARS_eNB
*
eNB
)
{
int
l
,
k
,
kmod
,
re
;
LOG_I
(
PHY
,
"Inititalizing mpdcch2ss1tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL
\n
"
);
for
(
l
=
1
,
re
=
0
;
l
<
14
;
l
++
)
{
for
(
k
=
0
;
k
<
24
;
k
++
)
{
LOG_I
(
PHY
,
"Inititalizing mpdcch2ss1tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL
\n
"
);
for
(
l
=
1
,
re
=
0
;
l
<
14
;
l
++
)
{
for
(
k
=
0
;
k
<
24
;
k
++
)
{
kmod
=
k
%
12
;
if
(((
l
!=
5
)
&&
(
l
!=
6
)
&&
(
l
!=
12
)
&&
(
l
!=
13
))
||
(((
l
==
5
)
||
(
l
==
6
)
||
(
l
==
12
)
||
(
l
==
13
))
&&
(
kmod
!=
0
)
&&
(
kmod
!=
5
)
&&
(
kmod
!=
10
)))
{
mpdcch2ss1p109110tab
[
re
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
mpdcch2ss1p107108tab
[
re
]
=
1
+
mpdcch2ss1p109110tab
[
re
];
if
(((
l
!=
5
)
&&
(
l
!=
6
)
&&
(
l
!=
12
)
&&
(
l
!=
13
))
||
(((
l
==
5
)
||
(
l
==
6
)
||
(
l
==
12
)
||
(
l
==
13
))
&&
(
kmod
!=
0
)
&&
(
kmod
!=
5
)
&&
(
kmod
!=
10
)))
{
mpdcch2ss1p109110tab
[
re
]
=
(
l
*
eNB
->
frame_parms
.
ofdm_symbol_size
)
+
k
;
mpdcch2ss1p107108tab
[
re
]
=
1
+
mpdcch2ss1p109110tab
[
re
];
re
++
;
}
}
}
AssertFatal
(
re
==
288
,
"RE count not equal to 288
\n
"
);
AssertFatal
(
re
==
288
,
"RE count not equal to 288
\n
"
);
}
extern
uint8_t
*
generate_dci0
(
uint8_t
*
dci
,
uint8_t
*
e
,
uint8_t
DCI_LENGTH
,
uint8_t
bitsperCCE
,
uint8_t
aggregation_level
,
uint16_t
rnti
);
extern
uint8_t
*
generate_dci0
(
uint8_t
*
dci
,
uint8_t
*
e
,
uint8_t
DCI_LENGTH
,
uint8_t
bitsperCCE
,
uint8_t
aggregation_level
,
uint16_t
rnti
);
uint16_t
mpdcch_dmrs_tab
[
12
*
6
];
uint16_t
mpdcch_dmrs_tab
[
12
*
6
];
void
init_mpdcch_dmrs_tab
(
uint16_t
oss
)
{
void
init_mpdcch_dmrs_tab
(
uint16_t
oss
)
{
int
re
=
5
*
oss
;
int
re
=
5
*
oss
;
int
pos
=
0
;
for
(
int
symb
=
0
;
symb
<
4
;
symb
++
)
{
for
(
int
prb
=
0
;
prb
<
6
;
prb
++
,
re
+=
12
)
{
for
(
int
symb
=
0
;
symb
<
4
;
symb
++
)
{
for
(
int
prb
=
0
;
prb
<
6
;
prb
++
,
re
+=
12
)
{
mpdcch_dmrs_tab
[
pos
++
]
=
re
;
mpdcch_dmrs_tab
[
pos
++
]
=
re
+
5
;
mpdcch_dmrs_tab
[
pos
++
]
=
re
+
10
;
mpdcch_dmrs_tab
[
pos
++
]
=
re
+
5
;
mpdcch_dmrs_tab
[
pos
++
]
=
re
+
10
;
}
if
(
symb
==
0
)
re
=
6
*
oss
;
else
if
(
symb
==
1
)
re
=
12
*
oss
;
else
if
(
symb
==
2
)
re
=
13
*
oss
;
if
(
symb
==
0
)
re
=
6
*
oss
;
else
if
(
symb
==
1
)
re
=
12
*
oss
;
else
if
(
symb
==
2
)
re
=
13
*
oss
;
}
}
void
generate_mdci_top
(
PHY_VARS_eNB
*
eNB
,
int
frame
,
int
subframe
,
int16_t
amp
,
int32_t
**
txdataF
)
void
generate_mdci_top
(
PHY_VARS_eNB
*
eNB
,
int
frame
,
int
subframe
,
int16_t
amp
,
int32_t
**
txdataF
)
{
LTE_eNB_MPDCCH
*
mpdcch
=
&
eNB
->
mpdcch_vars
[
subframe
&
1
];
LTE_eNB_MPDCCH
*
mpdcch
=
&
eNB
->
mpdcch_vars
[
subframe
&
1
];
mDCI_ALLOC_t
*
mdci
;
int
coded_bits
;
LTE_DL_FRAME_PARMS
*
fp
=
&
eNB
->
frame_parms
;
LTE_DL_FRAME_PARMS
*
fp
=
&
eNB
->
frame_parms
;
int
i
;
int
gain_lin_QPSK
;
uint8_t
bitsperCCE
;
...
...
@@ -308,64 +295,52 @@ generate_mdci_top (PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp, int
// Assumption: only handle a single MPDCCH per narrowband
LOG_I
(
PHY
,
"generate_mdci_top: num_dci %d
\n
"
,
mpdcch
->
num_dci
);
LOG_I
(
PHY
,
"generate_mdci_top: num_dci %d
\n
"
,
mpdcch
->
num_dci
);
for
(
i
=
0
;
i
<
mpdcch
->
num_dci
;
i
++
)
{
for
(
i
=
0
;
i
<
mpdcch
->
num_dci
;
i
++
)
{
mdci
=
&
mpdcch
->
mdci_alloc
[
i
];
AssertFatal
(
fp
->
frame_type
==
FDD
,
"TDD is not yet supported for MPDCCH
\n
"
);
AssertFatal
(
fp
->
Ncp
==
NORMAL
,
"Extended Prefix not yet supported for MPDCCH
\n
"
);
AssertFatal
(
mdci
->
L
<=
24
,
"L is %d
\n
"
,
mdci
->
L
);
AssertFatal
(
fp
->
N_RB_DL
==
50
||
fp
->
N_RB_DL
==
100
,
"Only N_RB_DL=50,100 for MPDCCH
\n
"
);
AssertFatal
(
fp
->
frame_type
==
FDD
,
"TDD is not yet supported for MPDCCH
\n
"
);
AssertFatal
(
fp
->
Ncp
==
NORMAL
,
"Extended Prefix not yet supported for MPDCCH
\n
"
);
AssertFatal
(
mdci
->
L
<=
24
,
"L is %d
\n
"
,
mdci
->
L
);
AssertFatal
(
fp
->
N_RB_DL
==
50
||
fp
->
N_RB_DL
==
100
,
"Only N_RB_DL=50,100 for MPDCCH
\n
"
);
// Force MPDDCH format 5
AssertFatal
(
mdci
->
number_of_prb_pairs
==
6
,
"2 or 4 PRB pairs not support yet for MPDCCH
\n
"
);
AssertFatal
(
mdci
->
number_of_prb_pairs
==
6
,
"2 or 4 PRB pairs not support yet for MPDCCH
\n
"
);
// These are to avoid unimplemented things
AssertFatal
(
mdci
->
ce_mode
==
1
,
"CE mode (%d) B not activated yet
\n
"
,
mdci
->
ce_mode
);
AssertFatal
(
mdci
->
L
==
24
,
"Only 2+4 and aggregation 24 for now
\n
"
);
AssertFatal
(
mdci
->
ce_mode
==
1
,
"CE mode (%d) B not activated yet
\n
"
,
mdci
->
ce_mode
);
AssertFatal
(
mdci
->
L
==
24
,
"Only 2+4 and aggregation 24 for now
\n
"
);
LOG_I
(
PHY
,
"mdci %d: rnti %x, L %d, prb_pairs %d, ce_mode %d, i0 %d, ss %d
\n
"
,
i
,
mdci
->
rnti
,
mdci
->
L
,
mdci
->
number_of_prb_pairs
,
mdci
->
ce_mode
,
mdci
->
i0
,
mdci
->
start_symbol
);
LOG_I
(
PHY
,
"mdci %d: rnti %x, L %d, prb_pairs %d, ce_mode %d, i0 %d, ss %d
\n
"
,
i
,
mdci
->
rnti
,
mdci
->
L
,
mdci
->
number_of_prb_pairs
,
mdci
->
ce_mode
,
mdci
->
i0
,
mdci
->
start_symbol
);
i0
=
mdci
->
i0
;
// antenna index
int
a_index
=
mdci
->
rnti
&
3
;
if
((
mdci
->
start_symbol
==
1
)
&&
(
a_index
<
2
))
{
if
((
mdci
->
start_symbol
==
1
)
&&
(
a_index
<
2
))
{
mpdcchtab
=
mpdcch5ss1p107108tab
;
bitsperCCE
=
72
;
}
else
if
((
mdci
->
start_symbol
==
1
)
&&
(
a_index
>
1
))
{
}
else
if
((
mdci
->
start_symbol
==
1
)
&&
(
a_index
>
1
))
{
mpdcchtab
=
mpdcch5ss1p109110tab
;
bitsperCCE
=
72
;
}
else
if
((
mdci
->
start_symbol
==
2
)
&&
(
a_index
<
2
))
{
}
else
if
((
mdci
->
start_symbol
==
2
)
&&
(
a_index
<
2
))
{
mpdcchtab
=
mpdcch5ss2p107108tab
;
bitsperCCE
=
66
;
}
else
if
((
mdci
->
start_symbol
==
2
)
&&
(
a_index
>
1
))
{
}
else
if
((
mdci
->
start_symbol
==
2
)
&&
(
a_index
>
1
))
{
mpdcchtab
=
mpdcch5ss2p109110tab
;
bitsperCCE
=
66
;
}
else
if
((
mdci
->
start_symbol
==
3
)
&&
(
a_index
<
2
))
{
}
else
if
((
mdci
->
start_symbol
==
3
)
&&
(
a_index
<
2
))
{
mpdcchtab
=
mpdcch5ss2p107108tab
;
bitsperCCE
=
60
;
}
else
if
((
mdci
->
start_symbol
==
3
)
&&
(
a_index
<
2
))
{
}
else
if
((
mdci
->
start_symbol
==
3
)
&&
(
a_index
<
2
))
{
mpdcchtab
=
mpdcch5ss2p109110tab
;
bitsperCCE
=
60
;
}
else
AssertFatal
(
1
==
0
,
"Illegal combination start_symbol %d, a_index %d
\n
"
,
mdci
->
start_symbol
,
a_index
);
}
else
AssertFatal
(
1
==
0
,
"Illegal combination start_symbol %d, a_index %d
\n
"
,
mdci
->
start_symbol
,
a_index
);
// Note: We only have to run this every Nacc subframes during repetitions, data and scrambling are constant, but we do it for now to simplify during testing
generate_dci0
(
mdci
->
dci_pdu
,
mpdcch
->
e
+
(
bitsperCCE
*
mdci
->
firstCCE
),
mdci
->
dci_length
,
mdci
->
L
,
bitsperCCE
,
mdci
->
rnti
);
generate_dci0
(
mdci
->
dci_pdu
,
mpdcch
->
e
+
(
bitsperCCE
*
mdci
->
firstCCE
),
mdci
->
dci_length
,
mdci
->
L
,
bitsperCCE
,
mdci
->
rnti
);
coded_bits
=
bitsperCCE
*
mdci
->
L
;
...
...
@@ -373,13 +348,9 @@ generate_mdci_top (PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp, int
// scrambling
uint16_t
absSF
=
(
frame
*
10
)
+
subframe
;
AssertFatal
(
absSF
<
10240
,
"Absolute subframe %d = %d*10 + %d > 10239
\n
"
,
absSF
,
frame
,
subframe
);
AssertFatal
(
absSF
<
10240
,
"Absolute subframe %d = %d*10 + %d > 10239
\n
"
,
absSF
,
frame
,
subframe
);
mpdcch_scrambling
(
fp
,
mdci
,
absSF
,
mpdcch
->
e
+
(
bitsperCCE
*
mdci
->
firstCCE
),
coded_bits
);
mpdcch_scrambling
(
fp
,
mdci
,
absSF
,
mpdcch
->
e
+
(
bitsperCCE
*
mdci
->
firstCCE
),
coded_bits
);
// Modulation for PDCCH
if
(
fp
->
nb_antenna_ports_eNB
==
1
)
...
...
@@ -401,22 +372,22 @@ generate_mdci_top (PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp, int
case
6
:
case
25
:
nb_i0
=
0
;
nb_i0
=
0
;
break
;
case
15
:
case
50
:
case
75
:
nb_i0
=
1
;
nb_i0
=
1
;
break
;
case
100
:
nb_i0
=
2
;
nb_i0
=
2
;
break
;
default:
AssertFatal
(
1
==
0
,
"Illegal N_RB_DL %d
\n
"
,
fp
->
N_RB_DL
);
AssertFatal
(
1
==
0
,
"Illegal N_RB_DL %d
\n
"
,
fp
->
N_RB_DL
);
break
;
}
int
re_offset
=
fp
->
first_carrier_offset
+
(
12
*
nb_i0
)
+
mdci
->
narrowband
*
12
*
6
;
int
re_offset
=
fp
->
first_carrier_offset
+
(
12
*
nb_i0
)
+
mdci
->
narrowband
*
12
*
6
;
if
(
re_offset
>
fp
->
ofdm_symbol_size
)
re_offset
-=
(
fp
->
ofdm_symbol_size
-
1
);
int32_t
*
txF
=
&
txdataF
[
0
][
re_offset
];
...
...
@@ -428,13 +399,15 @@ generate_mdci_top (PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp, int
e_ptr
++
;
((
int16_t
*
)
&
yIQ
)[
1
]
=
(
*
e_ptr
==
1
)
?
-
gain_lin_QPSK
:
gain_lin_QPSK
;
e_ptr
++
;
txF
[
mpdcchtab
[
i
+
((
bitsperCCE
>>
1
)
*
mdci
->
firstCCE
)]]
=
yIQ
;
txF
[
mpdcchtab
[
i
+
((
bitsperCCE
>>
1
)
*
mdci
->
firstCCE
)]]
=
yIQ
;
//LOG_I(PHY,"Frame %d, subframe %d: mpdcch pos %d: %d => (%d,%d)\n",
// frame,subframe,i,mpdcchtab[i + ((bitsperCCE>>2) * mdci->firstCCE)],((int16_t *) & yIQ)[0],((int16_t *) & yIQ)[1]);
}
if
(
a_index
>
1
)
off
=
0
;
else
off
=
1
;
if
(
a_index
>
1
)
off
=
0
;
else
off
=
1
;
// pilot scrambling initiatlization (note: this is for a single repetition)
...
...
@@ -457,29 +430,30 @@ generate_mdci_top (PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp, int
uint32_t
a
=
((((
j0
+
j
)
*
Nacc
)
%
10
)
+
1
);
uint32_t
b
=
((
mdci
->
dmrs_scrambling_init
<<
1
)
+
1
)
<<
16
;
x2
=
a
*
b
;
LOG_I
(
PHY
,
"mpdcch_dmrs cinit %d
\n
"
,
x2
);
uint32_t
a
=
((((
j0
+
j
)
*
Nacc
)
%
10
)
+
1
);
uint32_t
b
=
((
mdci
->
dmrs_scrambling_init
<<
1
)
+
1
)
<<
16
;
x2
=
a
*
b
;
LOG_I
(
PHY
,
"mpdcch_dmrs cinit %d
\n
"
,
x2
);
// add MPDCCH pilots
int
reset
=
1
;
for
(
i
=
0
;
i
<
(
24
*
6
)
;
i
+=
2
)
{
for
(
i
=
0
;
i
<
(
24
*
6
);
i
+=
2
)
{
if
((
i
&
0x1f
)
==
0
)
{
s
=
lte_gold_generic
(
&
x1
,
&
x2
,
reset
);
s
=
lte_gold_generic
(
&
x1
,
&
x2
,
reset
);
reset
=
0
;
}
((
int16_t
*
)
&
yIQ
)[
0
]
=
(((
s
>>
(
i
&
0x1f
))
&
1
)
==
1
)
?
-
gain_lin_QPSK
:
gain_lin_QPSK
;
((
int16_t
*
)
&
yIQ
)[
1
]
=
(((
s
>>
((
i
+
1
)
&
0x1f
))
&
1
)
==
1
)
?
-
gain_lin_QPSK
:
gain_lin_QPSK
;
txF
[
off
+
mpdcch_dmrs_tab
[(
i
>>
1
)]]
=
yIQ
;
LOG_I
(
PHY
,
"mpdcch_dmrs pos %d: %d => (%d,%d)
\n
"
,
i
,
off
+
mpdcch_dmrs_tab
[(
i
>>
1
)],((
int16_t
*
)
&
yIQ
)[
0
],
((
int16_t
*
)
&
yIQ
)[
1
]);
((
int16_t
*
)
&
yIQ
)[
0
]
=
(((
s
>>
(
i
&
0x1f
))
&
1
)
==
1
)
?
-
gain_lin_QPSK
:
gain_lin_QPSK
;
((
int16_t
*
)
&
yIQ
)[
1
]
=
(((
s
>>
((
i
+
1
)
&
0x1f
))
&
1
)
==
1
)
?
-
gain_lin_QPSK
:
gain_lin_QPSK
;
txF
[
off
+
mpdcch_dmrs_tab
[(
i
>>
1
)]]
=
yIQ
;
LOG_D
(
PHY
,
"mpdcch_dmrs pos %d: %d => (%d,%d)
\n
"
,
i
,
off
+
mpdcch_dmrs_tab
[(
i
>>
1
)],
((
int16_t
*
)
&
yIQ
)[
0
],
((
int16_t
*
)
&
yIQ
)[
1
]);
}
}
}
void
init_mpdcch
(
PHY_VARS_eNB
*
eNB
)
{
void
init_mpdcch
(
PHY_VARS_eNB
*
eNB
)
{
init_mpdcch5ss1tab_normal_regular_subframe_evenNRBDL
(
eNB
);
init_mpdcch5ss2tab_normal_regular_subframe_evenNRBDL
(
eNB
);
...
...
This diff is collapsed.
Click to expand it.
openair1/SCHED/fapi_l1.c
View file @
2d97eb4b
...
...
@@ -214,7 +214,10 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
dlsch0
->
i0
=
0xFFFF
;
#endif
dlsch0
->
active
=
1
;
harq_pid
=
dlsch0
->
harq_ids
[
proc
->
subframe_tx
];
dlsch0
->
harq_mask
|=
(
1
<<
harq_pid
);
AssertFatal
((
harq_pid
>=
0
)
&&
(
harq_pid
<
8
),
"harq_pid %d not in 0...7
\n
"
,
harq_pid
);
dlsch0_harq
=
dlsch0
->
harq_processes
[
harq_pid
];
dlsch1_harq
=
dlsch1
->
harq_processes
[
harq_pid
];
...
...
@@ -232,8 +235,11 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
computeRhoB_eNB
(
&
eNB
->
pdsch_config_dedicated
[
UE_id
],
&
(
eNB
->
frame_parms
.
pdsch_config_common
),
eNB
->
frame_parms
.
nb_antenna_ports_eNB
,
dlsch1
,
dlsch1_harq
->
dl_power_off
);
}
#ifndef Rel14
dlsch0_harq
->
pdsch_start
=
eNB
->
pdcch_vars
[
proc
->
subframe_tx
&
1
].
num_pdcch_symbols
;
#else
dlsch0_harq
->
pdsch_start
=
rel10
->
pdsch_start
;
#endif
if
(
dlsch0_harq
->
round
==
0
)
{
//get pointer to SDU if this a new SDU
AssertFatal
(
sdu
!=
NULL
,
"NFAPI: frame %d, subframe %d: programming dlsch for round 0, rnti %x, UE_id %d, harq_pid %d : sdu is null for pdu_index %d
\n
"
,
proc
->
frame_tx
,
proc
->
subframe_tx
,
rel8
->
rnti
,
UE_id
,
harq_pid
,
...
...
@@ -618,7 +624,7 @@ void schedule_response(Sched_Rsp_t *Sched_INFO)
eNB
->
mpdcch_vars
[
subframe
&
1
].
num_dci
=
0
;
#endif
LOG_
I
(
PHY
,
"NFAPI: Frame %d, Subframe %d (ul_subframe %d): received %d dl_pdu, %d tx_req, %d hi_dci0_config_req, %d UL_config
\n
"
,
LOG_
D
(
PHY
,
"NFAPI: Frame %d, Subframe %d (ul_subframe %d): received %d dl_pdu, %d tx_req, %d hi_dci0_config_req, %d UL_config
\n
"
,
frame
,
subframe
,
ul_subframe
,
number_dl_pdu
,
TX_req
->
tx_request_body
.
number_of_pdus
,
number_hi_dci0_pdu
,
number_ul_pdu
);
...
...
@@ -638,7 +644,7 @@ void schedule_response(Sched_Rsp_t *Sched_INFO)
}
for
(
i
=
0
;
i
<
number_dl_pdu
;
i
++
)
{
dl_config_pdu
=
&
DL_req
->
dl_config_request_body
.
dl_config_pdu_list
[
i
];
LOG_
I
(
PHY
,
"NFAPI: dl_pdu %d : type %d
\n
"
,
i
,
dl_config_pdu
->
pdu_type
);
LOG_
D
(
PHY
,
"NFAPI: dl_pdu %d : type %d
\n
"
,
i
,
dl_config_pdu
->
pdu_type
);
switch
(
dl_config_pdu
->
pdu_type
)
{
case
NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE
:
handle_nfapi_dci_dl_pdu
(
eNB
,
proc
,
dl_config_pdu
);
...
...
This diff is collapsed.
Click to expand it.
openair1/SCHED/phy_procedures_lte_eNb.c
View file @
2d97eb4b
...
...
@@ -407,26 +407,29 @@ phy_procedures_eNB_TX (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, relaying_type
for
(
UE_id
=
0
;
UE_id
<
NUMBER_OF_UE_MAX
;
UE_id
++
)
{
dlsch0
=
eNB
->
dlsch
[(
uint8_t
)
UE_id
][
0
];
dlsch1
=
eNB
->
dlsch
[(
uint8_t
)
UE_id
][
1
];
//if (dlsch0 && (dlsch0->rnti > 0) && (dlsch0->rnti!=0xFFFF))
if
((
dlsch0
)
&&
(
dlsch0
->
rnti
>
0
)
&&
(
dlsch0
->
active
==
1
))
{
// get harq_pid
harq_pid
=
dlsch0
->
harq_ids
[
subframe
];
AssertFatal
(
harq_pid
>=
0
,
"harq_pid is negative
\n
"
);
if
(
harq_pid
>=
0
&&
harq_pid
<
8
)
{
// generate pdsch
LOG_I
(
PHY
,
"SFN %d.%d: DLSCH for rnti %x is active, harq_pid %d => SFN %d.%d
\n
"
,
if
((
dlsch0
->
rnti
!=
0xFFFF
))
{
LOG_I
(
PHY
,
"SFN %d.%d: DLSCH %d for rnti %x is active, harq_pid %d => SFN %d.%d
\n
"
,
frame
,
subframe
,
UE_id
,
dlsch0
->
rnti
,
harq_pid
,
dlsch0
->
harq_processes
[
harq_pid
]
->
frame
,
dlsch0
->
harq_processes
[
harq_pid
]
->
subframe
);
}
if
((
dlsch0
->
harq_processes
[
harq_pid
]
->
status
==
ACTIVE
)
&&
(
dlsch0
->
harq_processes
[
harq_pid
]
->
frame
==
frame
)
&&
(
dlsch0
->
harq_processes
[
harq_pid
]
->
subframe
==
subframe
))
pdsch_procedures
(
eNB
,
proc
,
harq_pid
,
dlsch0
,
dlsch1
,
&
eNB
->
UE_stats
[(
uint32_t
)
UE_id
],
0
);
}
}
else
if
((
dlsch0
)
&&
(
dlsch0
->
rnti
>
0
)
&&
(
dlsch0
->
active
==
0
))
{
...
...
@@ -1078,7 +1081,7 @@ pusch_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc)
ulsch
->
cyclicShift
=
(
ulsch_harq
->
n_DMRS2
+
fp
->
pusch_config_common
.
ul_ReferenceSignalsPUSCH
.
cyclicShift
+
nPRS
)
%
12
;
LOG_
D
(
PHY
,
LOG_
I
(
PHY
,
"[eNB %d][PUSCH %d] Frame %d Subframe %d Demodulating PUSCH: dci_alloc %d, rar_alloc %d, round %d, first_rb %d, nb_rb %d, Qm %d, TBS %d, rv %d, cyclic_shift %d (n_DMRS2 %d, cyclicShift_common %d, nprs %d), O_ACK %d, beta_cqi %d
\n
"
,
eNB
->
Mod_id
,
harq_pid
,
frame
,
subframe
,
ulsch_harq
->
dci_alloc
,
...
...
@@ -1103,7 +1106,7 @@ pusch_procedures (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc)
stop_meas
(
&
eNB
->
ulsch_decoding_stats
);
LOG_
D
(
PHY
,
"[eNB %d][PUSCH %d] frame %d subframe %d RNTI %x RX power (%d,%d) N0 (%d,%d) dB ACK (%d,%d), decoding iter %d
\n
"
,
eNB
->
Mod_id
,
harq_pid
,
frame
,
subframe
,
ulsch
->
rnti
,
dB_fixed
(
eNB
->
pusch_vars
[
i
]
->
ulsch_power
[
0
]),
dB_fixed
(
eNB
->
pusch_vars
[
i
]
->
ulsch_power
[
1
]),
20
,
//eNB->measurements.n0_power_dB[0],
LOG_
I
(
PHY
,
"[eNB %d][PUSCH %d] frame %d subframe %d RNTI %x RX power (%d,%d) N0 (%d,%d) dB ACK (%d,%d), decoding iter %d
\n
"
,
eNB
->
Mod_id
,
harq_pid
,
frame
,
subframe
,
ulsch
->
rnti
,
dB_fixed
(
eNB
->
pusch_vars
[
i
]
->
ulsch_power
[
0
]),
dB_fixed
(
eNB
->
pusch_vars
[
i
]
->
ulsch_power
[
1
]),
20
,
//eNB->measurements.n0_power_dB[0],
20
,
//eNB->measurements.n0_power_dB[1],
ulsch_harq
->
o_ACK
[
0
],
ulsch_harq
->
o_ACK
[
1
],
ret
);
...
...
This diff is collapsed.
Click to expand it.
openair2/LAYER2/MAC/eNB_scheduler_RA.c
View file @
2d97eb4b
...
...
@@ -85,9 +85,9 @@ add_msg3 (module_id_t module_idP, int CC_id, RA_TEMPLATE * RA_template, frame_t
#ifdef Rel14
if
(
RA_template
->
rach_resource_type
>
0
)
{
LOG_
D
(
MAC
,
"[eNB %d][RAPROC] Frame %d, Subframe %d : CC_id %d CE level %d is active, Msg3 in (%d,%d)
\n
"
,
LOG_
I
(
MAC
,
"[eNB %d][RAPROC] Frame %d, Subframe %d : CC_id %d CE level %d is active, Msg3 in (%d,%d)
\n
"
,
module_idP
,
frameP
,
subframeP
,
CC_id
,
RA_template
->
rach_resource_type
-
1
,
RA_template
->
Msg3_frame
,
RA_template
->
Msg3_subframe
);
LOG_
D
(
MAC
,
"Frame %d, Subframe %d Adding Msg3 UL Config Request for (%d,%d) : (%d,%d)
\n
"
,
LOG_
I
(
MAC
,
"Frame %d, Subframe %d Adding Msg3 UL Config Request for (%d,%d) : (%d,%d)
\n
"
,
frameP
,
subframeP
,
RA_template
->
Msg3_frame
,
RA_template
->
Msg3_subframe
,
RA_template
->
msg3_nb_rb
,
RA_template
->
msg3_round
);
ul_config_pdu
=
&
ul_req_body
->
ul_config_pdu_list
[
ul_req_body
->
number_of_pdus
];
...
...
@@ -371,10 +371,10 @@ generate_Msg2 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
dl_config_pdu
->
dlsch_pdu
.
dlsch_pdu_rel13
.
drms_table_flag
=
0
;
dl_req
->
number_pdu
++
;
// Program UL processing for Msg3, same as regular LTE
fill_rar_br
(
eNB
,
CC_idP
,
RA_template
,
frameP
,
subframeP
,
cc
[
CC_idP
].
RAR_pdu
.
payload
,
RA_template
->
rach_resource_type
-
1
)
;
// Program UL processing for Msg3, same as regular LTE
get_Msg3alloc
(
&
cc
[
CC_idP
],
subframeP
,
frameP
,
&
RA_template
->
Msg3_frame
,
&
RA_template
->
Msg3_subframe
);
add_msg3
(
module_idP
,
CC_idP
,
RA_template
,
frameP
,
subframeP
);
fill_rar_br
(
eNB
,
CC_idP
,
RA_template
,
frameP
,
subframeP
,
cc
[
CC_idP
].
RAR_pdu
.
payload
,
RA_template
->
rach_resource_type
-
1
);
// DL request
LOG_I
(
MAC
,
"[eNB %d][RAPROC] Frame %d, Subframe %d : In generate_Msg2, Programming TX Req %d
\n
"
,
module_idP
,
frameP
,
subframeP
);
eNB
->
TX_req
[
CC_idP
].
sfn_sf
=
(
frameP
<<
4
)
+
subframeP
;
...
...
This diff is collapsed.
Click to expand it.
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment