Commit 54f7019e authored by Florian Kaltenberger's avatar Florian Kaltenberger

Merge branch 'develop' into 'dongzhanyi-zte-develop'

# Conflicts:
#   openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
parents e5d317a4 7f28f8d1
dev 1 128-ues 256_QAM_demod 512-dataplane-bug-in-l2nfapi_nos1 FR2_NSA Fix_SA_SIB1 NR-PHY-MAC-IF-multi-UE NRPRACH_highSpeed_saankhya NRUE_usedlschparallel NR_10MHz NR_2port_CSIRS NR_CSIRS_tomerge NR_CSI_reporting NR_DLUL_PF NR_DLUL_PF_4UL NR_DLUL_PF_rebased NR_DL_MIMO NR_DL_sched_fixes NR_DL_scheduler NR_F1C_F1U_extensions NR_FAPI_beamindex_SSB_RO NR_FAPI_beamindex_SSB_RO_SEMPROJ NR_FDD_FIX NR_FR2_RA NR_FR2_RRC_SSB NR_FR2_initsync_fixes NR_MAC_Multi_Rach_GlobalEdge NR_MAC_Multi_Rach_GlobalEdge-old NR_MAC_SSB NR_MAC_SSB_RO_GlobalEdge NR_MAC_SSB_RO_UE_IDCC NR_MAC_SSB_RO_merge NR_MAC_TCI_UCI_GlobalEdge NR_MCS_BLER NR_NGAP NR_PUCCH_MultiUE NR_RA_cleanup NR_RA_updates NR_RRCConfiguration_FR2 NR_SA_F1AP_5GRECORDS NR_SA_F1AP_5GRECORDS-USIM NR_SA_F1AP_5GRECORDS-wf-0623 NR_SA_F1AP_5GRECORDS_lts NR_SA_F1AP_RFSIMULATOR NR_SA_F1AP_RFSIMULATOR2 NR_SA_F1AP_RFSIMULATOR2_SRB NR_SA_F1AP_RFSIMULATOR3 NR_SA_F1AP_RFSIMULATOR3_tmp NR_SA_F1AP_RFSIMULATOR3_wf NR_SA_F1AP_RFSIMULATOR_w5GCN NR_SA_F1AP_dev NR_SA_NGAP_RRC NR_SA_NGAP_RRC_wk42 NR_SA_itti_sim_wk48 NR_SA_itti_sim_wk48_hs NR_SA_itti_sim_wk48_hs1 NR_SA_w5GCN_new_gtpu NR_SCHED_HARQ NR_SCHED_PDCCH_PUCCH_HARQ NR_SCHED_PDCCH_PUCCH_HARQ_rebased NR_SCHED_fixes NR_SRB_Config NR_UE_CONFIG_REQ_FIXES NR_UE_MAC_scheduler NR_UE_PUCCH_bugfixes NR_UE_RA_fixes NR_UE_SA NR_UE_UL_DCI_improvements NR_UE_dlsch_bugfix NR_UE_enable_parallelization NR_UE_rework_test NR_UE_reworking_UCI_procedures NR_UE_stability_fixes NR_UL_SCFDMA_100MHz NR_UL_scheduler NR_UL_scheduler_rebased NR_Wireshark NR_beam_simulation NR_cleanup_PUCCH_resources NR_gNB_initial_MIB_fix NR_mac_uci_functions_rework NR_multiplexing_HARQ_CSI_PUCCH NR_phytest_bugfixes NR_reworking_UL_antennaports NR_scheduling_CSIRS NR_scheduling_request NR_scheduling_request2 NR_scheduling_request3 PBCHNRTCFIX PUSCH_TA_update RA_CI_test RFquality Saankhya_NRPRACH_HighSpeed Test_SA_5GREC UE_DL_DCI_hotfix add-dmrs-test add-ru-docker-image avxllr bandwidth-testing bch-fixes-bitmap benetel_5g_prach_fix benetel_config_file_fix benetel_dpdk20 benetel_driver_uldl_pf_merge benetel_driver_update benetel_fixes benetel_phase_rotation benetel_phase_rotation_old bsr-fix bugfix-free-ra-process bugfix-nr-bands bugfix-nr-ldpc-post-processing bugfix-nr-ldpc-size-typo bugfix-nr-pdcp-sn-size bugfix-nr-rate-matching-assertion bugfix-nr-t-reordering bugfix-x2-SgNBAdditionRequest bugfix_gnb_rt_stats_html bupt-sa-merge cce_indexing_fix cce_indexing_fix2 ci-deploy-asterix ci-deploy-docker-compose ci-fix-module-ul-iperf ci-new-docker-pipeline ci-reduce-nb-vms ci-test ci-ul-iperf-from-trf-container ci_benetel_longrun_limits ci_benetel_test ci_fix_iperf_for_module ci_hotfix_module_ue_ip_address ci_improve_module_ctl ci_nsa_benetel ci_nsa_fixes ci_nsa_pipes_improve ci_nsa_test_integration_2021_wk19 ci_nsa_traces ci_nsa_uplink ci_phytest ci_quectel_support ci_sa_rfsim_test ci_solve_ul_for_module ci_test_5GREC ci_test_nsa_fix_quectel_nic ci_test_nsa_on_develop ci_test_ra_fr2 ci_testinfra_as_code ci_vm_resource_fix cleanup_softmodem_main constant_power debug-UL-5GRECORDS debug_UL_signal detached-w16-test develop develop-CBRA-v3 develop-CCE develop-NR_SA_F1AP_5GRECORDS develop-NR_SA_F1AP_5GRECORDS-abs develop-NR_SA_F1AP_5GRECORDS-hs develop-NR_SA_F1AP_5GRECORDS-hs1 develop-NR_SA_F1AP_5GRECORDS-lts develop-NR_SA_F1AP_5GRECORDS-lts-wf develop-NR_SA_F1AP_5GRECORDS-v3 develop-NR_SA_F1AP_5GRECORDS_100M develop-NR_SA_F1AP_5GRECORDS_LDPC_FPGA develop-NR_SA_F1AP_5GRECORDS_lfq_0607 develop-SA-CBRA develop-SA-CBRA-CUDU develop-SA-CBRA-Msg5 develop-SA-CBRA-lts develop-SA-CBRA-ulsch-lts develop-SA-RA develop-SnT develop-aw2sori develop-oriecpriupdates develop-sib1 develop-sib1-local develop-sib1-lts develop-sib1-update develop-sib1-update-test1 develop-sib1-update-ue develop-wf-du develop_stable dfts_alternatives disable_CSI_measrep dlsch_parallel docker-improvements-2021-april docker-no-cache-option dongzhanyi-zte-develop1 dongzhanyi-zte-develop2 enhance-rfsim episys-merge episys/nsa_baseline episys/nsa_development feature/make-s1-mme-port-configurable feature/make-s1-mme-port-configurable-with-astyle-fixes fedora-gen-kernel-fix fft_bench_hotfix finalize-oaicn-integration fix-check fix-ci-tun fix-compile fix-itti-segv fix-nr-pdcp-timer fix-nr-rlc-range-nack fix-physim-deploy fix-quectel fix-realtime fix-retransmission-rbg fix-x2-without-gnb fix_NR_DLUL_PF fix_NR_DLUL_PF_benchmark fix_coreset_dmrs_idx fix_do_ra_data fix_nr_ulsim fix_pdsch_low_prb fix_rb_corruption fix_reestablishment fix_rrc_x2_ticking fixes-CE-RLC-PDU-size fixes-mac-sched-nfapi fixes-mac-sched-tun fixes-tun fixgtpu flexran-apps flexran-repair-mme-mgmt flexran-rtc-repo-is-public fujitsu_lte_contribution fujitsu_lte_contribution-128 git-dashboard gnb-freerun-txru gnb-n300-fixes gnb-only-test gnb-realtime-hotfix gnb-realtime-quickfix gnb-threadpool hack-bch-no-sched-sf-0 hack-exit-gnb-when-no-enb-nsa harq-hotfix hotfix-minor-remove-nr-rlc-cppcheck-error hotfix-nr-rlc-tick integ-w13-test-rt-issue integration_2020_wk15 integration_2020_wk40 integration_2020_wk41 integration_2020_wk42_2 integration_2020_wk45 integration_2020_wk45_2 integration_2020_wk46 integration_2020_wk46_2 integration_2020_wk47 integration_2020_wk48 integration_2020_wk48_2 integration_2020_wk49 integration_2020_wk50 integration_2020_wk50_1 integration_2020_wk51 integration_2020_wk51_2 integration_2021_wk02 integration_2021_wk02_wMR988 integration_2021_wk04 integration_2021_wk05 integration_2021_wk06 integration_2021_wk06_MR978 integration_2021_wk06_b integration_2021_wk06_c integration_2021_wk08 integration_2021_wk08_2 integration_2021_wk08_MR963 integration_2021_wk09 integration_2021_wk09_b integration_2021_wk10 integration_2021_wk10_b integration_2021_wk11 integration_2021_wk12 integration_2021_wk12_b integration_2021_wk13_a integration_2021_wk13_b integration_2021_wk13_b_fix_tdas integration_2021_wk13_b_fixed integration_2021_wk13_c integration_2021_wk14_a integration_2021_wk15_a integration_2021_wk16 integration_2021_wk17_a integration_2021_wk17_b integration_2021_wk18_a integration_2021_wk18_b integration_2021_wk19 integration_2021_wk20_a integration_2021_wk22 integration_2021_wk23 integration_2021_wk27 integration_w5GC_CBRA_test inter-RRU-final itti-enhancement ldpc-decoder-codegen ldpc-decoder-codegen2 ldpc_offload_t1 ldpc_short_codeword_fixes load_gnb lte-ulsch-bugfix lte_uplink_improvement mac-fixes-wk45_2 migrate-cpp-check-container migrate-vm-pipeline-to-bionic minor-fix-doc-basic-sim mosaic5g-oai-ran mosaic5g-oai-sim msg4_phy_0303_lfq multiple_ssb_sib1_bugfix nasmesh_kernel_5.8 new-gtpu nfapi_nr_arch_mod nfapi_nr_develop nfapi_nr_develop_new ngap-dlul ngap-support ngap-w48-merge2 ngap-wf ngap-wf-1120 ngap-wf-1120-srb ngap-wf-1120-srb-gtp ngap-wf-1120-srb-gtp-hs ngap-wf-1120-srb-gtp-hs1 ngap-wf-1120-srb-gtp-hs2 ngap-wf-1120-srb-gtp-yhz ngap-wf-1203-yunsdr ngap-wf-liuyu ngap_lfq_1120 ngap_merge noCore nr-bsr-fix nr-dl-mimo-2layer nr-dmrs-fixes nr-mac-pdu-wireshark nr-mac-remove-ue-list nr-pdcp-benchmarking nr-pdcp-improvements nr-pdcp-nea2-security nr-pdcp-nia2-integrity nr-pdcp-small-bugfixes nr-pdcp-srb-integrity nr-ra-fix nr-rlc-am-bugfix-w44 nr-rlc-bugfix-w44 nr-stats-print nrPBCHTCFix nrPbchTcFix nrUE nrUE-hs nrUE-upper-layer nr_bsr nr_dl_dmrs_type2 nr_dl_pf nr_dl_pf2 nr_dl_ul_ptrs nr_fdd_if_fix nr_improve_chanest nr_power_measurement_fixes nr_prach_fr2 nr_ue_msg3 nr_ue_pdcp_fix nr_ue_tti_cleanup nr_ul_pf nr_ul_scfdma nsa-ue nsa_remove_band_hardcodings oai-sim oairu oairu-dockerfile-support oc-docker-october-improvements openxg/develop phy-asan-fixes physim-build-deploy physim-deploy-handle-error-cases prb_based_dl_channel_estimation ptrs_rrc_config pusch-mthread-scaling-fix pusch-retrans-fix-ue ra-dl-ul recursive-cmake remove_nos1_hack_pdcp remove_x2_gnb_hardcoding repair-TA revert_memcpy rh-ci-add-ue-parallelization rh_ci_add_runtime_stats rh_ci_add_uldlharq_stats rh_ci_fix_autoterminate rh_ci_fr1_update rh_ci_gsheet_rt_monitoring rh_ci_nsa2jenkins rh_ci_nsa_test_n310 rh_ci_oc rh_ci_phy_test_improve rh_ci_py rh_ci_ra_fr2 rh_ci_rfsim_ra rh_ci_test_benetel rh_ci_test_nsa rh_ci_test_nsa_wk16 rh_ci_test_nsa_wk17_b rh_ci_test_nsa_wk17b rh_ci_test_rfsim_sa rh_ci_ue_parallel rh_fr1_newjenkins rh_fr1_update rh_gnb_compile_fix rh_wk50_debug rlc-v2-bugfix-status-reporting rlc-v2-tick rohan_ulsim2RxFix rrc-enb-phy-testmode s1-subnormal_rewrite s1_subnormal s1_subnormal-robert s1ap-bugfix-rab_setup sa-demo sa-demo-hs sa-merge-rrc-srb sa-msg4 sa-msg4-rrc sa-msg4-rrc-yihz sa-msg4-rrc-yihz-hs sa_rrc_yihz sanitize-address sanitize-v1 sanitize-v1-tmp sarma_pvnp_oai scs_60_iisc sim-channels small-bugfixes-w40 small-config-change small_nr_bugfixes t-gnb-tracer test-5GREC test-nsa-benetel test-panos test_nsa_gtpu_fix test_rt-fix_phy-test testing_with_external_txdata ue-dci-false-detection ue-fixes ue-pdsch-pusch-parallel ue-race-fix ue_beam_selection ul-freq-iq-samps-to-file ul_dl_dci_same_slot ulsch_decode_mthread ulsim_changes usrp_stop_cleanly usrp_x400 wf-sa-rrc wf_testc wireshark-T-hack-ueid wireshark-log-scheduling-requests wk11-with-phytest x2-endc-processing x2_handle_sctp_shutdown xiangwab xiangwan xw2 yihongzheng_srb zzs 2021.wk14_a 2021.wk13_d 2021.wk13_c 2021.w27 2021.w26 2021.w25 2021.w24 2021.w23 2021.w22 2021.w20 2021.w19 2021.w18_b 2021.w18_a 2021.w17_b 2021.w16 2021.w15 2021.w14 2021.w13_a 2021.w12 2021.w11 2021.w10 2021.w09 2021.w08 2021.w06 2021.w05 2021.w04 2021.w02 2020.w51_2 2020.w51 2020.w50 2020.w49 2020.w48_2 2020.w48 2020.w47 2020.w46_2 2020.w46 2020.w45_2 2020.w45 2020.w44 2020.w42_2 2020.w42 2020.w41 2020.w39 2020.w38 2020.w37 2020.w36 2020.w34 benetel_phase_rotation benetel_gnb_rel_2.0 benetel_gnb_rel_1.0 benetel_enb_rel_2.0 benetel_enb_rel_1.0
No related merge requests found
...@@ -1256,7 +1256,7 @@ set(SCHED_SRC_NR_UE ...@@ -1256,7 +1256,7 @@ set(SCHED_SRC_NR_UE
${OPENAIR1_DIR}/SCHED_NR_UE/phy_procedures_nr_ue.c ${OPENAIR1_DIR}/SCHED_NR_UE/phy_procedures_nr_ue.c
${OPENAIR1_DIR}/SCHED_NR/phy_procedures_nr_common.c ${OPENAIR1_DIR}/SCHED_NR/phy_procedures_nr_common.c
${OPENAIR1_DIR}/SCHED_NR_UE/fapi_nr_ue_l1.c ${OPENAIR1_DIR}/SCHED_NR_UE/fapi_nr_ue_l1.c
${OPENAIR1_DIR}/SCHED_NR/phy_frame_config_nr.c ${OPENAIR1_DIR}/SCHED_NR_UE/phy_frame_config_nr_ue.c
${OPENAIR1_DIR}/SCHED_NR_UE/harq_nr.c ${OPENAIR1_DIR}/SCHED_NR_UE/harq_nr.c
${OPENAIR1_DIR}/SCHED_NR_UE/pucch_uci_ue_nr.c ${OPENAIR1_DIR}/SCHED_NR_UE/pucch_uci_ue_nr.c
${OPENAIR1_DIR}/SCHED_NR_UE/pucch_power_control_ue_nr.c ${OPENAIR1_DIR}/SCHED_NR_UE/pucch_power_control_ue_nr.c
......
...@@ -1123,9 +1123,6 @@ int restart_L1L2(module_id_t enb_id) { ...@@ -1123,9 +1123,6 @@ int restart_L1L2(module_id_t enb_id) {
sync_var = -1; sync_var = -1;
pthread_mutex_unlock(&sync_mutex); pthread_mutex_unlock(&sync_mutex);
RC.ru_mask |= (1 << ru->idx); RC.ru_mask |= (1 << ru->idx);
/* copy the changed frame parameters to the RU */
/* TODO this should be done for all RUs associated to this eNB */
memcpy(&ru->frame_parms, &RC.eNB[enb_id][0]->frame_parms, sizeof(LTE_DL_FRAME_PARMS));
/* reset the list of connected UEs in the MAC, since in this process with /* reset the list of connected UEs in the MAC, since in this process with
* loose all UEs (have to reconnect) */ * loose all UEs (have to reconnect) */
init_UE_info(&RC.mac[enb_id]->UE_info); init_UE_info(&RC.mac[enb_id]->UE_info);
...@@ -1348,7 +1345,7 @@ int main ( int argc, char **argv ) { ...@@ -1348,7 +1345,7 @@ int main ( int argc, char **argv ) {
// end of CI modifications // end of CI modifications
//getchar(); //getchar();
if(IS_SOFTMODEM_DOFORMS) if(IS_SOFTMODEM_DOFORMS)
load_softscope("enb"); load_softscope("enb", NULL);
itti_wait_tasks_end(); itti_wait_tasks_end();
oai_exit=1; oai_exit=1;
......
...@@ -726,9 +726,6 @@ int restart_L1L2(module_id_t gnb_id) { ...@@ -726,9 +726,6 @@ int restart_L1L2(module_id_t gnb_id) {
RC.ru_mask |= (1 << ru->idx); RC.ru_mask |= (1 << ru->idx);
/* copy the changed frame parameters to the RU */
/* TODO this should be done for all RUs associated to this gNB */
memcpy(&ru->nr_frame_parms, &RC.gNB[gnb_id]->frame_parms, sizeof(NR_DL_FRAME_PARMS));
set_function_spec_param(RC.ru[gnb_id]); set_function_spec_param(RC.ru[gnb_id]);
LOG_I(GNB_APP, "attempting to create ITTI tasks\n"); LOG_I(GNB_APP, "attempting to create ITTI tasks\n");
// No more rrc thread, as many race conditions are hidden behind // No more rrc thread, as many race conditions are hidden behind
......
...@@ -35,9 +35,7 @@ ...@@ -35,9 +35,7 @@
#include "NR_MAC_UE/mac_proto.h" #include "NR_MAC_UE/mac_proto.h"
#include "RRC/NR_UE/rrc_proto.h" #include "RRC/NR_UE/rrc_proto.h"
//#ifndef NO_RAT_NR #include "SCHED_NR_UE/phy_frame_config_nr.h"
#include "SCHED_NR/phy_frame_config_nr.h"
//#endif
#include "SCHED_NR_UE/defs.h" #include "SCHED_NR_UE/defs.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h" #include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
...@@ -577,12 +575,6 @@ void syncInFrame(PHY_VARS_NR_UE *UE, openair0_timestamp *timestamp) { ...@@ -577,12 +575,6 @@ void syncInFrame(PHY_VARS_NR_UE *UE, openair0_timestamp *timestamp) {
int computeSamplesShift(PHY_VARS_NR_UE *UE) { int computeSamplesShift(PHY_VARS_NR_UE *UE) {
if (IS_SOFTMODEM_RFSIM) {
LOG_D(PHY,"SET rx_offset %d \n",UE->rx_offset);
//UE->rx_offset_diff=0;
return 0;
}
// compute TO compensation that should be applied for this frame // compute TO compensation that should be applied for this frame
if ( UE->rx_offset < UE->frame_parms.samples_per_frame/2 && if ( UE->rx_offset < UE->frame_parms.samples_per_frame/2 &&
UE->rx_offset > 0 ) { UE->rx_offset > 0 ) {
......
...@@ -186,7 +186,6 @@ void phy_free_RU(RU_t *ru) { ...@@ -186,7 +186,6 @@ void phy_free_RU(RU_t *ru) {
int i,j,p; int i,j,p;
RU_CALIBRATION *calibration = &ru->calibration; RU_CALIBRATION *calibration = &ru->calibration;
LOG_I(PHY, "Feeing RU signal buffers (if_south %s) nb_tx %d\n", ru_if_types[ru->if_south], ru->nb_tx); LOG_I(PHY, "Feeing RU signal buffers (if_south %s) nb_tx %d\n", ru_if_types[ru->if_south], ru->nb_tx);
free_and_zero(ru->frame_parms);
if (ru->if_south <= REMOTE_IF5) { // this means REMOTE_IF5 or LOCAL_RF, so free memory for time-domain signals if (ru->if_south <= REMOTE_IF5) { // this means REMOTE_IF5 or LOCAL_RF, so free memory for time-domain signals
for (i = 0; i < ru->nb_tx; i++) free_and_zero(ru->common.txdata[i]); for (i = 0; i < ru->nb_tx; i++) free_and_zero(ru->common.txdata[i]);
......
...@@ -121,9 +121,9 @@ int nr_phy_init_RU(RU_t *ru) { ...@@ -121,9 +121,9 @@ int nr_phy_init_RU(RU_t *ru) {
LOG_E(PHY,"[INIT] %s() RC.nb_nr_L1_inst:%d \n", __FUNCTION__, RC.nb_nr_L1_inst); LOG_E(PHY,"[INIT] %s() RC.nb_nr_L1_inst:%d \n", __FUNCTION__, RC.nb_nr_L1_inst);
int beam_count = 0; int beam_count = 0;
if (ru->nb_log_antennas>1) { if (ru->nb_tx>1) {//Enable beamforming when nb_tx > 1
for (p=0;p<ru->nb_log_antennas;p++) { for (p=0;p<ru->nb_log_antennas;p++) {
if ((fp->L_ssb >> p) & 0x01) if ((fp->L_ssb >> (63-p)) & 0x01)//64 bit-map with the MSB @2⁶³ corresponds to SSB ssb_index 0
beam_count++; beam_count++;
} }
AssertFatal(ru->nb_bfw==(beam_count*ru->nb_tx),"Number of beam weights from config file is %d while the expected number is %d",ru->nb_bfw,(beam_count*ru->nb_tx)); AssertFatal(ru->nb_bfw==(beam_count*ru->nb_tx),"Number of beam weights from config file is %d while the expected number is %d",ru->nb_bfw,(beam_count*ru->nb_tx));
...@@ -131,7 +131,7 @@ int nr_phy_init_RU(RU_t *ru) { ...@@ -131,7 +131,7 @@ int nr_phy_init_RU(RU_t *ru) {
int l_ind = 0; int l_ind = 0;
for (i=0; i<RC.nb_nr_L1_inst; i++) { for (i=0; i<RC.nb_nr_L1_inst; i++) {
for (p=0;p<ru->nb_log_antennas;p++) { for (p=0;p<ru->nb_log_antennas;p++) {
if ((fp->L_ssb >> p) & 0x01) { if ((fp->L_ssb >> (63-p)) & 0x01) {
ru->beam_weights[i][p] = (int32_t **)malloc16_clear(ru->nb_tx*sizeof(int32_t*)); ru->beam_weights[i][p] = (int32_t **)malloc16_clear(ru->nb_tx*sizeof(int32_t*));
for (j=0; j<ru->nb_tx; j++) { for (j=0; j<ru->nb_tx; j++) {
ru->beam_weights[i][p][j] = (int32_t *)malloc16_clear(fp->ofdm_symbol_size*sizeof(int32_t)); ru->beam_weights[i][p][j] = (int32_t *)malloc16_clear(fp->ofdm_symbol_size*sizeof(int32_t));
......
...@@ -308,7 +308,7 @@ int nr_init_frame_parms(nfapi_nr_config_request_scf_t* cfg, ...@@ -308,7 +308,7 @@ int nr_init_frame_parms(nfapi_nr_config_request_scf_t* cfg,
int num_tx_ant = (cfg == NULL) ? fp->Lmax : cfg->carrier_config.num_tx_ant.value; int num_tx_ant = (cfg == NULL) ? fp->Lmax : cfg->carrier_config.num_tx_ant.value;
for (int p=0; p<num_tx_ant; p++) for (int p=0; p<num_tx_ant; p++)
fp->N_ssb += ((fp->L_ssb >> p) & 0x01); fp->N_ssb += ((fp->L_ssb >> (63-p)) & 0x01);
return 0; return 0;
...@@ -389,7 +389,7 @@ int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *fp, ...@@ -389,7 +389,7 @@ int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *fp,
fp->N_ssb = 0; fp->N_ssb = 0;
for (int p=0; p<fp->Lmax; p++) for (int p=0; p<fp->Lmax; p++)
fp->N_ssb += ((fp->L_ssb >> p) & 0x01); fp->N_ssb += ((fp->L_ssb >> (63-p)) & 0x01);
return 0; return 0;
} }
......
...@@ -155,7 +155,7 @@ int nr_beam_precoding(int32_t **txdataF, ...@@ -155,7 +155,7 @@ int nr_beam_precoding(int32_t **txdataF,
memset(&txdataF_BF[aa][symbol*frame_parms->ofdm_symbol_size],0,sizeof(int32_t)*(frame_parms->ofdm_symbol_size)); memset(&txdataF_BF[aa][symbol*frame_parms->ofdm_symbol_size],0,sizeof(int32_t)*(frame_parms->ofdm_symbol_size));
for (p=0; p<nb_antenna_ports; p++) { for (p=0; p<nb_antenna_ports; p++) {
if ((frame_parms->L_ssb >> p) & 0x01) { if ((frame_parms->L_ssb >> (63-p)) & 0x01) {
multadd_cpx_vector((int16_t*)&txdataF[p][symbol*frame_parms->ofdm_symbol_size], multadd_cpx_vector((int16_t*)&txdataF[p][symbol*frame_parms->ofdm_symbol_size],
(int16_t*)beam_weights[p][aa], (int16_t*)beam_weights[p][aa],
(int16_t*)&txdataF_BF[aa][symbol*frame_parms->ofdm_symbol_size], (int16_t*)&txdataF_BF[aa][symbol*frame_parms->ofdm_symbol_size],
......
...@@ -150,7 +150,7 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms, ...@@ -150,7 +150,7 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms,
if (N_RB != 273) { if (N_RB != 273) {
a_segments = a_segments*N_RB; a_segments = a_segments*N_RB;
a_segments = a_segments/273; a_segments = (a_segments + 272) / 273;
} }
uint16_t dlsch_bytes = a_segments*1056; // allocated bytes per segment uint16_t dlsch_bytes = a_segments*1056; // allocated bytes per segment
......
...@@ -37,7 +37,6 @@ ...@@ -37,7 +37,6 @@
extern uint16_t prach_root_sequence_map_0_3[838]; extern uint16_t prach_root_sequence_map_0_3[838];
extern uint16_t prach_root_sequence_map_abc[138]; extern uint16_t prach_root_sequence_map_abc[138];
extern uint16_t nr_du[838]; extern uint16_t nr_du[838];
extern int16_t nr_ru[2*839];
extern const char *prachfmt[9]; extern const char *prachfmt[9];
void init_prach_list(PHY_VARS_gNB *gNB) { void init_prach_list(PHY_VARS_gNB *gNB) {
......
...@@ -347,4 +347,5 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB, ...@@ -347,4 +347,5 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
nfapi_nr_uci_pucch_pdu_format_0_1_t* uci_pdu, nfapi_nr_uci_pucch_pdu_format_0_1_t* uci_pdu,
nfapi_nr_pucch_pdu_t* pucch_pdu); nfapi_nr_pucch_pdu_t* pucch_pdu);
#endif /*__NR_TRANSPORT__H__*/ #endif /*__NR_TRANSPORT__H__*/
...@@ -266,8 +266,14 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue, ...@@ -266,8 +266,14 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
double Coderate;// = 0.0; double Coderate;// = 0.0;
uint8_t dmrs_Type = harq_process->dmrsConfigType; uint8_t dmrs_Type = harq_process->dmrsConfigType;
AssertFatal(dmrs_Type == 1 || dmrs_Type == 2,"Illegal dmrs_type %d\n",dmrs_Type); AssertFatal(dmrs_Type == 0 || dmrs_Type == 1, "Illegal dmrs_type %d\n", dmrs_Type);
uint8_t nb_re_dmrs = (dmrs_Type==1)?6:4; // should be changed based on MAC parameters uint8_t nb_re_dmrs;
if (dmrs_Type==NFAPI_NR_DMRS_TYPE1) {
nb_re_dmrs = 6*harq_process->n_dmrs_cdm_groups;
}
else {
nb_re_dmrs = 4*harq_process->n_dmrs_cdm_groups;
}
uint16_t dmrs_length = get_num_dmrs(harq_process->dlDmrsSymbPos); uint16_t dmrs_length = get_num_dmrs(harq_process->dlDmrsSymbPos);
AssertFatal(dmrs_length == 1 || dmrs_length == 2,"Illegal dmrs_length %d\n",dmrs_length); AssertFatal(dmrs_length == 1 || dmrs_length == 2,"Illegal dmrs_length %d\n",dmrs_length);
...@@ -409,7 +415,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue, ...@@ -409,7 +415,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
if (nb_rb != 273) { if (nb_rb != 273) {
a_segments = a_segments*nb_rb; a_segments = a_segments*nb_rb;
a_segments = a_segments/273; a_segments = (a_segments + 272) / 273;
} }
if (harq_process->C > a_segments) { if (harq_process->C > a_segments) {
...@@ -805,7 +811,12 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue, ...@@ -805,7 +811,12 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
//nfapi_nr_config_request_t *cfg = &phy_vars_ue->nrUE_config; //nfapi_nr_config_request_t *cfg = &phy_vars_ue->nrUE_config;
//uint8_t dmrs_type = cfg->pdsch_config.dmrs_type.value; //uint8_t dmrs_type = cfg->pdsch_config.dmrs_type.value;
uint8_t nb_re_dmrs = 12;//(dmrs_type==1)?6:4; uint8_t nb_re_dmrs;
if (dmrs_Type == NFAPI_NR_DMRS_TYPE1)
nb_re_dmrs = 6*harq_process->n_dmrs_cdm_groups;
else
nb_re_dmrs = 4*harq_process->n_dmrs_cdm_groups;
uint16_t length_dmrs = get_num_dmrs(dl_config_pdu->dlDmrsSymbPos); uint16_t length_dmrs = get_num_dmrs(dl_config_pdu->dlDmrsSymbPos);
uint32_t i,j; uint32_t i,j;
......
...@@ -134,7 +134,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, ...@@ -134,7 +134,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
int avgs = 0;// rb; int avgs = 0;// rb;
NR_DL_UE_HARQ_t *dlsch0_harq, *dlsch1_harq = NULL; NR_DL_UE_HARQ_t *dlsch0_harq, *dlsch1_harq = NULL;
uint8_t beamforming_mode; uint8_t beamforming_mode = 0;
int32_t **rxdataF_comp_ptr; int32_t **rxdataF_comp_ptr;
int32_t **dl_ch_mag_ptr; int32_t **dl_ch_mag_ptr;
...@@ -162,24 +162,34 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, ...@@ -162,24 +162,34 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars = ue->pdsch_vars_SI; pdsch_vars = ue->pdsch_vars_SI;
dlsch = &ue->dlsch_SI[eNB_id]; dlsch = &ue->dlsch_SI[eNB_id];
dlsch0_harq = dlsch[0]->harq_processes[harq_pid]; dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
beamforming_mode = 0;
break; break;
case RA_PDSCH: case RA_PDSCH:
pdsch_vars = ue->pdsch_vars_ra; pdsch_vars = ue->pdsch_vars_ra;
dlsch = &ue->dlsch_ra[eNB_id]; dlsch = &ue->dlsch_ra[eNB_id];
dlsch0_harq = dlsch[0]->harq_processes[harq_pid]; dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
beamforming_mode = 0;
// WIP TBR Hotfix
memcpy((void*)&pdsch_vars[eNB_id]->dl_ch_estimates[0][ue->frame_parms.ofdm_symbol_size*2], (void*)&ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][0]->dl_ch_estimates[0][ue->frame_parms.ofdm_symbol_size*2], ue->frame_parms.ofdm_symbol_size*sizeof(int32_t));
break; break;
case PDSCH: case PDSCH:
pdsch_vars = ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]]; pdsch_vars = ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]];
dlsch = ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id]; dlsch = ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id];
beamforming_mode = ue->transmission_mode[eNB_id] < 7 ? 0 :ue->transmission_mode[eNB_id];
dlsch0_harq = dlsch[0]->harq_processes[harq_pid]; dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
dlsch1_harq = dlsch[1]->harq_processes[harq_pid]; dlsch1_harq = dlsch[1]->harq_processes[harq_pid];
beamforming_mode = ue->transmission_mode[eNB_id] < 7 ? 0 :ue->transmission_mode[eNB_id];
break;
default:
LOG_E(PHY, "[UE][FATAL] nr_tti_rx %d: Unknown PDSCH format %d\n", nr_tti_rx, type);
return -1;
break;
}
if (dlsch1_harq){
//printf("status TB0 = %d, status TB1 = %d \n", dlsch[0]->harq_processes[harq_pid]->status, dlsch[1]->harq_processes[harq_pid]->status); //printf("status TB0 = %d, status TB1 = %d \n", dlsch[0]->harq_processes[harq_pid]->status, dlsch[1]->harq_processes[harq_pid]->status);
LOG_D(PHY,"AbsSubframe %d.%d / Sym %d harq_pid %d, harq status %d.%d \n", frame, nr_tti_rx, symbol, harq_pid, dlsch0_harq->status, dlsch1_harq->status); LOG_D(PHY,"AbsSubframe %d.%d / Sym %d harq_pid %d, harq status %d.%d \n", frame, nr_tti_rx, symbol, harq_pid, dlsch0_harq->status, dlsch1_harq->status);
...@@ -191,27 +201,25 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, ...@@ -191,27 +201,25 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
dlsch1_harq = dlsch[codeword_TB1]->harq_processes[harq_pid]; dlsch1_harq = dlsch[codeword_TB1]->harq_processes[harq_pid];
#ifdef DEBUG_HARQ #ifdef DEBUG_HARQ
printf("[DEMOD] I am assuming both TBs are active\n"); printf("[DEMOD] I am assuming both TBs are active, in cw0 %d and cw1 %d \n", codeword_TB0, codeword_TB1);
#endif #endif
} else if ((dlsch0_harq->status == ACTIVE) && (dlsch1_harq->status != ACTIVE) ) { } else if ((dlsch0_harq->status == ACTIVE) && (dlsch1_harq->status != ACTIVE) ) {
codeword_TB0 = dlsch0_harq->codeword; codeword_TB0 = dlsch0_harq->codeword;
codeword_TB1 = -1; dlsch0_harq = dlsch[codeword_TB0]->harq_processes[harq_pid];
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
dlsch1_harq = NULL; dlsch1_harq = NULL;
#ifdef DEBUG_HARQ #ifdef DEBUG_HARQ
printf("[DEMOD] I am assuming only TB0 is active\n"); printf("[DEMOD] I am assuming only TB0 is active, in cw %d \n", codeword_TB0);
#endif #endif
} else if ((dlsch0_harq->status != ACTIVE) && (dlsch1_harq->status == ACTIVE)){ } else if ((dlsch0_harq->status != ACTIVE) && (dlsch1_harq->status == ACTIVE)){
codeword_TB0 = -1;
codeword_TB1 = dlsch1_harq->codeword; codeword_TB1 = dlsch1_harq->codeword;
dlsch0_harq = NULL; dlsch0_harq = NULL;
dlsch1_harq = dlsch[1]->harq_processes[codeword_TB1]; dlsch1_harq = dlsch[codeword_TB1]->harq_processes[harq_pid];
#ifdef DEBUG_HARQ #ifdef DEBUG_HARQ
printf("[DEMOD] I am assuming only TB1 is active, it is in cw %d\n", dlsch1_harq->codeword); printf("[DEMOD] I am assuming only TB1 is active, it is in cw %d\n", codeword_TB1);
#endif #endif
LOG_E(PHY, "[UE][FATAL] DLSCH: TB0 not active and TB1 active case is not supported\n"); LOG_E(PHY, "[UE][FATAL] DLSCH: TB0 not active and TB1 active case is not supported\n");
...@@ -221,14 +229,17 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, ...@@ -221,14 +229,17 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
LOG_E(PHY,"[UE][FATAL] nr_tti_rx %d: no active DLSCH\n", nr_tti_rx); LOG_E(PHY,"[UE][FATAL] nr_tti_rx %d: no active DLSCH\n", nr_tti_rx);
return(-1); return(-1);
} }
} else if (dlsch0_harq) {
if (dlsch0_harq->status == ACTIVE)
codeword_TB0 = dlsch0_harq->codeword;
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
break; #ifdef DEBUG_HARQ
printf("[DEMOD] I am assuming only TB0 is active\n");
default: #endif
LOG_E(PHY, "[UE][FATAL] nr_tti_rx %d: Unknown PDSCH format %d\n", nr_tti_rx, type); } else {
return(-1); LOG_E(PHY,"[UE][FATAL] nr_tti_rx %d: no active DLSCH\n", nr_tti_rx);
break; return (-1);
} }
if (dlsch0_harq == NULL) { if (dlsch0_harq == NULL) {
...@@ -2380,7 +2391,7 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF, ...@@ -2380,7 +2391,7 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) { for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
k = frame_parms->first_carrier_offset + 12*start_rb; k = frame_parms->first_carrier_offset + NR_NB_SC_PER_RB*start_rb;
if (high_speed_flag == 1) if (high_speed_flag == 1)
dl_ch0 = &dl_ch_estimates[aarx][(2*(frame_parms->ofdm_symbol_size))]; dl_ch0 = &dl_ch_estimates[aarx][(2*(frame_parms->ofdm_symbol_size))];
......
...@@ -44,18 +44,8 @@ ...@@ -44,18 +44,8 @@
//#define NR_PRACH_DEBUG 1 //#define NR_PRACH_DEBUG 1
extern uint16_t NCS_unrestricted_delta_f_RA_125[16];
extern uint16_t NCS_restricted_TypeA_delta_f_RA_125[15];
extern uint16_t NCS_restricted_TypeB_delta_f_RA_125[13];
extern uint16_t NCS_unrestricted_delta_f_RA_5[16];
extern uint16_t NCS_restricted_TypeA_delta_f_RA_5[16];
extern uint16_t NCS_restricted_TypeB_delta_f_RA_5[14];
extern uint16_t NCS_unrestricted_delta_f_RA_15[16];
extern uint16_t prach_root_sequence_map_0_3[838]; extern uint16_t prach_root_sequence_map_0_3[838];
extern uint16_t prach_root_sequence_map_abc[138]; extern uint16_t prach_root_sequence_map_abc[138];
extern int64_t table_6_3_3_2_2_prachConfig_Index [256][9];
extern int64_t table_6_3_3_2_3_prachConfig_Index [256][9];
extern int64_t table_6_3_3_2_4_prachConfig_Index [256][10];
extern uint16_t nr_du[838]; extern uint16_t nr_du[838];
extern int16_t nr_ru[2*839]; extern int16_t nr_ru[2*839];
extern const char *prachfmt[9]; extern const char *prachfmt[9];
...@@ -118,7 +108,7 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){ ...@@ -118,7 +108,7 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
else else
samp_count = (slot%(fp->slots_per_subframe/2)) ? fp->samples_per_slotN0 : fp->samples_per_slot0; samp_count = (slot%(fp->slots_per_subframe/2)) ? fp->samples_per_slotN0 : fp->samples_per_slot0;
#if defined (OAI_USRP) #ifdef OAI_USRP
prach_start = (ue->rx_offset + slot*samp_count - ue->hw_timing_advance - ue->N_TA_offset); prach_start = (ue->rx_offset + slot*samp_count - ue->hw_timing_advance - ue->N_TA_offset);
#else //normal case (simulation) #else //normal case (simulation)
prach_start = slot*samp_count - ue->N_TA_offset; prach_start = slot*samp_count - ue->N_TA_offset;
...@@ -208,14 +198,17 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){ ...@@ -208,14 +198,17 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
// now generate PRACH signal // now generate PRACH signal
#ifdef NR_PRACH_DEBUG #ifdef NR_PRACH_DEBUG
if (NCS>0) if (NCS>0)
LOG_I(PHY, "PRACH [UE %d] generate PRACH for RootSeqIndex %d, Preamble Index %d, PRACH Format %s, NCS %d (N_ZC %d): Preamble_offset %d, Preamble_shift %d\n", Mod_id, LOG_I(PHY, "PRACH [UE %d] generate PRACH in slot %d for RootSeqIndex %d, Preamble Index %d, PRACH Format %s, NCS %d (N_ZC %d): Preamble_offset %d, Preamble_shift %d msg1 frequency start %d\n",
Mod_id,
slot,
rootSequenceIndex, rootSequenceIndex,
preamble_index, preamble_index,
prach_sequence_length == 0 ? prachfmt03[prach_fmt_id] : prachfmt[prach_fmt_id], prach_sequence_length == 0 ? prachfmt03[prach_fmt_id] : prachfmt[prach_fmt_id],
NCS, NCS,
N_ZC, N_ZC,
preamble_offset, preamble_offset,
preamble_shift); preamble_shift,
n_ra_prb);
#endif #endif
// nsymb = (frame_parms->Ncp==0) ? 14:12; // nsymb = (frame_parms->Ncp==0) ? 14:12;
...@@ -383,8 +376,6 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){ ...@@ -383,8 +376,6 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
} else { } else {
//LOG_D(PHY, "PRACH [UE %d] in slot %d, format %d, msg1 frequency start %d startSymbol %d \n", Mod_id, slot, prachfmt[prach_fmt_id], n_ra_prb, prachStartSymbol);
switch (prach_fmt_id) { switch (prach_fmt_id) {
case 0: //A1 case 0: //A1
Ncp = 288/(1<<mu); Ncp = 288/(1<<mu);
...@@ -419,7 +410,9 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){ ...@@ -419,7 +410,9 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
} }
} }
#ifdef NR_PRACH_DEBUG
LOG_D(PHY, "PRACH [UE %d] Ncp %d, dftlen %d \n", Mod_id, Ncp, dftlen); LOG_D(PHY, "PRACH [UE %d] Ncp %d, dftlen %d \n", Mod_id, Ncp, dftlen);
#endif
if (fp->N_RB_UL <= 100) if (fp->N_RB_UL <= 100)
AssertFatal(1==0,"N_RB_UL %d not supported for NR PRACH yet\n",fp->N_RB_UL); AssertFatal(1==0,"N_RB_UL %d not supported for NR PRACH yet\n",fp->N_RB_UL);
...@@ -844,7 +837,7 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){ ...@@ -844,7 +837,7 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
//} //}
//printf(" \n"); //printf(" \n");
#if defined(PRACH_WRITE_OUTPUT_DEBUG) #ifdef PRACH_WRITE_OUTPUT_DEBUG
LOG_M("prach_tx0.m", "prachtx0", prach+(Ncp<<1), prach_len-Ncp, 1, 1); LOG_M("prach_tx0.m", "prachtx0", prach+(Ncp<<1), prach_len-Ncp, 1, 1);
LOG_M("Prach_txsig.m","txs",(int16_t*)(&ue->common_vars.txdata[0][prach_start]), 2*(prach_start+prach_len), 1, 1) LOG_M("Prach_txsig.m","txs",(int16_t*)(&ue->common_vars.txdata[0][prach_start]), 2*(prach_start+prach_len), 1, 1)
#endif #endif
......
...@@ -292,6 +292,8 @@ typedef struct { ...@@ -292,6 +292,8 @@ typedef struct {
uint16_t dlDmrsSymbPos; uint16_t dlDmrsSymbPos;
/// DMRS Configuration Type /// DMRS Configuration Type
uint8_t dmrsConfigType; uint8_t dmrsConfigType;
// Number of DMRS CDM groups with no data
uint8_t n_dmrs_cdm_groups;
/// Starting Symbol number /// Starting Symbol number
uint16_t start_symbol; uint16_t start_symbol;
/// Current subband PMI allocation /// Current subband PMI allocation
......
...@@ -100,7 +100,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -100,7 +100,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
LOG_D(PHY,"nr_ue_ulsch_procedures hard_id %d %d.%d\n",harq_pid,frame,slot); LOG_D(PHY,"nr_ue_ulsch_procedures hard_id %d %d.%d\n",harq_pid,frame,slot);
uint32_t available_bits, TBS; uint32_t available_bits;
uint8_t mod_order, cwd_index, num_of_codewords, l; uint8_t mod_order, cwd_index, num_of_codewords, l;
uint32_t scrambled_output[NR_MAX_NB_CODEWORDS][NR_MAX_PDSCH_ENCODED_LENGTH>>5]; uint32_t scrambled_output[NR_MAX_NB_CODEWORDS][NR_MAX_PDSCH_ENCODED_LENGTH>>5];
uint32_t ***pusch_dmrs; uint32_t ***pusch_dmrs;
...@@ -113,7 +113,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -113,7 +113,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
int ap, start_symbol, Nid_cell, i; int ap, start_symbol, Nid_cell, i;
int sample_offsetF, N_RE_prime, N_PRB_oh; int sample_offsetF, N_RE_prime, N_PRB_oh;
uint16_t ul_dmrs_symb_pos; uint16_t ul_dmrs_symb_pos;
uint8_t data_existing =0;
uint8_t L_ptrs, K_ptrs; // PTRS parameters uint8_t L_ptrs, K_ptrs; // PTRS parameters
uint16_t beta_ptrs; // PTRS parameter related to power control uint16_t beta_ptrs; // PTRS parameter related to power control
...@@ -121,7 +120,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -121,7 +120,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
NR_UL_UE_HARQ_t *harq_process_ul_ue=NULL; NR_UL_UE_HARQ_t *harq_process_ul_ue=NULL;
NR_DL_FRAME_PARMS *frame_parms = &UE->frame_parms; NR_DL_FRAME_PARMS *frame_parms = &UE->frame_parms;
NR_UE_PUSCH *pusch_ue = UE->pusch_vars[thread_id][gNB_id]; NR_UE_PUSCH *pusch_ue = UE->pusch_vars[thread_id][gNB_id];
uint8_t ulsch_input_buffer[MAX_ULSCH_PAYLOAD_BYTES];
// ptrs_UplinkConfig_t *ptrs_Uplink_Config = &UE->pusch_config.dmrs_UplinkConfig.ptrs_UplinkConfig; // ptrs_UplinkConfig_t *ptrs_Uplink_Config = &UE->pusch_config.dmrs_UplinkConfig.ptrs_UplinkConfig;
num_of_codewords = 1; // tmp assumption num_of_codewords = 1; // tmp assumption
...@@ -171,54 +169,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -171,54 +169,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
0, 0,
harq_process_ul_ue->pusch_pdu.nrOfLayers); harq_process_ul_ue->pusch_pdu.nrOfLayers);
uint8_t access_mode = SCHEDULED_ACCESS;
//-----------------------------------------------------//
// to be removed later when MAC is ready
if (harq_process_ul_ue != NULL){
TBS = harq_process_ul_ue->pusch_pdu.pusch_data.tb_size;
data_existing = 0;
if (IS_SOFTMODEM_NOS1){
data_existing = nr_ue_get_sdu(UE->Mod_id, UE->CC_id, frame,
slot, 0, ulsch_input_buffer, TBS/8, &access_mode);
//IP traffic to be transmitted
if(data_existing){
//harq_process_ul_ue->a = (unsigned char*)calloc(harq_process_ul_ue->TBS/8, sizeof(unsigned char));
memcpy(harq_process_ul_ue->a, ulsch_input_buffer, TBS/8);
}
}
//Random traffic to be transmitted if there is no IP traffic available for this Tx opportunity
if (!IS_SOFTMODEM_NOS1 || !data_existing) {
//Use zeros for the header bytes in noS1 mode, in order to make sure that the LCID is not valid
//and block this traffic from being forwarded to the upper layers at the gNB
LOG_D(PHY, "Random data to be tranmsitted: \n");
//Give the first byte a dummy value (a value not corresponding to any valid LCID based on 38.321, Table 6.2.1-2)
//in order to distinguish the PHY random packets at the MAC layer of the gNB receiver from the normal packets that should
//have a valid LCID (nr_process_mac_pdu function)
harq_process_ul_ue->a[0] = 0x31;
for (i = 1; i < TBS / 8; i++) {
harq_process_ul_ue->a[i] = (unsigned char) rand();
//printf(" input encoder a[%d]=0x%02x\n",i,harq_process_ul_ue->a[i]);
}
}
#ifdef DEBUG_MAC_PDU
LOG_I(PHY, "Printing MAC PDU to be encoded, TBS is: %d at SFN/SF: %d/%d \n", TBS/8, frame, slot);
for (i = 0; i < TBS / 8; i++) {
printf("%02x ",harq_process_ul_ue->a[i]);
}
printf("\n");
#endif
} else {
LOG_E(PHY, "[phy_procedures_nrUE_TX] harq_process_ul_ue is NULL !!\n");
return;
}
//-----------------------------------------------------//
/////////////////////////ULSCH coding///////////////////////// /////////////////////////ULSCH coding/////////////////////////
/////////// ///////////
...@@ -471,7 +421,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -471,7 +421,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
/////////// ///////////
//////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////
LOG_D(PHY, "Is data existing ?: %d \n", data_existing);
} }
......
...@@ -963,7 +963,7 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue, ...@@ -963,7 +963,7 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
uint64_t b[16]; // limit to 1024-bit encoded length uint64_t b[16]; // limit to 1024-bit encoded length
// M_bit is the number of bits of block b (payload after encoding) // M_bit is the number of bits of block b (payload after encoding)
uint16_t M_bit; uint16_t M_bit;
nr_uci_encoding(payload,nr_bit,pucch_format2_nr,0,nrofSymbols,nrofPRB,1,0,0,(void*)b,&M_bit); nr_uci_encoding(payload,nr_bit,pucch_format2_nr,0,nrofSymbols,nrofPRB,1,0,0,&b[0],&M_bit);
/* /*
* Implementing TS 38.211 * Implementing TS 38.211
* Subclauses 6.3.2.5.1 Scrambling (PUCCH format 2) * Subclauses 6.3.2.5.1 Scrambling (PUCCH format 2)
...@@ -985,7 +985,7 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue, ...@@ -985,7 +985,7 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
/* /*
* Implementing TS 38.211 Subclause 6.3.2.5.1 scrambling format 2 * Implementing TS 38.211 Subclause 6.3.2.5.1 scrambling format 2
*/ */
nr_pucch2_3_4_scrambling(M_bit,rnti,data_scrambling_id,b,btilde); nr_pucch2_3_4_scrambling(M_bit,rnti,data_scrambling_id,&b[0],btilde);
/* /*
* Implementing TS 38.211 Subclause 6.3.2.5.2 modulation format 2 * Implementing TS 38.211 Subclause 6.3.2.5.2 modulation format 2
* btilde shall be modulated as described in subclause 5.1 using QPSK * btilde shall be modulated as described in subclause 5.1 using QPSK
...@@ -1154,7 +1154,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue, ...@@ -1154,7 +1154,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
//nrofPRB = 2; // only for test purposes //nrofPRB = 2; // only for test purposes
if (fmt == pucch_format4_nr) nrofPRB = 1; if (fmt == pucch_format4_nr) nrofPRB = 1;
nr_uci_encoding(payload,nr_bit,fmt,is_pi_over_2_bpsk_enabled,nrofSymbols,nrofPRB,n_SF_PUCCH_s,intraSlotFrequencyHopping,add_dmrs,(void*)b,&M_bit); nr_uci_encoding(payload,nr_bit,fmt,is_pi_over_2_bpsk_enabled,nrofSymbols,nrofPRB,n_SF_PUCCH_s,intraSlotFrequencyHopping,add_dmrs,&b[0],&M_bit);
/* /*
* Implementing TS 38.211 * Implementing TS 38.211
* Subclauses 6.3.2.6.1 Scrambling (PUCCH formats 3 and 4) * Subclauses 6.3.2.6.1 Scrambling (PUCCH formats 3 and 4)
...@@ -1176,7 +1176,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue, ...@@ -1176,7 +1176,7 @@ void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
/* /*
* Implementing TS 38.211 Subclause 6.3.2.6.1 scrambling formats 3 and 4 * Implementing TS 38.211 Subclause 6.3.2.6.1 scrambling formats 3 and 4
*/ */
nr_pucch2_3_4_scrambling(M_bit,rnti,n_id,b,btilde); nr_pucch2_3_4_scrambling(M_bit,rnti,n_id,&b[0],btilde);
/* /*
* Implementing TS 38.211 Subclause 6.3.2.6.2 modulation formats 3 and 4 * Implementing TS 38.211 Subclause 6.3.2.6.2 modulation formats 3 and 4
* *
......
...@@ -401,7 +401,8 @@ static void *scope_thread_gNB(void *arg) { ...@@ -401,7 +401,8 @@ static void *scope_thread_gNB(void *arg) {
// FILE *gNB_stats = fopen("gNB_stats.txt", "w"); // FILE *gNB_stats = fopen("gNB_stats.txt", "w");
//#endif //#endif
size_t stksize=0; size_t stksize=0;
pthread_attr_t atr= {0}; pthread_attr_t atr;
pthread_attr_init(&atr);
pthread_attr_getstacksize(&atr, &stksize); pthread_attr_getstacksize(&atr, &stksize);
pthread_attr_setstacksize(&atr,32*1024*1024 ); pthread_attr_setstacksize(&atr,32*1024*1024 );
sleep(3); // no clean interthread barriers sleep(3); // no clean interthread barriers
......
...@@ -29,11 +29,9 @@ ...@@ -29,11 +29,9 @@
* *
************************************************************************/ ************************************************************************/
#include "SCHED_NR_UE/defs.h" #include "PHY/defs_nr_common.h"
#include "PHY/defs_nr_UE.h" #include "PHY/defs_nr_UE.h"
#include "SCHED_NR_UE/phy_frame_config_nr.h" #include "SCHED_NR/phy_frame_config_nr.h"
#include "PHY/impl_defs_nr.h"
#include "PHY/impl_defs_top.h"
/******************************************************************* /*******************************************************************
* *
...@@ -369,73 +367,6 @@ int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti) ...@@ -369,73 +367,6 @@ int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti)
} }
} }
/*******************************************************************
*
* NAME : nr_ue_slot_select
*
* DESCRIPTION : function for the UE equivalent to nr_slot_select
*
*********************************************************************/
int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) {
/* for FFD all slot can be considered as an uplink */
int mu = cfg->ssb_config.scs_common, check_slot = 0;
if (cfg->cell_config.frame_duplex_type == FDD) {
return (NR_UPLINK_SLOT | NR_DOWNLINK_SLOT);
}
if (nr_frame%2 == 0) {
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 1) {
check_slot++;
}
}
if(check_slot == NR_NUMBER_OF_SYMBOLS_PER_SLOT) {
return (NR_UPLINK_SLOT);
}
check_slot = 0;
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 0) {
check_slot++;
}
}
if(check_slot == NR_NUMBER_OF_SYMBOLS_PER_SLOT) {
return (NR_DOWNLINK_SLOT);
} else {
return (NR_MIXED_SLOT);
}
} else {
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 1) {
check_slot++;
}
}
if(check_slot == NR_NUMBER_OF_SYMBOLS_PER_SLOT) {
return (NR_UPLINK_SLOT);
}
check_slot = 0;
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 0) {
check_slot++;
}
}
if(check_slot == NR_NUMBER_OF_SYMBOLS_PER_SLOT) {
return (NR_DOWNLINK_SLOT);
} else {
return (NR_MIXED_SLOT);
}
}
}
/******************************************************************* /*******************************************************************
* *
* NAME : free_tdd_configuration_nr * NAME : free_tdd_configuration_nr
......
...@@ -32,7 +32,6 @@ ...@@ -32,7 +32,6 @@
#ifndef PHY_FRAME_CONFIG_NR_H #ifndef PHY_FRAME_CONFIG_NR_H
#define PHY_FRAME_CONFIG_NR_H #define PHY_FRAME_CONFIG_NR_H
#include <nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h>
/************** DEFINE ********************************************/ /************** DEFINE ********************************************/
#define TDD_CONFIG_NB_FRAMES (2) #define TDD_CONFIG_NB_FRAMES (2)
...@@ -77,10 +76,9 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms); ...@@ -77,10 +76,9 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms);
* @param frame_parms NR DL Frame parameters * @param frame_parms NR DL Frame parameters
* @param nr_frame : frame number * @param nr_frame : frame number
* @param nr_tti : slot number * @param nr_tti : slot number
@returns nr_slot_t : downlink or uplink */ @returns int : downlink, uplink or mixed slot type*/
nr_slot_t nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti); int nr_slot_select(nfapi_nr_config_request_scf_t *cfg, int nr_frame, int nr_tti);
int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti);
/** \brief This function frees tdd configuration for nr /** \brief This function frees tdd configuration for nr
* @param frame_parms NR DL Frame parameters * @param frame_parms NR DL Frame parameters
......
...@@ -106,6 +106,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ ...@@ -106,6 +106,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
dlsch0_harq->start_symbol = dlsch_config_pdu->start_symbol; dlsch0_harq->start_symbol = dlsch_config_pdu->start_symbol;
dlsch0_harq->dlDmrsSymbPos = dlsch_config_pdu->dlDmrsSymbPos; dlsch0_harq->dlDmrsSymbPos = dlsch_config_pdu->dlDmrsSymbPos;
dlsch0_harq->dmrsConfigType = dlsch_config_pdu->dmrsConfigType; dlsch0_harq->dmrsConfigType = dlsch_config_pdu->dmrsConfigType;
dlsch0_harq->n_dmrs_cdm_groups = dlsch_config_pdu->n_dmrs_cdm_groups;
dlsch0_harq->mcs = dlsch_config_pdu->mcs; dlsch0_harq->mcs = dlsch_config_pdu->mcs;
dlsch0_harq->rvidx = dlsch_config_pdu->rv; dlsch0_harq->rvidx = dlsch_config_pdu->rv;
dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH; dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
...@@ -147,12 +148,32 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ ...@@ -147,12 +148,32 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
// pusch config pdu // pusch config pdu
pusch_config_pdu = &ul_config->ul_config_list[i].pusch_config_pdu; pusch_config_pdu = &ul_config->ul_config_list[i].pusch_config_pdu;
current_harq_pid = pusch_config_pdu->pusch_data.harq_process_id; current_harq_pid = pusch_config_pdu->pusch_data.harq_process_id;
nfapi_nr_ue_pusch_pdu_t *pusch_pdu = &ulsch0->harq_processes[current_harq_pid]->pusch_pdu; NR_UL_UE_HARQ_t *harq_process_ul_ue = ulsch0->harq_processes[current_harq_pid];
if (harq_process_ul_ue){
nfapi_nr_ue_pusch_pdu_t *pusch_pdu = &harq_process_ul_ue->pusch_pdu;
memcpy(pusch_pdu, pusch_config_pdu, sizeof(nfapi_nr_ue_pusch_pdu_t)); memcpy(pusch_pdu, pusch_config_pdu, sizeof(nfapi_nr_ue_pusch_pdu_t));
ulsch0->f_pusch = pusch_config_pdu->absolute_delta_PUSCH; ulsch0->f_pusch = pusch_config_pdu->absolute_delta_PUSCH;
ulsch0->harq_processes[current_harq_pid]->status = ACTIVE;
if (scheduled_response->tx_request){
fapi_nr_tx_request_body_t *tx_req_body = scheduled_response->tx_request->tx_request_body;
//harq_process_ul_ue->a = (unsigned char*)calloc(TBS/8, sizeof(unsigned char));
memcpy(harq_process_ul_ue->a, tx_req_body->pdu, tx_req_body->pdu_length);
harq_process_ul_ue->status = ACTIVE;
}
} else {
LOG_E(PHY, "[phy_procedures_nrUE_TX] harq_process_ul_ue is NULL !!\n");
return -1;
}
break; break;
case (FAPI_NR_UL_CONFIG_TYPE_PUCCH): case (FAPI_NR_UL_CONFIG_TYPE_PUCCH):
...@@ -214,9 +235,6 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ ...@@ -214,9 +235,6 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
} else { } else {
} }
if (scheduled_response->tx_request != NULL){
} else {
}
} }
return 0; return 0;
......
...@@ -62,10 +62,18 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms); ...@@ -62,10 +62,18 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms);
* @param frame_parms NR DL Frame parameters * @param frame_parms NR DL Frame parameters
* @param nr_frame : frame number * @param nr_frame : frame number
* @param nr_tti : slot number * @param nr_tti : slot number
@returns nr_slot_t : downlink or uplink */ @returns int : downlink or uplink */
int slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti); int slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti);
/** \brief This function checks nr UE slot direction : downlink or uplink
* @param cfg : FAPI Config Request
* @param nr_frame : frame number
* @param nr_tti : slot number
@returns int : downlink, uplink or mixed slot type */
int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti);
/** \brief This function frees tdd configuration for nr /** \brief This function frees tdd configuration for nr
* @param frame_parms NR DL Frame parameters * @param frame_parms NR DL Frame parameters
@returns none */ @returns none */
......
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/***********************************************************************
*
* FILENAME : phy_frame_configuration_nr_ue.c
*
* DESCRIPTION : functions related to FDD/TDD configuration for NR
* see TS 38.213 11.1 Slot configuration
* and TS 38.331 for RRC configuration
*
************************************************************************/
#include "PHY/defs_nr_UE.h"
/*******************************************************************
*
* NAME : nr_ue_slot_select
*
* DESCRIPTION : function for the UE equivalent to nr_slot_select
*
*********************************************************************/
int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_tti) {
/* for FFD all slot can be considered as an uplink */
int mu = cfg->ssb_config.scs_common, check_slot = 0;
if (cfg->cell_config.frame_duplex_type == FDD) {
return (NR_UPLINK_SLOT | NR_DOWNLINK_SLOT);
}
if (nr_frame%2 == 0) {
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 1) {
check_slot++;
}
}
if(check_slot == NR_NUMBER_OF_SYMBOLS_PER_SLOT) {
return (NR_UPLINK_SLOT);
}
check_slot = 0;
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 0) {
check_slot++;
}
}
if(check_slot == NR_NUMBER_OF_SYMBOLS_PER_SLOT) {
return (NR_DOWNLINK_SLOT);
} else {
return (NR_MIXED_SLOT);
}
} else {
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 1) {
check_slot++;
}
}
if(check_slot == NR_NUMBER_OF_SYMBOLS_PER_SLOT) {
return (NR_UPLINK_SLOT);
}
check_slot = 0;
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 0) {
check_slot++;
}
}
if(check_slot == NR_NUMBER_OF_SYMBOLS_PER_SLOT) {
return (NR_DOWNLINK_SLOT);
} else {
return (NR_MIXED_SLOT);
}
}
}
...@@ -2269,7 +2269,7 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue, ...@@ -2269,7 +2269,7 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,
/* RACH */ /* RACH */
if (get_softmodem_params()->do_ra==1) { if (get_softmodem_params()->do_ra==1) {
if ((ue->UE_mode[gNB_id] == PRACH) && (ue->prach_vars[gNB_id]->prach_Config_enabled == 1)) { if ((ue->UE_mode[gNB_id] < PUSCH) && (ue->prach_vars[gNB_id]->prach_Config_enabled == 1)) {
nr_ue_prach_procedures(ue, proc, gNB_id, mode); nr_ue_prach_procedures(ue, proc, gNB_id, mode);
} }
} }
...@@ -3289,9 +3289,8 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, ...@@ -3289,9 +3289,8 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
NR_UE_PDSCH *pdsch_vars; NR_UE_PDSCH *pdsch_vars;
uint8_t is_cw0_active = 0; uint8_t is_cw0_active = 0;
uint8_t is_cw1_active = 0; uint8_t is_cw1_active = 0;
uint8_t dmrs_type = dlsch0->harq_processes[harq_pid]->dmrsConfigType; uint8_t dmrs_type, nb_re_dmrs;
uint8_t nb_re_dmrs = (dmrs_type==NFAPI_NR_DMRS_TYPE1)?6:4; // TODO: should changed my mac uint16_t length_dmrs = 1;
uint16_t length_dmrs = 1; //cfg->pdsch_config.dmrs_max_length.value;
uint16_t nb_symb_sch = 9; uint16_t nb_symb_sch = 9;
nr_downlink_indication_t dl_indication; nr_downlink_indication_t dl_indication;
fapi_nr_rx_indication_t rx_ind; fapi_nr_rx_indication_t rx_ind;
...@@ -3316,6 +3315,13 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, ...@@ -3316,6 +3315,13 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
is_cw0_active = dlsch0->harq_processes[harq_pid]->status; is_cw0_active = dlsch0->harq_processes[harq_pid]->status;
nb_symb_sch = dlsch0->harq_processes[harq_pid]->nb_symbols; nb_symb_sch = dlsch0->harq_processes[harq_pid]->nb_symbols;
start_symbol = dlsch0->harq_processes[harq_pid]->start_symbol; start_symbol = dlsch0->harq_processes[harq_pid]->start_symbol;
dmrs_type = dlsch0->harq_processes[harq_pid]->dmrsConfigType;
if (dmrs_type==NFAPI_NR_DMRS_TYPE1) {
nb_re_dmrs = 6*dlsch0->harq_processes[harq_pid]->n_dmrs_cdm_groups;
}
else {
nb_re_dmrs = 4*dlsch0->harq_processes[harq_pid]->n_dmrs_cdm_groups;
}
if(dlsch1) if(dlsch1)
is_cw1_active = dlsch1->harq_processes[harq_pid]->status; is_cw1_active = dlsch1->harq_processes[harq_pid]->status;
...@@ -4603,6 +4609,8 @@ void nr_ue_prach_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t ...@@ -4603,6 +4609,8 @@ void nr_ue_prach_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t
if (ue->prach_cnt == 3) if (ue->prach_cnt == 3)
ue->prach_cnt = 0; ue->prach_cnt = 0;
} else if (nr_prach == 2) {
nr_ra_succeeded(mod_id, ue->CC_id, gNB_id);
} }
// if we're calibrating the PRACH kill the pointer to its resources so that the RA protocol doesn't continue // if we're calibrating the PRACH kill the pointer to its resources so that the RA protocol doesn't continue
......
...@@ -478,8 +478,9 @@ int main(int argc, char **argv) ...@@ -478,8 +478,9 @@ int main(int argc, char **argv)
harq_process->Qm = mod_order; harq_process->Qm = mod_order;
harq_process->rvidx = rvidx; harq_process->rvidx = rvidx;
harq_process->R = rate; harq_process->R = rate;
harq_process->dmrsConfigType = 1; harq_process->dmrsConfigType = NFAPI_NR_DMRS_TYPE1;
harq_process->dlDmrsSymbPos = 4; harq_process->dlDmrsSymbPos = 4;
harq_process->n_dmrs_cdm_groups = 1;
printf("harq process ue mcs = %d Qm = %d, symb %d\n", harq_process->mcs, harq_process->Qm, nb_symb_sch); printf("harq process ue mcs = %d Qm = %d, symb %d\n", harq_process->mcs, harq_process->Qm, nb_symb_sch);
unsigned char *test_input; unsigned char *test_input;
test_input = (unsigned char *) malloc16(sizeof(unsigned char) * TBS / 8); test_input = (unsigned char *) malloc16(sizeof(unsigned char) * TBS / 8);
......
...@@ -678,7 +678,8 @@ int main(int argc, char **argv) ...@@ -678,7 +678,8 @@ int main(int argc, char **argv)
scheduled_response.slot = slot; scheduled_response.slot = slot;
scheduled_response.dl_config = NULL; scheduled_response.dl_config = NULL;
scheduled_response.ul_config = &ul_config; scheduled_response.ul_config = &ul_config;
scheduled_response.dl_config = NULL; scheduled_response.tx_request = (fapi_nr_tx_request_t *) malloc(sizeof(fapi_nr_tx_request_t));
scheduled_response.tx_request->tx_request_body = (fapi_nr_tx_request_body_t *) malloc(sizeof(fapi_nr_tx_request_body_t));
ul_config.slot = slot; ul_config.slot = slot;
ul_config.number_pdus = 1; ul_config.number_pdus = 1;
......
...@@ -2240,7 +2240,7 @@ void ulsch_scheduler_pre_ue_select_fairRR( ...@@ -2240,7 +2240,7 @@ void ulsch_scheduler_pre_ue_select_fairRR(
uint8_t first_ue_total[MAX_NUM_CCs][20]; uint8_t first_ue_total[MAX_NUM_CCs][20];
uint8_t first_ue_id[MAX_NUM_CCs][20]; uint8_t first_ue_id[MAX_NUM_CCs][20];
uint8_t ul_inactivity_num[MAX_NUM_CCs]; uint8_t ul_inactivity_num[MAX_NUM_CCs];
uint8_t ul_inactivity_id[MAX_NUM_CCs][20]={0}; uint8_t ul_inactivity_id[MAX_NUM_CCs][20]={{0}};
// LTE_DL_FRAME_PARMS *frame_parms; // LTE_DL_FRAME_PARMS *frame_parms;
uint8_t ulsch_ue_max_num[MAX_NUM_CCs]; uint8_t ulsch_ue_max_num[MAX_NUM_CCs];
uint16_t saved_ulsch_dci[MAX_NUM_CCs]; uint16_t saved_ulsch_dci[MAX_NUM_CCs];
......
...@@ -34,7 +34,6 @@ ...@@ -34,7 +34,6 @@
#include "NR_MAC_UE/mac_proto.h" #include "NR_MAC_UE/mac_proto.h"
#include "NR_MAC-CellGroupConfig.h" #include "NR_MAC-CellGroupConfig.h"
#include "LAYER2/NR_MAC_COMMON/nr_mac_common.h" #include "LAYER2/NR_MAC_COMMON/nr_mac_common.h"
#include "SCHED_NR/phy_frame_config_nr.h"
int set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg, int set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg,
int mu, int mu,
...@@ -326,6 +325,84 @@ void config_common_ue(NR_UE_MAC_INST_t *mac, ...@@ -326,6 +325,84 @@ void config_common_ue(NR_UE_MAC_INST_t *mac,
} }
/** \brief This function is relavant for the UE procedures for control. It loads the search spaces, the BWPs and the CORESETs into the MAC instance and
\brief performs assert checks on the relevant RRC configuration.
@param NR_UE_MAC_INST_t mac: pointer to local MAC instance
@returns void
*/
void config_control_ue(NR_UE_MAC_INST_t *mac){
uint8_t bwp_id = 1, coreset_id = 1, ss_id;
NR_ServingCellConfig_t *scd = mac->scg->spCellConfig->spCellConfigDedicated;
AssertFatal(scd->downlinkBWP_ToAddModList != NULL, "downlinkBWP_ToAddModList is null\n");
AssertFatal(scd->downlinkBWP_ToAddModList->list.count == 1, "downlinkBWP_ToAddModList->list->count is %d\n", scd->downlinkBWP_ToAddModList->list.count);
NR_BWP_DownlinkCommon_t *bwp_Common = scd->downlinkBWP_ToAddModList->list.array[bwp_id - 1]->bwp_Common;
AssertFatal(bwp_Common != NULL, "bwp_Common is null\n");
NR_BWP_DownlinkDedicated_t *dl_bwp_Dedicated = scd->downlinkBWP_ToAddModList->list.array[bwp_id - 1]->bwp_Dedicated;
AssertFatal(dl_bwp_Dedicated != NULL, "dl_bwp_Dedicated is null\n");
NR_SetupRelease_PDCCH_Config_t *pdcch_Config = dl_bwp_Dedicated->pdcch_Config;
AssertFatal(pdcch_Config != NULL, "pdcch_Config is null\n");
NR_SetupRelease_PDCCH_ConfigCommon_t *pdcch_ConfigCommon = bwp_Common->pdcch_ConfigCommon;
AssertFatal(pdcch_ConfigCommon != NULL, "pdcch_ConfigCommon is null\n");
AssertFatal(pdcch_ConfigCommon->choice.setup->ra_SearchSpace != NULL, "ra_SearchSpace must be available in DL BWP\n");
struct NR_PDCCH_ConfigCommon__commonSearchSpaceList *commonSearchSpaceList = pdcch_ConfigCommon->choice.setup->commonSearchSpaceList;
AssertFatal(commonSearchSpaceList != NULL, "commonSearchSpaceList is null\n");
AssertFatal(commonSearchSpaceList->list.count > 0, "PDCCH CSS list has 0 elements\n");
struct NR_PDCCH_Config__controlResourceSetToAddModList *controlResourceSetToAddModList = pdcch_Config->choice.setup->controlResourceSetToAddModList;
AssertFatal(controlResourceSetToAddModList != NULL, "controlResourceSetToAddModList is null\n");
AssertFatal(controlResourceSetToAddModList->list.count == 1, "controlResourceSetToAddModList->list.count=%d\n", controlResourceSetToAddModList->list.count);
AssertFatal(controlResourceSetToAddModList->list.array[0] != NULL, "coreset[0][0] is null\n");
struct NR_PDCCH_Config__searchSpacesToAddModList *searchSpacesToAddModList = pdcch_Config->choice.setup->searchSpacesToAddModList;
AssertFatal(searchSpacesToAddModList != NULL, "searchSpacesToAddModList is null\n");
AssertFatal(searchSpacesToAddModList->list.count > 0, "list of UE specifically configured Search Spaces is empty\n");
AssertFatal(searchSpacesToAddModList->list.count < FAPI_NR_MAX_SS_PER_CORESET, "too many searchpaces per coreset %d\n", searchSpacesToAddModList->list.count);
struct NR_UplinkConfig__uplinkBWP_ToAddModList *uplinkBWP_ToAddModList = scd->uplinkConfig->uplinkBWP_ToAddModList;
AssertFatal(uplinkBWP_ToAddModList != NULL, "uplinkBWP_ToAddModList is null\n");
AssertFatal(uplinkBWP_ToAddModList->list.count == 1, "uplinkBWP_ToAddModList->list->count is %d\n", uplinkBWP_ToAddModList->list.count);
// check pdcch_Config, pdcch_ConfigCommon and DL BWP
mac->DLbwp[0] = scd->downlinkBWP_ToAddModList->list.array[bwp_id - 1];
mac->coreset[bwp_id - 1][coreset_id - 1] = controlResourceSetToAddModList->list.array[0];
// Check dedicated UL BWP and pass to MAC
mac->ULbwp[0] = uplinkBWP_ToAddModList->list.array[0];
AssertFatal(mac->ULbwp[0]->bwp_Dedicated != NULL, "UL bwp_Dedicated is null\n");
// check available Search Spaces in the searchSpacesToAddModList and pass to MAC
// note: the network configures at most 10 Search Spaces per BWP per cell (including UE-specific and common Search Spaces).
for (ss_id = 0; ss_id < searchSpacesToAddModList->list.count; ss_id++) {
NR_SearchSpace_t *ss = searchSpacesToAddModList->list.array[ss_id];
AssertFatal(ss->controlResourceSetId != NULL, "ss->controlResourceSetId is null\n");
AssertFatal(ss->searchSpaceType != NULL, "ss->searchSpaceType is null\n");
AssertFatal(*ss->controlResourceSetId == mac->coreset[bwp_id - 1][coreset_id - 1]->controlResourceSetId, "ss->controlResourceSetId is unknown\n");
AssertFatal(ss->monitoringSymbolsWithinSlot != NULL, "NR_SearchSpace->monitoringSymbolsWithinSlot is null\n");
AssertFatal(ss->monitoringSymbolsWithinSlot->buf != NULL, "NR_SearchSpace->monitoringSymbolsWithinSlot->buf is null\n");
mac->SSpace[0][0][ss_id] = ss;
}
// Check available CSSs in the commonSearchSpaceList (list of additional common search spaces)
// note: commonSearchSpaceList SIZE(1..4)
for (int css_id = 0; css_id < commonSearchSpaceList->list.count; css_id++) {
NR_SearchSpace_t *css = commonSearchSpaceList->list.array[css_id];
AssertFatal(css->controlResourceSetId != NULL, "ss->controlResourceSetId is null\n");
AssertFatal(*css->controlResourceSetId == mac->coreset[bwp_id - 1][coreset_id - 1]->controlResourceSetId, "ss->controlResourceSetId is unknown\n");
AssertFatal(css->searchSpaceId != 0, "css->searchSpaceId is 0\n");
AssertFatal(css->searchSpaceType != NULL, "css->searchSpaceType is null\n");
AssertFatal(css->monitoringSymbolsWithinSlot != NULL, "css->monitoringSymbolsWithinSlot is null\n");
AssertFatal(css->monitoringSymbolsWithinSlot->buf != NULL, "css->monitoringSymbolsWithinSlot->buf is null\n");
mac->SSpace[0][0][ss_id] = css;
ss_id++;
}
}
int nr_rrc_mac_config_req_ue( int nr_rrc_mac_config_req_ue(
module_id_t module_id, module_id_t module_id,
int cc_idP, int cc_idP,
...@@ -338,16 +415,16 @@ int nr_rrc_mac_config_req_ue( ...@@ -338,16 +415,16 @@ int nr_rrc_mac_config_req_ue(
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
// NR_ServingCellConfig_t *serving_cell_config = spcell_configP->spCellConfigDedicated;
// TODO do something FAPI-like P5 L1/L2 config interface in config_si, config_mib, etc. // TODO do something FAPI-like P5 L1/L2 config interface in config_si, config_mib, etc.
if(mibP != NULL){ if(mibP != NULL){
mac->mib = mibP; // update by every reception mac->mib = mibP; // update by every reception
} }
if(cell_group_config != NULL ){ if(cell_group_config != NULL ){
mac->scg = cell_group_config;
mac->servCellIndex = *cell_group_config->spCellConfig->servCellIndex; mac->servCellIndex = *cell_group_config->spCellConfig->servCellIndex;
config_control_ue(mac);
if (cell_group_config->spCellConfig->reconfigurationWithSync) { if (cell_group_config->spCellConfig->reconfigurationWithSync) {
mac->rach_ConfigDedicated = cell_group_config->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink; mac->rach_ConfigDedicated = cell_group_config->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink;
mac->scc = cell_group_config->spCellConfig->reconfigurationWithSync->spCellConfigCommon; mac->scc = cell_group_config->spCellConfig->reconfigurationWithSync->spCellConfigCommon;
...@@ -355,7 +432,6 @@ int nr_rrc_mac_config_req_ue( ...@@ -355,7 +432,6 @@ int nr_rrc_mac_config_req_ue(
mac->crnti = cell_group_config->spCellConfig->reconfigurationWithSync->newUE_Identity; mac->crnti = cell_group_config->spCellConfig->reconfigurationWithSync->newUE_Identity;
LOG_I(MAC,"Configuring CRNTI %x\n",mac->crnti); LOG_I(MAC,"Configuring CRNTI %x\n",mac->crnti);
} }
mac->scg = cell_group_config;
/* /*
if(mac_cell_group_configP != NULL){ if(mac_cell_group_configP != NULL){
......
...@@ -178,7 +178,6 @@ typedef struct { ...@@ -178,7 +178,6 @@ typedef struct {
SFN_C_TYPE type0_pdcch_ss_sfn_c; SFN_C_TYPE type0_pdcch_ss_sfn_c;
uint32_t type0_pdcch_ss_n_c; uint32_t type0_pdcch_ss_n_c;
uint32_t type0_pdcch_consecutive_slots; uint32_t type0_pdcch_consecutive_slots;
int rnti_type;
/* PDUs */ /* PDUs */
/// Outgoing CCCH pdu for PHY /// Outgoing CCCH pdu for PHY
...@@ -222,11 +221,6 @@ typedef struct { ...@@ -222,11 +221,6 @@ typedef struct {
uint32_t RA_tx_frame; uint32_t RA_tx_frame;
/// Random-access variable for window calculation (subframe of last change in window counter) /// Random-access variable for window calculation (subframe of last change in window counter)
uint8_t RA_tx_subframe; uint8_t RA_tx_subframe;
/// Scheduled RX frame for RA Msg2
uint16_t msg2_rx_frame;
/// Scheduled RX slot for RA Msg2
uint16_t msg2_rx_slot;
/// Random-access Group B maximum path-loss
/// Random-access variable for backoff (frame of last change in backoff counter) /// Random-access variable for backoff (frame of last change in backoff counter)
uint32_t RA_backoff_frame; uint32_t RA_backoff_frame;
/// Random-access variable for backoff (subframe of last change in backoff counter) /// Random-access variable for backoff (subframe of last change in backoff counter)
......
...@@ -62,9 +62,8 @@ ...@@ -62,9 +62,8 @@
#include "NR_MAC_COMMON/nr_mac.h" #include "NR_MAC_COMMON/nr_mac.h"
#include "LAYER2/NR_MAC_UE/mac_proto.h" #include "LAYER2/NR_MAC_UE/mac_proto.h"
extern int64_t table_6_3_3_2_2_prachConfig_Index [256][9];
extern int64_t table_6_3_3_2_3_prachConfig_Index [256][9]; extern int64_t table_6_3_3_2_3_prachConfig_Index [256][9];
extern const uint16_t nr_slots_per_frame[5]; extern const uint8_t nr_slots_per_frame[5];
//extern uint8_t nfapi_mode; //extern uint8_t nfapi_mode;
...@@ -364,7 +363,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources, ...@@ -364,7 +363,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
AssertFatal(CC_id == 0,"Transmission on secondary CCs is not supported yet\n"); AssertFatal(CC_id == 0,"Transmission on secondary CCs is not supported yet\n");
if (UE_mode == PRACH && prach_resources->init_msg1) { if (UE_mode < PUSCH && prach_resources->init_msg1) {
LOG_D(MAC, "nr_ue_get_rach, RA_active value: %d", mac->RA_active); LOG_D(MAC, "nr_ue_get_rach, RA_active value: %d", mac->RA_active);
...@@ -449,7 +448,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources, ...@@ -449,7 +448,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
nr_get_RA_window(mac); nr_get_RA_window(mac);
// Fill in preamble and PRACH resources // Fill in preamble and PRACH resources
if (mac->generate_nr_prach) if (mac->generate_nr_prach == 1)
nr_get_prach_resources(mod_id, CC_id, gNB_id, nr_tti_tx, 1, prach_resources, rach_ConfigDedicated); nr_get_prach_resources(mod_id, CC_id, gNB_id, nr_tti_tx, 1, prach_resources, rach_ConfigDedicated);
offset = nr_generate_ulsch_pdu((uint8_t *) mac_sdus, // sdus buffer offset = nr_generate_ulsch_pdu((uint8_t *) mac_sdus, // sdus buffer
...@@ -471,7 +470,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources, ...@@ -471,7 +470,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
payload[offset + j] = 0; // mac_pdu[offset + j] = 0; payload[offset + j] = 0; // mac_pdu[offset + j] = 0;
} }
} }
} else { // RACH is active } else if (mac->RA_window_cnt != -1) { // RACH is active
//////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////
/////* Random Access Response reception (5.1.4 TS 38.321) *///// /////* Random Access Response reception (5.1.4 TS 38.321) */////
...@@ -482,7 +481,6 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources, ...@@ -482,7 +481,6 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
// - handle beam failure recovery request // - handle beam failure recovery request
// - handle DL assignment on PDCCH for RA-RNTI // - handle DL assignment on PDCCH for RA-RNTI
// - handle backoff and raResponseWindow params // - handle backoff and raResponseWindow params
// - disabled contention resolution as OAI NSA is contention-free based
// LOG_D(MAC, "[MAC][UE %d][RAPROC] frame %d, subframe %d: RA Active, window cnt %d (RA_tx_frame %d, RA_tx_subframe %d)\n", // LOG_D(MAC, "[MAC][UE %d][RAPROC] frame %d, subframe %d: RA Active, window cnt %d (RA_tx_frame %d, RA_tx_subframe %d)\n",
// mod_id, frame, nr_tti_tx, mac->RA_window_cnt, mac->RA_tx_frame, mac->RA_tx_subframe); // mod_id, frame, nr_tti_tx, mac->RA_window_cnt, mac->RA_tx_frame, mac->RA_tx_subframe);
...@@ -495,12 +493,13 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources, ...@@ -495,12 +493,13 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
if (mac->RA_window_cnt >= 0 && mac->RA_RAPID_found == 1) { if (mac->RA_window_cnt >= 0 && mac->RA_RAPID_found == 1) {
// mac->ra_state = WAIT_CONTENTION_RESOLUTION; mac->RA_window_cnt = -1;
LOG_I(MAC, "[MAC][UE %d][RAPROC] Frame %d: subframe %d: RAR successfully received \n", mod_id, frame, nr_tti_tx); mac->ra_state = RA_SUCCEEDED;
LOG_I(MAC, "[MAC][UE %d][RAPROC] Frame %d: nr_tti_tx %d: RAR successfully received \n", mod_id, frame, nr_tti_tx);
} else if (mac->RA_window_cnt == 0 && !mac->RA_RAPID_found) { } else if (mac->RA_window_cnt == 0 && !mac->RA_RAPID_found) {
LOG_I(MAC, "[MAC][UE %d][RAPROC] Frame %d: subframe %d: RAR reception failed \n", mod_id, frame, nr_tti_tx); LOG_I(MAC, "[MAC][UE %d][RAPROC] Frame %d: nr_tti_tx %d: RAR reception failed \n", mod_id, frame, nr_tti_tx);
mac->ra_state = RA_UE_IDLE; mac->ra_state = RA_UE_IDLE;
mac->RA_PREAMBLE_TRANSMISSION_COUNTER++; mac->RA_PREAMBLE_TRANSMISSION_COUNTER++;
...@@ -572,21 +571,21 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources, ...@@ -572,21 +571,21 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
// mac->RA_tx_subframe = nr_tti_tx; // mac->RA_tx_subframe = nr_tti_tx;
// Fill in preamble and PRACH resources // Fill in preamble and PRACH resources
if (mac->generate_nr_prach) if (mac->generate_nr_prach == 1)
nr_get_prach_resources(mod_id, CC_id, gNB_id, nr_tti_tx, 0, prach_resources, rach_ConfigDedicated); nr_get_prach_resources(mod_id, CC_id, gNB_id, nr_tti_tx, 0, prach_resources, rach_ConfigDedicated);
} else { } else {
mac->RA_window_cnt--; mac->RA_window_cnt--;
LOG_I(MAC, "[MAC][UE %d][RAPROC] Frame %d: subframe %d: RAR reception not successful, (RA window count %d) \n", LOG_I(MAC, "[MAC][UE %d][RAPROC] Frame %d: nr_tti_tx %d: RAR reception not successful, (RA window count %d) \n",
mod_id, mod_id,
frame, frame,
nr_tti_tx, nr_tti_tx,
mac->RA_window_cnt); mac->RA_window_cnt);
// Fill in preamble and PRACH resources // Fill in preamble and PRACH resources
if (mac->generate_nr_prach) if (mac->generate_nr_prach == 1)
nr_get_prach_resources(mod_id, CC_id, gNB_id, nr_tti_tx, 0, prach_resources, rach_ConfigDedicated); nr_get_prach_resources(mod_id, CC_id, gNB_id, nr_tti_tx, 0, prach_resources, rach_ConfigDedicated);
} }
...@@ -616,28 +615,28 @@ void nr_get_RA_window(NR_UE_MAC_INST_t *mac){ ...@@ -616,28 +615,28 @@ void nr_get_RA_window(NR_UE_MAC_INST_t *mac){
mac->RA_window_cnt = mac->RA_offset*nr_slots_per_frame[mu]; // taking into account the 2 frames gap introduced by OAI gNB mac->RA_window_cnt = mac->RA_offset*nr_slots_per_frame[mu]; // taking into account the 2 frames gap introduced by OAI gNB
switch (ra_ResponseWindow) { switch (ra_ResponseWindow) {
case 0: case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl1:
mac->RA_window_cnt += 1; mac->RA_window_cnt += 1;
break; break;
case 1: case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl2:
mac->RA_window_cnt += 2; mac->RA_window_cnt += 2;
break; break;
case 2: case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl4:
mac->RA_window_cnt += 4; mac->RA_window_cnt += 4;
break; break;
case 3: case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl8:
mac->RA_window_cnt += 8; mac->RA_window_cnt += 8;
break; break;
case 4: case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl10:
mac->RA_window_cnt += 10; mac->RA_window_cnt += 10;
break; break;
case 5: case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl20:
mac->RA_window_cnt += 20; mac->RA_window_cnt += 20;
break; break;
case 6: case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl40:
mac->RA_window_cnt += 40; mac->RA_window_cnt += 40;
break; break;
case 7: case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl80:
mac->RA_window_cnt += 80; mac->RA_window_cnt += 80;
break; break;
} }
......
...@@ -46,6 +46,8 @@ ...@@ -46,6 +46,8 @@
#endif #endif
#define LOG_DCI_PARM(a...) LOG_D(PHY,"\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci)" a) #define LOG_DCI_PARM(a...) LOG_D(PHY,"\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci)" a)
// #define DEBUG_DCI
dci_pdu_rel15_t *def_dci_pdu_rel15; dci_pdu_rel15_t *def_dci_pdu_rel15;
void fill_dci_search_candidates(NR_SearchSpace_t *ss,fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15) { void fill_dci_search_candidates(NR_SearchSpace_t *ss,fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15) {
...@@ -62,124 +64,27 @@ void fill_dci_search_candidates(NR_SearchSpace_t *ss,fapi_nr_dl_config_dci_dl_pd ...@@ -62,124 +64,27 @@ void fill_dci_search_candidates(NR_SearchSpace_t *ss,fapi_nr_dl_config_dci_dl_pd
} }
void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl_config, frame_t frame, int slot) { void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15, fapi_nr_dl_config_request_t *dl_config, int rnti_type, int ss_id, uint8_t dci_format){
def_dci_pdu_rel15 = calloc(1,sizeof(dci_pdu_rel15_t));
NR_BWP_Downlink_t *bwp;
NR_BWP_DownlinkCommon_t *bwp_Common;
NR_BWP_DownlinkDedicated_t *dl_bwp_Dedicated;
NR_SetupRelease_PDCCH_Config_t *pdcch_Config;
NR_SetupRelease_PDCCH_ConfigCommon_t *pdcch_ConfigCommon;
struct NR_PDCCH_Config__controlResourceSetToAddModList *controlResourceSetToAddModList;
struct NR_PDCCH_Config__searchSpacesToAddModList *searchSpacesToAddModList;
struct NR_UplinkConfig__uplinkBWP_ToAddModList *uplinkBWP_ToAddModList;
NR_SearchSpace_t *NR_SearchSpace;
NR_ControlResourceSet_t *coreset;
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15;
NR_ServingCellConfig_t *scd = mac->scg->spCellConfig->spCellConfigDedicated;
uint8_t bwp_id = 1;
int ss_id, sps;
// get PDCCH configuration(s) (Coreset, SearchSpace, etc...) from BWP Dedicated in serving cell config dedicated (scd)
// get BWP 1, Coreset ID 0, SearchSpace ID 0 (i.e. configured in MIB and in ServingCellConfigCommon)
// Check dedicated DL BWP
if (mac->DLbwp[0] == NULL) {
NR_SearchSpace_t *ss;
int ss_id = 0;
AssertFatal(scd->downlinkBWP_ToAddModList != NULL, "downlinkBWP_ToAddModList is null\n");
AssertFatal(scd->downlinkBWP_ToAddModList->list.count == 1, "downlinkBWP_ToAddModList->list->count is %d\n", scd->downlinkBWP_ToAddModList->list.count);
mac->DLbwp[0] = scd->downlinkBWP_ToAddModList->list.array[bwp_id - 1];
dl_bwp_Dedicated = mac->DLbwp[0]->bwp_Dedicated;
AssertFatal(dl_bwp_Dedicated != NULL, "dl_bwp_Dedicated is null\n");
bwp_Common = mac->DLbwp[0]->bwp_Common;
AssertFatal(bwp_Common != NULL, "bwp_Common is null\n");
pdcch_Config = dl_bwp_Dedicated->pdcch_Config;
AssertFatal(pdcch_Config != NULL, "pdcch_Config is null\n");
pdcch_ConfigCommon = bwp_Common->pdcch_ConfigCommon;
AssertFatal(pdcch_ConfigCommon != NULL, "pdcch_ConfigCommon is null\n");
AssertFatal(pdcch_ConfigCommon->choice.setup->ra_SearchSpace != NULL, "ra_SearchSpace must be available in DL BWP\n");
controlResourceSetToAddModList = pdcch_Config->choice.setup->controlResourceSetToAddModList;
AssertFatal(controlResourceSetToAddModList != NULL, "controlResourceSetToAddModList is null\n");
AssertFatal(controlResourceSetToAddModList->list.count == 1, "controlResourceSetToAddModList->list.count=%d\n", controlResourceSetToAddModList->list.count);
mac->coreset[0][0] = controlResourceSetToAddModList->list.array[0];
coreset = mac->coreset[0][0];
AssertFatal(coreset != NULL, "coreset[0][0] is null\n");
searchSpacesToAddModList = pdcch_Config->choice.setup->searchSpacesToAddModList;
AssertFatal(searchSpacesToAddModList != NULL, "searchSpacesToAddModList is null\n");
AssertFatal(searchSpacesToAddModList->list.count > 0, "searchSpacesToAddModList is empty\n");
AssertFatal(searchSpacesToAddModList->list.count < FAPI_NR_MAX_SS_PER_CORESET, "too many searchpaces per coreset %d\n", searchSpacesToAddModList->list.count);
for (int i = 0; i < searchSpacesToAddModList->list.count; i++) {
ss = searchSpacesToAddModList->list.array[i];
AssertFatal(ss->controlResourceSetId != NULL, "ss->controlResourceSetId is null\n");
AssertFatal(ss->searchSpaceType != NULL, "ss->searchSpaceType is null\n");
AssertFatal(*ss->controlResourceSetId == coreset->controlResourceSetId, "ss->controlResourceSetId is unknown\n");
mac->SSpace[0][0][ss_id] = ss;
ss_id++;
}
}
// Check dedicated UL BWP
if (mac->ULbwp[0] == NULL) {
uplinkBWP_ToAddModList = scd->uplinkConfig->uplinkBWP_ToAddModList;
AssertFatal(uplinkBWP_ToAddModList != NULL, "uplinkBWP_ToAddModList is null\n");
AssertFatal(uplinkBWP_ToAddModList->list.count == 1, "uplinkBWP_ToAddModList->list->count is %d\n", uplinkBWP_ToAddModList->list.count);
mac->ULbwp[0] = uplinkBWP_ToAddModList->list.array[bwp_id - 1];
AssertFatal(mac->ULbwp[0]->bwp_Dedicated != NULL, "UL bwp_Dedicated is null\n");
}
bwp = mac->DLbwp[0];
bwp_Common = bwp->bwp_Common;
pdcch_ConfigCommon = bwp_Common->pdcch_ConfigCommon;
dl_bwp_Dedicated = bwp->bwp_Dedicated;
pdcch_Config = dl_bwp_Dedicated->pdcch_Config;
searchSpacesToAddModList = pdcch_Config->choice.setup->searchSpacesToAddModList;
// check USSs
ss_id = 0;
NR_SearchSpace = mac->SSpace[0][0][ss_id];
while(NR_SearchSpace != NULL && ss_id < searchSpacesToAddModList->list.count) {
AssertFatal(NR_SearchSpace->monitoringSymbolsWithinSlot != NULL, "NR_SearchSpace->monitoringSymbolsWithinSlot is null\n");
AssertFatal(NR_SearchSpace->monitoringSymbolsWithinSlot->buf != NULL, "NR_SearchSpace->monitoringSymbolsWithinSlot->buf is null\n");
ss_id++;
}
if (mac->crnti > 0) {
NR_SearchSpace_t *css;
NR_SearchSpace_t *uss = NULL;
NR_ServingCellConfigCommon_t *scc;
NR_SearchSpaceId_t ra_SearchSpaceId;
rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15;
uint16_t monitoringSymbolsWithinSlot; uint16_t monitoringSymbolsWithinSlot;
uint8_t add_dci = 1; uint8_t bwp_id = 1, coreset_id = 1;
int sps;
def_dci_pdu_rel15 = calloc(1,sizeof(dci_pdu_rel15_t));
AssertFatal(mac->scc != NULL, "scc is null\n"); AssertFatal(mac->scc != NULL, "scc is null\n");
NR_ServingCellConfigCommon_t *scc = mac->scc;
NR_BWP_DownlinkCommon_t *bwp_Common = mac->DLbwp[bwp_id - 1]->bwp_Common;
NR_BWP_DownlinkCommon_t *initialDownlinkBWP = scc->downlinkConfigCommon->initialDownlinkBWP;
NR_SearchSpace_t *ss = mac->SSpace[bwp_id - 1][coreset_id - 1][ss_id];
scc = mac->scc; // DCI format configuration
rel15->dci_format = NR_DL_DCI_FORMAT_1_1; rel15->dci_format = dci_format;
// CoReSet configuration // CORESET configuration
coreset = mac->coreset[0][0]; NR_ControlResourceSet_t *coreset = mac->coreset[bwp_id - 1][coreset_id - 1];
rel15->coreset.duration = coreset->duration; rel15->coreset.duration = coreset->duration;
for (int i = 0; i < 6; i++) for (int i = 0; i < 6; i++)
rel15->coreset.frequency_domain_resource[i] = coreset->frequencyDomainResources.buf[i]; rel15->coreset.frequency_domain_resource[i] = coreset->frequencyDomainResources.buf[i];
rel15->coreset.CceRegMappingType = coreset->cce_REG_MappingType.present == NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved ? FAPI_NR_CCE_REG_MAPPING_TYPE_INTERLEAVED : FAPI_NR_CCE_REG_MAPPING_TYPE_NON_INTERLEAVED; rel15->coreset.CceRegMappingType = coreset->cce_REG_MappingType.present == NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved ? FAPI_NR_CCE_REG_MAPPING_TYPE_INTERLEAVED : FAPI_NR_CCE_REG_MAPPING_TYPE_NON_INTERLEAVED;
if (rel15->coreset.CceRegMappingType == FAPI_NR_CCE_REG_MAPPING_TYPE_INTERLEAVED) { if (rel15->coreset.CceRegMappingType == FAPI_NR_CCE_REG_MAPPING_TYPE_INTERLEAVED) {
struct NR_ControlResourceSet__cce_REG_MappingType__interleaved *interleaved = coreset->cce_REG_MappingType.choice.interleaved; struct NR_ControlResourceSet__cce_REG_MappingType__interleaved *interleaved = coreset->cce_REG_MappingType.choice.interleaved;
rel15->coreset.RegBundleSize = (interleaved->reg_BundleSize == NR_ControlResourceSet__cce_REG_MappingType__interleaved__reg_BundleSize_n6) ? 6 : (2 + interleaved->reg_BundleSize); rel15->coreset.RegBundleSize = (interleaved->reg_BundleSize == NR_ControlResourceSet__cce_REG_MappingType__interleaved__reg_BundleSize_n6) ? 6 : (2 + interleaved->reg_BundleSize);
...@@ -191,88 +96,229 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl ...@@ -191,88 +96,229 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
rel15->coreset.InterleaverSize = 0; rel15->coreset.InterleaverSize = 0;
rel15->coreset.ShiftIndex = 0; rel15->coreset.ShiftIndex = 0;
} }
rel15->coreset.CoreSetType = 1; rel15->coreset.CoreSetType = 1;
rel15->coreset.precoder_granularity = coreset->precoderGranularity; rel15->coreset.precoder_granularity = coreset->precoderGranularity;
if (mac->ra_state == WAIT_RAR){ // Scrambling RNTI
if (coreset->pdcch_DMRS_ScramblingID) {
NR_BWP_DownlinkCommon_t *initialDownlinkBWP = scc->downlinkConfigCommon->initialDownlinkBWP; rel15->coreset.pdcch_dmrs_scrambling_id = *coreset->pdcch_DMRS_ScramblingID;
struct NR_PDCCH_ConfigCommon__commonSearchSpaceList *commonSearchSpaceList = pdcch_ConfigCommon->choice.setup->commonSearchSpaceList; rel15->coreset.scrambling_rnti = mac->t_crnti;
AssertFatal(commonSearchSpaceList->list.count > 0, "PDCCH CSS list has 0 elements\n"); } else {
rel15->coreset.pdcch_dmrs_scrambling_id = *scc->physCellId;
ra_SearchSpaceId = *pdcch_ConfigCommon->choice.setup->ra_SearchSpace; rel15->coreset.scrambling_rnti = 0;
// fetch the CSS for RA from the CSS list
for (int i = 0; i < commonSearchSpaceList->list.count; i++) {
css = commonSearchSpaceList->list.array[i];
if(css->searchSpaceId == ra_SearchSpaceId)
break;
} }
// check CSSs #ifdef DEBUG_DCI
if(css != NULL) { LOG_D(MAC, "[DCI_CONFIG] Configure DCI PDU: ss_id %d bwp %p bwp_Id %d controlResourceSetId %d\n", ss_id, mac->DLbwp[bwp_id - 1], mac->DLbwp[bwp_id - 1]->bwp_Id, coreset->controlResourceSetId);
AssertFatal(css->monitoringSymbolsWithinSlot != NULL, "css->monitoringSymbolsWithinSlot is null\n"); #endif
AssertFatal(css->monitoringSymbolsWithinSlot->buf != NULL, "css->monitoringSymbolsWithinSlot->buf is null\n");
}
if (frame == mac->msg2_rx_frame && slot == mac->msg2_rx_slot){ // loop over RNTI type and configure resource allocation for DCI
switch(rnti_type) {
case NR_RNTI_C:
// we use DL BWP dedicated
sps = bwp_Common->genericParameters.cyclicPrefix == NULL ? 14 : 12;
// for SPS=14 8 MSBs in positions 13 down to 6
monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
rel15->rnti = mac->crnti;
rel15->BWPSize = NRRIV2BW(bwp_Common->genericParameters.locationAndBandwidth, 275);
rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, 275);
rel15->SubcarrierSpacing = bwp_Common->genericParameters.subcarrierSpacing;
rel15->dci_length = nr_dci_size(scc, mac->scg, def_dci_pdu_rel15, rel15->dci_format, NR_RNTI_C, rel15->BWPSize, bwp_id);
break;
case NR_RNTI_RA:
// we use the initial DL BWP
sps = initialDownlinkBWP->genericParameters.cyclicPrefix == NULL ? 14 : 12; sps = initialDownlinkBWP->genericParameters.cyclicPrefix == NULL ? 14 : 12;
monitoringSymbolsWithinSlot = (css->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (css->monitoringSymbolsWithinSlot->buf[1]>>(16-sps)); monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
rel15->rnti = mac->ra_rnti; rel15->rnti = mac->ra_rnti;
rel15->BWPSize = NRRIV2BW(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275); rel15->BWPSize = NRRIV2BW(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, 275); // NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275); rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, 275); //NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
rel15->SubcarrierSpacing = initialDownlinkBWP->genericParameters.subcarrierSpacing; rel15->SubcarrierSpacing = initialDownlinkBWP->genericParameters.subcarrierSpacing;
rel15->dci_length = nr_dci_size(scc,mac->scg,def_dci_pdu_rel15,rel15->dci_format,NR_RNTI_C,rel15->BWPSize,bwp_id); rel15->dci_length = nr_dci_size(scc, mac->scg, def_dci_pdu_rel15, rel15->dci_format, NR_RNTI_RA, rel15->BWPSize, bwp_id);
for (int i = 0; i < sps; i++) break;
case NR_RNTI_P:
break;
case NR_RNTI_CS:
break;
case NR_RNTI_TC:
break;
case NR_RNTI_SP_CSI:
break;
case NR_RNTI_SI:
break;
case NR_RNTI_SFI:
break;
case NR_RNTI_INT:
break;
case NR_RNTI_TPC_PUSCH:
break;
case NR_RNTI_TPC_PUCCH:
break;
case NR_RNTI_TPC_SRS:
break;
default:
break;
}
for (int i = 0; i < sps; i++) {
if ((monitoringSymbolsWithinSlot >> (sps - 1 - i)) & 1) { if ((monitoringSymbolsWithinSlot >> (sps - 1 - i)) & 1) {
rel15->coreset.StartSymbolIndex = i; rel15->coreset.StartSymbolIndex = i;
break; break;
} }
fill_dci_search_candidates(css, rel15);
} else {
add_dci = 0;
} }
} else if (mac->ra_state == WAIT_CONTENTION_RESOLUTION){ #ifdef DEBUG_DCI
LOG_D(MAC, "[DCI_CONFIG] Configure DCI PDU: rnti_type %d BWPSize %d BWPStart %d rel15->SubcarrierSpacing %d rel15->dci_format %d rel15->dci_length %d sps %d monitoringSymbolsWithinSlot %d \n",
rel15->rnti = mac->t_crnti; rnti_type,
rel15->BWPSize,
rel15->BWPStart,
rel15->SubcarrierSpacing,
rel15->dci_format,
rel15->dci_length,
sps,
monitoringSymbolsWithinSlot);
#endif
// add DCI
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI;
dl_config->number_pdus = dl_config->number_pdus + 1;
}
} else { void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl_config, frame_t frame, int slot) {
rel15->rnti = mac->crnti; int ss_id;
rel15->BWPSize = NRRIV2BW(bwp_Common->genericParameters.locationAndBandwidth, 275); uint8_t bwp_id = 1, coreset_id = 1;
rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, 275); NR_ServingCellConfig_t *scd = mac->scg->spCellConfig->spCellConfigDedicated;
rel15->SubcarrierSpacing = bwp_Common->genericParameters.subcarrierSpacing; NR_BWP_Downlink_t *bwp = mac->DLbwp[bwp_id - 1];
rel15->dci_length = nr_dci_size(scc,mac->scg,def_dci_pdu_rel15,rel15->dci_format,NR_RNTI_C,rel15->BWPSize,bwp_id);
// get UE-specific search space #ifdef DEBUG_DCI
for (ss_id = 0; ss_id < FAPI_NR_MAX_SS_PER_CORESET && mac->SSpace[0][0][ss_id] != NULL; ss_id++){ LOG_D(MAC, "[DCI_CONFIG] ra_rnti %p (%x) crnti %p (%x) t_crnti %p (%x)\n", &mac->ra_rnti, mac->ra_rnti, &mac->crnti, mac->crnti, &mac->t_crnti, mac->t_crnti);
uss = mac->SSpace[0][0][ss_id]; #endif
if (uss->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_ue_Specific) break;
// loop over all available SS for BWP ID 1, CORESET ID 1
for (ss_id = 0; ss_id < FAPI_NR_MAX_SS_PER_CORESET && mac->SSpace[bwp_id - 1][coreset_id - 1][ss_id] != NULL; ss_id++){
NR_SearchSpace_t *ss = mac->SSpace[bwp_id - 1][coreset_id - 1][ss_id];
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15;
NR_BWP_DownlinkCommon_t *bwp_Common = bwp->bwp_Common;
NR_SetupRelease_PDCCH_ConfigCommon_t *pdcch_ConfigCommon = bwp_Common->pdcch_ConfigCommon;
struct NR_PhysicalCellGroupConfig *phy_cgc = mac->scg->physicalCellGroupConfig;
switch (ss->searchSpaceType->present){
case NR_SearchSpace__searchSpaceType_PR_common:
// this is for CSSs, we use BWP common and pdcch_ConfigCommon
// Fetch configuration for searchSpaceZero
// note: The search space with the SearchSpaceId = 0 identifies the search space configured via PBCH (MIB) and in ServingCellConfigCommon (searchSpaceZero).
if (pdcch_ConfigCommon->choice.setup->searchSpaceZero){
LOG_D(MAC, "[DCI_CONFIG] Configure SearchSpace#0 of the initial BWP\n");
LOG_W(MAC, "[DCI_CONFIG] This should not be available yet...");
} }
AssertFatal(ss_id < FAPI_NR_MAX_SS_PER_CORESET, "couldn't find a UE-specific SS\n"); if (ss->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0){
sps = bwp_Common->genericParameters.cyclicPrefix == NULL ? 14 : 12; // check available SS IDs
// for SPS=14 8 MSBs in positions 13 down to 6 if (pdcch_ConfigCommon->choice.setup->ra_SearchSpace){
monitoringSymbolsWithinSlot = (uss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (uss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps)); if (ss->searchSpaceId == *pdcch_ConfigCommon->choice.setup->ra_SearchSpace){
for (int i = 0; i < sps; i++) LOG_D(MAC, "[DCI_CONFIG] Configure monitoring of PDCCH candidates in Type1-PDCCH common random access search space\n");
if ((monitoringSymbolsWithinSlot >> (sps - 1 - i)) & 1) { switch(mac->ra_state){
rel15->coreset.StartSymbolIndex = i; case WAIT_RAR:
config_dci_pdu(mac, rel15, dl_config, NR_RNTI_RA, ss_id, NR_DL_DCI_FORMAT_1_0);
fill_dci_search_candidates(ss, rel15);
break;
case WAIT_CONTENTION_RESOLUTION:
rel15->rnti = mac->t_crnti;
break;
default:
break; break;
} }
fill_dci_search_candidates(uss, rel15);
} }
}
// Scrambling RNTI if (pdcch_ConfigCommon->choice.setup->searchSpaceSIB1){
if (coreset->pdcch_DMRS_ScramblingID) { if (ss->searchSpaceId == *pdcch_ConfigCommon->choice.setup->searchSpaceSIB1){
rel15->coreset.pdcch_dmrs_scrambling_id = *coreset->pdcch_DMRS_ScramblingID; // Configure monitoring of PDCCH candidates in Type0-PDCCH common search space on the MCG
rel15->coreset.scrambling_rnti = mac->t_crnti; LOG_W(MAC, "[DCI_CONFIG] This seach space should not be configured yet...");
} else { }
rel15->coreset.pdcch_dmrs_scrambling_id = *scc->physCellId; }
rel15->coreset.scrambling_rnti = 0; if (pdcch_ConfigCommon->choice.setup->searchSpaceOtherSystemInformation){
if (ss->searchSpaceId == *pdcch_ConfigCommon->choice.setup->searchSpaceOtherSystemInformation){
// Configure monitoring of PDCCH candidates in Type0-PDCCH common search space on the MCG
LOG_W(MAC, "[DCI_CONFIG] This seach space should not be configured yet...");
}
}
if (pdcch_ConfigCommon->choice.setup->pagingSearchSpace){
if (ss->searchSpaceId == *pdcch_ConfigCommon->choice.setup->pagingSearchSpace){
// Configure monitoring of PDCCH candidates in Type2-PDCCH common search space on the MCG
LOG_W(MAC, "[DCI_CONFIG] This seach space should not be configured yet...");
}
}
if (phy_cgc){
if (phy_cgc->cs_RNTI){
LOG_D(MAC, "[DCI_CONFIG] Configure monitoring of PDCCH candidates in Type3-PDCCH common search space for dci_Format0_0_AndFormat1_0 with CRC scrambled by CS-RNTI...\n");
LOG_W(MAC, "[DCI_CONFIG] This RNTI should not be configured yet...");
}
if (phy_cgc->ext1){
if (phy_cgc->ext1->mcs_C_RNTI){
LOG_D(MAC, "[DCI_CONFIG] Configure monitoring of PDCCH candidates in user specific search space for dci_Format0_0_AndFormat1_0 with CRC scrambled by MCS-C-RNTI...\n");
LOG_W(MAC, "[DCI_CONFIG] This RNTI should not be configured yet...");
}
}
}
} // end DCI 00 and 01
// DCI 2_0
if (ss->searchSpaceType->choice.common->dci_Format2_0){
LOG_D(MAC, "[DCI_CONFIG] Configure monitoring of PDCCH candidates in Type3-PDCCH common search space for DCI format 2_0 with CRC scrambled by SFI-RNTI \n");
LOG_W(MAC, "[DCI_CONFIG] This format should not be configured yet...");
}
// DCI 2_1
if (ss->searchSpaceType->choice.common->dci_Format2_1){
LOG_D(MAC, "[DCI_CONFIG] Configure monitoring of PDCCH candidates in Type3-PDCCH common search space for DCI format 2_1 with CRC scrambled by INT-RNTI \n");
LOG_W(MAC, "[DCI_CONFIG] This format should not be configured yet...");
}
// DCI 2_2
if (ss->searchSpaceType->choice.common->dci_Format2_2){
LOG_D(MAC, "[DCI_CONFIG] Configure monitoring of PDCCH candidates in Type3-PDCCH common search space for DCI format 2_2 with CRC scrambled by TPC-RNTI \n");
LOG_W(MAC, "[DCI_CONFIG] This format should not be configured yet...");
}
// DCI 2_3
if (ss->searchSpaceType->choice.common->dci_Format2_3){
LOG_D(MAC, "[DCI_CONFIG] Configure monitoring of PDCCH candidates in Type3-PDCCH common search space for DCI format 2_3 with CRC scrambled by TPC-SRS-RNTI \n");
LOG_W(MAC, "[DCI_CONFIG] This format should not be configured yet...");
} }
if (add_dci){ break;
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI; case NR_SearchSpace__searchSpaceType_PR_ue_Specific:
dl_config->number_pdus = dl_config->number_pdus + 1; // this is an USS
if (ss->searchSpaceType->choice.ue_Specific){
if(ss->searchSpaceType->choice.ue_Specific->dci_Formats == NR_SearchSpace__searchSpaceType__ue_Specific__dci_Formats_formats0_1_And_1_1){
// Monitors DCI 01 and 11 scrambled with C-RNTI, or CS-RNTI(s), or SP-CSI-RNTI
if (get_softmodem_params()->phy_test == 1 && mac->crnti > 0) {
LOG_D(MAC, "[DCI_CONFIG] Configure monitoring of PDCCH candidates in the user specific search space\n");
config_dci_pdu(mac, rel15, dl_config, NR_RNTI_C, ss_id, NR_DL_DCI_FORMAT_1_1);
fill_dci_search_candidates(ss, rel15);
#ifdef DEBUG_DCI
LOG_D(MAC, "[DCI_CONFIG] ss %d ue_Specific %p searchSpaceType->present %d dci_Formats %d\n",
ss_id,
ss->searchSpaceType->choice.ue_Specific,
ss->searchSpaceType->present,
ss->searchSpaceType->choice.ue_Specific->dci_Formats);
#endif
}
if (phy_cgc){
if (phy_cgc->cs_RNTI){
LOG_D(MAC, "[DCI_CONFIG] Configure monitoring of PDCCH candidates in user specific search space for dci_Format0_0_AndFormat1_0 with CRC scrambled by CS-RNTI...\n");
LOG_W(MAC, "[DCI_CONFIG] This RNTI should not be configured yet...");
}
if (phy_cgc->sp_CSI_RNTI){
LOG_D(MAC, "[DCI_CONFIG] Configure monitoring of PDCCH candidates in user specific search space for dci_Format0_0_AndFormat1_0 with CRC scrambled by SP-CSI-RNTI...\n");
LOG_W(MAC, "[DCI_CONFIG] This RNTI should not be configured yet...");
}
if (phy_cgc->ext1){
if (phy_cgc->ext1->mcs_C_RNTI){
LOG_D(MAC, "[DCI_CONFIG] Configure monitoring of PDCCH candidates in user specific search space for dci_Format0_0_AndFormat1_0 with CRC scrambled by MCS-C-RNTI...\n");
LOG_W(MAC, "[DCI_CONFIG] This RNTI should not be configured yet...");
}
}
}
}
}
break;
default:
AssertFatal(1 == 0, "[DCI_CONFIG] Unrecognized search space type...");
break;
} }
} }
} }
...@@ -757,17 +757,32 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -757,17 +757,32 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
} }
*/ */
} }
} else if (ul_info && ul_info->slot_tx == 8) { } else if (ul_info) {
if (get_softmodem_params()->phy_test && ul_info->slot_tx == 8) { // ULSCH is handled only in phy-test mode (consistently with OAI gNB)
uint8_t nb_dmrs_re_per_rb;
uint8_t ulsch_input_buffer[MAX_ULSCH_PAYLOAD_BYTES];
uint8_t data_existing = 0;
uint16_t TBS_bytes;
uint32_t TBS;
int i;
module_id_t mod_id = ul_info->module_id; module_id_t mod_id = ul_info->module_id;
uint32_t gNB_index = ul_info->gNB_index; uint32_t gNB_index = ul_info->gNB_index;
int cc_id = ul_info->cc_id; int cc_id = ul_info->cc_id;
frame_t rx_frame = ul_info->frame_rx; frame_t rx_frame = ul_info->frame_rx;
slot_t rx_slot = ul_info->slot_rx; slot_t rx_slot = ul_info->slot_rx;
frame_t frame_tx = ul_info->frame_tx;
slot_t slot_tx = ul_info->slot_tx;
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
uint8_t access_mode = SCHEDULED_ACCESS;
// program PUSCH. this should actually be done upon reception of an UL DCI // program PUSCH. this should actually be done upon reception of an UL DCI
nr_dcireq_t dcireq; nr_dcireq_t dcireq;
nr_scheduled_response_t scheduled_response; nr_scheduled_response_t scheduled_response;
fapi_nr_tx_request_t tx_req;
fapi_nr_tx_request_body_t tx_req_body;
//--------------------------Temporary configuration-----------------------------// //--------------------------Temporary configuration-----------------------------//
uint16_t rnti = 0x1234; uint16_t rnti = 0x1234;
...@@ -790,8 +805,71 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -790,8 +805,71 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
uint16_t pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA; uint16_t pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA;
uint8_t ptrs_time_density = get_L_ptrs(ptrs_mcs1, ptrs_mcs2, ptrs_mcs3, mcs_index, mcs_table); uint8_t ptrs_time_density = get_L_ptrs(ptrs_mcs1, ptrs_mcs2, ptrs_mcs3, mcs_index, mcs_table);
uint8_t ptrs_freq_density = get_K_ptrs(n_rb0, n_rb1, rb_size); uint8_t ptrs_freq_density = get_K_ptrs(n_rb0, n_rb1, rb_size);
uint8_t no_data_in_dmrs = 1;
uint16_t number_dmrs_symbols = 0;
uint16_t ul_dmrs_symb_pos = l_prime_mask << start_symbol_index;
//------------------------------------------------------------------------------// //------------------------------------------------------------------------------//
for (i = start_symbol_index; i < start_symbol_index + nr_of_symbols; i++) {
if((ul_dmrs_symb_pos >> i) & 0x01)
number_dmrs_symbols += 1;
}
if(no_data_in_dmrs)
nb_dmrs_re_per_rb = 12;
else
nb_dmrs_re_per_rb = ((dmrs_config_type == pusch_dmrs_type1) ? 6:4);
TBS = nr_compute_tbs(nr_get_Qm_ul(mcs_index, 0),
nr_get_code_rate_ul(mcs_index, 0),
rb_size,
nr_of_symbols,
nb_dmrs_re_per_rb*number_dmrs_symbols,
0,
0,
nrOfLayers);
TBS_bytes = TBS/8;
if (IS_SOFTMODEM_NOS1){
// Getting IP traffic to be transmitted
data_existing = nr_ue_get_sdu(mod_id,
cc_id,
frame_tx,
slot_tx,
0,
ulsch_input_buffer,
TBS_bytes,
&access_mode);
}
//Random traffic to be transmitted if there is no IP traffic available for this Tx opportunity
if (!IS_SOFTMODEM_NOS1 || !data_existing) {
//Use zeros for the header bytes in noS1 mode, in order to make sure that the LCID is not valid
//and block this traffic from being forwarded to the upper layers at the gNB
LOG_D(PHY, "Random data to be tranmsitted: \n");
//Give the first byte a dummy value (a value not corresponding to any valid LCID based on 38.321, Table 6.2.1-2)
//in order to distinguish the PHY random packets at the MAC layer of the gNB receiver from the normal packets that should
//have a valid LCID (nr_process_mac_pdu function)
ulsch_input_buffer[0] = 0x31;
for (i = 1; i < TBS_bytes; i++) {
ulsch_input_buffer[i] = (unsigned char) rand();
//printf(" input encoder a[%d]=0x%02x\n",i,harq_process_ul_ue->a[i]);
}
}
#ifdef DEBUG_MAC_PDU
LOG_D(PHY, "Is data existing ?: %d \n", data_existing);
LOG_I(PHY, "Printing MAC PDU to be encoded, TBS is: %d \n", TBS_bytes);
for (i = 0; i < TBS_bytes; i++) {
printf("%02x", ulsch_input_buffer[i]);
}
printf("\n");
#endif
dcireq.module_id = mod_id; dcireq.module_id = mod_id;
dcireq.gNB_index = gNB_index; dcireq.gNB_index = gNB_index;
dcireq.cc_id = cc_id; dcireq.cc_id = cc_id;
...@@ -800,7 +878,17 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -800,7 +878,17 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
scheduled_response.dl_config = NULL; scheduled_response.dl_config = NULL;
scheduled_response.ul_config = &dcireq.ul_config_req; scheduled_response.ul_config = &dcireq.ul_config_req;
scheduled_response.tx_request = NULL; // Config UL TX PDU
tx_req.slot = slot_tx;
tx_req.sfn = frame_tx;
// tx_req->tx_config // TbD
tx_req.number_of_pdus = 1;
tx_req_body.pdu_length = TBS_bytes;
tx_req_body.pdu_index = 0;
tx_req_body.pdu = ulsch_input_buffer;
scheduled_response.tx_request = &tx_req;
scheduled_response.tx_request->tx_request_body = &tx_req_body;
scheduled_response.module_id = mod_id; scheduled_response.module_id = mod_id;
scheduled_response.CC_id = cc_id; scheduled_response.CC_id = cc_id;
scheduled_response.frame = rx_frame; scheduled_response.frame = rx_frame;
...@@ -814,7 +902,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -814,7 +902,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.rb_start = rb_start; scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.rb_start = rb_start;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.nr_of_symbols = nr_of_symbols; scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.nr_of_symbols = nr_of_symbols;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.start_symbol_index = start_symbol_index; scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.start_symbol_index = start_symbol_index;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.ul_dmrs_symb_pos = l_prime_mask << start_symbol_index; scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.ul_dmrs_symb_pos = ul_dmrs_symb_pos;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.dmrs_config_type = dmrs_config_type; scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.dmrs_config_type = dmrs_config_type;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.mcs_index = mcs_index; scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.mcs_index = mcs_index;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.mcs_table = mcs_table; scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.mcs_table = mcs_table;
...@@ -842,106 +930,8 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -842,106 +930,8 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
if (mac->RA_contention_resolution_timer_active == 1) if (mac->RA_contention_resolution_timer_active == 1)
ue_contention_resolution(mod_id, gNB_index, cc_id, ul_info->frame_tx); ue_contention_resolution(mod_id, gNB_index, cc_id, ul_info->frame_tx);
} }
return UE_CONNECTION_OK;
}
// Notes:
// - Type1-PDCCH CSS configuration from ra-SearchSpace.
// - Msg2 is scheduled in the mixed slot or in the last dl slot if they are allowed by the Type 1 Common Search Space configuration
// todo:
// - if Type1-PDCCH CSS is not configured in RRC message (Coreset and SearchSpace), UE searches in Type 0 PDCCH CSS.
void nr_ue_msg2_scheduler(module_id_t mod_id,
uint16_t rach_frame,
uint16_t rach_slot,
uint16_t *msg2_frame,
uint16_t *msg2_slot){
uint8_t bwp_id = 1;
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
NR_CellGroupConfig_t *scg = mac->scg;
NR_ServingCellConfigCommon_t *scc = mac->scc;
NR_BWP_Downlink_t *bwp = scg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id - 1];
NR_SearchSpace_t *ss;
struct NR_PDCCH_ConfigCommon__commonSearchSpaceList *commonSearchSpaceList = bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList;
uint8_t mu = *scc->ssbSubcarrierSpacing;
uint8_t response_window = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.ra_ResponseWindow;
uint8_t slot_window, slot_limit, frame_limit;
uint16_t start_next_period, monitoring_slot_period, monitoring_offset;
// number of mixed slot or of last dl slot if there is no mixed slot
uint16_t last_dl_slot_period = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots;
uint16_t nr_dl_symbols = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols;
uint16_t nr_ul_symbols = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols;
// lenght of tdd period in slots
uint16_t tdd_period_slot = last_dl_slot_period + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
AssertFatal(commonSearchSpaceList->list.count > 0, "PDCCH common SearchSpace list has 0 elements\n");
LOG_D(MAC, "Frame %d, Slot %d: Scheduling Msg2 reception \n", rach_frame, rach_slot);
// Common searchspace list
for (int i = 0; i < commonSearchSpaceList->list.count; i++) {
ss = commonSearchSpaceList->list.array[i];
if(ss->searchSpaceId == *bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->ra_SearchSpace)
// retrieving ra pdcch monitoring period and offset
find_monitoring_periodicity_offset_common(ss, &monitoring_slot_period, &monitoring_offset);
}
if (nr_dl_symbols == 0)
last_dl_slot_period--;
if ((nr_dl_symbols > 0) || (nr_ul_symbols > 0))
tdd_period_slot++;
// computing start of next period
start_next_period = (rach_slot - (rach_slot % tdd_period_slot) + tdd_period_slot) % nr_slots_per_frame[mu];
*msg2_slot = start_next_period + last_dl_slot_period; // initializing scheduling of slot to next mixed (or last dl) slot
*msg2_frame = (*msg2_slot > rach_slot) ? rach_frame : (rach_frame +1);
switch(response_window){
case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl1:
slot_window = 1;
break;
case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl2:
slot_window = 2;
break;
case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl4:
slot_window = 4;
break;
case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl8:
slot_window = 8;
break;
case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl10:
slot_window = 10;
break;
case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl20:
slot_window = 20;
break;
case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl40:
slot_window = 40;
break;
case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl80:
slot_window = 80;
break;
default:
AssertFatal(1==0,"Invalid response window value %d\n",response_window);
}
AssertFatal(slot_window<=nr_slots_per_frame[mu], "Msg2 response window needs to be lower or equal to 10ms");
// slot and frame limit to transmit msg2 according to response window
slot_limit = (rach_slot + slot_window)%nr_slots_per_frame[mu];
frame_limit = (slot_limit>(rach_slot))? rach_frame : (rach_frame +1);
// go to previous slot if the current scheduled slot is beyond the response window
// and if the slot is not among the PDCCH monitored ones (38.213 10.1)
while ((*msg2_slot > slot_limit) || ((*msg2_frame*nr_slots_per_frame[mu] + *msg2_slot - monitoring_offset) % monitoring_slot_period != 0)) {
if((*msg2_slot % tdd_period_slot) > 0)
(*msg2_slot)--;
else
AssertFatal(1 == 0, "No available DL slot to schedule reception of msg2 has been found");
} }
LOG_D(MAC, "Scheduled Msg2 reception in Frame %d, Slot %d: \n", *msg2_frame, *msg2_slot); return UE_CONNECTION_OK;
} }
// This function schedules the PRACH according to prach_ConfigurationIndex and TS 38.211, tables 6.3.3.2.x // This function schedules the PRACH according to prach_ConfigurationIndex and TS 38.211, tables 6.3.3.2.x
...@@ -969,6 +959,7 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s ...@@ -969,6 +959,7 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s
config_index = rach_ConfigGeneric->prach_ConfigurationIndex; config_index = rach_ConfigGeneric->prach_ConfigurationIndex;
mac->RA_offset = 2; // to compensate the rx frame offset at the gNB mac->RA_offset = 2; // to compensate the rx frame offset at the gNB
mac->generate_nr_prach = 0; // Reset flag for PRACH generation
if (is_nr_UL_slot(scc, slotP)) { if (is_nr_UL_slot(scc, slotP)) {
...@@ -1090,8 +1081,8 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s ...@@ -1090,8 +1081,8 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s
} }
} }
} }
} else { } else if (mac->ra_state == RA_SUCCEEDED){
mac->generate_nr_prach = 0; mac->generate_nr_prach = 2;
} }
mac->scheduled_response.ul_config = ul_config; mac->scheduled_response.ul_config = ul_config;
} }
...@@ -2320,7 +2311,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc ...@@ -2320,7 +2311,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
AssertFatal(mac->DLbwp[0]!=NULL,"DLbwp[0] should not be zero here!\n"); AssertFatal(mac->DLbwp[0]!=NULL,"DLbwp[0] should not be zero here!\n");
AssertFatal(mac->ULbwp[0]!=NULL,"DLbwp[0] should not be zero here!\n"); AssertFatal(mac->ULbwp[0]!=NULL,"DLbwp[0] should not be zero here!\n");
const uint16_t n_RB_DLBWP = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275); const uint16_t n_RB_DLBWP = (mac->ra_state == WAIT_RAR) ? NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, 275) : NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
const uint16_t n_RB_ULBWP = NRRIV2BW(mac->ULbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275); const uint16_t n_RB_ULBWP = NRRIV2BW(mac->ULbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
LOG_D(MAC,"nr_ue_process_dci at MAC layer with dci_format=%d (DL BWP %d, UL BWP %d)\n",dci_format,n_RB_DLBWP,n_RB_ULBWP); LOG_D(MAC,"nr_ue_process_dci at MAC layer with dci_format=%d (DL BWP %d, UL BWP %d)\n",dci_format,n_RB_DLBWP,n_RB_ULBWP);
...@@ -2761,7 +2752,12 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc ...@@ -2761,7 +2752,12 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
dlsch_config_pdu_1_0->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config, dlsch_config_pdu_1_0->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config,
mac->scc->dmrs_TypeA_Position, mac->scc->dmrs_TypeA_Position,
dlsch_config_pdu_1_0->number_symbols); dlsch_config_pdu_1_0->number_symbols);
dlsch_config_pdu_1_0->dmrsConfigType = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 1 : 2; dlsch_config_pdu_1_0->dmrsConfigType = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1;
/* number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214 version 15.9.0 Release 15 */
if (dlsch_config_pdu_1_0->number_symbols == 2)
dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 1;
else
dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 2;
/* VRB_TO_PRB_MAPPING */ /* VRB_TO_PRB_MAPPING */
dlsch_config_pdu_1_0->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping.val == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved; dlsch_config_pdu_1_0->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping.val == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved;
/* MCS */ /* MCS */
...@@ -2822,10 +2818,11 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc ...@@ -2822,10 +2818,11 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
dlsch_config_pdu_1_0->pucch_resource_id, dlsch_config_pdu_1_0->pucch_resource_id,
dlsch_config_pdu_1_0->pdsch_to_harq_feedback_time_ind); dlsch_config_pdu_1_0->pdsch_to_harq_feedback_time_ind);
if (mac->ra_rnti == rnti) if (mac->RA_window_cnt >= 0 && rnti == mac->ra_rnti){
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH; dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH;
else } else {
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
}
// dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = n_RB_DLBWP; // dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = n_RB_DLBWP;
...@@ -2880,7 +2877,10 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc ...@@ -2880,7 +2877,10 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
dlsch_config_pdu_1_1->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config, dlsch_config_pdu_1_1->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config,
mac->scc->dmrs_TypeA_Position, mac->scc->dmrs_TypeA_Position,
dlsch_config_pdu_1_1->number_symbols); dlsch_config_pdu_1_1->number_symbols);
dlsch_config_pdu_1_1->dmrsConfigType = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 1 : 2; dlsch_config_pdu_1_1->dmrsConfigType = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1;
/* TODO: fix number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214,
using tables 7.3.1.2.2-1, 7.3.1.2.2-2, 7.3.1.2.2-3, 7.3.1.2.2-4 of 3GPP TS 38.212 */
dlsch_config_pdu_1_1->n_dmrs_cdm_groups = 1;
/* VRB_TO_PRB_MAPPING */ /* VRB_TO_PRB_MAPPING */
if (mac->phy_config.config_req.dl_bwp_dedicated.pdsch_config_dedicated.resource_allocation != 0) if (mac->phy_config.config_req.dl_bwp_dedicated.pdsch_config_dedicated.resource_allocation != 0)
dlsch_config_pdu_1_1->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping.val == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved; dlsch_config_pdu_1_1->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping.val == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved;
...@@ -3133,6 +3133,7 @@ void nr_extract_dci_info(NR_UE_MAC_INST_t *mac, ...@@ -3133,6 +3133,7 @@ void nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
case NR_DL_DCI_FORMAT_1_0: case NR_DL_DCI_FORMAT_1_0:
switch(rnti_type) { switch(rnti_type) {
case NR_RNTI_RA: case NR_RNTI_RA:
N_RB = NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, 275); // TBR hotfix
// Freq domain assignment // Freq domain assignment
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
pos=fsize; pos=fsize;
...@@ -3167,8 +3168,6 @@ void nr_extract_dci_info(NR_UE_MAC_INST_t *mac, ...@@ -3167,8 +3168,6 @@ void nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
#endif #endif
break; break;
mac->rnti_type = rnti_type;
case NR_RNTI_C: case NR_RNTI_C:
// indicating a DL DCI format 1bit // indicating a DL DCI format 1bit
......
...@@ -107,9 +107,10 @@ uint16_t nr_ue_process_rar(module_id_t mod_id, ...@@ -107,9 +107,10 @@ uint16_t nr_ue_process_rar(module_id_t mod_id,
uint8_t n_subPDUs = 0; // number of RAR payloads uint8_t n_subPDUs = 0; // number of RAR payloads
uint8_t n_subheaders = 0; // number of MAC RAR subheaders uint8_t n_subheaders = 0; // number of MAC RAR subheaders
//uint8_t best_rx_rapid = -1; // the closest RAPID receive from all RARs //uint8_t best_rx_rapid = -1; // the closest RAPID receive from all RARs
unsigned char freq_hopping, msg3_t_alloc, mcs, tpc_command, csi_req; //unsigned char freq_hopping, msg3_t_alloc, mcs, tpc_command, csi_req; // WIP
uint16_t ta_command = 0, msg3_f_alloc, bwp_size; //uint16_t ta_command = 0, msg3_f_alloc, bwp_size; // WIP
int f_alloc, mask; uint16_t ta_command = 0;
//int f_alloc, mask; // WIP
AssertFatal(CC_id == 0, "RAR reception on secondary CCs is not supported yet\n"); AssertFatal(CC_id == 0, "RAR reception on secondary CCs is not supported yet\n");
...@@ -143,6 +144,7 @@ uint16_t nr_ue_process_rar(module_id_t mod_id, ...@@ -143,6 +144,7 @@ uint16_t nr_ue_process_rar(module_id_t mod_id,
// LOG_I(MAC, "[UE %d][RAPROC] Frame %d Received RAR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for preamble %d/%d\n", // LOG_I(MAC, "[UE %d][RAPROC] Frame %d Received RAR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for preamble %d/%d\n",
// mod_id, frameP, *(uint8_t *) rarh, rar[0], rar[1], rar[2], rar[3], rar[4], rar[5], rarh->RAPID, preamble_index); // mod_id, frameP, *(uint8_t *) rarh, rar[0], rar[1], rar[2], rar[3], rar[4], rar[5], rarh->RAPID, preamble_index);
#if 0 // TbD WIP Msg3 development ongoing
if (ue_mac->RA_RAPID_found) { if (ue_mac->RA_RAPID_found) {
// TC-RNTI // TC-RNTI
*t_crnti = rar->TCRNTI_2 + (rar->TCRNTI_1 << 8); *t_crnti = rar->TCRNTI_2 + (rar->TCRNTI_1 << 8);
...@@ -200,6 +202,7 @@ uint16_t nr_ue_process_rar(module_id_t mod_id, ...@@ -200,6 +202,7 @@ uint16_t nr_ue_process_rar(module_id_t mod_id,
ue_mac->t_crnti = 0; ue_mac->t_crnti = 0;
ta_command = (0xffff); ta_command = (0xffff);
} }
#endif
// move the selected RAR to the front of the RA_PDSCH buffer // move the selected RAR to the front of the RA_PDSCH buffer
memcpy((void *) (selected_rar_buffer + 0), (void *) rarh, 1); memcpy((void *) (selected_rar_buffer + 0), (void *) rarh, 1);
......
...@@ -42,8 +42,7 @@ ...@@ -42,8 +42,7 @@
#include "SIMULATION/TOOLS/sim.h" // for taus #include "SIMULATION/TOOLS/sim.h" // for taus
extern RAN_CONTEXT_t RC; extern RAN_CONTEXT_t RC;
extern const uint8_t nr_slots_per_frame[5];
const uint8_t nr_slots_per_frame_mac[5] = {10, 20, 40, 80, 160};
uint8_t DELTA[4]= {2,3,4,6}; uint8_t DELTA[4]= {2,3,4,6};
...@@ -185,7 +184,7 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot, ...@@ -185,7 +184,7 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot,
tdd_period_slot++; tdd_period_slot++;
// computing start of next period // computing start of next period
uint8_t start_next_period = (rach_slot-(rach_slot%tdd_period_slot)+tdd_period_slot)%nr_slots_per_frame_mac[mu]; uint8_t start_next_period = (rach_slot-(rach_slot%tdd_period_slot)+tdd_period_slot)%nr_slots_per_frame[mu];
*msg2_slot = start_next_period + last_dl_slot_period; // initializing scheduling of slot to next mixed (or last dl) slot *msg2_slot = start_next_period + last_dl_slot_period; // initializing scheduling of slot to next mixed (or last dl) slot
*msg2_frame = (*msg2_slot>(rach_slot))? rach_frame : (rach_frame +1); *msg2_frame = (*msg2_slot>(rach_slot))? rach_frame : (rach_frame +1);
...@@ -217,16 +216,16 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot, ...@@ -217,16 +216,16 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot,
default: default:
AssertFatal(1==0,"Invalid response window value %d\n",response_window); AssertFatal(1==0,"Invalid response window value %d\n",response_window);
} }
AssertFatal(slot_window<=nr_slots_per_frame_mac[mu],"Msg2 response window needs to be lower or equal to 10ms"); AssertFatal(slot_window<=nr_slots_per_frame[mu],"Msg2 response window needs to be lower or equal to 10ms");
// slot and frame limit to transmit msg2 according to response window // slot and frame limit to transmit msg2 according to response window
uint8_t slot_limit = (rach_slot + slot_window)%nr_slots_per_frame_mac[mu]; uint8_t slot_limit = (rach_slot + slot_window)%nr_slots_per_frame[mu];
//uint8_t frame_limit = (slot_limit>(rach_slot))? rach_frame : (rach_frame +1); //uint8_t frame_limit = (slot_limit>(rach_slot))? rach_frame : (rach_frame +1);
// go to previous slot if the current scheduled slot is beyond the response window // go to previous slot if the current scheduled slot is beyond the response window
// and if the slot is not among the PDCCH monitored ones (38.213 10.1) // and if the slot is not among the PDCCH monitored ones (38.213 10.1)
while ((*msg2_slot>slot_limit) || ((*msg2_frame*nr_slots_per_frame_mac[mu]+*msg2_slot-monitoring_offset)%monitoring_slot_period !=0)) { while ((*msg2_slot>slot_limit) || ((*msg2_frame*nr_slots_per_frame[mu]+*msg2_slot-monitoring_offset)%monitoring_slot_period !=0)) {
if((*msg2_slot%tdd_period_slot) > 0) if((*msg2_slot%tdd_period_slot) > 0)
(*msg2_slot)--; (*msg2_slot)--;
else else
...@@ -397,11 +396,11 @@ void nr_get_Msg3alloc(NR_ServingCellConfigCommon_t *scc, ...@@ -397,11 +396,11 @@ void nr_get_Msg3alloc(NR_ServingCellConfigCommon_t *scc,
uint8_t k2 = *ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->k2; uint8_t k2 = *ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->k2;
temp_slot = current_slot + k2 + DELTA[mu]; // msg3 slot according to 8.3 in 38.213 temp_slot = current_slot + k2 + DELTA[mu]; // msg3 slot according to 8.3 in 38.213
ra->Msg3_slot = temp_slot%nr_slots_per_frame_mac[mu]; ra->Msg3_slot = temp_slot%nr_slots_per_frame[mu];
if (nr_slots_per_frame_mac[mu]>temp_slot) if (nr_slots_per_frame[mu]>temp_slot)
ra->Msg3_frame = current_frame; ra->Msg3_frame = current_frame;
else else
ra->Msg3_frame = current_frame + (temp_slot/nr_slots_per_frame_mac[mu]); ra->Msg3_frame = current_frame + (temp_slot/nr_slots_per_frame[mu]);
ra->msg3_nb_rb = 18; ra->msg3_nb_rb = 18;
ra->msg3_first_rb = 0; ra->msg3_first_rb = 0;
...@@ -601,7 +600,11 @@ void nr_generate_Msg2(module_id_t module_idP, ...@@ -601,7 +600,11 @@ void nr_generate_Msg2(module_id_t module_idP,
LOG_D(MAC, "[RAPROC] Scheduling common search space DCI type 1 dlBWP BW %d\n", dci10_bw); LOG_D(MAC, "[RAPROC] Scheduling common search space DCI type 1 dlBWP BW %d\n", dci10_bw);
mcsIndex = 0; // Qm>2 not allowed for RAR // Qm>2 not allowed for RAR
if (get_softmodem_params()->do_ra)
mcsIndex = 9;
else
mcsIndex = 0;
pdsch_pdu_rel15->pduBitmap = 0; pdsch_pdu_rel15->pduBitmap = 0;
pdsch_pdu_rel15->rnti = RA_rnti; pdsch_pdu_rel15->rnti = RA_rnti;
......
...@@ -954,10 +954,9 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP, ...@@ -954,10 +954,9 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP,
pusch_pdu->pusch_ptrs.ptrs_ports_list = (nfapi_nr_ptrs_ports_t *) malloc(2*sizeof(nfapi_nr_ptrs_ports_t)); pusch_pdu->pusch_ptrs.ptrs_ports_list = (nfapi_nr_ptrs_ports_t *) malloc(2*sizeof(nfapi_nr_ptrs_ports_t));
pusch_pdu->pusch_ptrs.ptrs_ports_list[0].ptrs_re_offset = 0; pusch_pdu->pusch_ptrs.ptrs_ports_list[0].ptrs_re_offset = 0;
pusch_pdu->pdu_bit_map &= PUSCH_PDU_BITMAP_PUSCH_PTRS; // enable PUSCH PTRS pusch_pdu->pdu_bit_map |= PUSCH_PDU_BITMAP_PUSCH_PTRS; // enable PUSCH PTRS
} }
else{ else{
// if(1<<pusch_pdu->pusch_ptrs.ptrs_time_density >= pusch_pdu->nr_of_symbols)
pusch_pdu->pdu_bit_map &= ~PUSCH_PDU_BITMAP_PUSCH_PTRS; // disable PUSCH PTRS pusch_pdu->pdu_bit_map &= ~PUSCH_PDU_BITMAP_PUSCH_PTRS; // disable PUSCH PTRS
} }
......
...@@ -117,13 +117,6 @@ int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){ ...@@ -117,13 +117,6 @@ int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
if (is_nr_UL_slot(mac->scc, ul_info->slot_tx) && get_softmodem_params()->do_ra){ if (is_nr_UL_slot(mac->scc, ul_info->slot_tx) && get_softmodem_params()->do_ra){
nr_ue_prach_scheduler(module_id, ul_info->frame_tx, ul_info->slot_tx); nr_ue_prach_scheduler(module_id, ul_info->frame_tx, ul_info->slot_tx);
if (mac->generate_nr_prach){
//uint16_t monitoring_slot_period, monitoring_offset;
uint16_t rach_frame = mac->scheduled_response.ul_config->sfn;
uint16_t rx_rach_frame = (rach_frame + mac->RA_offset) % MAX_FRAME_NUMBER; // compensate 2 frames offset delay at gNB side
uint16_t rach_slot = mac->scheduled_response.ul_config->slot;
nr_ue_msg2_scheduler(module_id, rx_rach_frame, rach_slot, &mac->msg2_rx_frame, &mac->msg2_rx_slot);
}
} }
switch(ret){ switch(ret){
...@@ -154,7 +147,7 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_ ...@@ -154,7 +147,7 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_
fapi_nr_ul_config_request_t *ul_config = &mac->ul_config_request; fapi_nr_ul_config_request_t *ul_config = &mac->ul_config_request;
if (!dl_info->dci_ind && !dl_info->rx_ind) { if (!dl_info->dci_ind && !dl_info->rx_ind) {
// UL indication to schedule reception DCI reception // UL indication to schedule DCI reception
nr_ue_scheduler(dl_info, NULL); nr_ue_scheduler(dl_info, NULL);
} else { } else {
// UL indication after reception of DCI or DL PDU // UL indication after reception of DCI or DL PDU
......
...@@ -705,7 +705,8 @@ int rfsimulator_read(openair0_device *device, openair0_timestamp *ptimestamp, vo ...@@ -705,7 +705,8 @@ int rfsimulator_read(openair0_device *device, openair0_timestamp *ptimestamp, vo
random_channel(ptr->channel_model,0); random_channel(ptr->channel_model,0);
if (t->poll_telnetcmdq) if (t->poll_telnetcmdq)
t->poll_telnetcmdq(t->telnetcmd_qid,t); t->poll_telnetcmdq(t->telnetcmd_qid,t);
for (int a=0; a<nbAnt; a++) {
for (int a=0; a<nbAnt; a++) {//loop over number of Rx antennas
if ( ptr->channel_model != NULL ) // apply a channel model if ( ptr->channel_model != NULL ) // apply a channel model
rxAddInput( ptr->circularBuf, (struct complex16 *) samplesVoid[a], rxAddInput( ptr->circularBuf, (struct complex16 *) samplesVoid[a],
a, a,
...@@ -716,15 +717,16 @@ int rfsimulator_read(openair0_device *device, openair0_timestamp *ptimestamp, vo ...@@ -716,15 +717,16 @@ int rfsimulator_read(openair0_device *device, openair0_timestamp *ptimestamp, vo
); );
else { // no channel modeling else { // no channel modeling
sample_t *out=(sample_t *)samplesVoid[a]; sample_t *out=(sample_t *)samplesVoid[a];
const int64_t base=t->nextTimestamp*nbAnt+a; int nbAnt_tx = ptr->th.nbAnt;//number of Tx antennas
//LOG_I(HW, "nbAnt_tx %d\n",nbAnt_tx);
for ( int i=0; i < nsamps; i++ ) { for (int i=0; i < nsamps; i++) {//loop over nsamps
const int idx=(i*nbAnt+base)%CirSize; for (int a_tx=0; a_tx<nbAnt_tx; a_tx++){//sum up signals from nbAnt_tx antennas
out[i].r+=ptr->circularBuf[idx].r; out[i].r+=ptr->circularBuf[((t->nextTimestamp+i)*nbAnt_tx+a_tx)%CirSize].r;
out[i].i+=ptr->circularBuf[idx].i; out[i].i+=ptr->circularBuf[((t->nextTimestamp+i)*nbAnt_tx+a_tx)%CirSize].i;
} } // end for a_tx
} // end for i (number of samps)
} // end of no channel modeling } // end of no channel modeling
} // end for a... } // end for a (number of rx antennas)
} }
} }
......
...@@ -248,6 +248,8 @@ RUs = ( ...@@ -248,6 +248,8 @@ RUs = (
max_pdschReferenceSignalPower = -27; max_pdschReferenceSignalPower = -27;
max_rxgain = 114; max_rxgain = 114;
eNB_instances = [0]; eNB_instances = [0];
#beamforming 1x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
sdr_addrs = "addr=192.168.10.2,mgmt_addr=192.168.10.2,second_addr=192.168.20.2"; sdr_addrs = "addr=192.168.10.2,mgmt_addr=192.168.10.2,second_addr=192.168.20.2";
clock_src = "external"; clock_src = "external";
} }
......
...@@ -438,9 +438,6 @@ int restart_L1L2(module_id_t enb_id) { ...@@ -438,9 +438,6 @@ int restart_L1L2(module_id_t enb_id) {
} }
RC.ru_mask |= (1 << ru->idx); RC.ru_mask |= (1 << ru->idx);
/* copy the changed frame parameters to the RU */
/* TODO this should be done for all RUs associated to this eNB */
memcpy(&ru->frame_parms, &RC.eNB[enb_id][0]->frame_parms, sizeof(LTE_DL_FRAME_PARMS));
set_function_spec_param(RC.ru[enb_id]); set_function_spec_param(RC.ru[enb_id]);
/* reset the list of connected UEs in the MAC, since in this process with /* reset the list of connected UEs in the MAC, since in this process with
* loose all UEs (have to reconnect) */ * loose all UEs (have to reconnect) */
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment