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常顺宇
OpenXG-RAN
Commits
55660e87
Commit
55660e87
authored
5 years ago
by
laurent
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RACH working, fails later during MME authentication
parent
cb41822b
dev
1
128-ues
256_QAM_demod
512-dataplane-bug-in-l2nfapi_nos1
FR2_NSA
Fix_SA_SIB1
NCTU_OpinConnect_LDPC
NR-PHY-MAC-IF-multi-UE
NRPRACH_highSpeed_saankhya
NRUE_usedlschparallel
NR_10MHz
NR_2port_CSIRS
NR_CSIRS_tomerge
NR_CSI_reporting
NR_DCI_01
NR_DLUL_PF
NR_DLUL_PF_4UL
NR_DLUL_PF_rebased
NR_DL_MIMO
NR_DL_sched_fixes
NR_DL_scheduler
NR_F1C_F1U_extensions
NR_FAPI_beamindex_SSB_RO
NR_FAPI_beamindex_SSB_RO_SEMPROJ
NR_FDD_FIX
NR_FR2_RA
NR_FR2_RRC_SSB
NR_FR2_initsync_fixes
NR_MAC_CE_GlobalEdge
NR_MAC_Multi_Rach_GlobalEdge
NR_MAC_Multi_Rach_GlobalEdge-old
NR_MAC_SSB
NR_MAC_SSB_RO_GlobalEdge
NR_MAC_SSB_RO_UE_IDCC
NR_MAC_SSB_RO_merge
NR_MAC_TCI_UCI_GlobalEdge
NR_MCS_BLER
NR_NGAP
NR_PUCCH_MultiUE
NR_RA_cleanup
NR_RA_updates
NR_RRCConfiguration_FR2
NR_RRC_PDCP
NR_RRC_PRACH_procedures
NR_RRC_X2AP_AMBR_Change_Global_edge
NR_RRC_X2AP_RemoveHardcodings_GlobalEdge
NR_RRC_config_simplified
NR_RRC_harq_b
NR_SA_F1AP_5GRECORDS
NR_SA_F1AP_5GRECORDS-USIM
NR_SA_F1AP_5GRECORDS-wf-0623
NR_SA_F1AP_5GRECORDS_lts
NR_SA_F1AP_RFSIMULATOR
NR_SA_F1AP_RFSIMULATOR2
NR_SA_F1AP_RFSIMULATOR2_SRB
NR_SA_F1AP_RFSIMULATOR3
NR_SA_F1AP_RFSIMULATOR3_tmp
NR_SA_F1AP_RFSIMULATOR3_wf
NR_SA_F1AP_RFSIMULATOR_w5GCN
NR_SA_F1AP_dev
NR_SA_NGAP_RRC
NR_SA_NGAP_RRC_wk42
NR_SA_itti_sim_wk48
NR_SA_itti_sim_wk48_hs
NR_SA_itti_sim_wk48_hs1
NR_SA_w5GCN_new_gtpu
NR_SCHED_HARQ
NR_SCHED_PDCCH_PUCCH_HARQ
NR_SCHED_PDCCH_PUCCH_HARQ_rebased
NR_SCHED_fixes
NR_SRB_Config
NR_UE_CONFIG_REQ_FIXES
NR_UE_MAC_scheduler
NR_UE_PUCCH_bugfixes
NR_UE_RA_fixes
NR_UE_SA
NR_UE_UL_DCI_improvements
NR_UE_dlsch_bugfix
NR_UE_enable_parallelization
NR_UE_rework_test
NR_UE_reworking_UCI_procedures
NR_UE_stability_fixes
NR_UL_FAPI_programming
NR_UL_SCFDMA_100MHz
NR_UL_scheduler
NR_UL_scheduler_rebased
NR_UL_scheduling
NR_Wireshark
NR_beam_simulation
NR_cleanup_PUCCH_resources
NR_gNB_initial_MIB_fix
NR_ipaccess_testing
NR_mac_uci_functions_rework
NR_msg2_phytest
NR_multiplexing_HARQ_CSI_PUCCH
NR_phytest_bugfixes
NR_reworking_UL_antennaports
NR_scheduling_CSIRS
NR_scheduling_request
NR_scheduling_request2
NR_scheduling_request3
NR_ue_dlsch_dmrs_cdm
PBCHNRTCFIX
PUSCH_TA_update
RA_CI_test
RFquality
Saankhya_NRPRACH_HighSpeed
Test_SA_5GREC
UE_DL_DCI_hotfix
add-dmrs-test
add-ru-docker-image
avxllr
bandwidth-testing
bch-fixes-bitmap
benetel_5g_prach_fix
benetel_config_file_fix
benetel_dpdk20
benetel_driver_uldl_pf_merge
benetel_driver_update
benetel_fixes
benetel_phase_rotation
benetel_phase_rotation_old
bsr-fix
bugfix-free-ra-process
bugfix-minor-remove-wrong-log
bugfix-nr-bands
bugfix-nr-ldpc-post-processing
bugfix-nr-ldpc-size-typo
bugfix-nr-pdcp-sn-size
bugfix-nr-rate-matching-assertion
bugfix-nr-t-reordering
bugfix-x2-SgNBAdditionRequest
bugfix_gnb_rt_stats_html
bupt-sa-merge
cce_indexing_fix
cce_indexing_fix2
ci-deploy-asterix
ci-deploy-docker-compose
ci-fix-module-ul-iperf
ci-new-docker-pipeline
ci-rd-july-improvements
ci-reduce-nb-vms
ci-test
ci-ul-iperf-from-trf-container
ci_benetel_longrun_limits
ci_benetel_test
ci_fix_iperf_for_module
ci_hotfix_module_ue_ip_address
ci_improve_module_ctl
ci_nsa_benetel
ci_nsa_fixes
ci_nsa_pipes_improve
ci_nsa_test_integration_2021_wk19
ci_nsa_traces
ci_nsa_uplink
ci_phytest
ci_quectel_support
ci_sa_rfsim_test
ci_solve_ul_for_module
ci_test_5GREC
ci_test_nsa_fix_quectel_nic
ci_test_nsa_on_develop
ci_test_ra_fr2
ci_testinfra_as_code
ci_vm_resource_fix
clean-5G-scope-round2
cleanup_softmodem_main
constant_power
debug-UL-5GRECORDS
debug_UL_signal
detached-w16-test
develop
develop-CBRA-v3
develop-CCE
develop-NR_SA_F1AP_5GRECORDS
develop-NR_SA_F1AP_5GRECORDS-abs
develop-NR_SA_F1AP_5GRECORDS-hs
develop-NR_SA_F1AP_5GRECORDS-hs1
develop-NR_SA_F1AP_5GRECORDS-lts
develop-NR_SA_F1AP_5GRECORDS-lts-wf
develop-NR_SA_F1AP_5GRECORDS-v3
develop-NR_SA_F1AP_5GRECORDS_100M
develop-NR_SA_F1AP_5GRECORDS_LDPC_FPGA
develop-NR_SA_F1AP_5GRECORDS_lfq_0607
develop-SA-CBRA
develop-SA-CBRA-CUDU
develop-SA-CBRA-Msg5
develop-SA-CBRA-lts
develop-SA-CBRA-ulsch-lts
develop-SA-RA
develop-SnT
develop-aw2sori
develop-oriecpriupdates
develop-sib1
develop-sib1-local
develop-sib1-lts
develop-sib1-update
develop-sib1-update-test1
develop-sib1-update-ue
develop-wf-du
develop_inria_ci_deployment
develop_inria_ci_deployment_gp
develop_integration_2020_w19
develop_stable
dfts_alternatives
disable_CSI_measrep
dlsch-all-dlslots
dlsch_encode_mthread
dlsch_parallel
docker-improvements-2021-april
docker-no-cache-option
dongzhanyi-zte-develop
dongzhanyi-zte-develop1
dongzhanyi-zte-develop2
enhance-rfsim
episys-merge
episys/nsa_baseline
episys/nsa_development
feature/make-s1-mme-port-configurable
feature/make-s1-mme-port-configurable-with-astyle-fixes
fedora-gen-kernel-fix
fembms-enb-ue
fft_bench_hotfix
finalize-oaicn-integration
firas
fix-check
fix-ci-tun
fix-compile
fix-itti-segv
fix-nr-pdcp-timer
fix-nr-rlc-range-nack
fix-physim-deploy
fix-quectel
fix-realtime
fix-retransmission-rbg
fix-softmodem-restart
fix-warnings
fix-x2-without-gnb
fix_NR_DLUL_PF
fix_NR_DLUL_PF_benchmark
fix_coreset_dmrs_idx
fix_do_ra_data
fix_nr_ulsim
fix_pdsch_low_prb
fix_rb_corruption
fix_reestablishment
fix_rfsim_mimo
fix_rrc_x2_ticking
fixes-CE-RLC-PDU-size
fixes-mac-sched-nfapi
fixes-mac-sched-tun
fixes-tun
fixgtpu
flexran-apps
flexran-repair-mme-mgmt
flexran-rtc-repo-is-public
fujitsu_lte_contribution
fujitsu_lte_contribution-128
git-dashboard
gnb-freerun-txru
gnb-n300-fixes
gnb-only-test
gnb-realtime-hotfix
gnb-realtime-quickfix
gnb-threadpool
hack-bch-no-sched-sf-0
hack-exit-gnb-when-no-enb-nsa
harq-hotfix
hotfix-minor-remove-nr-rlc-cppcheck-error
hotfix-nr-rlc-tick
hotfix-ocp-executable
hotfix-ue-musim-compilation
improve_nr_modulation
improve_ue_stability
integ-w13-test-rt-issue
integration_2020_wk15
integration_2020_wk40
integration_2020_wk41
integration_2020_wk42_2
integration_2020_wk45
integration_2020_wk45_2
integration_2020_wk46
integration_2020_wk46_2
integration_2020_wk47
integration_2020_wk48
integration_2020_wk48_2
integration_2020_wk49
integration_2020_wk50
integration_2020_wk50_1
integration_2020_wk51
integration_2020_wk51_2
integration_2021_wk02
integration_2021_wk02_wMR988
integration_2021_wk04
integration_2021_wk05
integration_2021_wk06
integration_2021_wk06_MR978
integration_2021_wk06_b
integration_2021_wk06_c
integration_2021_wk08
integration_2021_wk08_2
integration_2021_wk08_MR963
integration_2021_wk09
integration_2021_wk09_b
integration_2021_wk10
integration_2021_wk10_b
integration_2021_wk11
integration_2021_wk12
integration_2021_wk12_b
integration_2021_wk13_a
integration_2021_wk13_b
integration_2021_wk13_b_fix_tdas
integration_2021_wk13_b_fixed
integration_2021_wk13_c
integration_2021_wk14_a
integration_2021_wk15_a
integration_2021_wk16
integration_2021_wk17_a
integration_2021_wk17_b
integration_2021_wk18_a
integration_2021_wk18_b
integration_2021_wk19
integration_2021_wk20_a
integration_2021_wk22
integration_2021_wk23
integration_2021_wk27
integration_w5GC_CBRA_test
inter-RRU-final
inter-RRU-oairu
inter-rru-UE
itti-enhancement
ldpc-decoder-codegen
ldpc-decoder-codegen2
ldpc-offload
ldpc_offload_t1
ldpc_short_codeword_fixes
load_gnb
lte-ulsch-bugfix
lte_uplink_improvement
mac-fixes-wk45_2
migrate-cpp-check-container
migrate-vm-pipeline-to-bionic
minor-fix-doc-basic-sim
mosaic5g-oai-ran
mosaic5g-oai-sim
msg4_phy_0303_lfq
multiple_ssb_sib1_bugfix
nasmesh_kernel_5.8
new-gtpu
nfapi-bugfix
nfapi_nr_arch_mod
nfapi_nr_develop
nfapi_nr_develop_new
ngap-dlul
ngap-support
ngap-w48-merge2
ngap-wf
ngap-wf-1120
ngap-wf-1120-srb
ngap-wf-1120-srb-gtp
ngap-wf-1120-srb-gtp-hs
ngap-wf-1120-srb-gtp-hs1
ngap-wf-1120-srb-gtp-hs2
ngap-wf-1120-srb-gtp-yhz
ngap-wf-1203-yunsdr
ngap-wf-liuyu
ngap_lfq_1120
ngap_merge
noCore
nr-bsr-fix
nr-dl-mimo-2layer
nr-dmrs-fixes
nr-mac-pdu-wireshark
nr-mac-remove-ue-list
nr-pdcp-benchmarking
nr-pdcp-improvements
nr-pdcp-nea2-security
nr-pdcp-nia2-integrity
nr-pdcp-small-bugfixes
nr-pdcp-srb-integrity
nr-ra-fix
nr-rlc-am-bugfix-w44
nr-rlc-bugfix-w44
nr-stats-print
nrPBCHTCFix
nrPbchTcFix
nrUE
nrUE-hs
nrUE-upper-layer
nr_bsr
nr_dl_dmrs_type2
nr_dl_pf
nr_dl_pf2
nr_dl_ul_ptrs
nr_fdd_if_fix
nr_improve_chanest
nr_polar_decoder_improvement
nr_power_measurement_fixes
nr_prach_fr2
nr_ue_msg3
nr_ue_pdcp_fix
nr_ue_tti_cleanup
nr_ul_pf
nr_ul_scfdma
nrue_msg2_reception
nsa-ue
nsa_remove_band_hardcodings
oai-sim
oairu
oairu-dockerfile-support
oc-docker-october-improvements
openxg/develop
pdcp-benchmark
phy-asan-fixes
physim-build-deploy
physim-deploy-handle-error-cases
polar8
prb_based_dl_channel_estimation
ptrs_rrc_config
pusch-mthread-scaling-fix
pusch-retrans-fix-ue
ra-dl-ul
recursive-cmake
remove_nos1_hack_pdcp
remove_x2_gnb_hardcoding
repair-TA
revert_memcpy
rh-ci-add-ue-parallelization
rh_ci_add_runtime_stats
rh_ci_add_uldlharq_stats
rh_ci_fix_autoterminate
rh_ci_fr1_update
rh_ci_gsheet_rt_monitoring
rh_ci_nsa2jenkins
rh_ci_nsa_test_n310
rh_ci_oc
rh_ci_phy_test_improve
rh_ci_py
rh_ci_ra_fr2
rh_ci_rfsim_ra
rh_ci_test_benetel
rh_ci_test_nsa
rh_ci_test_nsa_wk16
rh_ci_test_nsa_wk17_b
rh_ci_test_nsa_wk17b
rh_ci_test_rfsim_sa
rh_ci_ue_parallel
rh_doc_update_3
rh_fr1_newjenkins
rh_fr1_update
rh_gnb_compile_fix
rh_wk50_debug
rlc-v2-bugfix-status-reporting
rlc-v2-tick
rlc_v2_coverity_fixes
rohan_ulsim2RxFix
rrc-enb-phy-testmode
s1-subnormal_rewrite
s1_subnormal
s1_subnormal-robert
s1ap-bugfix-rab_setup
sa-demo
sa-demo-hs
sa-merge-rrc-srb
sa-msg4
sa-msg4-rrc
sa-msg4-rrc-yihz
sa-msg4-rrc-yihz-hs
sa_rrc_yihz
sanitize-address
sanitize-v1
sanitize-v1-tmp
sarma_pvnp_oai
scs_60_iisc
sim-channels
small-bugfixes-w40
small-config-change
small_nr_bugfixes
smallcleanup
split73
t-gnb-tracer
test-5GREC
test-nsa-benetel
test-panos
test_nsa_gtpu_fix
test_rt-fix_phy-test
testing_2symb_pdcch
testing_with_external_txdata
tp-ota-test
trx_thread_param
ue-csi
ue-dci-false-detection
ue-fixes
ue-fixes-ota
ue-pdsch-pusch-parallel
ue-race-fix
ue_beam_selection
ul-freq-iq-samps-to-file
ul_dl_dci_same_slot
ul_harq
ulsch_decode_mthread
ulsim_changes
usrp_fix_adc_shift_and_pps_sync
usrp_stop_cleanly
usrp_x400
wf-sa-rrc
wf_testc
wireshark-T-hack-ueid
wireshark-log-scheduling-requests
wk11-with-phytest
x2-endc-processing
x2_handle_sctp_shutdown
xiangwab
xiangwan
xw2
yihongzheng_srb
zzs
2021.wk14_a
2021.wk13_d
2021.wk13_c
2021.w27
2021.w26
2021.w25
2021.w24
2021.w23
2021.w22
2021.w20
2021.w19
2021.w18_b
2021.w18_a
2021.w17_b
2021.w16
2021.w15
2021.w14
2021.w13_a
2021.w12
2021.w11
2021.w10
2021.w09
2021.w08
2021.w06
2021.w05
2021.w04
2021.w02
2020.w51_2
2020.w51
2020.w50
2020.w49
2020.w48_2
2020.w48
2020.w47
2020.w46_2
2020.w46
2020.w45_2
2020.w45
2020.w44
2020.w42_2
2020.w42
2020.w41
2020.w39
2020.w38
2020.w37
2020.w36
2020.w34
2020.w33
2020.w31
2020.w30
2020.w29
2020.w28
2020.w26
2020.w25
2020.w24
2020.w23
2020.w22
2020.w19
2020.w17
benetel_phase_rotation
benetel_gnb_rel_2.0
benetel_gnb_rel_1.0
benetel_enb_rel_2.0
benetel_enb_rel_1.0
No related merge requests found
Changes
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6 changed files
with
211 additions
and
53 deletions
+211
-53
executables/main-fs6.c
executables/main-fs6.c
+159
-42
executables/split_headers.h
executables/split_headers.h
+32
-0
executables/transport_split.c
executables/transport_split.c
+3
-2
openair1/PHY/LTE_TRANSPORT/ulsch_decoding.c
openair1/PHY/LTE_TRANSPORT/ulsch_decoding.c
+3
-1
openair1/SCHED/fapi_l1.h
openair1/SCHED/fapi_l1.h
+1
-1
openair1/SCHED/phy_procedures_lte_eNb.c
openair1/SCHED/phy_procedures_lte_eNb.c
+13
-7
No files found.
executables/main-fs6.c
View file @
55660e87
...
...
@@ -171,6 +171,49 @@ void prach_eNB_process(uint8_t *bufferZone, int bufSize, PHY_VARS_eNB *eNB) {
}
}
void
sendFs6Ulharq
(
int
UEid
,
PHY_VARS_eNB
*
eNB
,
int
frame
,
int
subframe
,
uint8_t
*
harq_ack
,
uint8_t
tdd_mapping_mode
,
uint16_t
tdd_multiplexing_mask
)
{
static
int
current_fsf
=-
1
;
int
fsf
=
frame
*
16
+
subframe
;
uint8_t
*
bufferZone
=
eNB
->
FS6bufferZone
;
commonUDP_t
*
FirstUDPheader
=
(
commonUDP_t
*
)
bufferZone
;
// move to the end
uint8_t
*
firstFreeByte
=
bufferZone
;
int
curBlock
=
0
;
if
(
current_fsf
!=
fsf
)
{
for
(
int
i
=
0
;
i
<
FirstUDPheader
->
nbBlocks
;
i
++
)
{
AssertFatal
(
((
commonUDP_t
*
)
firstFreeByte
)
->
blockID
==
curBlock
,
""
);
firstFreeByte
+=
alignedSize
(
firstFreeByte
);
curBlock
++
;
}
commonUDP_t
*
newUDPheader
=
(
commonUDP_t
*
)
firstFreeByte
;
FirstUDPheader
->
nbBlocks
++
;
newUDPheader
->
blockID
=
curBlock
;
newUDPheader
->
contentBytes
=
sizeof
(
fs6_ul_t
)
+
sizeof
(
fs6_ul_uespec_uci_t
);
hULUEuci
(
newUDPheader
)
->
type
=
fs6ULcch
;
hULUEuci
(
newUDPheader
)
->
nb_active_ue
=
0
;
}
else
for
(
int
i
=
0
;
i
<
FirstUDPheader
->
nbBlocks
-
1
;
i
++
)
{
AssertFatal
(
((
commonUDP_t
*
)
firstFreeByte
)
->
blockID
==
curBlock
,
""
);
firstFreeByte
+=
alignedSize
(
firstFreeByte
);
curBlock
++
;
}
commonUDP_t
*
newUDPheader
=
(
commonUDP_t
*
)
firstFreeByte
;
fs6_ul_uespec_uci_element_t
*
tmp
=
(
fs6_ul_uespec_uci_element_t
*
)(
hULUEuci
(
newUDPheader
)
+
1
);
tmp
+=
hULUEuci
(
newUDPheader
)
->
nb_active_ue
;
tmp
->
UEid
=
UEid
;
tmp
->
frame
=
frame
;
tmp
->
subframe
=
subframe
;
memcpy
(
tmp
->
harq_ack
,
harq_ack
,
4
);
tmp
->
tdd_mapping_mode
=
tdd_mapping_mode
;
tmp
->
tdd_multiplexing_mask
=
tdd_multiplexing_mask
;
tmp
->
n0_subband_power_dB
=
eNB
->
measurements
.
n0_subband_power_dB
[
0
][
0
];
hULUEuci
(
newUDPheader
)
->
nb_active_ue
++
;
newUDPheader
->
contentBytes
+=
sizeof
(
fs6_ul_uespec_uci_element_t
);
}
void
sendFs6Ul
(
PHY_VARS_eNB
*
eNB
,
int
UE_id
,
int
harq_pid
,
int
segmentID
,
int16_t
*
data
,
int
dataLen
)
{
uint8_t
*
bufferZone
=
eNB
->
FS6bufferZone
;
commonUDP_t
*
FirstUDPheader
=
(
commonUDP_t
*
)
bufferZone
;
...
...
@@ -188,10 +231,12 @@ void sendFs6Ul(PHY_VARS_eNB *eNB, int UE_id, int harq_pid, int segmentID, int16_
FirstUDPheader
->
nbBlocks
++
;
newUDPheader
->
blockID
=
curBlock
;
newUDPheader
->
contentBytes
=
sizeof
(
fs6_ul_t
)
+
sizeof
(
fs6_ul_uespec_t
)
+
dataLen
;
hULUE
(
newUDPheader
)
->
type
=
fs6ULsch
;
hULUE
(
newUDPheader
)
->
UE_id
=
UE_id
;
hULUE
(
newUDPheader
)
->
harq_id
=
harq_pid
;
hULUE
(
newUDPheader
)
->
segment
=
segmentID
;
memcpy
(
hULUE
(
newUDPheader
)
+
1
,
data
,
dataLen
);
hULUE
(
newUDPheader
)
->
segLen
=
dataLen
;
}
void
pusch_procedures_extract
(
uint8_t
*
bufferZone
,
int
bufSize
,
PHY_VARS_eNB
*
eNB
,
L1_rxtx_proc_t
*
proc
)
{
...
...
@@ -351,7 +396,7 @@ int ulsch_decoding_process(PHY_VARS_eNB *eNB, int UE_id, int llr8_flag) {
&
ulsch_harq
->
Kminus
,
&
ulsch_harq
->
F
);
for
(
int
r
=
0
;
r
<
ulsch_harq
->
C
cC
;
r
++
)
{
for
(
int
r
=
0
;
r
<
ulsch_harq
->
C
;
r
++
)
{
// printf("before subblock deinterleaving c[%d] = %p\n",r,ulsch_harq->c[r]);
// Get Turbo interleaver parameters
int
Kr
;
...
...
@@ -400,13 +445,13 @@ int ulsch_decoding_process(PHY_VARS_eNB *eNB, int UE_id, int llr8_flag) {
if
(
r
==
0
)
{
memcpy
(
ulsch_harq
->
bb
,
&
ulsch_harq
->
c
[
0
][(
ulsch_harq
->
F
>>
3
)],
Kr_bytes
-
(
ulsch_harq
->
F
>>
3
)
-
((
ulsch_harq
->
C
cC
>
1
)
?
3
:
0
));
offset
=
Kr_bytes
-
(
ulsch_harq
->
F
>>
3
)
-
((
ulsch_harq
->
C
cC
>
1
)
?
3
:
0
);
Kr_bytes
-
(
ulsch_harq
->
F
>>
3
)
-
((
ulsch_harq
->
C
>
1
)
?
3
:
0
));
offset
=
Kr_bytes
-
(
ulsch_harq
->
F
>>
3
)
-
((
ulsch_harq
->
C
>
1
)
?
3
:
0
);
}
else
{
memcpy
(
ulsch_harq
->
bb
+
offset
,
ulsch_harq
->
c
[
r
],
Kr_bytes
-
((
ulsch_harq
->
C
cC
>
1
)
?
3
:
0
));
offset
+=
(
Kr_bytes
-
((
ulsch_harq
->
C
cC
>
1
)
?
3
:
0
));
Kr_bytes
-
((
ulsch_harq
->
C
>
1
)
?
3
:
0
));
offset
+=
(
Kr_bytes
-
((
ulsch_harq
->
C
>
1
)
?
3
:
0
));
}
}
else
{
break
;
...
...
@@ -583,15 +628,32 @@ void recvFs6Ul(uint8_t *bufferZone, int nbBlocks, PHY_VARS_eNB *eNB) {
void
*
bufPtr
=
bufferZone
;
for
(
int
i
=
0
;
i
<
nbBlocks
;
i
++
)
{
//nbBlocks is the actual received blocks
if
(
((
commonUDP_t
*
)
bufPtr
)
->
contentBytes
>=
sizeof
(
fs6_ul_t
)
+
sizeof
(
fs6_ul_uespec_t
)
)
{
if
(
((
commonUDP_t
*
)
bufPtr
)
->
contentBytes
>
sizeof
(
fs6_ul_t
)
)
{
int
type
=
hULUE
(
bufPtr
)
->
type
;
if
(
type
==
fs6ULsch
)
{
LTE_eNB_ULSCH_t
*
ulsch
=
eNB
->
ulsch
[
hULUE
(
bufPtr
)
->
UE_id
];
LTE_UL_eNB_HARQ_t
*
ulsch_harq
=
ulsch
->
harq_processes
[
hULUE
(
bufPtr
)
->
harq_id
];
memcpy
(
&
ulsch_harq
->
d
[
hULUE
(
bufPtr
)
->
segment
][
96
],
hULUE
(
bufPtr
)
+
1
,
hULUE
(
bufPtr
)
->
segLen
);
bufPtr
+=
alignedSize
(
bufPtr
);
LOG_W
(
PHY
,
"Received ulsch data for: rnti:%d, fsf: %d/%d
\n
"
,
ulsch
->
rnti
,
eNB
->
proc
.
frame_rx
,
eNB
->
proc
.
subframe_rx
);
}
else
if
(
type
==
fs6ULcch
)
{
int
nb_uci
=
hULUEuci
(
bufPtr
)
->
nb_active_ue
;
fs6_ul_uespec_uci_element_t
*
tmp
=
(
fs6_ul_uespec_uci_element_t
*
)(
hULUEuci
(
bufPtr
)
+
1
);
for
(
int
i
=
0
;
i
<
nb_uci
;
i
++
)
{
eNB
->
measurements
.
n0_subband_power_dB
[
0
][
0
]
=
tmp
->
n0_subband_power_dB
;
fill_uci_harq_indication
(
tmp
->
UEid
,
eNB
,
&
eNB
->
uci_vars
[
tmp
->
UEid
],
tmp
->
frame
,
tmp
->
subframe
,
tmp
->
harq_ack
,
tmp
->
tdd_mapping_mode
,
tmp
->
tdd_multiplexing_mask
);
tmp
++
;
}
}
else
LOG_E
(
PHY
,
"FS6 ul packet type impossible
\n
"
);
}
bufPtr
+=
alignedSize
(
bufPtr
);
}
}
...
...
@@ -601,30 +663,7 @@ void phy_procedures_eNB_uespec_RX_process(uint8_t *bufferZone, int nbBlocks,PHY_
pusch_procedures_process
(
bufferZone
,
nbBlocks
,
eNB
);
}
void
phy_procedures_eNB_TX_process
(
uint8_t
*
bufferZone
,
int
nbBlocks
,
PHY_VARS_eNB
*
eNB
,
L1_rxtx_proc_t
*
proc
,
int
do_meas
)
{
LTE_DL_FRAME_PARMS
*
fp
=&
eNB
->
frame_parms
;
int
subframe
=
proc
->
subframe_tx
;
int
frame
=
proc
->
frame_tx
;
//LTE_UL_eNB_HARQ_t *ulsch_harq;
eNB
->
pdcch_vars
[
subframe
&
1
].
num_pdcch_symbols
=
hDL
(
bufferZone
)
->
num_pdcch_symbols
;
eNB
->
pdcch_vars
[
subframe
&
1
].
num_dci
=
hDL
(
bufferZone
)
->
num_dci
;
uint8_t
num_mdci
=
eNB
->
mpdcch_vars
[
subframe
&
1
].
num_dci
=
hDL
(
bufferZone
)
->
num_mdci
;
eNB
->
pbch_configured
=
true
;
memcpy
(
eNB
->
pbch_pdu
,
hDL
(
bufferZone
)
->
pbch_pdu
,
4
);
// Remove all scheduled DL, we will populate from the CU sending
for
(
int
UE_id
=
0
;
UE_id
<
NUMBER_OF_UE_MAX
;
UE_id
++
)
{
LTE_eNB_DLSCH_t
*
dlsch0
=
eNB
->
dlsch
[
UE_id
][
0
];
if
(
dlsch0
&&
dlsch0
->
rnti
>
0
)
{
#ifdef PHY_TX_THREAD
dlsch0
->
active
[
subframe
]
=
0
;
#else
dlsch0
->
active
=
0
;
#endif
}
}
void
rcvFs6DL
(
uint8_t
*
bufferZone
,
int
nbBlocks
,
PHY_VARS_eNB
*
eNB
,
int
frame
,
int
subframe
)
{
void
*
bufPtr
=
bufferZone
;
for
(
int
i
=
0
;
i
<
nbBlocks
;
i
++
)
{
//nbBlocks is the actual received blocks
...
...
@@ -687,19 +726,50 @@ void phy_procedures_eNB_TX_process(uint8_t *bufferZone, int nbBlocks, PHY_VARS_e
ulsch_harq
->
first_rb
=
hTxULUE
(
bufPtr
)
->
first_rb
;
ulsch_harq
->
V_UL_DAI
=
hTxULUE
(
bufPtr
)
->
V_UL_DAI
;
ulsch_harq
->
Qm
=
hTxULUE
(
bufPtr
)
->
Qm
;
ulsch_harq
->
CcC
=
hTxULUE
(
bufPtr
)
->
CcC
;
ulsch_harq
->
srs_active
=
hTxULUE
(
bufPtr
)
->
srs_active
;
ulsch_harq
->
TBS
=
hTxULUE
(
bufPtr
)
->
TBS
;
ulsch_harq
->
Nsymb_pusch
=
hTxULUE
(
bufPtr
)
->
Nsymb_pusch
;
LOG_W
(
PHY
,
"Received request to perform ulsch for: rnti:%d, fsf: %d/%d
\n
"
,
ulsch
->
rnti
,
frame
,
subframe
);
}
}
else
if
(
type
==
fs6ULConfigCCH
)
{
fs6_dl_uespec_ulcch_element_t
*
tmp
=
(
fs6_dl_uespec_ulcch_element_t
*
)(
hTxULcch
(
bufPtr
)
+
1
);
for
(
int
i
=
0
;
i
<
hTxULcch
(
bufPtr
)
->
nb_active_ue
;
i
++
)
memcpy
(
&
eNB
->
uci_vars
[
tmp
->
UE_id
],
&
tmp
->
cch_vars
,
sizeof
(
tmp
->
cch_vars
));
}
else
LOG_E
(
PHY
,
"Impossible block in fs6 DL
\n
"
);
}
bufPtr
+=
alignedSize
(
bufPtr
);
}
}
void
phy_procedures_eNB_TX_process
(
uint8_t
*
bufferZone
,
int
nbBlocks
,
PHY_VARS_eNB
*
eNB
,
L1_rxtx_proc_t
*
proc
,
int
do_meas
)
{
LTE_DL_FRAME_PARMS
*
fp
=&
eNB
->
frame_parms
;
int
subframe
=
proc
->
subframe_tx
;
int
frame
=
proc
->
frame_tx
;
//LTE_UL_eNB_HARQ_t *ulsch_harq;
eNB
->
pdcch_vars
[
subframe
&
1
].
num_pdcch_symbols
=
hDL
(
bufferZone
)
->
num_pdcch_symbols
;
eNB
->
pdcch_vars
[
subframe
&
1
].
num_dci
=
hDL
(
bufferZone
)
->
num_dci
;
uint8_t
num_mdci
=
eNB
->
mpdcch_vars
[
subframe
&
1
].
num_dci
=
hDL
(
bufferZone
)
->
num_mdci
;
eNB
->
pbch_configured
=
true
;
memcpy
(
eNB
->
pbch_pdu
,
hDL
(
bufferZone
)
->
pbch_pdu
,
4
);
// Remove all scheduled DL, we will populate from the CU sending
for
(
int
UE_id
=
0
;
UE_id
<
NUMBER_OF_UE_MAX
;
UE_id
++
)
{
LTE_eNB_DLSCH_t
*
dlsch0
=
eNB
->
dlsch
[
UE_id
][
0
];
if
(
dlsch0
&&
dlsch0
->
rnti
>
0
)
{
#ifdef PHY_TX_THREAD
dlsch0
->
active
[
subframe
]
=
0
;
#else
dlsch0
->
active
=
0
;
#endif
}
}
rcvFs6DL
(
bufferZone
,
nbBlocks
,
eNB
,
frame
,
subframe
);
if
(
do_meas
==
1
)
{
start_meas
(
&
eNB
->
phy_proc_tx
);
start_meas
(
&
eNB
->
dlsch_common_and_dci
);
...
...
@@ -831,13 +901,11 @@ void appendFs6TxULUE(uint8_t *bufferZone, LTE_DL_FRAME_PARMS *fp, int curUE, LTE
cpyToDuHarq
(
first_rb
);
cpyToDuHarq
(
V_UL_DAI
);
cpyToDuHarq
(
Qm
);
cpyToDuHarq
(
CcC
);
cpyToDuHarq
(
srs_active
);
cpyToDuHarq
(
TBS
);
cpyToDuHarq
(
Nsymb_pusch
);
LOG_W
(
PHY
,
"Added request to perform ulsch for: rnti:%d, fsf: %d/%d
\n
"
,
ulsch
->
rnti
,
frame
,
subframe
);
}
void
appendFs6DLUE
(
uint8_t
*
bufferZone
,
LTE_DL_FRAME_PARMS
*
fp
,
int
UE_id
,
int8_t
harq_pid
,
LTE_eNB_DLSCH_t
*
dlsch0
,
LTE_DL_eNB_HARQ_t
*
harqData
,
int
frame
,
int
subframe
)
{
commonUDP_t
*
FirstUDPheader
=
(
commonUDP_t
*
)
bufferZone
;
// move to the end
...
...
@@ -889,6 +957,50 @@ void appendFs6DLUE(uint8_t *bufferZone, LTE_DL_FRAME_PARMS *fp, int UE_id, int8_
//LOG_D(PHY,"buffer e:%hhx\n", ( (uint8_t *)(hDLUE(newUDPheader)+1) )[i]);
}
void
appendFs6DLUEcch
(
uint8_t
*
bufferZone
,
PHY_VARS_eNB
*
eNB
,
int
frame
,
int
subframe
)
{
commonUDP_t
*
FirstUDPheader
=
(
commonUDP_t
*
)
bufferZone
;
// move to the end
uint8_t
*
firstFreeByte
=
bufferZone
;
int
curBlock
=
0
;
for
(
int
i
=
0
;
i
<
FirstUDPheader
->
nbBlocks
;
i
++
)
{
AssertFatal
(
((
commonUDP_t
*
)
firstFreeByte
)
->
blockID
==
curBlock
,
""
);
firstFreeByte
+=
alignedSize
(
firstFreeByte
);
curBlock
++
;
}
commonUDP_t
*
newUDPheader
=
(
commonUDP_t
*
)
firstFreeByte
;
bool
first_UE
=
true
;
for
(
int
i
=
0
;
i
<
NUMBER_OF_UCI_VARS_MAX
;
i
++
)
{
LTE_eNB_UCI
*
uci
=
&
(
eNB
->
uci_vars
[
i
]);
if
((
uci
->
active
==
1
)
&&
(
uci
->
frame
==
frame
)
&&
(
uci
->
subframe
==
subframe
))
{
LOG_D
(
PHY
,
"Frame %d, subframe %d: adding uci procedures (type %d) for %d
\n
"
,
frame
,
subframe
,
uci
->
type
,
i
);
if
(
first_UE
)
{
FirstUDPheader
->
nbBlocks
++
;
newUDPheader
->
blockID
=
curBlock
;
newUDPheader
->
contentBytes
=
sizeof
(
fs6_dl_t
)
+
sizeof
(
fs6_dl_uespec_ulcch_t
);
hTxULcch
(
newUDPheader
)
->
type
=
fs6ULConfigCCH
;
hTxULcch
(
newUDPheader
)
->
nb_active_ue
=
0
;
first_UE
=
false
;
}
fs6_dl_uespec_ulcch_element_t
*
tmp
=
(
fs6_dl_uespec_ulcch_element_t
*
)(
hTxULcch
(
newUDPheader
)
+
1
);
tmp
+=
hTxULcch
(
newUDPheader
)
->
nb_active_ue
;
tmp
->
UE_id
=
i
;
memcpy
(
&
tmp
->
cch_vars
,
uci
,
sizeof
(
tmp
->
cch_vars
));
hTxULcch
(
newUDPheader
)
->
nb_active_ue
++
;
newUDPheader
->
contentBytes
+=
sizeof
(
fs6_dl_uespec_ulcch_element_t
);
}
}
}
void
phy_procedures_eNB_TX_extract
(
uint8_t
*
bufferZone
,
PHY_VARS_eNB
*
eNB
,
L1_rxtx_proc_t
*
proc
,
int
do_meas
,
uint8_t
*
buf
,
int
bufSize
)
{
int
frame
=
proc
->
frame_tx
;
int
subframe
=
proc
->
subframe_tx
;
...
...
@@ -947,6 +1059,11 @@ void phy_procedures_eNB_TX_extract(uint8_t *bufferZone, PHY_VARS_eNB *eNB, L1_rx
}
}
appendFs6DLUEcch
(
bufferZone
,
eNB
,
frame
,
subframe
);
uint8_t
num_pdcch_symbols
=
eNB
->
pdcch_vars
[
subframe
&
1
].
num_pdcch_symbols
;
uint8_t
num_dci
=
eNB
->
pdcch_vars
[
subframe
&
1
].
num_dci
;
uint8_t
num_mdci
=
eNB
->
mpdcch_vars
[
subframe
&
1
].
num_dci
;
...
...
This diff is collapsed.
Click to expand it.
executables/split_headers.h
View file @
55660e87
...
...
@@ -64,6 +64,9 @@ typedef struct {
enum
pckType
{
fs6UlConfig
=
25
,
fs6DlConfig
=
26
,
fs6ULConfigCCH
=
27
,
fs6ULsch
=
28
,
fs6ULcch
=
29
,
};
typedef
struct
{
...
...
@@ -111,12 +114,39 @@ typedef struct {
}
fs6_dl_uespec_t
;
typedef
struct
{
int16_t
UE_id
;
LTE_eNB_UCI
cch_vars
;
}
fs6_dl_uespec_ulcch_element_t
;
typedef
struct
{
enum
pckType
type
:
8
;
int16_t
nb_active_ue
;
}
fs6_dl_uespec_ulcch_t
;
typedef
struct
{
enum
pckType
type
:
8
;
short
UE_id
;
short
harq_id
;
short
segment
;
short
segLen
;
}
fs6_ul_uespec_t
;
typedef
struct
{
int
UEid
;
int
frame
;
int
subframe
;
uint8_t
harq_ack
[
4
];
uint8_t
tdd_mapping_mode
;
uint16_t
tdd_multiplexing_mask
;
unsigned
short
n0_subband_power_dB
;
}
fs6_ul_uespec_uci_element_t
;
typedef
struct
{
enum
pckType
type
:
8
;
int16_t
nb_active_ue
;
}
fs6_ul_uespec_uci_t
;
bool
createUDPsock
(
char
*
sourceIP
,
char
*
sourcePort
,
char
*
destIP
,
char
*
destPort
,
UDPsock_t
*
result
);
int
receiveSubFrame
(
UDPsock_t
*
sock
,
void
*
bufferZone
,
int
bufferSize
,
uint16_t
contentType
);
int
sendSubFrame
(
UDPsock_t
*
sock
,
void
*
bufferZone
,
ssize_t
secondHeaderSize
,
uint16_t
contentType
);
...
...
@@ -130,7 +160,9 @@ int sendSubFrame(UDPsock_t *sock, void *bufferZone, ssize_t secondHeaderSize, ui
#define hUL(xBuf) ((fs6_ul_t*)(((commonUDP_t *)xBuf)+1))
#define hDLUE(xBuf) ((fs6_dl_uespec_t*) (((fs6_dl_t*)(((commonUDP_t *)xBuf)+1))+1))
#define hTxULUE(xBuf) ((fs6_dl_ulsched_t*) (((fs6_dl_t*)(((commonUDP_t *)xBuf)+1))+1))
#define hTxULcch(xBuf) ((fs6_dl_uespec_ulcch_t*) (((fs6_dl_t*)(((commonUDP_t *)xBuf)+1))+1))
#define hULUE(xBuf) ((fs6_ul_uespec_t*) (((fs6_ul_t*)(((commonUDP_t *)xBuf)+1))+1))
#define hULUEuci(xBuf) ((fs6_ul_uespec_uci_t*) (((fs6_ul_t*)(((commonUDP_t *)xBuf)+1))+1))
static
inline
size_t
alignedSize
(
uint8_t
*
ptr
)
{
commonUDP_t
*
header
=
(
commonUDP_t
*
)
ptr
;
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executables/transport_split.c
View file @
55660e87
...
...
@@ -139,9 +139,9 @@ int sendSubFrame(UDPsock_t *sock, void *bufferZone, ssize_t secondHeaderSize, ui
*
currentHeader
=*
UDPheader
;
currentHeader
->
blockID
=
blockId
;
memcpy
(
commonUDPdata
((
void
*
)
currentHeader
),
commonUDPdata
(
bufferZone
),
secondHeaderSize
);
blockId
++
;
}
blockId
++
;
int
sz
=
alignedSize
(
bufferZone
);
// Let's use the first address returned by getaddrinfo()
int
ret
=
sendto
(
sock
->
sockHandler
,
bufferZone
,
sz
,
0
,
...
...
@@ -155,6 +155,7 @@ int sendSubFrame(UDPsock_t *sock, void *bufferZone, ssize_t secondHeaderSize, ui
nbBlocks
--
;
}
while
(
nbBlocks
);
LOG_D
(
HW
,
"Sent: TS: %lu
\n
"
,
UDPheader
->
timestamp
);
LOG_D
(
HW
,
"Sent: TS: %lu, nb blocks %d, size of first block: %lu
\n
"
,
UDPheader
->
timestamp
,
UDPheader
->
nbBlocks
,
alignedSize
((
void
*
)
UDPheader
));
return
0
;
}
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openair1/PHY/LTE_TRANSPORT/ulsch_decoding.c
View file @
55660e87
...
...
@@ -46,6 +46,7 @@
#include "transport_proto.h"
extern
WORKER_CONF_t
get_thread_worker_conf
(
void
);
void
sendFs6Ul
(
PHY_VARS_eNB
*
eNB
,
int
UE_id
,
int
harq_pid
,
int
segmentID
,
int16_t
*
data
,
int
dataLen
);
void
free_eNB_ulsch
(
LTE_eNB_ULSCH_t
*
ulsch
)
{
int
i
,
r
;
...
...
@@ -619,7 +620,8 @@ int ulsch_decoding_data(PHY_VARS_eNB *eNB,int UE_id,int harq_pid,int llr8_flag)
if
(
getenv
(
"fs6"
)
!=
NULL
&&
strncasecmp
(
getenv
(
"fs6"
),
"du"
,
2
)
==
0
)
{
// r is the segment id,
// Kr is the segment length in short
sendFs6Ul
(
eNB
,
UE_id
,
harq_pid
,
r
,
&
ulsch_harq
->
d
[
r
][
96
],
Kr
*
sizeof
(
int16_t
));
// *3 because LTE redudancy scheme
sendFs6Ul
(
eNB
,
UE_id
,
harq_pid
,
r
,
&
ulsch_harq
->
d
[
r
][
96
],
Kr
*
sizeof
(
int16_t
)
*
3
);
return
0
;
}
...
...
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openair1/SCHED/fapi_l1.h
View file @
55660e87
...
...
@@ -37,7 +37,7 @@
#include "SCHED/sched_common.h"
#include "nfapi_interface.h"
void
fill_uci_harq_indication
(
PHY_VARS_eNB
*
eNB
,
LTE_eNB_UCI
*
uci
,
int
frame
,
int
subframe
,
uint8_t
*
harq_ack
,
uint8_t
tdd_mapping_mode
,
uint16_t
tdd_multiplexing_mask
);
void
fill_uci_harq_indication
(
int
UEid
,
PHY_VARS_eNB
*
eNB
,
LTE_eNB_UCI
*
uci
,
int
frame
,
int
subframe
,
uint8_t
*
harq_ack
,
uint8_t
tdd_mapping_mode
,
uint16_t
tdd_multiplexing_mask
);
void
fill_ulsch_harq_indication
(
PHY_VARS_eNB
*
eNB
,
LTE_UL_eNB_HARQ_t
*
ulsch_harq
,
uint16_t
rnti
,
int
frame
,
int
subframe
,
int
bundling
);
void
fill_ulsch_cqi_indication
(
PHY_VARS_eNB
*
eNB
,
uint16_t
frame
,
uint8_t
subframe
,
LTE_UL_eNB_HARQ_t
*
ulsch_harq
,
uint16_t
rnti
);
void
fill_sr_indication
(
PHY_VARS_eNB
*
eNB
,
uint16_t
rnti
,
int
frame
,
int
subframe
,
uint32_t
stat
);
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...
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openair1/SCHED/phy_procedures_lte_eNb.c
View file @
55660e87
...
...
@@ -46,6 +46,7 @@
#include <time.h>
#include "intertask_interface.h"
void
sendFs6Ulharq
(
int
UEid
,
PHY_VARS_eNB
*
eNB
,
int
frame
,
int
subframe
,
uint8_t
*
harq_ack
,
uint8_t
tdd_mapping_mode
,
uint16_t
tdd_multiplexing_mask
);
nfapi_ue_release_request_body_t
release_rntis
;
...
...
@@ -768,7 +769,7 @@ uci_procedures(PHY_VARS_eNB *eNB,
frame
,
subframe
,
pucch_b0b1
[
0
][
0
],
metric
[
0
]);
uci
->
stat
=
metric
[
0
];
fill_uci_harq_indication
(
eNB
,
uci
,
frame
,
subframe
,
pucch_b0b1
[
0
],
0
,
0xffff
);
fill_uci_harq_indication
(
i
,
eNB
,
uci
,
frame
,
subframe
,
pucch_b0b1
[
0
],
0
,
0xffff
);
}
else
{
// frame_type == TDD
LOG_D
(
PHY
,
"Frame %d Subframe %d Demodulating PUCCH (UCI %d) for ACK/NAK (uci->pucch_fmt %d,uci->type %d.uci->frame %d, uci->subframe %d): n1_pucch0 %d SR_payload %d
\n
"
,
frame
,
subframe
,
i
,
...
...
@@ -881,7 +882,7 @@ uci_procedures(PHY_VARS_eNB *eNB,
}
uci
->
stat
=
metric
[
0
];
fill_uci_harq_indication
(
eNB
,
uci
,
frame
,
subframe
,
harq_ack
,
2
,
0xffff
);
// special_bundling mode
fill_uci_harq_indication
(
i
,
eNB
,
uci
,
frame
,
subframe
,
harq_ack
,
2
,
0xffff
);
// special_bundling mode
}
else
if
((
uci
->
tdd_bundling
==
0
)
&&
(
uci
->
num_pucch_resources
==
2
))
{
// multiplexing + no SR, implement Table 10.1.3-5 (Rel14) for multiplexing with M=2
if
(
pucch_b0b1
[
0
][
0
]
==
4
||
pucch_b0b1
[
1
][
0
]
==
4
)
{
// there isn't a likely transmission
...
...
@@ -917,7 +918,7 @@ uci_procedures(PHY_VARS_eNB *eNB,
}
uci
->
stat
=
max
(
metric
[
0
],
metric
[
1
]);
fill_uci_harq_indication
(
eNB
,
uci
,
frame
,
subframe
,
harq_ack
,
1
,
tdd_multiplexing_mask
);
// multiplexing mode
fill_uci_harq_indication
(
i
,
eNB
,
uci
,
frame
,
subframe
,
harq_ack
,
1
,
tdd_multiplexing_mask
);
// multiplexing mode
}
//else if ((uci->tdd_bundling == 0) && (res==2))
else
if
((
uci
->
tdd_bundling
==
0
)
&&
(
uci
->
num_pucch_resources
==
3
))
{
// multiplexing + no SR, implement Table 10.1.3-6 (Rel14) for multiplexing with M=3
if
(
harq_ack
[
0
]
==
4
||
...
...
@@ -988,7 +989,7 @@ uci_procedures(PHY_VARS_eNB *eNB,
}
uci
->
stat
=
max_metric
;
fill_uci_harq_indication
(
eNB
,
uci
,
frame
,
subframe
,
harq_ack
,
1
,
tdd_multiplexing_mask
);
// multiplexing mode
fill_uci_harq_indication
(
i
,
eNB
,
uci
,
frame
,
subframe
,
harq_ack
,
1
,
tdd_multiplexing_mask
);
// multiplexing mode
}
}
//else if ((uci->tdd_bundling == 0) && (res==3))
else
if
((
uci
->
tdd_bundling
==
0
)
&&
(
uci
->
num_pucch_resources
==
4
))
{
// multiplexing + no SR, implement Table 10.1.3-7 (Rel14) for multiplexing with M=4
...
...
@@ -1110,14 +1111,14 @@ uci_procedures(PHY_VARS_eNB *eNB,
}
uci
->
stat
=
max_metric
;
fill_uci_harq_indication
(
eNB
,
uci
,
frame
,
subframe
,
harq_ack
,
1
,
tdd_multiplexing_mask
);
// multiplexing mode
fill_uci_harq_indication
(
i
,
eNB
,
uci
,
frame
,
subframe
,
harq_ack
,
1
,
tdd_multiplexing_mask
);
// multiplexing mode
}
// else if ((uci->tdd_bundling == 0) && (res==4))
else
{
// bundling
harq_ack
[
0
]
=
pucch_b0b1
[
0
][
0
];
harq_ack
[
1
]
=
pucch_b0b1
[
0
][
1
];
uci
->
stat
=
metric
[
0
];
LOG_D
(
PHY
,
"bundling: (%d,%d), metric %d
\n
"
,
harq_ack
[
0
],
harq_ack
[
1
],
uci
->
stat
);
fill_uci_harq_indication
(
eNB
,
uci
,
frame
,
subframe
,
harq_ack
,
0
,
0xffff
);
// special_bundling mode
fill_uci_harq_indication
(
i
,
eNB
,
uci
,
frame
,
subframe
,
harq_ack
,
0
,
0xffff
);
// special_bundling mode
}
#ifdef DEBUG_PHY_PROC
...
...
@@ -1754,7 +1755,12 @@ void fill_ulsch_harq_indication (PHY_VARS_eNB *eNB, LTE_UL_eNB_HARQ_t *ulsch_har
pthread_mutex_unlock
(
&
eNB
->
UL_INFO_mutex
);
}
void
fill_uci_harq_indication
(
PHY_VARS_eNB
*
eNB
,
LTE_eNB_UCI
*
uci
,
int
frame
,
int
subframe
,
uint8_t
*
harq_ack
,
uint8_t
tdd_mapping_mode
,
uint16_t
tdd_multiplexing_mask
)
{
void
fill_uci_harq_indication
(
int
UEid
,
PHY_VARS_eNB
*
eNB
,
LTE_eNB_UCI
*
uci
,
int
frame
,
int
subframe
,
uint8_t
*
harq_ack
,
uint8_t
tdd_mapping_mode
,
uint16_t
tdd_multiplexing_mask
)
{
if
(
getenv
(
"fs6"
)
!=
NULL
&&
strncasecmp
(
getenv
(
"fs6"
),
"du"
,
2
)
==
0
)
{
sendFs6Ulharq
(
UEid
,
eNB
,
frame
,
subframe
,
harq_ack
,
tdd_mapping_mode
,
tdd_multiplexing_mask
);
return
;
}
int
UE_id
=
find_dlsch
(
uci
->
rnti
,
eNB
,
SEARCH_EXIST
);
//AssertFatal(UE_id>=0,"UE_id doesn't exist rnti:%x\n", uci->rnti);
...
...
This diff is collapsed.
Click to expand it.
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