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常顺宇
OpenXG-RAN
Commits
e981df3c
Commit
e981df3c
authored
4 years ago
by
yaojie
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add nr_decode_SIB1
parent
e6ddb537
dev
1
256_QAM_demod
512-dataplane-bug-in-l2nfapi_nos1
FR2_NSA
Fix_SA_SIB1
NR-PHY-MAC-IF-multi-UE
NRPRACH_highSpeed_saankhya
NRUE_usedlschparallel
NR_10MHz
NR_2port_CSIRS
NR_CSIRS_tomerge
NR_DLUL_PF
NR_DLUL_PF_4UL
NR_DLUL_PF_rebased
NR_DL_MIMO
NR_F1C_F1U_extensions
NR_FAPI_beamindex_SSB_RO
NR_FAPI_beamindex_SSB_RO_SEMPROJ
NR_FDD_FIX
NR_FR2_RA
NR_FR2_RRC_SSB
NR_FR2_initsync_fixes
NR_MAC_Multi_Rach_GlobalEdge
NR_MAC_Multi_Rach_GlobalEdge-old
NR_MAC_SSB
NR_MAC_TCI_UCI_GlobalEdge
NR_MCS_BLER
NR_PUCCH_MultiUE
NR_RA_cleanup
NR_SA_F1AP_5GRECORDS
NR_SA_F1AP_5GRECORDS-USIM
NR_SA_F1AP_5GRECORDS-wf-0623
NR_SA_F1AP_5GRECORDS_lts
NR_SA_F1AP_RFSIMULATOR
NR_SA_F1AP_RFSIMULATOR2
NR_SA_F1AP_RFSIMULATOR2_SRB
NR_SA_F1AP_RFSIMULATOR3
NR_SA_F1AP_RFSIMULATOR3_tmp
NR_SA_F1AP_RFSIMULATOR3_wf
NR_SA_F1AP_RFSIMULATOR_w5GCN
NR_SA_F1AP_dev
NR_SA_NGAP_RRC_wk42
NR_SA_itti_sim_wk48
NR_SA_itti_sim_wk48_hs
NR_SA_itti_sim_wk48_hs1
NR_SA_w5GCN_new_gtpu
NR_SCHED_HARQ
NR_SCHED_PDCCH_PUCCH_HARQ
NR_SCHED_PDCCH_PUCCH_HARQ_rebased
NR_SCHED_fixes
NR_SRB_Config
NR_UE_CONFIG_REQ_FIXES
NR_UE_PUCCH_bugfixes
NR_UE_SA
NR_UE_dlsch_bugfix
NR_UE_rework_test
NR_UE_reworking_UCI_procedures
NR_UL_SCFDMA_100MHz
NR_UL_scheduler
NR_UL_scheduler_rebased
NR_Wireshark
NR_beam_simulation
NR_cleanup_PUCCH_resources
NR_gNB_initial_MIB_fix
NR_multiplexing_HARQ_CSI_PUCCH
NR_phytest_bugfixes
NR_reworking_UL_antennaports
NR_scheduling_CSIRS
NR_scheduling_request
NR_scheduling_request2
NR_scheduling_request3
PBCHNRTCFIX
RFquality
Saankhya_NRPRACH_HighSpeed
Test_SA_5GREC
add-dmrs-test
add-ru-docker-image
avxllr
bandwidth-testing
benetel_config_file_fix
benetel_dpdk20
benetel_driver_uldl_pf_merge
benetel_driver_update
benetel_fixes
bsr-fix
bugfix-free-ra-process
bugfix-nr-pdcp-sn-size
bugfix-nr-t-reordering
bugfix-x2-SgNBAdditionRequest
bugfix_gnb_rt_stats_html
bupt-sa-merge
ci-deploy-asterix
ci-deploy-docker-compose
ci-fix-module-ul-iperf
ci-new-docker-pipeline
ci-reduce-nb-vms
ci-test
ci_benetel_longrun_limits
ci_benetel_test
ci_fix_iperf_for_module
ci_hotfix_module_ue_ip_address
ci_improve_module_ctl
ci_nsa_benetel
ci_nsa_fixes
ci_nsa_pipes_improve
ci_nsa_test_integration_2021_wk19
ci_nsa_traces
ci_nsa_uplink
ci_phytest
ci_quectel_support
ci_sa_rfsim_test
ci_solve_ul_for_module
ci_test_5GREC
ci_test_nsa_fix_quectel_nic
ci_test_nsa_on_develop
ci_test_ra_fr2
ci_testinfra_as_code
ci_vm_resource_fix
cleanup_softmodem_main
constant_power
debug-UL-5GRECORDS
debug_UL_signal
detached-w16-test
develop
develop-CBRA-v3
develop-CCE
develop-NR_SA_F1AP_5GRECORDS
develop-NR_SA_F1AP_5GRECORDS-abs
develop-NR_SA_F1AP_5GRECORDS-hs
develop-NR_SA_F1AP_5GRECORDS-hs1
develop-NR_SA_F1AP_5GRECORDS-lts
develop-NR_SA_F1AP_5GRECORDS-lts-wf
develop-NR_SA_F1AP_5GRECORDS-v3
develop-NR_SA_F1AP_5GRECORDS_100M
develop-NR_SA_F1AP_5GRECORDS_LDPC_FPGA
develop-NR_SA_F1AP_5GRECORDS_lfq_0607
develop-SA-CBRA
develop-SA-CBRA-CUDU
develop-SA-CBRA-Msg5
develop-SA-CBRA-lts
develop-SA-CBRA-ulsch-lts
develop-SA-RA
develop-SnT
develop-aw2sori
develop-oriecpriupdates
develop-sib1
develop-sib1-local
develop-sib1-lts
develop-sib1-update
develop-sib1-update-test1
develop-sib1-update-ue
develop-wf-du
develop_stable
disable_CSI_measrep
dlsch_parallel
docker-improvements-2021-april
docker-no-cache-option
dongzhanyi-zte-develop1
enhance-rfsim
episys-merge
episys/nsa_baseline
episys/nsa_development
fedora-gen-kernel-fix
fft_bench_hotfix
fix-check
fix-compile
fix-nr-pdcp-timer
fix-nr-rlc-range-nack
fix-physim-deploy
fix-quectel
fix-realtime
fix-retransmission-rbg
fix-x2-without-gnb
fix_NR_DLUL_PF
fix_NR_DLUL_PF_benchmark
fix_coreset_dmrs_idx
fix_do_ra_data
fix_nr_ulsim
fix_rb_corruption
fix_reestablishment
fixes-CE-RLC-PDU-size
fixgtpu
flexran-repair-mme-mgmt
flexran-rtc-repo-is-public
git-dashboard
gnb-freerun-txru
gnb-n300-fixes
gnb-only-test
gnb-realtime-hotfix
gnb-realtime-quickfix
gnb-threadpool
hack-bch-no-sched-sf-0
hack-exit-gnb-when-no-enb-nsa
integ-w13-test-rt-issue
integration_2020_wk15
integration_2020_wk48
integration_2020_wk48_2
integration_2020_wk49
integration_2020_wk50
integration_2020_wk50_1
integration_2020_wk51
integration_2020_wk51_2
integration_2021_wk02
integration_2021_wk02_wMR988
integration_2021_wk04
integration_2021_wk05
integration_2021_wk06
integration_2021_wk06_MR978
integration_2021_wk06_b
integration_2021_wk06_c
integration_2021_wk08
integration_2021_wk08_2
integration_2021_wk08_MR963
integration_2021_wk09
integration_2021_wk09_b
integration_2021_wk10
integration_2021_wk10_b
integration_2021_wk11
integration_2021_wk12
integration_2021_wk12_b
integration_2021_wk13_a
integration_2021_wk13_b
integration_2021_wk13_b_fix_tdas
integration_2021_wk13_b_fixed
integration_2021_wk13_c
integration_2021_wk14_a
integration_2021_wk15_a
integration_2021_wk16
integration_2021_wk17_a
integration_2021_wk17_b
integration_2021_wk18_a
integration_2021_wk18_b
integration_2021_wk19
integration_2021_wk20_a
integration_2021_wk22
integration_2021_wk23
integration_2021_wk27
integration_w5GC_CBRA_test
inter-RRU-final
itti-enhancement
ldpc_offload_t1
ldpc_short_codeword_fixes
lte-ulsch-bugfix
lte_uplink_improvement
migrate-cpp-check-container
migrate-vm-pipeline-to-bionic
minor-fix-doc-basic-sim
mosaic5g-oai-ran
msg4_phy_0303_lfq
multiple_ssb_sib1_bugfix
nasmesh_kernel_5.8
new-gtpu
nfapi_nr_arch_mod
nfapi_nr_develop
nfapi_nr_develop_new
ngap-dlul
ngap-w48-merge2
ngap-wf
ngap-wf-1120
ngap-wf-1120-srb
ngap-wf-1120-srb-gtp
ngap-wf-1120-srb-gtp-hs
ngap-wf-1120-srb-gtp-hs1
ngap-wf-1120-srb-gtp-hs2
ngap-wf-1120-srb-gtp-yhz
ngap-wf-1203-yunsdr
ngap-wf-liuyu
ngap_lfq_1120
ngap_merge
nr-bsr-fix
nr-dl-mimo-2layer
nr-dmrs-fixes
nr-pdcp-benchmarking
nr-pdcp-improvements
nr-pdcp-nea2-security
nr-pdcp-nia2-integrity
nr-pdcp-small-bugfixes
nr-pdcp-srb-integrity
nr-ra-fix
nr-stats-print
nrPBCHTCFix
nrPbchTcFix
nrUE
nrUE-hs
nrUE-upper-layer
nr_bsr
nr_dl_pf
nr_dl_ul_ptrs
nr_improve_chanest
nr_power_measurement_fixes
nr_ue_pdcp_fix
nr_ul_pf
nr_ul_scfdma
oairu
oairu-dockerfile-support
openxg/develop
phy-asan-fixes
physim-build-deploy
physim-deploy-handle-error-cases
prb_based_dl_channel_estimation
ptrs_rrc_config
pusch-retrans-fix-ue
recursive-cmake
remove_nos1_hack_pdcp
rh-ci-add-ue-parallelization
rh_ci_add_runtime_stats
rh_ci_add_uldlharq_stats
rh_ci_gsheet_rt_monitoring
rh_ci_nsa2jenkins
rh_ci_nsa_test_n310
rh_ci_phy_test_improve
rh_ci_ra_fr2
rh_ci_test_benetel
rh_ci_test_nsa
rh_ci_test_nsa_wk16
rh_ci_test_nsa_wk17_b
rh_ci_test_nsa_wk17b
rh_ci_test_rfsim_sa
rh_ci_ue_parallel
rh_fr1_newjenkins
rh_gnb_compile_fix
rh_wk50_debug
rlc-v2-bugfix-status-reporting
rlc-v2-tick
rohan_ulsim2RxFix
s1-subnormal_rewrite
s1_subnormal
s1_subnormal-robert
sa-demo
sa-demo-hs
sa-merge-rrc-srb
sa-msg4
sa-msg4-rrc
sa-msg4-rrc-yihz
sa-msg4-rrc-yihz-hs
sa_rrc_yihz
sanitize-address
sanitize-v1
sanitize-v1-tmp
sarma_pvnp_oai
scs_60_iisc
sim-channels
small-config-change
small_nr_bugfixes
t-gnb-tracer
test-5GREC
test-nsa-benetel
test-panos
test_nsa_gtpu_fix
test_rt-fix_phy-test
ue-dci-false-detection
ue-fixes
ue-pdsch-pusch-parallel
ue-race-fix
ue_beam_selection
usrp_stop_cleanly
usrp_x400
wf-sa-rrc
wf_testc
wireshark-T-hack-ueid
wireshark-log-scheduling-requests
wk11-with-phytest
x2_handle_sctp_shutdown
xiangwab
xiangwan
xw2
yihongzheng_srb
2021.wk14_a
2021.wk13_d
2021.wk13_c
2021.w27
2021.w26
2021.w25
2021.w24
2021.w23
2021.w22
2021.w20
2021.w19
2021.w18_b
2021.w18_a
2021.w17_b
2021.w16
2021.w15
2021.w14
2021.w13_a
2021.w12
2021.w11
2021.w10
2021.w09
2021.w08
2021.w06
2021.w05
2021.w04
2021.w02
2020.w51_2
2020.w51
2020.w50
2020.w49
2020.w48_2
2020.w48
benetel_gnb_rel_2.0
benetel_gnb_rel_1.0
benetel_enb_rel_2.0
benetel_enb_rel_1.0
No related merge requests found
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+215
-2
openair2/RRC/NR_UE/rrc_UE.c
openair2/RRC/NR_UE/rrc_UE.c
+214
-2
openair2/RRC/NR_UE/rrc_defs.h
openair2/RRC/NR_UE/rrc_defs.h
+1
-0
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openair2/RRC/NR_UE/rrc_UE.c
View file @
e981df3c
...
@@ -33,6 +33,8 @@
...
@@ -33,6 +33,8 @@
#define RRC_UE
#define RRC_UE
#define RRC_UE_C
#define RRC_UE_C
#include "asn1_conversions.h"
#include "NR_DL-DCCH-Message.h" //asn_DEF_NR_DL_DCCH_Message
#include "NR_DL-DCCH-Message.h" //asn_DEF_NR_DL_DCCH_Message
#include "NR_DL-CCCH-Message.h" //asn_DEF_NR_DL_CCCH_Message
#include "NR_DL-CCCH-Message.h" //asn_DEF_NR_DL_CCCH_Message
#include "NR_BCCH-BCH-Message.h" //asn_DEF_NR_BCCH_BCH_Message
#include "NR_BCCH-BCH-Message.h" //asn_DEF_NR_BCCH_BCH_Message
...
@@ -52,6 +54,7 @@
...
@@ -52,6 +54,7 @@
#include "intertask_interface.h"
#include "intertask_interface.h"
#include "executables/softmodem-common.h"
#include "executables/softmodem-common.h"
#include "plmn_data.h"
#include "pdcp.h"
#include "pdcp.h"
#include "UTIL/OSA/osa_defs.h"
#include "UTIL/OSA/osa_defs.h"
#include "common/utils/LOG/log.h"
#include "common/utils/LOG/log.h"
...
@@ -514,11 +517,220 @@ int8_t nr_rrc_ue_decode_NR_BCCH_BCH_Message(
...
@@ -514,11 +517,220 @@ int8_t nr_rrc_ue_decode_NR_BCCH_BCH_Message(
return
0
;
return
0
;
}
}
int
nr_decode_SI
(
const
protocol_ctxt_t
*
const
ctxt_pP
,
const
uint8_t
eNB_index
)
{
const
char
siWindowLength
[
9
][
5
]
=
{
"1ms"
,
"2ms"
,
"5ms"
,
"10ms"
,
"15ms"
,
"20ms"
,
"40ms"
,
"80ms"
,
"ERR"
};
const
char
siWindowLength_int
[
8
]
=
{
1
,
2
,
5
,
10
,
15
,
20
,
40
,
80
};
const
char
SIBType
[
12
][
6
]
=
{
"SIB3"
,
"SIB4"
,
"SIB5"
,
"SIB6"
,
"SIB7"
,
"SIB8"
,
"SIB9"
,
"SIB10"
,
"SIB11"
,
"SIB12"
,
"SIB13"
,
"Spare"
};
const
char
SIBPeriod
[
8
][
6
]
=
{
"rf8"
,
"rf16"
,
"rf32"
,
"rf64"
,
"rf128"
,
"rf256"
,
"rf512"
,
"ERR"
};
int
siPeriod_int
[
7
]
=
{
80
,
160
,
320
,
640
,
1280
,
2560
,
5120
};
const
char
*
SIBreserved
(
long
value
)
{
if
(
value
<
0
||
value
>
1
)
return
"ERR"
;
if
(
value
)
return
"notReserved"
;
return
"reserved"
;
}
const
char
*
SIBbarred
(
long
value
)
{
if
(
value
<
0
||
value
>
1
)
return
"ERR"
;
if
(
value
)
return
"notBarred"
;
return
"barred"
;
}
const
char
*
SIBallowed
(
long
value
)
{
if
(
value
<
0
||
value
>
1
)
return
"ERR"
;
if
(
value
)
return
"notAllowed"
;
return
"allowed"
;
}
int
nr_decode_SI
(
const
protocol_ctxt_t
*
const
ctxt_pP
,
const
uint8_t
gNB_index
)
{
return
0
;
return
0
;
}
}
int
nr_decode_SIB1
(
const
protocol_ctxt_t
*
const
ctxt_pP
,
const
uint8_t
eNB_index
,
const
uint8_t
rsrq
,
const
uint8_t
rsrp
)
{
int
nr_decode_SIB1
(
const
protocol_ctxt_t
*
const
ctxt_pP
,
const
uint8_t
gNB_index
,
const
uint8_t
rsrq
,
const
uint8_t
rsrp
)
{
NR_SIB1_t
*
sib1
=
NR_UE_rrc_inst
[
ctxt_pP
->
module_id
].
sib1
[
gNB_index
];
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_RRC_UE_DECODE_SIB1
,
VCD_FUNCTION_IN
);
LOG_I
(
RRC
,
"[UE %d] : Dumping SIB 1
\n
"
,
ctxt_pP
->
module_id
);
const
int
n
=
sib1
->
cellAccessRelatedInfo
.
plmn_IdentityList
.
list
.
count
;
for
(
int
i
=
0
;
i
<
n
;
++
i
)
{
NR_PLMN_Identity_t
*
PLMN_identity
=
&
sib1
->
cellAccessRelatedInfo
.
plmn_IdentityList
.
list
.
array
[
i
]
->
plmn_IdentityList
.
list
.
array
[
0
];
int
mccdigits
=
PLMN_identity
->
mcc
->
list
.
count
;
int
mncdigits
=
PLMN_identity
->
mnc
.
list
.
count
;
int
mcc
;
if
(
mccdigits
==
2
)
{
mcc
=
*
PLMN_identity
->
mcc
->
list
.
array
[
0
]
*
10
+
*
PLMN_identity
->
mcc
->
list
.
array
[
1
];
}
else
{
mcc
=
*
PLMN_identity
->
mcc
->
list
.
array
[
0
]
*
100
+
*
PLMN_identity
->
mcc
->
list
.
array
[
1
]
*
10
+
*
PLMN_identity
->
mcc
->
list
.
array
[
2
];
}
int
mnc
;
if
(
mncdigits
==
2
)
{
mnc
=
*
PLMN_identity
->
mnc
.
list
.
array
[
0
]
*
10
+
*
PLMN_identity
->
mnc
.
list
.
array
[
1
];
}
else
{
mnc
=
*
PLMN_identity
->
mnc
.
list
.
array
[
0
]
*
100
+
*
PLMN_identity
->
mnc
.
list
.
array
[
1
]
*
10
+
*
PLMN_identity
->
mnc
.
list
.
array
[
2
];
}
LOG_I
(
RRC
,
"PLMN %d MCC %0*d, MNC %0*d
\n
"
,
i
+
1
,
mccdigits
,
mcc
,
mncdigits
,
mnc
);
// search internal table for provider name
int
plmn_ind
=
0
;
while
(
plmn_data
[
plmn_ind
].
mcc
>
0
)
{
if
((
plmn_data
[
plmn_ind
].
mcc
==
mcc
)
&&
(
plmn_data
[
plmn_ind
].
mnc
==
mnc
))
{
LOG_I
(
RRC
,
"Found %s (name from internal table)
\n
"
,
plmn_data
[
plmn_ind
].
oper_short
);
break
;
}
plmn_ind
++
;
}
}
LOG_I
(
RRC
,
"TAC 0x%04x
\n
"
,
((
sib1
->
cellAccessRelatedInfo
.
plmn_IdentityList
.
list
.
array
[
0
]
->
trackingAreaCode
->
size
==
2
)
?
((
sib1
->
cellAccessRelatedInfo
.
plmn_IdentityList
.
list
.
array
[
0
]
->
trackingAreaCode
->
buf
[
0
]
<<
8
)
+
sib1
->
cellAccessRelatedInfo
.
plmn_IdentityList
.
list
.
array
[
0
]
->
trackingAreaCode
->
buf
[
1
])
:
0
));
LOG_I
(
RRC
,
"cellReservedForOperatorUse : raw:%ld decoded:%s
\n
"
,
sib1
->
cellAccessRelatedInfo
.
plmn_IdentityList
.
list
.
array
[
0
]
->
cellReservedForOperatorUse
,
SIBreserved
(
sib1
->
cellAccessRelatedInfo
.
plmn_IdentityList
.
list
.
array
[
0
]
->
cellReservedForOperatorUse
)
);
LOG_I
(
RRC
,
"cellAccessRelatedInfo.cellIdentity : raw:%"
PRIu32
" decoded:%02x.%02x.%02x.%02x
\n
"
,
BIT_STRING_to_uint32
(
&
sib1
->
cellAccessRelatedInfo
.
plmn_IdentityList
.
list
.
array
[
0
]
->
cellIdentity
),
sib1
->
cellAccessRelatedInfo
.
plmn_IdentityList
.
list
.
array
[
0
]
->
cellIdentity
.
buf
[
0
],
sib1
->
cellAccessRelatedInfo
.
plmn_IdentityList
.
list
.
array
[
0
]
->
cellIdentity
.
buf
[
1
],
sib1
->
cellAccessRelatedInfo
.
plmn_IdentityList
.
list
.
array
[
0
]
->
cellIdentity
.
buf
[
2
],
sib1
->
cellAccessRelatedInfo
.
plmn_IdentityList
.
list
.
array
[
0
]
->
cellIdentity
.
buf
[
3
]
>>
sib1
->
cellAccessRelatedInfo
.
plmn_IdentityList
.
list
.
array
[
0
]
->
cellIdentity
.
bits_unused
);
//LOG_I( RRC, "cellAccessRelatedInfo.cellBarred : raw:%ld decoded:%s\n", sib1->cellAccessRelatedInfo.cellBarred, SIBbarred(sib1->cellAccessRelatedInfo.cellBarred) );
//LOG_I( RRC, "cellAccessRelatedInfo.intraFreqReselection : raw:%ld decoded:%s\n", sib1->cellAccessRelatedInfo.intraFreqReselection, SIBallowed(sib1->cellAccessRelatedInfo.intraFreqReselection) );
//LOG_I( RRC, "cellAccessRelatedInfo.csg_Indication : %d\n", sib1->cellAccessRelatedInfo.csg_Indication );
//if (sib1->cellAccessRelatedInfo.csg_Identity)
// LOG_I( RRC, "cellAccessRelatedInfo.csg_Identity : %"PRIu32"\n", BIT_STRING_to_uint32(sib1->cellAccessRelatedInfo.csg_Identity) );
//else
// LOG_I( RRC, "cellAccessRelatedInfo.csg_Identity : not defined\n" );
LOG_I
(
RRC
,
"cellSelectionInfo.q_RxLevMin : %ld
\n
"
,
sib1
->
cellSelectionInfo
->
q_RxLevMin
);
if
(
sib1
->
cellSelectionInfo
->
q_RxLevMinOffset
)
LOG_I
(
RRC
,
"cellSelectionInfo.q_RxLevMinOffset : %ld
\n
"
,
*
sib1
->
cellSelectionInfo
->
q_RxLevMinOffset
);
else
LOG_I
(
RRC
,
"cellSelectionInfo.q_RxLevMinOffset : not defined
\n
"
);
//if (sib1->p_Max)
// LOG_I( RRC, "p_Max : %ld\n", *sib1->p_Max );
//else
// LOG_I( RRC, "p_Max : not defined\n" );
//LOG_I( RRC, "freqBandIndicator : %ld\n", sib1->freqBandIndicator );
if
(
sib1
->
si_SchedulingInfo
->
schedulingInfoList
.
list
.
count
>
0
)
{
for
(
int
i
=
0
;
i
<
sib1
->
si_SchedulingInfo
->
schedulingInfoList
.
list
.
count
;
i
++
)
{
LOG_I
(
RRC
,
"si_Periodicity[%d] : %s
\n
"
,
i
,
SIBPeriod
[
min
(
sib1
->
si_SchedulingInfo
->
schedulingInfoList
.
list
.
array
[
i
]
->
si_Periodicity
,
7
)]);
if
(
sib1
->
si_SchedulingInfo
->
schedulingInfoList
.
list
.
array
[
i
]
->
sib_MappingInfo
.
list
.
count
>
0
)
{
char
temp
[
32
*
sizeof
(
SIBType
[
0
])]
=
{
0
};
// maxSIB==32
for
(
int
j
=
0
;
j
<
sib1
->
si_SchedulingInfo
->
schedulingInfoList
.
list
.
array
[
i
]
->
sib_MappingInfo
.
list
.
count
;
j
++
)
{
sprintf
(
temp
+
j
*
sizeof
(
SIBType
[
0
]),
"%*s "
,
(
int
)
sizeof
(
SIBType
[
0
])
-
1
,
SIBType
[
min
(
sib1
->
si_SchedulingInfo
->
schedulingInfoList
.
list
.
array
[
i
]
->
sib_MappingInfo
.
list
.
array
[
0
]
->
type
,
11
)]
);
}
LOG_I
(
RRC
,
"siSchedulingInfoSIBType[%d] : %s
\n
"
,
i
,
temp
);
}
else
{
LOG_I
(
RRC
,
"mapping list %d is null
\n
"
,
i
);
}
}
}
else
{
LOG_E
(
RRC
,
"siSchedulingInfoPeriod[0] : PROBLEM!!!
\n
"
);
return
-
1
;
}
//if (sib1->tdd_Config) {
// LOG_I( RRC, "TDD subframeAssignment : %ld\n", sib1->tdd_Config->subframeAssignment );
// LOG_I( RRC, "TDD specialSubframePatterns : %ld\n", sib1->tdd_Config->specialSubframePatterns );
//}
LOG_I
(
RRC
,
"siWindowLength : %s
\n
"
,
siWindowLength
[
min
(
sib1
->
si_SchedulingInfo
->
si_WindowLength
,
8
)]
);
//LOG_I( RRC, "systemInfoValueTag : %ld\n", sib1->systemInfoValueTag );
NR_UE_rrc_inst
[
ctxt_pP
->
module_id
].
Info
[
gNB_index
].
SIperiod
=
siPeriod_int
[
sib1
->
si_SchedulingInfo
->
schedulingInfoList
.
list
.
array
[
0
]
->
si_Periodicity
];
NR_UE_rrc_inst
[
ctxt_pP
->
module_id
].
Info
[
gNB_index
].
SIwindowsize
=
siWindowLength_int
[
sib1
->
si_SchedulingInfo
->
si_WindowLength
];
LOG_I
(
RRC
,
"[FRAME unknown][RRC_UE][MOD %02"
PRIu8
"][][--- MAC_CONFIG_REQ (SIB1 params eNB %"
PRIu8
") --->][MAC_UE][MOD %02"
PRIu8
"][]
\n
"
,
ctxt_pP
->
module_id
,
gNB_index
,
ctxt_pP
->
module_id
);
//rrc_mac_config_req_ue
LOG_I
(
RRC
,
"Setting SIStatus bit 0 to 1
\n
"
);
NR_UE_rrc_inst
[
ctxt_pP
->
module_id
].
Info
[
gNB_index
].
SIStatus
=
1
;
//NR_UE_rrc_inst[ctxt_pP->module_id].Info[gNB_index].SIB1systemInfoValueTag = sib1->systemInfoValueTag;
if
(
AMF_MODE_ENABLED
)
{
int
cell_valid
=
0
;
//if (sib1->cellAccessRelatedInfo.cellBarred == LTE_SystemInformationBlockType1__cellAccessRelatedInfo__cellBarred_notBarred) {
/* Cell is not barred */
int
plmn
;
int
plmn_number
;
plmn_number
=
sib1
->
cellAccessRelatedInfo
.
plmn_IdentityList
.
list
.
count
;
/* Compare requested PLMN and PLMNs from SIB1*/
for
(
plmn
=
0
;
plmn
<
plmn_number
;
plmn
++
)
{
NR_PLMN_Identity_t
*
plmn_Identity
;
plmn_Identity
=
sib1
->
cellAccessRelatedInfo
.
plmn_IdentityList
.
list
.
array
[
plmn
]
->
plmn_IdentityList
.
list
.
array
[
0
];
if
(
(
(
plmn_Identity
->
mcc
==
NULL
)
||
(
(
NR_UE_rrc_inst
[
ctxt_pP
->
module_id
].
plmnID
.
MCCdigit1
==
*
(
plmn_Identity
->
mcc
->
list
.
array
[
0
]))
&&
(
NR_UE_rrc_inst
[
ctxt_pP
->
module_id
].
plmnID
.
MCCdigit2
==
*
(
plmn_Identity
->
mcc
->
list
.
array
[
1
]))
&&
(
NR_UE_rrc_inst
[
ctxt_pP
->
module_id
].
plmnID
.
MCCdigit3
==
*
(
plmn_Identity
->
mcc
->
list
.
array
[
2
]))
)
)
&&
(
NR_UE_rrc_inst
[
ctxt_pP
->
module_id
].
plmnID
.
MNCdigit1
==
*
(
plmn_Identity
->
mnc
.
list
.
array
[
0
]))
&&
(
NR_UE_rrc_inst
[
ctxt_pP
->
module_id
].
plmnID
.
MNCdigit2
==
*
(
plmn_Identity
->
mnc
.
list
.
array
[
1
]))
&&
(
((
NR_UE_rrc_inst
[
ctxt_pP
->
module_id
].
plmnID
.
MNCdigit3
==
0xf
)
&&
(
plmn_Identity
->
mnc
.
list
.
count
==
2
))
||
(
NR_UE_rrc_inst
[
ctxt_pP
->
module_id
].
plmnID
.
MNCdigit3
==
*
(
plmn_Identity
->
mnc
.
list
.
array
[
2
]))
)
)
{
/* PLMN match, send a confirmation to NAS */
MessageDef
*
msg_p
;
msg_p
=
itti_alloc_new_message
(
TASK_RRC_UE
,
NAS_CELL_SELECTION_CNF
);
NAS_CELL_SELECTION_CNF
(
msg_p
).
errCode
=
AS_SUCCESS
;
NAS_CELL_SELECTION_CNF
(
msg_p
).
cellID
=
BIT_STRING_to_uint32
(
&
sib1
->
cellAccessRelatedInfo
.
plmn_IdentityList
.
list
.
array
[
0
]
->
cellIdentity
);
NAS_CELL_SELECTION_CNF
(
msg_p
).
tac
=
BIT_STRING_to_uint16
(
sib1
->
cellAccessRelatedInfo
.
plmn_IdentityList
.
list
.
array
[
0
]
->
trackingAreaCode
);
NAS_CELL_SELECTION_CNF
(
msg_p
).
rat
=
0xFF
;
NAS_CELL_SELECTION_CNF
(
msg_p
).
rsrq
=
rsrq
;
NAS_CELL_SELECTION_CNF
(
msg_p
).
rsrp
=
rsrp
;
itti_send_msg_to_task
(
TASK_NAS_UE
,
ctxt_pP
->
instance
,
msg_p
);
cell_valid
=
1
;
NR_UE_rrc_inst
[
ctxt_pP
->
module_id
].
selected_plmn_identity
=
plmn
+
1
;
break
;
}
}
//}
if
(
cell_valid
==
0
)
{
/* Cell can not be used, ask PHY to try the next one */
MessageDef
*
msg_p
;
msg_p
=
itti_alloc_new_message
(
TASK_RRC_UE
,
PHY_FIND_NEXT_CELL_REQ
);
itti_send_msg_to_task
(
TASK_PHY_UE
,
ctxt_pP
->
instance
,
msg_p
);
LOG_E
(
RRC
,
"Synched with a cell, but PLMN doesn't match our SIM "
"(selected_plmn_identity %d), the message PHY_FIND_NEXT_CELL_REQ "
"is sent but lost in current UE implementation!
\n
"
,
NR_UE_rrc_inst
[
ctxt_pP
->
module_id
].
selected_plmn_identity
);
}
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_RRC_UE_DECODE_SIB1
,
VCD_FUNCTION_OUT
);
return
0
;
return
0
;
}
}
int
nr_decode_BCCH_DLSCH_Message
(
int
nr_decode_BCCH_DLSCH_Message
(
...
...
This diff is collapsed.
Click to expand it.
openair2/RRC/NR_UE/rrc_defs.h
View file @
e981df3c
...
@@ -93,6 +93,7 @@ typedef struct NR_UE_RRC_INST_s {
...
@@ -93,6 +93,7 @@ typedef struct NR_UE_RRC_INST_s {
NR_SIB1_t
*
sib1
[
NB_CNX_UE
];
NR_SIB1_t
*
sib1
[
NB_CNX_UE
];
NR_SystemInformation_t
*
si
[
NB_CNX_UE
];
NR_SystemInformation_t
*
si
[
NB_CNX_UE
];
plmn_t
plmnID
;
NR_UE_RRC_INFO
Info
[
NB_SIG_CNX_UE
];
NR_UE_RRC_INFO
Info
[
NB_SIG_CNX_UE
];
...
...
This diff is collapsed.
Click to expand it.
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