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Commit 6148e8f3 authored by francescomani's avatar francescomani
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Merge branch 'bandwidth-testing-abs' of... 

Merge branch 'bandwidth-testing-abs' of https://gitlab.eurecom.fr/oai/openairinterface5g into bandwidth-testing-abs
parents 0c228ac1 1540f9bf
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Showing with 147 additions and 88 deletions
ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf
View file @ 6148e8f3
......@@ -157,12 +157,12 @@ gNBs =
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPk2_0 = 2;
initialULBWPmappingType_0 = 1
# this is SS=2 L=13
initialULBWPstartSymbolAndLength_0 = 41;
initialULBWPk2_1 = 6;
initialULBWPk2_1 = 2;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=4
initialULBWPstartSymbolAndLength_1 = 52;
......
executables/nr-ru.c
View file @ 6148e8f3
......@@ -615,6 +615,7 @@ void rx_rf(RU_t *ru,int *frame,int *slot) {
openair0_timestamp ts,old_ts;
AssertFatal(*slot<fp->slots_per_frame && *slot>=0, "slot %d is illegal (%d)\n",*slot,fp->slots_per_frame);
start_meas(&ru->rx_fhaul);
for (i=0; i<ru->nb_rx; i++)
rxp[i] = (void *)&ru->common.rxdata[i][fp->get_samples_slot_timestamp(*slot,fp,0)];
......@@ -658,11 +659,11 @@ void rx_rf(RU_t *ru,int *frame,int *slot) {
proc->frame_rx = (proc->timestamp_rx / (fp->samples_per_subframe*10))&1023;
proc->tti_rx = fp->get_slot_from_timestamp(proc->timestamp_rx,fp);
// synchronize first reception to frame 0 subframe 0
LOG_D(PHY,"RU %d/%d TS %llu (off %d), frame %d, slot %d.%d / %d\n",
LOG_D(PHY,"RU %d/%d TS %llu , frame %d, slot %d.%d / %d\n",
ru->idx,
0,
(unsigned long long int)proc->timestamp_rx,
(int)ru->ts_offset,proc->frame_rx,proc->tti_rx,proc->tti_tx,fp->slots_per_frame);
(unsigned long long int)(proc->timestamp_rx+ru->ts_offset),
proc->frame_rx,proc->tti_rx,proc->tti_tx,fp->slots_per_frame);
// dump VCD output for first RU in list
if (ru == RC.ru[0]) {
......@@ -688,12 +689,14 @@ void rx_rf(RU_t *ru,int *frame,int *slot) {
}
//printf("timestamp_rx %lu, frame %d(%d), subframe %d(%d)\n",ru->timestamp_rx,proc->frame_rx,frame,proc->tti_rx,subframe);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TS, proc->timestamp_rx&0xffffffff );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TS, (proc->timestamp_rx+ru->ts_offset)&0xffffffff );
if (rxs != samples_per_slot) {
//exit_fun( "problem receiving samples" );
LOG_E(PHY, "problem receiving samples\n");
}
stop_meas(&ru->rx_fhaul);
}
......@@ -763,6 +766,7 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
flags |= beam<<8;
LOG_D(HW,"slot %d, beam %d\n",slot,ru->common.beam_id[0][slot*fp->symbols_per_slot]);
}
if (proc->first_tx == 1) proc->first_tx = 0;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_WRITE_FLAGS, flags );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, frame );
......@@ -771,7 +775,7 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
for (i=0; i<ru->nb_tx; i++)
txp[i] = (void *)&ru->common.txdata[i][fp->get_samples_slot_timestamp(slot,fp,0)-sf_extension];
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, (timestamp-ru->openair0_cfg.tx_sample_advance)&0xffffffff );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TST, (timestamp+ru->ts_offset-ru->openair0_cfg.tx_sample_advance)&0xffffffff );
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 1 );
// prepare tx buffer pointers
txs = ru->rfdevice.trx_write_func(&ru->rfdevice,
......@@ -780,8 +784,8 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
siglen+sf_extension,
ru->nb_tx,
flags);
LOG_D(PHY,"[TXPATH] RU %d aa %d tx_rf, writing to TS %llu, frame %d, unwrapped_frame %d, slot %d, returned %d, E %f\n",ru->idx,i,
(long long unsigned int)timestamp,frame,proc->frame_tx_unwrap,slot, txs,10*log10((double)signal_energy(txp[0],siglen+sf_extension)));
LOG_D(PHY,"[TXPATH] RU %d aa %d tx_rf, writing to TS %llu, frame %d, unwrapped_frame %d, slot %d, flags %d, siglen+sf_extension %d, returned %d, E %f\n",ru->idx,i,
(long long unsigned int)(timestamp+ru->ts_offset-ru->openair0_cfg.tx_sample_advance-sf_extension),frame,proc->frame_tx_unwrap,slot, flags, siglen+sf_extension, txs,10*log10((double)signal_energy(txp[0],siglen+sf_extension)));
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 0 );
//AssertFatal(txs == 0,"trx write function error %d\n", txs);
}
......@@ -1164,8 +1168,7 @@ void *ru_stats_thread(void *param) {
print_meas(&ru->ofdm_total_stats,"feptx_total",NULL,NULL);
}
if (ru->fh_north_asynch_in) print_meas(&ru->rx_fhaul,"rx_fhaul",NULL,NULL);
print_meas(&ru->rx_fhaul,"rx_fhaul",NULL,NULL);
print_meas(&ru->tx_fhaul,"tx_fhaul",NULL,NULL);
if (ru->fh_north_out) {
......@@ -1241,7 +1244,14 @@ void *ru_thread( void *param ) {
int slot = fp->slots_per_frame-1;
int frame = 1023;
char threadname[40];
int initial_wait=0;
int opp_enabled0 = opp_enabled;
nfapi_nr_config_request_scf_t *cfg = &ru->config;
// set the timing measurements for startup phase, for RX fronthaul settling measurements, put it to configured value after
opp_enabled = 0;
// set default return value
ru_thread_status = 0;
// set default return value
......@@ -1290,7 +1300,7 @@ void *ru_thread( void *param ) {
}
sf_ahead = (uint16_t) ceil((float)6/(0x01<<fp->numerology_index));
LOG_I(PHY, "Signaling main thread that RU %d is ready\n",ru->idx);
LOG_I(PHY, "Signaling main thread that RU %d is ready, sf_ahead %d\n",ru->idx,sf_ahead);
pthread_mutex_lock(&RC.ru_mutex);
RC.ru_mask &= ~(1<<ru->idx);
pthread_cond_signal(&RC.ru_cond);
......@@ -1343,6 +1353,19 @@ void *ru_thread( void *param ) {
if (ru->fh_south_in) ru->fh_south_in(ru,&frame,&slot);
else AssertFatal(1==0, "No fronthaul interface at south port");
if (initial_wait == 1 && proc->frame_rx < 300 && ru->fh_south_in == rx_rf) {
if (proc->frame_rx>0 && ((proc->frame_rx % 100) == 0) && proc->tti_rx==0) {
LOG_I(PHY,"delay processing to let RX stream settle, frame %d (trials %d)\n",proc->frame_rx,ru->rx_fhaul.trials);
print_meas(&ru->rx_fhaul,"rx_fhaul",NULL,NULL);
reset_meas(&ru->rx_fhaul);
}
continue;
}
if (proc->frame_rx>=300) {
initial_wait=0;
opp_enabled = opp_enabled0;
}
if (initial_wait == 0 && ru->rx_fhaul.trials > 1000) reset_meas(&ru->rx_fhaul);
proc->timestamp_tx = proc->timestamp_rx + (sf_ahead*fp->samples_per_subframe);
proc->frame_tx = (proc->tti_rx > (fp->slots_per_frame-1-(fp->slots_per_subframe*sf_ahead))) ? (proc->frame_rx+1)&1023 : proc->frame_rx;
proc->tti_tx = (proc->tti_rx + (fp->slots_per_subframe*sf_ahead))%fp->slots_per_frame;
......@@ -1701,6 +1724,7 @@ void set_function_spec_param(RU_t *ru) {
switch (ru->if_south) {
case LOCAL_RF: // this is an RU with integrated RF (RRU, gNB)
reset_meas(&ru->rx_fhaul);
if (ru->function == NGFI_RRU_IF5) { // IF5 RRU
ru->do_prach = 0; // no prach processing in RU
ru->fh_north_in = NULL; // no shynchronous incoming fronthaul from north
......@@ -1738,7 +1762,6 @@ void set_function_spec_param(RU_t *ru) {
ru->ifdevice.host_type = RRU_HOST;
ru->rfdevice.host_type = RRU_HOST;
ru->ifdevice.eth_params = &ru->eth_params;
reset_meas(&ru->rx_fhaul);
reset_meas(&ru->tx_fhaul);
reset_meas(&ru->compression);
reset_meas(&ru->transport);
......
openair1/PHY/NR_TRANSPORT/nr_dci.c
View file @ 6148e8f3
......@@ -213,7 +213,7 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
(amp * mod_dmrs[l][(dmrs_idx << 1) + 1]) >> 15;
#ifdef DEBUG_PDCCH_DMRS
if (dci_pdu->RNTI!=0xFFFF) LOG_I(PHY,"PDCCH DMRS %d: l %d position %d => (%d,%d)\n",dmrs_idx,l,k,((int16_t *)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1],
if (dci_pdu->RNTI!=0xFFFF) LOG_D(PHY,"PDCCH DMRS %d: l %d position %d => (%d,%d)\n",dmrs_idx,l,k,((int16_t *)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1],
((int16_t *)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
#endif
......@@ -225,7 +225,7 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
((int16_t *) txdataF)[((l * frame_parms->ofdm_symbol_size + k) << 1) + 1] =
(amp * mod_dci[(dci_idx << 1) + 1]) >> 15;
#ifdef DEBUG_DCI
printf("PDCCH: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1],
if (dci_pdu->RNTI!=0xFFFF) LOG_D(PHY,"PDCCH: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1],
((int16_t *)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
#endif
......
openair1/PHY/NR_TRANSPORT/pucch_rx.c
View file @ 6148e8f3
......@@ -359,6 +359,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
if (temp>xrtmag) {
xrtmag_next = xrtmag;
xrtmag=temp;
LOG_D(PHY,"Sequence %d xrtmag %ld xrtmag_next %ld\n", i, xrtmag, xrtmag_next);
maxpos=i;
uci_stats->current_pucch0_stat0 = 0;
int64_t temp2=0,temp3=0;;
......@@ -369,6 +370,8 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
uci_stats->current_pucch0_stat0= dB_fixed64(temp2);
if (l==2) uci_stats->current_pucch0_stat1= dB_fixed64(temp3);
}
else if (temp>xrtmag_next)
xrtmag_next = temp;
}
av_corr/=nr_sequences/l;
......@@ -399,7 +402,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
uci_stats->pucch0_thres = gNB->pucch0_thres; /* + (10*max_n0);*/
bool no_conf=false;
if (nr_sequences>1) {
if (xrtmag_dBtimes10 < uci_stats->pucch0_thres+xrtmag_next_dBtimes10)
if (xrtmag_dBtimes10 < (30+xrtmag_next_dBtimes10) || SNRtimes10 < uci_stats->pucch0_thres)
no_conf=true;
}
gNB->bad_pucch += no_conf;
......@@ -446,8 +449,8 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
uci_pdu->harq->harq_list = (nfapi_nr_harq_t*)malloc(2);
uci_pdu->harq->harq_list[1].harq_value = index&0x01;
uci_pdu->harq->harq_list[0].harq_value = (index>>1)&0x01;
LOG_D(PHY, "[DLSCH/PDSCH/PUCCH] %d.%d HARQ values %d and %d with confidence level (0 is good, 1 is bad) %d, xrt_mag %d xrt_mag_next %d\n",
frame,slot,uci_pdu->harq->harq_list[1].harq_value,uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level,xrtmag_dBtimes10,xrtmag_next_dBtimes10);
LOG_D(PHY, "[DLSCH/PDSCH/PUCCH] %d.%d HARQ values %d and %d with confidence level (0 is good, 1 is bad) %d, xrt_mag %d xrt_mag_next %d n0 %d (%d,%d) pucch0_thres %d, cqi %d, SNRtimes10 %d\n",
frame,slot,uci_pdu->harq->harq_list[1].harq_value,uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level,xrtmag_dBtimes10,xrtmag_next_dBtimes10,max_n0,uci_stats->pucch0_n00,uci_stats->pucch0_n01,uci_stats->pucch0_thres,cqi,SNRtimes10);
if (pucch_pdu->sr_flag == 1) {
uci_pdu->sr = calloc(1,sizeof(*uci_pdu->sr));
uci_pdu->sr->sr_indication = (index>3) ? 1 : 0;
......
openair1/SCHED_NR/phy_procedures_nr_gNB.c
View file @ 6148e8f3
......@@ -164,7 +164,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
gNB->Mod_id,frame,slot,pdcch_pdu_id,ul_pdcch_pdu_id);
if (pdcch_pdu_id >= 0 || ul_pdcch_pdu_id >= 0) {
LOG_D(PHY, "[gNB %d] Frame %d slot %d Calling nr_generate_dci_top (number of UL/DL DCI %d/%d)\n",
if (slot>0) LOG_D(PHY, "[gNB %d] Frame %d slot %d Calling nr_generate_dci_top (number of UL/DL DCI %d/%d)\n",
gNB->Mod_id, frame, slot,
gNB->ul_pdcch_pdu[ul_pdcch_pdu_id].pdcch_pdu.pdcch_pdu.pdcch_pdu_rel15.numDlDci,
gNB->pdcch_pdu[pdcch_pdu_id].pdcch_pdu.pdcch_pdu_rel15.numDlDci);
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
View file @ 6148e8f3
......@@ -101,10 +101,9 @@ void dump_mac_stats(gNB_MAC_INST *gNB)
stats->dlsch_rounds[2], stats->dlsch_rounds[3], stats->dlsch_errors,
stats->pucch0_DTX,
avg_rsrp, stats->num_rsrp_meas);
LOG_I(NR_MAC, "UE %d: dlsch_rounds %d/%d/%d/%d, dlsch_errors %d\n",
UE_id,
stats->dlsch_rounds[0], stats->dlsch_rounds[1],
stats->dlsch_rounds[2], stats->dlsch_rounds[3], stats->dlsch_errors);
LOG_I(NR_MAC, "UE %d: dlsch_rounds %d/%d/%d/%d, dlsch_errors %d, pucch0_DTX %d\n",
UE_id, stats->dlsch_rounds[0], stats->dlsch_rounds[1], stats->dlsch_rounds[2], stats->dlsch_rounds[3],
stats->dlsch_errors, stats->pucch0_DTX);
stats->num_rsrp_meas = 0;
stats->cumul_rsrp = 0 ;
stroff+=sprintf(output+stroff,"UE %d: dlsch_total_bytes %d\n", UE_id, stats->dlsch_total_bytes);
......@@ -119,11 +118,9 @@ void dump_mac_stats(gNB_MAC_INST *gNB)
UE_id,
stats->ulsch_total_bytes_scheduled, stats->ulsch_total_bytes_rx);
LOG_I(NR_MAC, "UE %d: dlsch_total_bytes %d\n", UE_id, stats->dlsch_total_bytes);
LOG_I(NR_MAC, "UE %d: ulsch_rounds %d/%d/%d/%d, ulsch_errors %d\n",
UE_id,
stats->ulsch_rounds[0], stats->ulsch_rounds[1],
stats->ulsch_rounds[2], stats->ulsch_rounds[3],
stats->ulsch_errors);
LOG_I(NR_MAC, "UE %d: ulsch_rounds %d/%d/%d/%d, ulsch_errors %d, ulsch_DTX %d\n",
UE_id, stats->ulsch_rounds[0], stats->ulsch_rounds[1], stats->ulsch_rounds[2], stats->ulsch_rounds[3],
stats->ulsch_errors, stats->ulsch_DTX);
LOG_I(NR_MAC,
"UE %d: ulsch_total_bytes (scheduled/received): %d / %d\n",
UE_id,
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
View file @ 6148e8f3
......@@ -1771,8 +1771,6 @@ void nr_check_Msg4_Ack(module_id_t module_id, int CC_id, frame_t frame, sub_fram
ra->Msg4_frame = (frame + 1) % 1024;
ra->Msg4_slot = 1;
ra->state = Msg4;
UE_info->active[UE_id] = false;
UE_info->Msg4_ACKed[UE_id] = false;
}
}
}
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
View file @ 6148e8f3
......@@ -452,7 +452,7 @@ void nr_store_dlsch_buffer(module_id_t module_id,
&& !sched_ctrl->ta_apply) /* If TA should be applied, give at least one RB */
return;
LOG_I(NR_MAC,
LOG_D(NR_MAC,
"[%s][%d.%d], %s%d->DLSCH, RLC status %d bytes TA %d\n",
__func__,
frame,
......@@ -1076,7 +1076,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
dci_payload.dmrs_sequence_initialization.val = pdsch_pdu->SCID;
LOG_D(NR_MAC,
"%4d.%2d DCI type 1 payload: freq_alloc %d (%d,%d,%d), "
"time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d tpc %d\n",
"time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d tpc %d ti %d\n",
frame,
slot,
dci_payload.frequency_domain_assignment.val,
......@@ -1089,7 +1089,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
dci_payload.tb_scaling,
dci_payload.ndi,
dci_payload.rv,
dci_payload.tpc);
dci_payload.tpc,
pucch->timing_indicator);
const long f = sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats;
int dci_format;
......@@ -1180,7 +1181,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
0,
0);
LOG_I(NR_MAC,
LOG_D(NR_MAC,
"%4d.%2d RNTI %04x: %d bytes from %s %d (ndata %d, remaining size %d)\n",
frame,
slot,
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @ 6148e8f3
......@@ -323,6 +323,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
0,
0);
sched_ctrl->num_total_bytes += sched_ctrl->rlc_status[lcid].bytes_in_buffer;
sched_ctrl->lcid_to_schedule = lcid;
sched_ctrl->maxL = dl_maxL;
uint8_t nr_of_candidates;
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @ 6148e8f3
......@@ -2090,6 +2090,7 @@ void get_pdsch_to_harq_feedback(int Mod_idP,
int UE_id,
int bwp_id,
NR_SearchSpace__searchSpaceType_PR ss_type,
int *max_fb_time,
uint8_t *pdsch_to_harq_feedback) {
NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
......@@ -2127,8 +2128,11 @@ void get_pdsch_to_harq_feedback(int Mod_idP,
// common search type uses DCI format 1_0
if (ss_type == NR_SearchSpace__searchSpaceType_PR_common) {
for (int i=0; i<8; i++)
for (int i=0; i<8; i++) {
pdsch_to_harq_feedback[i] = i+1;
if(pdsch_to_harq_feedback[i]>*max_fb_time)
*max_fb_time = pdsch_to_harq_feedback[i];
}
}
else {
......@@ -2150,14 +2154,20 @@ void get_pdsch_to_harq_feedback(int Mod_idP,
if (ss->searchSpaceType->choice.ue_Specific->dci_Formats == NR_SearchSpace__searchSpaceType__ue_Specific__dci_Formats_formats0_0_And_1_0) {
for (int i=0; i<8; i++)
for (int i=0; i<8; i++) {
pdsch_to_harq_feedback[i] = i+1;
if(pdsch_to_harq_feedback[i]>*max_fb_time)
*max_fb_time = pdsch_to_harq_feedback[i];
}
}
else {
AssertFatal(ubwpd!=NULL,"ubwpd shouldn't be null here\n");
if(ubwpd->pucch_Config->choice.setup->dl_DataToUL_ACK != NULL) {
for (int i=0; i<8; i++)
for (int i=0; i<8; i++) {
pdsch_to_harq_feedback[i] = *ubwpd->pucch_Config->choice.setup->dl_DataToUL_ACK->list.array[i];
if(pdsch_to_harq_feedback[i]>*max_fb_time)
*max_fb_time = pdsch_to_harq_feedback[i];
}
}
else
AssertFatal(0==1,"There is no allocated dl_DataToUL_ACK for pdsch to harq feedback\n");
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
View file @ 6148e8f3
......@@ -1169,15 +1169,15 @@ int nr_acknack_scheduling(int mod_id,
frame_t frame,
sub_frame_t slot,
int r_pucch,
int is_common)
{
int is_common) {
const NR_ServingCellConfigCommon_t *scc = RC.nrmac[mod_id]->common_channels->ServingCellConfigCommon;
const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
const NR_TDD_UL_DL_Pattern_t *tdd = &scc->tdd_UL_DL_ConfigurationCommon->pattern1;
const int nr_ulmix_slots = tdd->nrofUplinkSlots + (tdd->nrofUplinkSymbols != 0);
const int nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0;
const int nr_slots_period = tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots;
const int first_ul_slot_tdd = tdd->nrofDownlinkSlots + nr_slots_period * (slot / nr_slots_period);
const int first_ul_slot_period = first_ul_slot_tdd%nr_slots_period;
const int CC_id = 0;
NR_sched_pucch_t *csi_pucch;
......@@ -1211,6 +1211,9 @@ int nr_acknack_scheduling(int mod_id,
nr_fill_nfapi_pucch(mod_id, frame, slot, pucch, UE_id);
memset(pucch, 0, sizeof(*pucch));
pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f;
if(((s + 1)%nr_slots_period) == 0)
pucch->ul_slot = (s + 1 + first_ul_slot_period) % n_slots_frame;
else
pucch->ul_slot = (s + 1) % n_slots_frame;
// we assume that only two indices over the array sched_pucch exist
csi_pucch = &sched_ctrl->sched_pucch[1];
......@@ -1223,19 +1226,15 @@ int nr_acknack_scheduling(int mod_id,
&& !csi_pucch->simultaneous_harqcsi) {
nr_fill_nfapi_pucch(mod_id, frame, slot, csi_pucch, UE_id);
memset(csi_pucch, 0, sizeof(*csi_pucch));
pucch->frame = s >= n_slots_frame - 2 ? (f + 1) % 1024 : f;
pucch->ul_slot = (s + 2) % n_slots_frame;
pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f;
if(((s + 1)%nr_slots_period) == 0)
pucch->ul_slot = (s + 1 + first_ul_slot_period) % n_slots_frame;
else
pucch->ul_slot = (s + 1) % n_slots_frame;
}
}
LOG_D(NR_MAC,"pucch_acknak 1. DL %d.%d, UL_ACK %d.%d, DAI_C %d\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->dai_c);
/* if the UE's next PUCCH occasion is after the possible UL slots (within the
* same frame) or wrapped around to the next frame, then we assume there is
* no possible PUCCH allocation anymore */
if ((pucch->frame == frame
&& (pucch->ul_slot >= first_ul_slot_tdd + nr_ulmix_slots))
|| (pucch->frame == frame + 1))
return -1;
// this is hardcoded for now as ue specific only if we are not on the initialBWP (to be fixed to allow ue_Specific also on initialBWP
NR_CellGroupConfig_t *cg = RC.nrmac[mod_id]->UE_info.CellGroup[UE_id];
......@@ -1253,15 +1252,14 @@ int nr_acknack_scheduling(int mod_id,
int bwp_Id = 0;
if (sched_ctrl->active_ubwp) bwp_Id = sched_ctrl->active_ubwp->bwp_Id;
get_pdsch_to_harq_feedback(mod_id, UE_id, bwp_Id, ss_type, pdsch_to_harq_feedback);
int max_fb_time = 0;
get_pdsch_to_harq_feedback(mod_id, UE_id, bwp_Id, ss_type, &max_fb_time, pdsch_to_harq_feedback);
int max_absslot = frame*n_slots_frame + slot + max_fb_time;
LOG_D(NR_MAC,"pucch_acknak 1b. DL %d.%d, UL_ACK %d.%d, DAI_C %d\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->dai_c);
/* there is a HARQ. Check whether we can use it for this ACKNACK */
if (pucch->dai_c > 0) {
/* this UE already has a PUCCH occasion */
DevAssert(pucch->frame == frame);
// Find the right timing_indicator value.
int i = 0;
while (i < 8) {
......@@ -1278,6 +1276,9 @@ int nr_acknack_scheduling(int mod_id,
nr_fill_nfapi_pucch(mod_id, frame, slot, pucch, UE_id);
memset(pucch, 0, sizeof(*pucch));
pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f;
if(((s + 1)%nr_slots_period) == 0)
pucch->ul_slot = (s + 1 + first_ul_slot_period) % n_slots_frame;
else
pucch->ul_slot = (s + 1) % n_slots_frame;
return nr_acknack_scheduling(mod_id, UE_id, frame, slot, r_pucch,is_common);
}
......@@ -1285,41 +1286,57 @@ int nr_acknack_scheduling(int mod_id,
pucch->timing_indicator = i;
pucch->dai_c++;
// retain old resource indicator, and we are good
LOG_D(NR_MAC,"pucch_acknak : %d.%d. DAI > 0, pucch allocated for %d.%d\n",frame,slot,pucch->frame,pucch->ul_slot);
LOG_D(NR_MAC,"pucch_acknak : %d.%d. DAI > 0, pucch allocated for %d.%d (index %d)\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->timing_indicator);
return 0;
}
LOG_D(NR_MAC,"pucch_acknak : %d.%d DAI = 0, looking for new pucch occasion\n",frame,slot);
/* we need to find a new PUCCH occasion */
/* if time information is outdated (e.g., last PUCCH occasion in last frame),
* set to first possible UL occasion in this frame. Note that if such UE is
* scheduled a lot and used all AckNacks, pucch->frame might have been
* wrapped around to next frame */
if (frame != pucch->frame || pucch->ul_slot < first_ul_slot_tdd) {
/*Inizialization of timing information*/
if (pucch->frame == 0 && pucch->ul_slot == 0) {
AssertFatal(pucch->sr_flag + pucch->dai_c == 0,
"expected no SR/AckNack for UE %d in %4d.%2d, but has %d/%d for %4d.%2d\n",
UE_id, frame, slot, pucch->sr_flag, pucch->dai_c, pucch->frame, pucch->ul_slot);
AssertFatal(frame + 1 != pucch->frame,
"frame wrap around not handled in %s() yet\n",
__func__);
pucch->frame = frame;
pucch->ul_slot = first_ul_slot_tdd;
}
// advance ul_slot if it is not reachable by UE
int pucch_slot,ind_found=-1;
for (int i=0;i<8;i++) {
pucch_slot = slot + pdsch_to_harq_feedback[i];
if ((pucch_slot%nr_slots_period) >= tdd->nrofDownlinkSlots) {
pucch->ul_slot = max(pucch->ul_slot, pucch_slot);
ind_found=i;
// Find the right timing_indicator value.
int ind_found = -1;
// while we are within the feedback limits and it has not been
while ((pucch->frame*n_slots_frame + pucch->ul_slot) <= max_absslot) {
int i = 0;
while (i < 8) {
LOG_D(NR_MAC,"pdsch_to_harq_feedback[%d] = %d (pucch->ul_slot %d - slot %d)\n",
i,pdsch_to_harq_feedback[i],pucch->ul_slot,slot);
if (pdsch_to_harq_feedback[i] == pucch->ul_slot - slot) {
ind_found = i;
break;
}
++i;
}
if (ind_found!=-1)
break;
// advance to the next ul slot
const int f = pucch->frame;
const int s = pucch->ul_slot;
pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f;
if(((s + 1)%nr_slots_period) == 0)
pucch->ul_slot = (s + 1 + first_ul_slot_period) % n_slots_frame;
else
pucch->ul_slot = (s + 1) % n_slots_frame;
}
if (ind_found==-1) {
LOG_W(NR_MAC,
"%4d.%2d could not find pdsch_to_harq_feedback for UE %d: earliest "
"ack slot %d\n",
frame,
slot,
UE_id,
pucch->ul_slot);
return -1;
}
if (pucch->ul_slot >= n_slots_frame) pucch->frame++;
pucch->ul_slot = pucch->ul_slot % n_slots_frame;
AssertFatal(ind_found!=-1,"couldn't find a valid UL_ACK slot for PUCCH, shouldn't happen\n");
// is there already CSI in this slot?
csi_pucch = &sched_ctrl->sched_pucch[1];
......@@ -1340,6 +1357,9 @@ int nr_acknack_scheduling(int mod_id,
const int s = pucch->ul_slot;
memset(pucch, 0, sizeof(*pucch));
pucch->frame = s == n_slots_frame - 1 ? (f + 1) % 1024 : f;
if(((s + 1)%nr_slots_period) == 0)
pucch->ul_slot = (s + 1 + first_ul_slot_period) % n_slots_frame;
else
pucch->ul_slot = (s + 1) % n_slots_frame;
return nr_acknack_scheduling(mod_id, UE_id, frame, slot, r_pucch,is_common);
}
......@@ -1353,7 +1373,7 @@ int nr_acknack_scheduling(int mod_id,
pucch->timing_indicator = ind_found; // index in the list of timing indicators
LOG_D(NR_MAC,"pucch_acknak 2. DAI 0 DL %d.%d, UL_ACK %d.%d (index %d)\n",frame,slot,pucch->frame,pucch->ul_slot,ind_found);
LOG_D(NR_MAC,"pucch_acknak 2. DAI 0 DL %d.%d, UL_ACK %d.%d (index %d)\n",frame,slot,pucch->frame,pucch->ul_slot,pucch->timing_indicator);
pucch->dai_c++;
pucch->resource_indicator = 0; // each UE has dedicated PUCCH resources
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
View file @ 6148e8f3
......@@ -1218,7 +1218,7 @@ void pf_ul(module_id_t module_id,
UE_id, UE_info->rnti[UE_id],rbStart,min_rb,bwpSize);
return;
}
else LOG_I(NR_MAC,"allocating UL data for UE %d/RNTI %04x (rbStsart %d, min_rb %d, bwpSize %d\n",UE_id, UE_info->rnti[UE_id],rbStart,min_rb,bwpSize);
else LOG_D(NR_MAC,"allocating UL data for UE %d/RNTI %04x (rbStsart %d, min_rb %d, bwpSize %d\n",UE_id, UE_info->rnti[UE_id],rbStart,min_rb,bwpSize);
/* Save PUSCH field */
/* we want to avoid a lengthy deduction of DMRS and other parameters in
......
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
View file @ 6148e8f3
......@@ -212,6 +212,7 @@ void get_pdsch_to_harq_feedback(int Mod_idP,
int UE_id,
int bwp_id,
NR_SearchSpace__searchSpaceType_PR ss_type,
int *max_fb_time,
uint8_t *pdsch_to_harq_feedback);
void nr_configure_css_dci_initial(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu,
......
openair2/LAYER2/nr_rlc/nr_rlc_oai_api.c
View file @ 6148e8f3
......@@ -460,7 +460,7 @@ static void deliver_sdu(void *_ue, nr_rlc_entity_t *entity, char *buf, int size)
exit(1);
rb_found:
LOG_I(RLC, "%s:%d:%s: delivering SDU (rnti %d is_srb %d rb_id %d) size %d\n",
LOG_D(RLC, "%s:%d:%s: delivering SDU (rnti %d is_srb %d rb_id %d) size %d\n",
__FILE__, __LINE__, __FUNCTION__, ue->rnti, is_srb, rb_id, size);
memblock = get_free_mem_block(size, __func__);
......
targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
View file @ 6148e8f3
......@@ -555,6 +555,7 @@ void *trx_usrp_write_thread(void * arg){
s->tx_md.start_of_burst = (s->tx_count==0) ? true : first_packet;
s->tx_md.end_of_burst = last_packet;
s->tx_md.time_spec = uhd::time_spec_t::from_ticks(timestamp, s->sample_rate);
LOG_D(PHY,"usrp_tx_write: tx_count %llu SoB %d, EoB %d, TS %llu\n",(unsigned long long)s->tx_count,s->tx_md.start_of_burst,s->tx_md.end_of_burst,(unsigned long long)timestamp);
s->tx_count++;
// bit 3 enables gpio (for backward compatibility)
......
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf
View file @ 6148e8f3
......@@ -231,7 +231,7 @@ MACRLCs = (
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
ulsch_max_slots_inactivity = 10;
pusch_TargetSNRx10 = 200;
pusch_TargetSNRx10 = 150;
pucch_TargetSNRx10 = 200;
}
);
......@@ -241,6 +241,8 @@ L1s = (
num_cc = 1;
tr_n_preference = "local_mac";
pusch_proc_threads = 8;
prach_dtx_threshold = 120;
pucch0_dtx_threshold = 150;
ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0
}
);
......
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf
View file @ 6148e8f3
......@@ -231,7 +231,7 @@ MACRLCs = (
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
ulsch_max_slots_inactivity = 10;
pusch_TargetSNRx10 = 200;
pusch_TargetSNRx10 = 150;
pucch_TargetSNRx10 = 200;
}
);
......@@ -241,6 +241,8 @@ L1s = (
num_cc = 1;
tr_n_preference = "local_mac";
pusch_proc_threads = 8;
prach_dtx_threshold = 120;
pucch0_dtx_threshold = 150;
ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0
}
);
......
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