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Commit 652df48a authored by Robert Schmidt's avatar Robert Schmidt
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Merge remote-tracking branch 'origin/NR_UE_deadcode_cleanup' into integration_2022_wk43

parents 2706b4ff 44ee11be
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CMakeLists.txt
View file @ 652df48a
......@@ -1695,7 +1695,6 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_prach.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/dci_nr.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/dci_tools_nr.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/pucch_nr.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/csi_rx.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_uci_tools_common.c
......
common/utils/telnetsrv/telnetsrv_cpumeasur_def.h
View file @ 652df48a
......@@ -134,11 +134,6 @@
{"dlsch_tc_intl1_stats", &(UE->dlsch_tc_intl1_stats),0,1},\
{"dlsch_tc_intl2_stats", &(UE->dlsch_tc_intl2_stats),0,1},\
{"tx_prach", &(UE->tx_prach),0,1},\
{"dlsch_encoding_SIC_stats", &(UE->dlsch_encoding_SIC_stats),0,1},\
{"dlsch_scrambling_SIC_stats", &(UE->dlsch_scrambling_SIC_stats),0,1},\
{"dlsch_modulation_SIC_stats", &(UE->dlsch_modulation_SIC_stats),0,1},\
{"dlsch...ping_unit_SIC_stats", &(UE->dlsch_llr_stripping_unit_SIC_stats),0,1},\
{"dlsch_unscrambling_SIC_stats", &(UE->dlsch_unscrambling_SIC_stats),0,1},\
{"ue_front_end_stat", &(UE->ue_front_end_stat),0,1},\
{"ue_front_end_per_slot_stat", &(UE->ue_front_end_per_slot_stat[0]),0,LTE_SLOTS_PER_SUBFRAME},\
{"pdcch_procedures_stat", &(UE->pdcch_procedures_stat),0,1},\
......
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
View file @ 652df48a
......@@ -92,7 +92,6 @@ typedef struct {
int N_CCE;
uint8_t payloadSize;
uint8_t payloadBits[16] __attribute__((aligned(16))); // will be cast as uint64
//fapi_nr_dci_pdu_rel15_t dci;
} fapi_nr_dci_indication_pdu_t;
......@@ -423,7 +422,7 @@ typedef struct{
} fapi_nr_dl_srs_config_t;
typedef enum{vrb_to_prb_mapping_non_interleaved = 0, vrb_to_prb_mapping_interleaved = 1} vrb_to_prb_mapping_t;
//typedef fapi_nr_dci_pdu_rel15_t fapi_nr_dl_config_dlsch_pdu_rel15_t;
typedef struct {
uint16_t BWPSize;
uint16_t BWPStart;
......@@ -542,438 +541,6 @@ typedef struct {
fapi_nr_dl_config_request_pdu_t dl_config_list[FAPI_NR_DL_CONFIG_LIST_NUM];
} fapi_nr_dl_config_request_t;
//
// P5
//
typedef struct {
fapi_nr_coreset_t coreset;
uint8_t monitoring_slot_peridicity;
uint8_t monitoring_slot_offset;
uint16_t duration;
uint16_t monitoring_symbols_within_slot;
uint8_t number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
uint8_t dci_2_0_number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
uint8_t dci_2_3_monitorying_periodicity;
uint8_t dci_2_3_number_of_candidates;
} fapi_nr_search_space_t;
typedef struct {
fapi_nr_search_space_t search_space_sib1;
fapi_nr_search_space_t search_space_others_sib;
fapi_nr_search_space_t search_space_paging;
//fapi_nr_coreset_t coreset_ra; // common coreset
fapi_nr_search_space_t search_space_ra;
} fapi_nr_pdcch_config_common_t;
typedef struct {
uint8_t k0;
uint8_t mapping_type;
uint8_t symbol_starting;
uint8_t symbol_length;
} fapi_nr_pdsch_time_domain_resource_allocation_t;
typedef struct {
fapi_nr_pdsch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_DL_ALLOCATIONS];
} fapi_nr_pdsch_config_common_t;
typedef struct {
uint8_t prach_configuration_index;
uint8_t msg1_fdm;
uint8_t msg1_frequency_start;
uint8_t zero_correlation_zone_config;
uint8_t preamble_received_target_power;
uint8_t preamble_transmission_max;
uint8_t power_ramping_step;
uint8_t ra_window_size;
uint8_t total_number_of_preamble;
uint8_t ssb_occasion_per_rach;
uint8_t cb_preamble_per_ssb;
uint8_t group_a_msg3_size;
uint8_t group_a_number_of_preamble;
uint8_t group_b_power_offset;
uint8_t contention_resolution_timer;
uint8_t rsrp_threshold_ssb;
uint8_t rsrp_threshold_ssb_sul;
uint8_t prach_length; // l839, l139
uint8_t prach_root_sequence_index; // 0 - 837 for l839, 0 - 137 for l139
uint8_t msg1_subcarrier_spacing;
uint8_t restrictedset_config;
uint8_t msg3_transform_precoding;
} fapi_nr_rach_config_common_t;
typedef struct {
uint8_t k2;
uint8_t mapping_type;
uint8_t symbol_starting;
uint8_t symbol_length;
} fapi_nr_pusch_time_domain_resource_allocation_t;
typedef struct {
uint8_t group_hopping_enabled_transform_precoding;
fapi_nr_pusch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_UL_ALLOCATIONS];
uint8_t msg3_delta_preamble;
uint8_t p0_nominal_with_grant;
} fapi_nr_pusch_config_common_t;
typedef struct {
uint8_t pucch_resource_common;
uint8_t pucch_group_hopping;
uint8_t hopping_id;
uint8_t p0_nominal;
} fapi_nr_pucch_config_common_t;
typedef struct {
fapi_nr_pdcch_config_common_t pdcch_config_common;
fapi_nr_pdsch_config_common_t pdsch_config_common;
} fapi_nr_dl_bwp_common_config_t;
typedef struct {
uint16_t int_rnti;
uint8_t time_frequency_set;
uint8_t dci_payload_size;
uint8_t serving_cell_id[FAPI_NR_MAX_NUM_SERVING_CELLS]; // interrupt configuration per serving cell
uint8_t position_in_dci[FAPI_NR_MAX_NUM_SERVING_CELLS]; // interrupt configuration per serving cell
} fapi_nr_downlink_preemption_t;
typedef struct {
uint8_t tpc_index;
uint8_t tpc_index_sul;
uint8_t target_cell;
} fapi_nr_pusch_tpc_command_config_t;
typedef struct {
uint8_t tpc_index_pcell;
uint8_t tpc_index_pucch_scell;
} fapi_nr_pucch_tpc_command_config_t;
typedef struct {
uint8_t starting_bit_of_format_2_3;
uint8_t feild_type_format_2_3;
} fapi_nr_srs_tpc_command_config_t;
typedef struct {
fapi_nr_downlink_preemption_t downlink_preemption;
fapi_nr_pusch_tpc_command_config_t tpc_pusch;
fapi_nr_pucch_tpc_command_config_t tpc_pucch;
fapi_nr_srs_tpc_command_config_t tpc_srs;
} fapi_nr_pdcch_config_dedicated_t;
typedef struct {
uint8_t dmrs_type;
uint8_t dmrs_addition_position;
uint8_t max_length;
uint16_t scrambling_id0;
uint16_t scrambling_id1;
uint8_t ptrs_frequency_density[2]; // phase tracking rs
uint8_t ptrs_time_density[3]; // phase tracking rs
uint8_t ptrs_epre_ratio; // phase tracking rs
uint8_t ptrs_resource_element_offset; // phase tracking rs
} fapi_nr_dmrs_downlink_config_t;
typedef struct {
uint8_t bwp_or_cell_level;
uint8_t pattern_type;
uint32_t resource_blocks[9]; // bitmaps type 275 bits
uint8_t slot_type; // bitmaps type one/two slot(s)
uint32_t symbols_in_resouece_block; // bitmaps type 14/28 bits
uint8_t periodic; // bitmaps type
uint32_t pattern[2]; // bitmaps type 2/4/5/8/10/20/40 bits
fapi_nr_coreset_t coreset; // coreset
uint8_t subcarrier_spacing;
uint8_t mode;
} fapi_nr_rate_matching_pattern_group_t;
typedef struct {
// resource mapping
uint8_t row; // row1/row2/row4/other
uint16_t frequency_domain_allocation; // 4/12/3/6 bits
uint8_t number_of_ports;
uint8_t first_ofdm_symbol_in_time_domain;
uint8_t first_ofdm_symbol_in_time_domain2;
uint8_t cdm_type;
uint8_t density; // .5/1/3
uint8_t density_dot5_type; // even/odd PRBs
uint8_t frequency_band_starting_rb; // freqBand
uint8_t frequency_band_number_of_rb; // freqBand
// periodicityAndOffset
uint8_t periodicity; // slot4/5/8/10/16/20/32/40/64/80/160/320/640
uint32_t offset; // 0..639 bits
} fapi_nr_zp_csi_rs_resource_t;
typedef struct {
uint16_t data_scrambling_id_pdsch;
fapi_nr_dmrs_downlink_config_t dmrs_dl_for_pdsch_mapping_type_a;
fapi_nr_dmrs_downlink_config_t dmrs_dl_for_pdsch_mapping_type_b;
uint8_t vrb_to_prb_interleaver;
uint8_t resource_allocation;
fapi_nr_pdsch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_DL_ALLOCATIONS];
uint8_t pdsch_aggregation_factor;
fapi_nr_rate_matching_pattern_group_t rate_matching_pattern_group1;
fapi_nr_rate_matching_pattern_group_t rate_matching_pattern_group2;
uint8_t rbg_size;
uint8_t mcs_table;
uint8_t max_num_of_code_word_scheduled_by_dci;
uint8_t bundle_size; // prb_bundling static
uint8_t bundle_size_set1; // prb_bundling dynamic
uint8_t bundle_size_set2; // prb_bundling dynamic
fapi_nr_zp_csi_rs_resource_t periodically_zp_csi_rs_resource_set[FAPI_NR_MAX_NUM_ZP_CSI_RS_RESOURCE_PER_SET];
} fapi_nr_pdsch_config_dedicated_t;
typedef struct {
uint16_t starting_prb;
uint8_t intra_slot_frequency_hopping;
uint16_t second_hop_prb;
uint8_t format; // pucch format 0..4
uint8_t initial_cyclic_shift;
uint8_t number_of_symbols;
uint8_t starting_symbol_index;
uint8_t time_domain_occ;
uint8_t number_of_prbs;
uint8_t occ_length;
uint8_t occ_index;
} fapi_nr_pucch_resource_t;
typedef struct {
uint8_t periodicity;
uint8_t number_of_harq_process;
fapi_nr_pucch_resource_t n1_pucch_an;
} fapi_nr_sps_config_t;
typedef struct {
uint8_t beam_failure_instance_max_count;
uint8_t beam_failure_detection_timer;
} fapi_nr_radio_link_monitoring_config_t;
typedef struct {
fapi_nr_pdcch_config_dedicated_t pdcch_config_dedicated;
fapi_nr_pdsch_config_dedicated_t pdsch_config_dedicated;
fapi_nr_sps_config_t sps_config;
fapi_nr_radio_link_monitoring_config_t radio_link_monitoring_config;
} fapi_nr_dl_bwp_dedicated_config_t;
typedef struct {
fapi_nr_rach_config_common_t rach_config_common;
fapi_nr_pusch_config_common_t pusch_config_common;
fapi_nr_pucch_config_common_t pucch_config_common;
} fapi_nr_ul_bwp_common_config_t;
typedef struct {
uint8_t inter_slot_frequency_hopping;
uint8_t additional_dmrs;
uint8_t max_code_rate;
uint8_t number_of_slots;
uint8_t pi2bpsk;
uint8_t simultaneous_harq_ack_csi;
} fapi_nr_pucch_format_config_t;
typedef struct {
fapi_nr_pucch_format_config_t format1;
fapi_nr_pucch_format_config_t format2;
fapi_nr_pucch_format_config_t format3;
fapi_nr_pucch_format_config_t format4;
fapi_nr_pucch_resource_t multi_csi_pucch_resources[2];
uint8_t dl_data_to_ul_ack[8];
// pucch power control
uint8_t deltaF_pucch_f0;
uint8_t deltaF_pucch_f1;
uint8_t deltaF_pucch_f2;
uint8_t deltaF_pucch_f3;
uint8_t deltaF_pucch_f4;
uint8_t two_pucch_pc_adjusment_states;
} fapi_nr_pucch_config_dedicated_t;
typedef struct {
uint8_t dmrs_type;
uint8_t dmrs_addition_position;
uint8_t ptrs_uplink_config; // to indicate if PTRS Uplink is configured of not
uint8_t ptrs_type; //cp-OFDM, dft-S-OFDM
uint16_t ptrs_frequency_density[2];
uint8_t ptrs_time_density[3];
uint8_t ptrs_max_number_of_ports;
uint8_t ptrs_resource_element_offset;
uint8_t ptrs_power;
uint16_t ptrs_sample_density[5];
uint8_t ptrs_time_density_transform_precoding;
uint8_t max_length;
uint16_t scrambling_id0;
uint16_t scrambling_id1;
uint8_t npusch_identity;
uint8_t disable_sequence_group_hopping;
uint8_t sequence_hopping_enable;
} fapi_nr_dmrs_uplink_config_t;
typedef struct {
uint8_t tpc_accmulation;
uint8_t msg3_alpha;
uint8_t p0_nominal_with_grant;
uint8_t two_pusch_pc_adjustments_states;
uint8_t delta_mcs;
} fapi_nr_pusch_power_control_t;
typedef enum {tx_config_codebook = 1, tx_config_nonCodebook = 2} tx_config_t;
typedef enum {transform_precoder_enabled = 0, transform_precoder_disabled = 1} transform_precoder_t;
typedef enum {
codebook_subset_fullyAndPartialAndNonCoherent = 1,
codebook_subset_partialAndNonCoherent = 2,
codebook_subset_nonCoherent = 3} codebook_subset_t;
typedef struct {
uint16_t data_scrambling_identity;
tx_config_t tx_config;
fapi_nr_dmrs_uplink_config_t dmrs_ul_for_pusch_mapping_type_a;
fapi_nr_dmrs_uplink_config_t dmrs_ul_for_pusch_mapping_type_b;
fapi_nr_pusch_power_control_t pusch_power_control;
uint8_t frequency_hopping;
uint16_t frequency_hopping_offset_lists[4];
uint8_t resource_allocation;
fapi_nr_pusch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_UL_ALLOCATIONS];
uint8_t pusch_aggregation_factor;
uint8_t mcs_table;
uint8_t mcs_table_transform_precoder;
transform_precoder_t transform_precoder;
codebook_subset_t codebook_subset;
uint8_t max_rank;
uint8_t rbg_size;
//uci-OnPUSCH
uint8_t uci_on_pusch_type; //dynamic, semi-static
uint8_t beta_offset_ack_index1[4];
uint8_t beta_offset_ack_index2[4];
uint8_t beta_offset_ack_index3[4];
uint8_t beta_offset_csi_part1_index1[4];
uint8_t beta_offset_csi_part1_index2[4];
uint8_t beta_offset_csi_part2_index1[4];
uint8_t beta_offset_csi_part2_index2[4];
uint8_t tp_pi2BPSK;
} fapi_nr_pusch_config_dedicated_t;
typedef struct {
uint8_t frequency_hopping;
fapi_nr_dmrs_uplink_config_t cg_dmrs_configuration;
uint8_t mcs_table;
uint8_t mcs_table_transform_precoder;
//uci-OnPUSCH
uint8_t uci_on_pusch_type; //dynamic, semi-static
uint8_t beta_offset_ack_index1[4];
uint8_t beta_offset_ack_index2[4];
uint8_t beta_offset_ack_index3[4];
uint8_t beta_offset_csi_part1_index1[4];
uint8_t beta_offset_csi_part1_index2[4];
uint8_t beta_offset_csi_part2_index1[4];
uint8_t beta_offset_csi_part2_index2[4];
uint8_t resource_allocation;
// rgb-Size structure missing in spec.
uint8_t power_control_loop_to_use;
// p0-PUSCH-Alpha
uint8_t p0;
uint8_t alpha;
uint8_t transform_precoder;
uint8_t number_of_harq_process;
uint8_t rep_k;
uint8_t rep_k_rv;
uint8_t periodicity;
uint8_t configured_grant_timer;
// rrc-ConfiguredUplinkGrant
uint16_t time_domain_offset;
uint8_t time_domain_allocation;
uint32_t frequency_domain_allocation;
uint8_t antenna_ports;
uint8_t dmrs_seq_initialization;
uint8_t precoding_and_number_of_layers;
uint8_t srs_resource_indicator;
uint8_t mcs_and_tbs;
uint8_t frequency_hopping_offset;
uint8_t path_loss_reference_index;
} fapi_nr_configured_grant_config_t;
typedef struct {
uint8_t qcl_type1_serving_cell_index;
uint8_t qcl_type1_bwp_id;
uint8_t qcl_type1_rs_type; // csi-rs or ssb
uint8_t qcl_type1_nzp_csi_rs_resource_id;
uint8_t qcl_type1_ssb_index;
uint8_t qcl_type1_type;
uint8_t qcl_type2_serving_cell_index;
uint8_t qcl_type2_bwp_id;
uint8_t qcl_type2_rs_type; // csi-rs or ssb
uint8_t qcl_type2_nzp_csi_rs_resource_id;
uint8_t qcl_type2_ssb_index;
uint8_t qcl_type2_type;
} fapi_nr_tci_state_t;
typedef struct {
uint8_t root_sequence_index;
// rach genertic
uint8_t prach_configuration_index;
uint8_t msg1_fdm;
uint8_t msg1_frequency_start;
uint8_t zero_correlation_zone_config;
uint8_t preamble_received_target_power;
uint8_t preamble_transmission_max;
uint8_t power_ramping_step;
uint8_t ra_window_size;
uint8_t rsrp_threshold_ssb;
// PRACH-ResourceDedicatedBFR
uint8_t bfr_ssb_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_ssb_ra_preamble_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
// NZP-CSI-RS-Resource
uint8_t bfr_csi_rs_nzp_resource_mapping[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csi_rs_power_control_offset[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csi_rs_power_control_offset_ss[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint16_t bfr_csi_rs_scrambling_id[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csi_rs_resource_periodicity[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint16_t bfr_csi_rs_resource_offset[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
fapi_nr_tci_state_t qcl_infomation_periodic_csi_rs[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csirs_ra_occasions[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csirs_ra_preamble_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS][FAPI_NR_MAX_RA_OCCASION_PER_CSIRS];
uint8_t ssb_per_rach_occasion;
uint8_t ra_ssb_occasion_mask_index;
fapi_nr_search_space_t recovery_search_space;
// RA-Prioritization
uint8_t power_ramping_step_high_priority;
uint8_t scaling_factor_bi;
uint8_t beam_failure_recovery_timer;
} fapi_nr_beam_failure_recovery_config_t;
typedef struct {
fapi_nr_pucch_config_dedicated_t pucch_config_dedicated;
fapi_nr_pusch_config_dedicated_t pusch_config_dedicated;
fapi_nr_configured_grant_config_t configured_grant_config;
// SRS-Config
uint8_t srs_tpc_accumulation;
fapi_nr_beam_failure_recovery_config_t beam_failure_recovery_config;
} fapi_nr_ul_bwp_dedicated_config_t;
#define FAPI_NR_CONFIG_REQUEST_MASK_PBCH 0x01
#define FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON 0x02
#define FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_COMMON 0x04
......
openair1/PHY/INIT/nr_init_ue.c
View file @ 652df48a
......@@ -498,15 +498,8 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
}
ue->sinr_CQI_dB = (double *) malloc16_clear( fp->N_RB_DL*12*sizeof(double) );
ue->init_averaging = 1;
// default value until overwritten by RRCConnectionReconfiguration
if (fp->nb_antenna_ports_gNB==2)
ue->pdsch_config_dedicated->p_a = dBm3;
else
ue->pdsch_config_dedicated->p_a = dB0;
// enable MIB/SIB decoding by default
ue->decode_MIB = 1;
ue->decode_SIB = 1;
......@@ -632,7 +625,6 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
free_and_zero(ue->prs_vars[idx]);
}
free_and_zero(ue->sinr_CQI_dB);
}
void term_nr_ue_transport(PHY_VARS_NR_UE *ue)
......@@ -668,7 +660,6 @@ void init_nr_ue_transport(PHY_VARS_NR_UE *ue) {
ue->dlsch_SI[i] = new_nr_ue_dlsch(1,1,NSOFT,ue->max_ldpc_iterations,ue->frame_parms.N_RB_DL);
ue->dlsch_ra[i] = new_nr_ue_dlsch(1,1,NSOFT,ue->max_ldpc_iterations,ue->frame_parms.N_RB_DL);
ue->transmission_mode[i] = ue->frame_parms.nb_antenna_ports_gNB==1 ? 1 : 2;
}
//ue->frame_parms.pucch_config_common.deltaPUCCH_Shift = 1;
......@@ -726,15 +717,6 @@ void phy_init_nr_top(PHY_VARS_NR_UE *ue) {
load_dftslib();
init_context_synchro_nr(frame_parms);
generate_ul_reference_signal_sequences(SHRT_MAX);
// Polar encoder init for PBCH
//lte_sync_time_init(frame_parms);
//generate_ul_ref_sigs();
//generate_ul_ref_sigs_rx();
//generate_64qam_table();
//generate_16qam_table();
//generate_RIV_tables();
//init_unscrambling_lut();
//set_taus_seed(1328);
}
void phy_term_nr_top(void)
......
openair1/PHY/NR_REFSIG/ul_ref_seq_nr.c
View file @ 652df48a
......@@ -230,7 +230,7 @@ void generate_ul_reference_signal_sequences(unsigned int scaling)
if (already_called) return;
already_called = true;
unsigned int u,v,Msc_RS;
unsigned int u,v,Msc_RS;
#if 0
......
openair1/PHY/NR_TRANSPORT/nr_prach_common.c
View file @ 652df48a
......@@ -113,7 +113,6 @@ void compute_nr_prach_seq(uint8_t short_sequence,
LOG_D(PHY,"compute_prach_seq: prach short sequence %x, num_sequences %d, rootSequenceIndex %d\n", short_sequence, num_sequences, rootSequenceIndex);
N_ZC = (short_sequence) ? 139 : 839;
//init_prach_tables(N_ZC); //moved to phy_init_lte_ue/eNB, since it takes to long in real-time
init_nr_prach_tables(N_ZC);
......
openair1/PHY/NR_UE_TRANSPORT/dci_nr.h deleted 100644 → 0
View file @ 2706b4ff
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file PHY/LTE_TRANSPORT/dci_nr.h
* \brief typedefs for NR DCI structures from 38-212.
* \author R. Knopp, A. Mico Pereperez
* \date 2018
* \version 0.1
* \company Eurecom
* \email: knopp@eurecom.fr
* \note
* \warning
*/
#ifndef __PHY_NR_UE_TRANSPORT_DCI_NR__H__
#define __PHY_NR_UE_TRANSPORT_DCI_NR__H__
#include <stdint.h>
#define MAX_DCI_SIZE_BITS 45
#define NR_PDCCH_DCI_H
#ifdef NR_PDCCH_DCI_H
struct NR_DCI_INFO_EXTRACTED {
uint8_t identifier_dci_formats ; // 0 IDENTIFIER_DCI_FORMATS:
uint8_t carrier_ind ; // 1 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
uint8_t sul_ind_0_1 ; // 2 SUL_IND_0_1:
uint8_t slot_format_ind ; // 3 SLOT_FORMAT_IND: size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
uint8_t pre_emption_ind ; // 4 PRE_EMPTION_IND: size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
uint8_t block_number ; // 5 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
uint8_t close_loop_ind ; // 6 CLOSE_LOOP_IND:
uint8_t bandwidth_part_ind ; // 7 BANDWIDTH_PART_IND:
uint8_t short_message_ind ; // 8 SHORT_MESSAGE_IND:
uint8_t short_messages ; // 9 SHORT_MESSAGES:
uint16_t freq_dom_resource_assignment_UL; // 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
// (NOTE 1) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is larger than the payload size of the DCI format 1_0 monitored in common search space
// the bitwidth of the frequency domain resource allocation field in the DCI format 0_0
// is reduced such that the size of DCI format 0_0 equals to the size of the DCI format 1_0
uint16_t freq_dom_resource_assignment_DL; // 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
uint8_t time_dom_resource_assignment ; // 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
// where I the number of entries in the higher layer parameter pusch-AllocationList
uint8_t vrb_to_prb_mapping ; // 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
uint8_t prb_bundling_size_ind ; // 14 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
uint8_t rate_matching_ind ; // 15 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
uint8_t zp_csi_rs_trigger ; // 16 ZP_CSI_RS_TRIGGER:
uint8_t freq_hopping_flag ; // 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
uint8_t tb1_mcs ; // 18 TB1_MCS:
uint8_t tb1_ndi ; // 19 TB1_NDI:
uint8_t tb1_rv ; // 20 TB1_RV:
uint8_t tb2_mcs ; // 21 TB2_MCS:
uint8_t tb2_ndi ; // 22 TB2_NDI:
uint8_t tb2_rv ; // 23 TB2_RV:
uint8_t mcs ; // 24 MCS:
uint8_t ndi ; // 25 NDI:
uint8_t rv ; // 26 RV:
uint8_t harq_process_number ; // 27 HARQ_PROCESS_NUMBER:
uint8_t dai ; // 28 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
// 2 if one serving cell is configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 bits are the counter DAI
// 0 otherwise
uint8_t first_dai ; // 29 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK
uint8_t second_dai ; // 30 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks
uint8_t tb_scaling ; // 31 TB_SCALING:
uint8_t tpc_pusch ; // 32 TPC_PUSCH:
uint8_t tpc_pucch ; // 33 TPC_PUCCH:
uint8_t pucch_resource_ind ; // 34 PUCCH_RESOURCE_IND:
uint8_t pdsch_to_harq_feedback_time_ind ; // 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
uint8_t srs_resource_ind ; // 36 SRS_RESOURCE_IND:
uint8_t precod_nbr_layers ; // 37 PRECOD_NBR_LAYERS:
uint8_t antenna_ports ; // 38 ANTENNA_PORTS:
uint8_t tci ; // 39 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
uint8_t srs_request ; // 40 SRS_REQUEST:
uint8_t tpc_cmd ; // 41 TPC_CMD:
uint8_t csi_request ; // 42 CSI_REQUEST:
uint8_t cbgti ; // 43 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
uint8_t cbgfi ; // 44 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
uint8_t ptrs_dmrs ; // 45 PTRS_DMRS:
uint8_t beta_offset_ind ; // 46 BETA_OFFSET_IND:
uint8_t dmrs_seq_ini ; // 47 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding
// is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise
uint8_t ul_sch_ind ; // 48 UL_SCH_IND: value of "1" indicates UL-SCH shall be transmitted on the PUSCH and a value of "0" indicates UL-SCH shall not be transmitted on the PUSCH
uint16_t padding_nr_dci ; // 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is less than the payload size of the DCI format 1_0 monitored in common search space
// zeros shall be appended to the DCI format 0_0
// until the payload size equals that of the DCI format 1_0
uint8_t sul_ind_0_0 ; // 50 SUL_IND_0_0:
uint8_t ra_preamble_index ; // 51 RA_PREAMBLE_INDEX:
uint8_t sul_ind_1_0 ; // 52 SUL_IND_1_0:
uint8_t ss_pbch_index ; // 53 SS_PBCH_INDEX
uint8_t prach_mask_index ; // 54 PRACH_MASK_INDEX
uint8_t reserved_nr_dci ; // 55 RESERVED_NR_DCI
};
typedef struct NR_DCI_INFO_EXTRACTED NR_DCI_INFO_EXTRACTED_t;
#endif
#endif
openair1/PHY/NR_UE_TRANSPORT/dci_tools_nr.c deleted 100644 → 0
View file @ 2706b4ff
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file PHY/LTE_TRANSPORT/dci_tools_nr.c
* \brief PHY Support routines (eNB/UE) for filling PDSCH/PUSCH/DLSCH/ULSCH data structures based on DCI PDUs generated by eNB MAC scheduler.
* \author R. Knopp, A. Mico Pereperez
* \date 2018
* \version 0.1
* \company Eurecom
* \email: knopp@eurecom.fr
* \note
* \warning
*/
//#include "PHY/defs.h"
#include <stdint.h>
#include "PHY/defs_nr_UE.h"
//#include "PHY/NR_TRANSPORT/nr_dci.h"
//#include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h"
//#include "PHY/extern.h"
//#include "SCHED/defs.h"
#ifdef DEBUG_DCI_TOOLS
#include "PHY/vars.h"
#endif
#include "assertions.h"
#include "SCHED_NR_UE/harq_nr.h"
//#define DEBUG_HARQ
//#define DEBUG_DCI
#define NR_PDCCH_DCI_TOOLS
//#define NR_PDCCH_DCI_TOOLS_DEBUG
uint8_t nr_subframe2harq_pid(NR_DL_FRAME_PARMS *frame_parms,uint32_t frame,uint8_t slot) {
/*
#ifdef DEBUG_DCI
if (frame_parms->frame_type == TDD)
printf("dci_tools.c: subframe2_harq_pid, subframe %d for TDD configuration %d\n",subframe,frame_parms->tdd_config);
else
printf("dci_tools.c: subframe2_harq_pid, subframe %d for FDD \n",subframe);
#endif
*/
uint8_t ret = 255;
uint8_t subframe = slot / frame_parms->slots_per_subframe;
AssertFatal(1==0,"Not ready for this ...\n");
if (frame_parms->frame_type == FDD) {
ret = (((frame<<1)+slot)&7);
} else {
}
if (ret == 255) {
LOG_E(PHY, "invalid harq_pid(%d) at SFN/SF = %d/%d\n", ret, frame, subframe);
//mac_xface->macphy_exit("invalid harq_pid");
}
return ret;
}
uint8_t nr_pdcch_alloc2ul_subframe(NR_DL_FRAME_PARMS *frame_parms,uint8_t n) {
AssertFatal(1==0,"Not ready for this\n");
}
uint32_t nr_pdcch_alloc2ul_frame(NR_DL_FRAME_PARMS *frame_parms,uint32_t frame, uint8_t n) {
AssertFatal(1==0,"Not ready for this\n");
}
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_llr_computation.c
View file @ 652df48a
......@@ -910,158 +910,6 @@ void nr_dlsch_64qam_llr(NR_DL_FRAME_PARMS *frame_parms,
#endif
}
//#if 0
void nr_dlsch_64qam_llr_SIC(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int32_t **sic_buffer, //Q15
int32_t **rho_i,
int16_t *dlsch_llr,
uint8_t num_pdcch_symbols,
int32_t **dl_ch_mag,
int32_t **dl_ch_magb,
uint16_t nb_rb,
uint8_t subframe,
uint16_t mod_order_0,
uint32_t rb_alloc)
{
int16_t rho_amp_x0[2*frame_parms->N_RB_DL*12];
int16_t rho_rho_amp_x0[2*frame_parms->N_RB_DL*12];
uint16_t amp_tmp;
uint16_t *llr32=(uint16_t*)dlsch_llr;
int i, len, nsymb, len2;
uint8_t symbol, symbol_mod;
int len_acc=0;
uint16_t *sic_data;
uint16_t pbch_pss_sss_adjust;
unsigned char len_mod4=0;
uint16_t *llr2;
__m128i *ch_mag,*ch_magb;
nsymb = (frame_parms->Ncp==0) ? 14:12;
for (symbol=num_pdcch_symbols; symbol<nsymb; symbol++) {
uint16_t *rxF = (uint16_t*)(&rxdataF_comp[0][((int16_t)symbol*frame_parms->N_RB_DL*12)]);
int16_t *rho_1=(int16_t*)(&rho_i[0][((int16_t)symbol*frame_parms->N_RB_DL*12)]);
ch_mag = (__m128i*)(&dl_ch_mag[0][((int16_t)symbol*frame_parms->N_RB_DL*12)]);
ch_magb = (__m128i*)(&dl_ch_magb[0][((int16_t)symbol*frame_parms->N_RB_DL*12)]);
sic_data = (uint16_t*)(&sic_buffer[0][((int16_t)len_acc)]);
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
pbch_pss_sss_adjust=adjust_G2(frame_parms->Ncp,frame_parms->frame_type, frame_parms->N_RB_DL,&rb_alloc,6,subframe,symbol);
if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
amp_tmp = 0x1fff;//dlsch0->sqrt_rho_b; already taken into account
if (frame_parms->nb_antenna_ports_gNB!=1)
len = nb_rb*8 - (2*pbch_pss_sss_adjust/3);
else
len = nb_rb*10 - (5*pbch_pss_sss_adjust/6);
} else {
amp_tmp = 0x1fff; //dlsch0->sqrt_rho_a; already taken into account
len = nb_rb*12 - pbch_pss_sss_adjust;
}
if (mod_order_0==6)
amp_tmp=amp_tmp<<1; // to compensate for >> 1 shift in modulation
len_acc+=len;
multadd_complex_vector_real_scalar((int16_t *)sic_data,
amp_tmp,
(int16_t *)rho_amp_x0, //this is in Q13
1,
len);
mult_cpx_vector((int16_t *)rho_1, //Q15
(int16_t *)rho_amp_x0, //Q13
(int16_t*)rho_rho_amp_x0,
len,
13);
sub_cpx_vector16((int16_t *)rxF,
(int16_t *)rho_rho_amp_x0,
//(int16_t *)clean_x1,
(int16_t *)rxF,
len*2);
llr2 = llr32;
llr32 += (len*6);
len_mod4 =len&3;
len2=len>>2; // length in quad words (4 REs)
len2+=(len_mod4?0:1);
for (i=0; i<len2; i++) {
__m128i *x1 = (__m128i*)rxF;
xmm1 = _mm_abs_epi16(x1[i]);
xmm1 = _mm_subs_epi16(ch_mag[i],xmm1);
xmm2 = _mm_abs_epi16(xmm1);
xmm2 = _mm_subs_epi16(ch_magb[i],xmm2);
// loop over all LLRs in quad word (24 coded bits)
/*
for (j=0;j<8;j+=2) {
llr2[0] = ((short *)&rxF[i])[j];
llr2[1] = ((short *)&rxF[i])[j+1];
llr2[2] = ((short *)&xmm1)[j];
llr2[3] = ((short *)&xmm1)[j+1];
llr2[4] = ((short *)&xmm2)[j];
llr2[5] = ((short *)&xmm2)[j+1];
llr2+=6;
}
*/
llr2[0] = ((short *)&x1[i])[0];
llr2[1] = ((short *)&x1[i])[1];
llr2[2] = _mm_extract_epi16(xmm1,0);
llr2[3] = _mm_extract_epi16(xmm1,1);//((short *)&xmm1)[j+1];
llr2[4] = _mm_extract_epi16(xmm2,0);//((short *)&xmm2)[j];
llr2[5] = _mm_extract_epi16(xmm2,1);//((short *)&xmm2)[j+1];
llr2+=6;
llr2[0] = ((short *)&x1[i])[2];
llr2[1] = ((short *)&x1[i])[3];
llr2[2] = _mm_extract_epi16(xmm1,2);
llr2[3] = _mm_extract_epi16(xmm1,3);//((short *)&xmm1)[j+1];
llr2[4] = _mm_extract_epi16(xmm2,2);//((short *)&xmm2)[j];
llr2[5] = _mm_extract_epi16(xmm2,3);//((short *)&xmm2)[j+1];
llr2+=6;
llr2[0] = ((short *)&x1[i])[4];
llr2[1] = ((short *)&x1[i])[5];
llr2[2] = _mm_extract_epi16(xmm1,4);
llr2[3] = _mm_extract_epi16(xmm1,5);//((short *)&xmm1)[j+1];
llr2[4] = _mm_extract_epi16(xmm2,4);//((short *)&xmm2)[j];
llr2[5] = _mm_extract_epi16(xmm2,5);//((short *)&xmm2)[j+1];
llr2+=6;
llr2[0] = ((short *)&x1[i])[6];
llr2[1] = ((short *)&x1[i])[7];
llr2[2] = _mm_extract_epi16(xmm1,6);
llr2[3] = _mm_extract_epi16(xmm1,7);//((short *)&xmm1)[j+1];
llr2[4] = _mm_extract_epi16(xmm2,6);//((short *)&xmm2)[j];
llr2[5] = _mm_extract_epi16(xmm2,7);//((short *)&xmm2)[j+1];
llr2+=6;
}
// *llr_save = llr;
_mm_empty();
_m_empty();
}
}
//#endif
//----------------------------------------------------------------------------------------------
// 256-QAM
//----------------------------------------------------------------------------------------------
......
openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c
View file @ 652df48a
......@@ -445,17 +445,6 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
}
/* LOG_I(PHY, "[UE %d] Frame %d MIB Information => %s, %s, NidCell %d, N_RB_DL %d, PHICH DURATION %d, PHICH RESOURCE %s, TX_ANT %d\n",
ue->Mod_id,
ue->proc.proc_rxtx[0].frame_rx,
duplex_string[fp->frame_type],
prefix_string[fp->Ncp],
fp->Nid_cell,
fp->N_RB_DL,
fp->phich_config_common.phich_duration,
phich_string[fp->phich_config_common.phich_resource],
fp->nb_antenna_ports_gNB);*/
#if defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)
LOG_I(PHY, "[UE %d] Measured Carrier Frequency %.0f Hz (offset %d Hz)\n",
ue->Mod_id,
......
openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
View file @ 652df48a
......@@ -36,6 +36,7 @@
#include "PHY/NR_TRANSPORT/nr_transport_common_proto.h"
#include <math.h>
#include "nfapi_interface.h"
#include <openair1/PHY/LTE_TRANSPORT/transport_proto.h>
#define NR_PUSCH_x 2 // UCI placeholder bit TS 38.212 V15.4.0 subclause 5.3.3.1
#define NR_PUSCH_y 3 // UCI placeholder bit
......@@ -99,7 +100,7 @@ int32_t nr_dlsch_qpsk_qpsk_llr(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rho_i,
int16_t *dlsch_llr,
uint8_t symbol,
uint32_t len,
uint32_t len,
uint8_t first_symbol_flag,
uint16_t nb_rb,
uint16_t pbch_pss_sss_adj,
......@@ -475,8 +476,8 @@ int32_t nr_dlsch_qpsk_llr(NR_DL_FRAME_PARMS *frame_parms,
int32_t *rxdataF_comp,
int16_t *dlsch_llr,
uint8_t symbol,
uint32_t len,
uint8_t first_symbol_flag,
uint32_t len,
uint8_t first_symbol_flag,
uint16_t nb_rb,
uint8_t beamforming_mode);
......@@ -494,17 +495,6 @@ int32_t nr_dlsch_qpsk_llr(NR_DL_FRAME_PARMS *frame_parms,
@param beamforming_mode beamforming mode
*/
int32_t nr_dlsch_qpsk_llr_SIC(NR_DL_FRAME_PARMS *frame_parms,
int **rxdataF_comp,
int32_t **sic_buffer,
int **rho_i,
short *dlsch_llr,
uint8_t num_pdcch_symbols,
uint16_t nb_rb,
uint8_t subframe,
uint16_t mod_order_0,
uint32_t rb_alloc);
void nr_dlsch_16qam_llr(NR_DL_FRAME_PARMS *frame_parms,
int32_t *rxdataF_comp,
int16_t *dlsch_llr,
......@@ -527,30 +517,6 @@ void nr_dlsch_16qam_llr(NR_DL_FRAME_PARMS *frame_parms,
@param pbch_pss_sss_adjust PBCH/PSS/SSS RE adjustment (in REs)
@param beamforming_mode beamforming mode
*/
void nr_dlsch_16qam_llr_SIC (NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int32_t **sic_buffer, //Q15
int32_t **rho_i,
int16_t *dlsch_llr,
uint8_t num_pdcch_symbols,
int32_t **dl_ch_mag,
uint16_t nb_rb,
uint8_t subframe,
uint16_t mod_order_0,
uint32_t rb_alloc);
void dlsch_64qam_llr_SIC(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int32_t **sic_buffer, //Q15
int32_t **rho_i,
int16_t *dlsch_llr,
uint8_t num_pdcch_symbols,
int32_t **dl_ch_mag,
int32_t **dl_ch_magb,
uint16_t nb_rb,
uint8_t subframe,
uint16_t mod_order_0,
uint32_t rb_alloc);
void nr_dlsch_64qam_llr(NR_DL_FRAME_PARMS *frame_parms,
int32_t *rxdataF_comp,
......@@ -575,110 +541,6 @@ void nr_dlsch_256qam_llr(NR_DL_FRAME_PARMS *frame_parms,
uint16_t nb_rb,
uint8_t beamforming_mode);
/** \fn dlsch_siso(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int32_t **rxdataF_comp_i,
uint8_t l,
uint16_t nb_rb)
\brief This function does the first stage of llr computation for SISO, by just extracting the pilots, PBCH and primary/secondary synchronization sequences.
@param frame_parms Frame descriptor structure
@param rxdataF_comp Compensated channel output
@param rxdataF_comp_i Compensated channel output for interference
@param l symbol in sub-frame
@param nb_rb Number of RBs in this allocation
*/
void dlsch_siso(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int32_t **rxdataF_comp_i,
uint8_t l,
uint16_t nb_rb);
/** \fn dlsch_alamouti(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int32_t **dl_ch_mag,
int32_t **dl_ch_magb,
uint8_t symbol,
uint16_t nb_rb)
\brief This function does Alamouti combining on RX and prepares LLR inputs by skipping pilots, PBCH and primary/secondary synchronization signals.
@param frame_parms Frame descriptor structure
@param rxdataF_comp Compensated channel output
@param dl_ch_mag First squared-magnitude of channel (16QAM and 64QAM) for LLR computation. Alamouti combining should be performed on this as well. Result is stored in first antenna position
@param dl_ch_magb Second squared-magnitude of channel (64QAM only) for LLR computation. Alamouti combining should be performed on this as well. Result is stored in first antenna position
@param symbol Symbol in sub-frame
@param nb_rb Number of RBs in this allocation
*/
void dlsch_alamouti(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int32_t **dl_ch_mag,
int32_t **dl_ch_magb,
uint8_t symbol,
uint16_t nb_rb);
/** \fn dlsch_antcyc(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int32_t **dl_ch_mag,
int32_t **dl_ch_magb,
uint8_t symbol,
uint16_t nb_rb)
\brief This function does antenna selection (based on antenna cycling pattern) on RX and prepares LLR inputs by skipping pilots, PBCH and primary/secondary synchronization signals. Note that this is not LTE, it is just included for comparison purposes.
@param frame_parms Frame descriptor structure
@param rxdataF_comp Compensated channel output
@param dl_ch_mag First squared-magnitude of channel (16QAM and 64QAM) for LLR computation. Alamouti combining should be performed on this as well. Result is stored in first antenna position
@param dl_ch_magb Second squared-magnitude of channel (64QAM only) for LLR computation. Alamouti combining should be performed on this as well. Result is stored in first antenna position
@param symbol Symbol in sub-frame
@param nb_rb Number of RBs in this allocation
*/
void dlsch_antcyc(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int32_t **dl_ch_mag,
int32_t **dl_ch_magb,
uint8_t symbol,
uint16_t nb_rb);
/** \fn dlsch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int32_t **rxdataF_comp_i,
int32_t **rho,
int32_t **rho_i,
int32_t **dl_ch_mag,
int32_t **dl_ch_magb,
uint8_t symbol,
uint16_t nb_rb,
uint8_t dual_stream_UE)
\brief This function does maximal-ratio combining for dual-antenna receivers.
@param frame_parms Frame descriptor structure
@param rxdataF_comp Compensated channel output
@param rxdataF_comp_i Compensated channel output for interference
@param rho Cross correlation between spatial channels
@param rho_i Cross correlation between signal and inteference channels
@param dl_ch_mag First squared-magnitude of channel (16QAM and 64QAM) for LLR computation. Alamouti combining should be performed on this as well. Result is stored in first antenna position
@param dl_ch_magb Second squared-magnitude of channel (64QAM only) for LLR computation. Alamouti combining should be performed on this as well. Result is stored in first antenna position
@param symbol Symbol in sub-frame
@param nb_rb Number of RBs in this allocation
@param dual_stream_UE Flag to indicate dual-stream detection
*/
void dlsch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int32_t **rxdataF_comp_i,
int32_t **rho,
int32_t **rho_i,
int32_t **dl_ch_mag,
int32_t **dl_ch_magb,
int32_t **dl_ch_mag_i,
int32_t **dl_ch_magb_i,
uint8_t symbol,
uint16_t nb_rb,
uint8_t dual_stream_UE);
void dlsch_detection_mrc_TM34(NR_DL_FRAME_PARMS *frame_parms,
NR_UE_PDSCH *lte_ue_pdsch_vars,
int harq_pid,
int round,
unsigned char symbol,
unsigned short nb_rb,
unsigned char dual_stream_UE);
/** \fn dlsch_extract_rbs(int32_t **rxdataF,
int32_t **dl_ch_estimates,
......@@ -719,36 +581,6 @@ void nr_dlsch_extract_rbs(int **rxdataF,
uint16_t dlDmrsSymbPos,
int chest_time_type);
/** \fn dlsch_extract_rbs_TM7(int32_t **rxdataF,
int32_t **dl_bf_ch_estimates,
int32_t **rxdataF_ext,
int32_t **dl_bf_ch_estimates_ext,
uint32_t *rb_alloc,
uint8_t symbol,
uint8_t subframe,
uint32_t high_speed_flag,
NR_DL_FRAME_PARMS *frame_parms)
\brief This function extracts the received resource blocks, both channel estimates and data symbols,
for the current allocation and for single antenna eNB transmission.
@param rxdataF Raw FFT output of received signal
@param dl_bf_ch_estimates Beamforming channel estimates of current slot
@param rxdataF_ext FFT output for RBs in this allocation
@param dl_bf_ch_estimates_ext Beamforming channel estimates for RBs in this allocation
@param rb_alloc RB allocation vector
@param symbol Symbol to extract
@param subframe Subframe number
@param high_speed_flag
@param frame_parms Pointer to frame descriptor
*/
uint16_t dlsch_extract_rbs_TM7(int32_t **rxdataF,
int32_t **dl_bf_ch_estimates,
int32_t **rxdataF_ext,
int32_t **dl_bf_ch_estimates_ext,
uint32_t *rb_alloc,
uint8_t symbol,
uint8_t subframe,
uint32_t high_speed_flag,
NR_DL_FRAME_PARMS *frame_parms);
/** \brief This function performs channel compensation (matched filtering) on the received RBs for this allocation. In addition, it computes the squared-magnitude of the channel with weightings for 16QAM/64QAM detection as well as dual-stream detection (cross-correlation)
@param rxdataF_ext Frequency-domain received signal in RBs to be demodulated
......@@ -802,35 +634,6 @@ void nr_dlsch_deinterleaving(uint8_t symbol,
uint16_t *llr_deint,
uint16_t nb_rb_pdsch);
//This function is used to compute multiplications in Hhermitian * H matrix
void conjch0_mult_ch1(int *ch0,
int *ch1,
int32_t *ch0conj_ch1,
unsigned short nb_rb,
unsigned char output_shift0);
void construct_HhH_elements(int *ch0conj_ch0,
int *ch1conj_ch1,
int *ch2conj_ch2,
int *ch3conj_ch3,
int *ch0conj_ch1,
int *ch1conj_ch0,
int *ch2conj_ch3,
int *ch3conj_ch2,
int32_t *after_mf_00,
int32_t *after_mf_01,
int32_t *after_mf_10,
int32_t *after_mf_11,
unsigned short nb_rb);
void dlsch_channel_level_TM34_meas(int *ch00,
int *ch01,
int *ch10,
int *ch11,
int *avg_0,
int *avg_1,
unsigned short nb_rb);
void nr_dlsch_channel_level_median(int **dl_ch_estimates_ext,
int32_t *median,
int n_tx,
......@@ -859,42 +662,6 @@ void nr_a_sum_b(__m128i *input_x,
__m128i *input_y,
unsigned short nb_rb);
uint8_t rank_estimation_tm3_tm4(int *dl_ch_estimates_00,
int *dl_ch_estimates_01,
int *dl_ch_estimates_10,
int *dl_ch_estimates_11,
unsigned short nb_rb);
void dlsch_channel_compensation_TM56(int **rxdataF_ext,
int **dl_ch_estimates_ext,
int **dl_ch_mag,
int **dl_ch_magb,
int **rxdataF_comp,
unsigned char *pmi_ext,
NR_DL_FRAME_PARMS *frame_parms,
PHY_NR_MEASUREMENTS *phy_measurements,
int eNB_id,
unsigned char symbol,
unsigned char mod_order,
unsigned short nb_rb,
unsigned char output_shift,
unsigned char dl_power_off);
void dlsch_channel_compensation_TM34(NR_DL_FRAME_PARMS *frame_parms,
NR_UE_PDSCH *lte_ue_pdsch_vars,
PHY_NR_MEASUREMENTS *phy_measurements,
int eNB_id,
unsigned char symbol,
unsigned char mod_order0,
unsigned char mod_order1,
int harq_pid,
int round,
MIMO_mode_t mimo_mode,
unsigned short nb_rb,
unsigned char output_shift0,
unsigned char output_shift1);
/** \brief This function computes the average channel level over all allocated RBs and antennas (TX/RX) in order to compute output shift for compensated signal
@param dl_ch_estimates_ext Channel estimates in allocated RBs
......@@ -908,33 +675,10 @@ void nr_dlsch_channel_level(int **dl_ch_estimates_ext,
uint8_t n_tx,
int32_t *avg,
uint8_t symbol,
uint32_t len,
uint32_t len,
unsigned short nb_rb);
void dlsch_channel_level_TM34(int **dl_ch_estimates_ext,
NR_DL_FRAME_PARMS *frame_parms,
unsigned char *pmi_ext,
int *avg_0,
int *avg_1,
uint8_t symbol,
unsigned short nb_rb,
MIMO_mode_t mimo_mode);
void dlsch_channel_level_TM56(int32_t **dl_ch_estimates_ext,
NR_DL_FRAME_PARMS *frame_parms,
unsigned char *pmi_ext,
int32_t *avg,
uint8_t symbol_mod,
uint16_t nb_rb);
void dlsch_channel_level_TM7(int32_t **dl_bf_ch_estimates_ext,
NR_DL_FRAME_PARMS *frame_parms,
int32_t *avg,
uint8_t pilots_flag,
uint16_t nb_rb);
void nr_dlsch_scale_channel(int32_t **dl_ch_estimates_ext,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t n_tx,
......@@ -1020,22 +764,12 @@ uint8_t nr_ue_pusch_common_procedures(PHY_VARS_NR_UE *UE,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t Nl);
void *nr_dlsch_decoding_2thread0(void *arg);
void *nr_dlsch_decoding_2thread1(void *arg);
void nr_dlsch_unscrambling(int16_t* llr,
uint32_t size,
uint8_t q,
uint32_t Nid,
uint32_t n_RNTI);
uint32_t dlsch_decoding_emul(PHY_VARS_NR_UE *phy_vars_ue,
uint8_t subframe,
PDSCH_t dlsch_id,
uint8_t eNB_id);
int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size,
......@@ -1044,35 +778,6 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15);
/*! \brief Extract PSS and SSS resource elements
@param phy_vars_ue Pointer to UE variables
@param[out] pss_ext contain the PSS signals after the extraction
@param[out] sss_ext contain the SSS signals after the extraction
@returns 0 on success
*/
int pss_sss_extract(PHY_VARS_NR_UE *phy_vars_ue,
int32_t pss_ext[4][72],
int32_t sss_ext[4][72],
uint8_t subframe);
/*! \brief Extract only PSS resource elements
@param phy_vars_ue Pointer to UE variables
@param[out] pss_ext contain the PSS signals after the extraction
@returns 0 on success
*/
int pss_only_extract(PHY_VARS_NR_UE *phy_vars_ue,
int32_t pss_ext[4][72],
uint8_t subframe);
/*! \brief Extract only SSS resource elements
@param phy_vars_ue Pointer to UE variables
@param[out] sss_ext contain the SSS signals after the extraction
@returns 0 on success
*/
int sss_only_extract(PHY_VARS_NR_UE *phy_vars_ue,
int32_t sss_ext[4][72],
uint8_t subframe);
/*! \brief Performs detection of SSS to find cell ID and other framing parameters (FDD/TDD, normal/extended prefix)
@param phy_vars_ue Pointer to UE variables
@param tot_metric Pointer to variable containing maximum metric under framing hypothesis (to be compared to other hypotheses
......@@ -1086,273 +791,30 @@ int rx_sss(PHY_VARS_NR_UE *phy_vars_ue,int32_t *tot_metric,uint8_t *flip_max,uin
/*! \brief receiver for the PBCH
\returns number of tx antennas or -1 if error
*/
int nr_rx_pbch( PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const int estimateSz,
struct complex16 dl_ch_estimates[][estimateSz],
NR_UE_PBCH *nr_ue_pbch_vars,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t eNB_id,
uint8_t i_ssb,
MIMO_mode_t mimo_mode,
NR_UE_PDCCH_CONFIG *phy_pdcch_config,
fapiPbch_t* result);
int nr_rx_pbch(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
const int estimateSz,
struct complex16 dl_ch_estimates[][estimateSz],
NR_UE_PBCH *nr_ue_pbch_vars,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t eNB_id,
uint8_t i_ssb,
MIMO_mode_t mimo_mode,
NR_UE_PDCCH_CONFIG *phy_pdcch_config,
fapiPbch_t* result);
int nr_pbch_detection(UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
PHY_VARS_NR_UE *ue,
int pbch_initial_symbol,
NR_UE_PDCCH_CONFIG *phy_pdcch_config);
uint16_t rx_pbch_emul(PHY_VARS_NR_UE *phy_vars_ue,
uint8_t eNB_id,
uint8_t pbch_phase);
/*! \brief PBCH unscrambling
This is similar to pbch_scrabling with the difference that inputs are signed s16s (llr values) and instead of flipping bits we change signs.
\param frame_parms Pointer to frame descriptor
\param llr Output of the demodulator
\param length Length of the sequence
\param frame_mod4 Frame number modulo 4*/
void pbch_unscrambling(NR_DL_FRAME_PARMS *frame_parms,
int8_t* llr,
uint32_t length,
uint8_t frame_mod4);
void generate_64qam_table(void);
void generate_16qam_table(void);
void generate_qpsk_table(void);
uint16_t extract_crc(uint8_t *dci,uint8_t DCI_LENGTH);
/*! \brief LLR from two streams. This function takes two streams (qpsk modulated) and calculates the LLR, considering one stream as interference.
\param stream0_in pointer to first stream0
\param stream1_in pointer to first stream1
\param stream0_out pointer to output stream
\param rho01 pointer to correlation matrix
\param length*/
void qpsk_qpsk_TM3456(short *stream0_in,
short *stream1_in,
short *stream0_out,
short *rho01,
int length
);
/** \brief Attempt decoding of a particular DCI with given length and format.
@param DCI_LENGTH length of DCI in bits
@param DCI_FMT Format of DCI
@param e e-sequence (soft bits)
@param decoded_output Output of Viterbi decoder
*/
void dci_decoding(uint8_t DCI_LENGTH,
uint8_t DCI_FMT,
int8_t *e,
uint8_t *decoded_output);
/** \brief Do 36.213 DCI decoding procedure by searching different RNTI options and aggregation levels. Currently does
not employ the complexity reducing procedure based on RNTI.
@param phy_vars_ue UE variables
@param dci_alloc Pointer to DCI_ALLOC_t array to store results for DLSCH/ULSCH programming
@param do_common If 1 perform search in common search-space else ue-specific search-space
@param eNB_id eNB Index on which to act
@param subframe Index of subframe
@returns bitmap of occupied CCE positions (i.e. those detected)
*/
uint16_t dci_decoding_procedure(PHY_VARS_NR_UE *phy_vars_ue,
DCI_ALLOC_t *dci_alloc,
int do_common,
int16_t eNB_id,
uint8_t subframe);
uint16_t dci_CRNTI_decoding_procedure(PHY_VARS_NR_UE *ue,
DCI_ALLOC_t *dci_alloc,
uint8_t DCIFormat,
uint8_t agregationLevel,
int16_t eNB_id,
uint8_t subframe);
uint16_t dci_decoding_procedure_emul(NR_UE_PDCCH **lte_ue_pdcch_vars,
uint8_t num_ue_spec_dci,
uint8_t num_common_dci,
DCI_ALLOC_t *dci_alloc_tx,
DCI_ALLOC_t *dci_alloc_rx,
int16_t eNB_id);
/** \brief Compute I_TBS (transport-block size) based on I_MCS for PDSCH. Implements table 7.1.7.1-1 from 36.213.
@param I_MCS */
uint8_t get_I_TBS(uint8_t I_MCS);
/** \brief Compute I_TBS (transport-block size) based on I_MCS for PUSCH. Implements table 8.6.1-1 from 36.213.
@param I_MCS */
unsigned char get_I_TBS_UL(unsigned char I_MCS);
/** \brief Compute Q (modulation order) based on downlink I_MCS. Implements table 7.1.7.1-1 from 36.213.
@param I_MCS
@param nb_rb
@return Transport block size */
uint32_t get_TBS_DL(uint8_t mcs, uint16_t nb_rb);
/** \brief Compute Q (modulation order) based on uplink I_MCS. Implements table 7.1.7.1-1 from 36.213.
@param I_MCS
@param nb_rb
@return Transport block size */
uint32_t get_TBS_UL(uint8_t mcs, uint16_t nb_rb);
/* \brief Return bit-map of resource allocation for a given DCI rballoc (RIV format) and vrb type
@param N_RB_DL number of PRB on DL
@param indicator for even/odd slot
@param vrb vrb index
@param Ngap Gap indicator
*/
uint32_t get_prb(int N_RB_DL,int odd_slot,int vrb,int Ngap);
/* \brief Return prb for a given vrb index
@param vrb_type VRB type (0=localized,1=distributed)
@param rb_alloc_dci rballoc field from DCI
*/
uint32_t get_rballoc(vrb_t vrb_type,uint16_t rb_alloc_dci);
/* \brief Return bit-map of resource allocation for a given DCI rballoc (RIV format) and vrb type
@returns Transmission mode (1-7)
*/
uint8_t get_transmission_mode(module_id_t Mod_id, uint8_t CC_id, rnti_t rnti);
/* \brief
@param ra_header Header of resource allocation (0,1) (See sections 7.1.6.1/7.1.6.2 of 36.213 Rel8.6)
@param rb_alloc Bitmap allocation from DCI (format 1,2)
@returns number of physical resource blocks
*/
uint32_t conv_nprb(uint8_t ra_header,uint32_t rb_alloc,int N_RB_DL);
//int adjust_G(NR_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe);
//int adjust_G2(NR_DL_FRAME_PARMS *frame_parms,uint32_t *rb_alloc,uint8_t mod_order,uint8_t subframe,uint8_t symbol);
#ifndef modOrder
#define modOrder(I_MCS,I_TBS) ((I_MCS-I_TBS)*2+2) // Find modulation order from I_TBS and I_MCS
#endif
/** \fn uint8_t I_TBS2I_MCS(uint8_t I_TBS);
\brief This function maps I_tbs to I_mcs according to Table 7.1.7.1-1 in 3GPP TS 36.213 V8.6.0. Where there is two supported modulation orders for the same I_TBS then either high or low modulation is chosen by changing the equality of the two first comparisons in the if-else statement.
\param I_TBS Index of Transport Block Size
\return I_MCS given I_TBS
*/
uint8_t I_TBS2I_MCS(uint8_t I_TBS);
/** \fn uint8_t SE2I_TBS(float SE,
uint8_t N_PRB,
uint8_t symbPerRB);
\brief This function maps a requested throughput in number of bits to I_tbs. The throughput is calculated as a function of modulation order, RB allocation and number of symbols per RB. The mapping orginates in the "Transport block size table" (Table 7.1.7.2.1-1 in 3GPP TS 36.213 V8.6.0)
\param SE Spectral Efficiency (before casting to integer, multiply by 1024, remember to divide result by 1024!)
\param N_PRB Number of PhysicalResourceBlocks allocated \sa lte_frame_parms->N_RB_DL
\param symbPerRB Number of symbols per resource block allocated to this channel
\return I_TBS given an SE and an N_PRB
*/
uint8_t SE2I_TBS(float SE,
uint8_t N_PRB,
uint8_t symbPerRB);
/*!
\brief This function is similar to generate_srs_tx but generates a conjugate sequence for channel estimation. If IFFT_FPGA is defined, the SRS is quantized to a QPSK sequence.
@param phy_vars_ue Pointer to PHY_VARS structure
@param eNB_id Index of destination eNB for this SRS
@param amp Linear amplitude of SRS
@param subframe Index of subframe on which to act
@returns 0 on success, -1 on error with message
*/
int32_t generate_srs_tx(PHY_VARS_NR_UE *phy_vars_ue,
uint8_t eNB_id,
int16_t amp,
uint32_t subframe);
/*!
\brief This function generates the downlink reference signal for the PUSCH according to 36.211 v8.6.0. The DRS occuies the RS defined by rb_alloc and the symbols 2 and 8 for extended CP and 3 and 10 for normal CP.
*/
int32_t generate_drs_pusch(PHY_VARS_NR_UE *phy_vars_ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_id,
int16_t amp,
uint32_t subframe,
uint32_t first_rb,
uint32_t nb_rb,
uint8_t ant);
/*!
\brief This function implements the initialization of paging parameters for UE (See Section 7, 36.304).It must be called after setting IMSImod1024 during UE startup and after receiving SIB2
@param ue Pointer to UE context
@param defaultPagingCycle T from 36.304 (0=32,1=64,2=128,3=256)
@param nB nB from 36.304 (0=4T,1=2T,2=T,3=T/2,4=T/4,5=T/8,6=T/16,7=T/32*/
int init_ue_paging_info(PHY_VARS_NR_UE *ue, long defaultPagingCycle, long nB);
int32_t compareints (const void * a, const void * b);
void ulsch_modulation(int32_t **txdataF,
int16_t amp,
frame_t frame,
uint32_t subframe,
NR_DL_FRAME_PARMS *frame_parms,
NR_UE_ULSCH_t *ulsch);
uint8_t allowed_ulsch_re_in_dmrs_symbol(uint16_t k,
uint16_t start_sc,
uint8_t numDmrsCdmGrpsNoData,
uint8_t dmrs_type);
int generate_ue_dlsch_params_from_dci(int frame,
uint8_t subframe,
void *dci_pdu,
rnti_t rnti,
DCI_format_t dci_format,
NR_UE_PDCCH *pdcch_vars,
NR_UE_PDSCH *pdsch_vars,
NR_UE_DLSCH_t **dlsch,
NR_DL_FRAME_PARMS *frame_parms,
PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
uint16_t si_rnti,
uint16_t ra_rnti,
uint16_t p_rnti,
uint8_t beamforming_mode,
uint16_t tc_rnti);
int generate_ue_ulsch_params_from_dci(void *dci_pdu,
rnti_t rnti,
uint8_t subframe,
DCI_format_t dci_format,
PHY_VARS_NR_UE *phy_vars_ue,
UE_nr_rxtx_proc_t *proc,
uint16_t si_rnti,
uint16_t ra_rnti,
uint16_t p_rnti,
uint16_t cba_rnti,
uint8_t eNB_id,
uint8_t use_srs);
int32_t generate_ue_ulsch_params_from_rar(PHY_VARS_NR_UE *phy_vars_ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_id);
double sinr_eff_cqi_calc(PHY_VARS_NR_UE *phy_vars_ue,
uint8_t eNB_id,
uint8_t subframe);
uint8_t sinr2cqi(double sinr,uint8_t trans_mode);
int dump_ue_stats(PHY_VARS_NR_UE *phy_vars_ue, UE_nr_rxtx_proc_t *proc, char* buffer, int length, runmode_t mode, int input_level_dBm);
void init_transport_channels(uint8_t);
void generate_RIV_tables(void);
/*!
\brief This function performs the initial cell search procedure - PSS detection, SSS detection and PBCH detection. At the
end, the basic frame parameters are known (Frame configuration - TDD/FDD and cyclic prefix length,
......@@ -1393,208 +855,12 @@ void nr_rf_card_config_freq(openair0_config_t *openair0_cfg,
uint64_t dl_Carrier,
int freq_offset);
void print_CQI(void *o,UCI_format_t uci_format,uint8_t eNB_id,int N_RB_DL);
void fill_CQI(NR_UE_ULSCH_t *ulsch,PHY_NR_MEASUREMENTS *meas,uint8_t eNB_id, uint8_t harq_pid,int N_RB_DL, rnti_t rnti, uint8_t trans_mode,double sinr_eff);
void reset_cba_uci(void *o);
/** \brief This routine computes the subband PMI bitmap based on measurements (0,1,2,3 for rank 0 and 0,1 for rank 1) in the format needed for UCI
@param meas pointer to measurements
@param eNB_id eNB_id
@param nb_subbands number of subbands
@returns subband PMI bitmap
*/
uint16_t quantize_subband_pmi(PHY_NR_MEASUREMENTS *meas,uint8_t eNB_id,int nb_subbands);
int32_t pmi_convert_rank1_from_rank2(uint16_t pmi_alloc, int tpmi, int nb_rb);
uint16_t quantize_subband_pmi2(PHY_NR_MEASUREMENTS *meas,uint8_t eNB_id,uint8_t a_id,int nb_subbands);
uint64_t cqi2hex(uint32_t cqi);
uint16_t computeRIV(uint16_t N_RB_DL,uint16_t RBstart,uint16_t Lcrbs);
int get_nCCE_offset_l1(int *CCE_table,
const unsigned char L,
const int nCCE,
const int common_dci,
const unsigned short rnti,
const unsigned char subframe);
//uint8_t get_mi(NR_DL_FRAME_PARMS *frame,uint8_t subframe);
uint16_t get_nCCE_mac(uint8_t Mod_id,uint8_t CC_id,int num_pdcch_symbols,int subframe);
void nr_pdcch_unscrambling(int16_t *z,
uint16_t scrambling_RNTI,
uint32_t length,
uint16_t pdcch_DMRS_scrambling_id,
int16_t *z2);
void dlsch_unscrambling(NR_DL_FRAME_PARMS *frame_parms,
int mbsfn_flag,
NR_UE_DLSCH_t *dlsch,
int G,
int16_t* llr,
uint8_t q,
uint8_t Ns);
void generate_pucch1x(int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t ncs_cell[20][7],
PUCCH_FMT_t fmt,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint16_t n1_pucch,
uint8_t shortened_format,
uint8_t *payload,
int16_t amp,
uint8_t subframe);
void generate_pucch2x(int32_t **txdataF,
NR_DL_FRAME_PARMS *fp,
uint8_t ncs_cell[20][7],
PUCCH_FMT_t fmt,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint16_t n2_pucch,
uint8_t *payload,
int A,
int B2,
int16_t amp,
uint8_t subframe,
uint16_t rnti);
void generate_pucch3x(int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t ncs_cell[20][7],
PUCCH_FMT_t fmt,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint16_t n3_pucch,
uint8_t shortened_format,
uint8_t *payload,
int16_t amp,
uint8_t subframe,
uint16_t rnti);
void init_ulsch_power_LUT(void);
/*!
\brief Check for PRACH TXop in subframe
@param frame_parms Pointer to NR_DL_FRAME_PARMS
@param frame frame index to check
@param subframe subframe index to check
@returns 0 on success
*/
//int is_prach_subframe(NR_DL_FRAME_PARMS *frame_parms,frame_t frame, uint8_t subframe);
/*!
\brief Generate PRACH waveform
@param phy_vars_ue Pointer to ue top-level descriptor
@param eNB_id Index of destination eNB
@param subframe subframe index to operate on
@param index of preamble (0-63)
@param Nf System frame number
@returns 0 on success
*/
int32_t generate_prach(PHY_VARS_NR_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe,uint16_t Nf);
/*!
\brief Helper for MAC, returns number of available PRACH in TDD for a particular configuration index
@param frame_parms Pointer to NR_DL_FRAME_PARMS structure
@returns 0-5 depending on number of available prach
*/
uint8_t get_num_prach_tdd(module_id_t Mod_id);
/*!
\brief Return the PRACH format as a function of the Configuration Index and Frame type.
@param prach_ConfigIndex PRACH Configuration Index
@param frame_type 0-FDD, 1-TDD
@returns 0-1 accordingly
*/
uint8_t get_prach_fmt(uint8_t prach_ConfigIndex,frame_type_t frame_type);
/*!
\brief Helper for MAC, returns frequency index of PRACH resource in TDD for a particular configuration index
@param frame_parms Pointer to NR_DL_FRAME_PARMS structure
@returns 0-5 depending on number of available prach
*/
uint8_t get_fid_prach_tdd(module_id_t Mod_id,uint8_t tdd_map_index);
/*!
\brief Comp ute DFT of PRACH ZC sequences. Used for generation of prach in UE and reception of PRACH in eNB.
@param rootSequenceIndex PRACH root sequence
#param prach_ConfigIndex PRACH Configuration Index
@param zeroCorrelationZoneConfig PRACH ncs_config
@param highSpeedFlat PRACH High-Speed Flag
@param frame_type TDD/FDD flag
@param Xu DFT output
*/
void compute_prach_seq(uint16_t rootSequenceIndex,
uint8_t prach_ConfigIndex,
uint8_t zeroCorrelationZoneConfig,
uint8_t highSpeedFlag,
frame_type_t frame_type,
uint32_t X_u[64][839]);
void init_prach_tables(int N_ZC);
void init_unscrambling_lut(void);
void init_scrambling_lut(void);
/*!
\brief Return the status of MBSFN in this frame/subframe
@param frame Frame index
@param subframe Subframe index
@param frame_parms Pointer to frame parameters
@returns 1 if subframe is for MBSFN
*/
uint8_t is_not_pilot(uint8_t pilots, uint8_t re, uint8_t nushift, uint8_t use2ndpilots);
uint8_t is_not_UEspecRS(int8_t lprime, uint8_t re, uint8_t nushift, uint8_t Ncp, uint8_t beamforming_mode);
uint32_t dlsch_decoding_abstraction(double *dlsch_MIPB,
NR_DL_FRAME_PARMS *lte_frame_parms,
NR_UE_DLSCH_t *dlsch,
uint8_t subframe,
uint8_t num_pdcch_symbols);
// DL power control functions
double get_pa_dB(uint8_t pa);
double computeRhoA_UE(PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
NR_UE_DLSCH_t *dlsch_ue,
uint8_t dl_power_off,
uint8_t n_antenna_port);
double computeRhoB_UE(PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
PDSCH_CONFIG_COMMON *pdsch_config_common,
uint8_t n_antenna_port,
NR_UE_DLSCH_t *dlsch_ue,
uint8_t dl_power_off);
/*void compute_sqrt_RhoAoRhoB(PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
PDSCH_CONFIG_COMMON *pdsch_config_common,
uint8_t n_antenna_port,
NR_UE_DLSCH_t *dlsch_ue);
*/
uint8_t get_prach_prb_offset(NR_DL_FRAME_PARMS *frame_parms,
uint8_t prach_ConfigIndex,
uint8_t n_ra_prboffset,
uint8_t tdd_mapindex, uint16_t Nf);
#include <openair1/PHY/LTE_TRANSPORT/transport_proto.h>
uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int16_t *pdcch_e_rx,
......@@ -1632,7 +898,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
unsigned char first_symbol_flag,
RX_type_t rx_type,
unsigned char i_mod,
unsigned char harq_pid);
unsigned char harq_pid);
int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, int frame, uint8_t slot);
......
openair1/PHY/defs_nr_UE.h
View file @ 652df48a
......@@ -102,7 +102,6 @@
#include "PHY/NR_REFSIG/ss_pbch_nr.h"
#endif
#include "PHY/NR_UE_TRANSPORT/dci_nr.h"
#include <pthread.h>
#include "radio/COMMON/common_lib.h"
#include "NR_IF_Module.h"
......@@ -398,152 +397,7 @@ typedef enum { /* see 38.321 Table 7.1-2 RNTI usage *
_tpc_srs_rnti = _TPC_SRS_RNTI_
} crc_scrambled_t;
typedef enum {bundle_n2=2,bundle_n3=3,bundle_n6=6} NR_UE_CORESET_REG_bundlesize_t;
typedef enum {interleave_n2=2,interleave_n3=3,interleave_n6=6} NR_UE_CORESET_interleaversize_t;
typedef struct {
//Corresponds to L1 parameter 'CORESET-REG-bundle-size' (see 38.211, section FFS_Section)
NR_UE_CORESET_REG_bundlesize_t reg_bundlesize;
//Corresponds to L1 parameter 'CORESET-interleaver-size' (see 38.211, 38.213, section FFS_Section)
NR_UE_CORESET_interleaversize_t interleaversize;
//Corresponds to L1 parameter 'CORESET-shift-index' (see 38.211, section 7.3.2.2)
int shiftIndex;
} NR_UE_CORESET_CCE_REG_MAPPING_t;
typedef enum {allContiguousRBs=0,sameAsREGbundle=1} NR_UE_CORESET_precoder_granularity_t;
typedef enum {tciPresentInDCI_enabled = 1} tciPresentInDCI_t;
typedef struct {
/*
* define CORESET structure according to 38.331
*
* controlResourceSetId: Corresponds to L1 parameter 'CORESET-ID'
* Value 0 identifies the common CORESET configured in MIB and in ServingCellConfigCommon
* Values 1..maxNrofControlResourceSets-1 identify CORESETs configured by dedicated signalling
* frequencyDomainResources: BIT STRING (SIZE (45))
* Corresponds to L1 parameter 'CORESET-freq-dom'(see 38.211, section 7.3.2.2)
* Frequency domain resources for the CORESET. Each bit corresponds a group of 6 RBs, with grouping starting from PRB 0,
* which is fully contained in the bandwidth part within which the CORESET is configured.
* duration: INTEGER (1..maxCoReSetDuration)
* Corresponds to L1 parameter 'CORESET-time-duration' (see 38.211, section 7.3.2.2FFS_Section)
* Contiguous time duration of the CORESET in number of symbols
* cce-REG-MappingType: interleaved
* reg-BundleSize: ENUMERATED {n2, n3, n6}
* interleaverSize: ENUMERATED {n2, n3, n6}
* shiftIndex: INTEGER
* nonInterleaved NULL
* precoderGranularity: ENUMERATED {sameAsREG-bundle, allContiguousRBs}
* Corresponds to L1 parameter 'CORESET-precoder-granuality' (see 38.211, sections 7.3.2.2 and 7.4.1.3.2)
* tci-StatesPDCCH: SEQUENCE(SIZE (1..maxNrofTCI-StatesPDCCH)) OF TCI-StateId OPTIONAL
* A subset of the TCI states defined in TCI-States used for providing QCL relationships between the DL RS(s)
* in one RS Set (TCI-State) and the PDCCH DMRS ports.
* Corresponds to L1 parameter 'TCI-StatesPDCCH' (see 38.214, section FFS_Section)
* tci-PresentInDCI: ENUMERATED {enabled} OPTIONAL
* Corresponds to L1 parameter 'TCI-PresentInDCI' (see 38,213, section 5.1.5)
* pdcch-DMRS-ScramblingID: BIT STRING (SIZE (16)) OPTIONAL
* PDCCH DMRS scrambling initalization.
* Corresponds to L1 parameter 'PDCCH-DMRS-Scrambling-ID' (see 38.214, section 5.1)
* When the field is absent the UE applies the value '0'.
*/
int controlResourceSetId;
uint64_t frequencyDomainResources;
int duration;
NR_UE_CORESET_CCE_REG_MAPPING_t cce_reg_mappingType;
NR_UE_CORESET_precoder_granularity_t precoderGranularity;
int tciStatesPDCCH;
tciPresentInDCI_t tciPresentInDCI;
uint16_t pdcchDMRSScramblingID;
uint16_t rb_offset;
} NR_UE_PDCCH_CORESET;
// Slots for PDCCH Monitoring configured as periodicity and offset
typedef enum {nr_sl1=1,nr_sl2=2,nr_sl4=4,nr_sl5=5,nr_sl8=8,nr_sl10=10,nr_sl16=16,nr_sl20=20,nr_sl40=40,nr_sl80=80,nr_sl160=160,nr_sl320=320,nr_sl640=640,nr_sl1280=1280,nr_sl2560=2560} NR_UE_SLOT_PERIOD_OFFSET_t;
typedef enum {nc0=0,nc1=1,nc2=2,nc3=3,nc4=4,nc5=5,nc6=6,nc8=8} NR_UE_SEARCHSPACE_nbrCAND_t;
typedef enum {nsfi1=1,nsfi2=2} NR_UE_SEARCHSPACE_nbrCAND_SFI_t;
typedef enum {n2_3_1=1,n2_3_2=2} NR_UE_SEARCHSPACE_nbrCAND_2_3_t;
typedef enum {cformat0_0_and_1_0=0,cformat2_0=2,cformat2_1=3,cformat2_2=4,cformat2_3=5} NR_UE_SEARCHSPACE_CSS_DCI_FORMAT_t;
typedef enum {uformat0_0_and_1_0=0,uformat0_1_and_1_1=1} NR_UE_SEARCHSPACE_USS_DCI_FORMAT_t;
// Monitoring periodicity of SRS PDCCH in number of slots for DCI format 2-3
// Corresponds to L1 parameter 'SRS-Num-PDCCH-cand' (see 38.212, 38.213, section 7.3.1, 11.3)
typedef enum {mp1=1,mp2=2,mp4=4,mp5=5,mp8=8,mp10=10,mp16=16,mp20=20} NR_UE_SEARCHSPACE_MON_PERIOD_t;
//typedef enum {n1=1,n2=2} NR_UE_SEARCHSPACE_nbrCAND_2_3_t;
// The number of PDCCH candidates for DCI format 2-3 for the configured aggregation level.
// Corresponds to L1 parameter 'SRS-Num-PDCCH-cand' (see 38.212, 38.213, section 7.3.1, 11.3)
typedef enum {common=0,ue_specific=1} NR_SEARCHSPACE_TYPE_t;
typedef struct {
/*
* searchSpaceType: Indicates whether this is a common search space (present) or a UE specific search space (CHOICE)
* as well as DCI formats to monitor for (description in struct NR_UE_PDCCH_SEARCHSPACE_TYPE
* common: Configures this search space as common search space (CSS) and DCI formats to monitor
* ue-Specific: Configures this search space as UE specific search space (USS)
* The UE monitors the DCI format with CRC scrambled by
* C-RNTI, CS-RNTI (if configured), TC-RNTI (if a certain condition is met),
* and SP-CSI-RNTI (if configured)
*/
NR_SEARCHSPACE_TYPE_t type;
NR_UE_SEARCHSPACE_CSS_DCI_FORMAT_t common_dci_formats;
//NR_UE_SEARCHSPACE_nbrCAND_t nrofCandidates_SFI_aggr_level[5]; // FIXME! A table of five enum elements
NR_UE_SEARCHSPACE_nbrCAND_SFI_t sfi_nrofCandidates_aggrlevel1;
NR_UE_SEARCHSPACE_nbrCAND_SFI_t sfi_nrofCandidates_aggrlevel2;
NR_UE_SEARCHSPACE_nbrCAND_SFI_t sfi_nrofCandidates_aggrlevel4;
NR_UE_SEARCHSPACE_nbrCAND_SFI_t sfi_nrofCandidates_aggrlevel8;
NR_UE_SEARCHSPACE_nbrCAND_SFI_t sfi_nrofCandidates_aggrlevel16;
NR_UE_SEARCHSPACE_MON_PERIOD_t srs_monitoringPeriodicity2_3;
NR_UE_SEARCHSPACE_nbrCAND_2_3_t srs_nrofCandidates;
NR_UE_SEARCHSPACE_USS_DCI_FORMAT_t ue_specific_dci_formats;
} NR_UE_PDCCH_SEARCHSPACE_TYPE;
typedef struct {
/*
* define SearchSpace structure according to 38.331
*
* searchSpaceId: Identity of the search space. SearchSpaceId = 0 identifies the SearchSpace configured via PBCH (MIB)
* The searchSpaceId is unique among the BWPs of a Serving Cell
* controlResourceSetId: CORESET applicable for this SearchSpace
* 0 identifies the common CORESET configured in MIB
* 1..maxNrofControlResourceSets-1 identify CORESETs configured by dedicated signalling
* monitoringSlotPeriodicityAndOffset:
* Slots for PDCCH Monitoring configured as periodicity and offset.
* Corresponds to L1 parameters 'Montoring-periodicity-PDCCH-slot' and
* 'Montoring-offset-PDCCH-slot' (see 38.213, section 10)
* monitoringSymbolsWithinSlot:
* Symbols for PDCCH monitoring in the slots configured for PDCCH monitoring
* The most significant (left) bit represents the first OFDM in a slot
*
* nrofCandidates: Number of PDCCH candidates per aggregation level
*
* searchSpaceType: Indicates whether this is a common search space (present) or a UE specific search space
* as well as DCI formats to monitor for (description in struct NR_UE_PDCCH_SEARCHSPACE_TYPE
* common: Configures this search space as common search space (CSS) and DCI formats to monitor
* ue-Specific: Configures this search space as UE specific search space (USS)
* The UE monitors the DCI format with CRC scrambled by
* C-RNTI, CS-RNTI (if configured), TC-RNTI (if a certain condition is met),
* and SP-CSI-RNTI (if configured)
*/
// INTEGER (0..maxNrofSearchSpaces-1) (0..40-1)
int searchSpaceId;
int controlResourceSetId;
NR_UE_SLOT_PERIOD_OFFSET_t monitoringSlotPeriodicityAndOffset;
uint16_t monitoringSlotPeriodicityAndOffset_offset;
// duration is number of consecutive slots that a SearchSpace lasts in every occasion, i.e., upon every period as given in the periodicityAndOffset
// if the field is absent, the UE applies the value 1 slot
// the maximum valid duration is peridicity-1 (periodicity as given in the monitoringSlotPeriodicityAndOffset)
uint16_t duration;
// bit string size 14. Bitmap to indicate symbols within slot where PDCCH has to be monitored
// the MSB (left) bit represents first OFDM in slot
uint16_t monitoringSymbolWithinSlot;
NR_UE_SEARCHSPACE_nbrCAND_t nrofCandidates_aggrlevel1;
NR_UE_SEARCHSPACE_nbrCAND_t nrofCandidates_aggrlevel2;
NR_UE_SEARCHSPACE_nbrCAND_t nrofCandidates_aggrlevel4;
NR_UE_SEARCHSPACE_nbrCAND_t nrofCandidates_aggrlevel8;
NR_UE_SEARCHSPACE_nbrCAND_t nrofCandidates_aggrlevel16;
NR_UE_PDCCH_SEARCHSPACE_TYPE searchSpaceType;
} NR_UE_PDCCH_SEARCHSPACE;
#endif
typedef struct {
int nb_search_space;
......@@ -552,28 +406,6 @@ typedef struct {
fapi_nr_dl_config_dci_dl_pdu_rel15_t pdcch_config[FAPI_NR_MAX_SS];
} NR_UE_PDCCH_CONFIG;
typedef struct {
/// Total number of PDU received
uint32_t dci_received;
/// Total number of DCI False detection (diagnostic mode)
uint32_t dci_false;
/// Total number of DCI missed (diagnostic mode)
uint32_t dci_missed;
/*
#ifdef NR_PDCCH_DEFS_NR_UE
int nb_searchSpaces;
// CORESET structure, where maximum number of CORESETs to be handled is 3 (according to 38.331 V15.1.0)
NR_UE_PDCCH_CORESET coreset[NR_NBR_CORESET_ACT_BWP];
// SEARCHSPACE structure, where maximum number of SEARCHSPACEs to be handled is 10 (according to 38.331 V15.1.0)
// Each SearchSpace is associated with one ControlResourceSet
NR_UE_PDCCH_SEARCHSPACE searchSpace[NR_NBR_SEARCHSPACE_ACT_BWP];
int n_RB_BWP[NR_NBR_SEARCHSPACE_ACT_BWP];
uint32_t nb_search_space;
#endif*/
} NR_UE_PDCCH;
#define PBCH_A 24
typedef struct {
......@@ -617,16 +449,6 @@ typedef struct NR_UE_SSB {
struct NR_UE_SSB *next_ssb;
} NR_UE_SSB;
/*typedef enum {
/// do not detect any DCIs in the current subframe
NO_DCI = 0x0,
/// detect only downlink DCIs in the current subframe
UL_DCI = 0x1,
/// detect only uplink DCIs in the current subframe
DL_DCI = 0x2,
/// detect both uplink and downlink DCIs in the current subframe
UL_DL_DCI = 0x3} nr_dci_detect_mode_t;*/
typedef struct UE_NR_SCAN_INFO_s {
/// 10 best amplitudes (linear) for each pss signals
int32_t amp[3][10];
......@@ -730,11 +552,6 @@ typedef struct {
uint32_t PF;
uint32_t PO;
// For abstraction-purposes only
uint8_t sr[10];
uint8_t pucch_sel[10];
uint8_t pucch_payload[22];
UE_MODE_t UE_mode[NUMBER_OF_CONNECTED_gNB_MAX];
/// cell-specific reference symbols
//uint32_t lte_gold_table[7][20][2][14];
......@@ -781,10 +598,7 @@ typedef struct {
UE_NR_SCAN_INFO_t scan_info[NB_BANDS_MAX];
char ulsch_no_allocation_counter[NUMBER_OF_CONNECTED_gNB_MAX];
NR_PRACH_RESOURCES_t *prach_resources[NUMBER_OF_CONNECTED_gNB_MAX];
int turbo_iterations, turbo_cntl_iterations;
/// \brief ?.
/// - first index: gNB [0..NUMBER_OF_CONNECTED_gNB_MAX[ (hard coded)
uint32_t total_TBS[NUMBER_OF_CONNECTED_gNB_MAX];
......@@ -854,10 +668,6 @@ typedef struct {
/// - first index: ? [0..12*N_RB_DL[
double *sinr_dB;
/// \brief sinr for all subcarriers of first symbol for the CQI Calculation.
/// - first index: ? [0..12*N_RB_DL[
double *sinr_CQI_dB;
/// sinr_effective used for CQI calulcation
double sinr_eff;
......@@ -866,15 +676,6 @@ typedef struct {
uint8_t max_ldpc_iterations;
/// PDSCH Varaibles
PDSCH_CONFIG_DEDICATED pdsch_config_dedicated[NUMBER_OF_CONNECTED_gNB_MAX];
/// PUSCH Varaibles
PUSCH_CONFIG_DEDICATED pusch_config_dedicated[NUMBER_OF_CONNECTED_gNB_MAX];
/// PUSCH contention-based access vars
PUSCH_CA_CONFIG_DEDICATED pusch_ca_config_dedicated[NUMBER_OF_eNB_MAX]; // lola
/// SRS variables
nr_srs_info_t *nr_srs_info;
......@@ -886,33 +687,12 @@ typedef struct {
SystemInformationBlockType1_nr_t systemInformationBlockType1_nr;
#endif
uint8_t ncs_cell[20][7];
/// UL-POWER-Control
UL_POWER_CONTROL_DEDICATED ul_power_control_dedicated[NUMBER_OF_CONNECTED_gNB_MAX];
/// TPC
TPC_PDCCH_CONFIG tpc_pdcch_config_pucch[NUMBER_OF_CONNECTED_gNB_MAX];
TPC_PDCCH_CONFIG tpc_pdcch_config_pusch[NUMBER_OF_CONNECTED_gNB_MAX];
/// CQI reporting
CQI_REPORT_CONFIG cqi_report_config[NUMBER_OF_CONNECTED_gNB_MAX];
/// SRS Variables
SOUNDINGRS_UL_CONFIG_DEDICATED soundingrs_ul_config_dedicated[NUMBER_OF_CONNECTED_gNB_MAX];
/// Scheduling Request Config
SCHEDULING_REQUEST_CONFIG scheduling_request_config[NUMBER_OF_CONNECTED_gNB_MAX];
//#if defined(UPGRADE_RAT_NR)
#if 1
scheduling_request_config_t scheduling_request_config_nr[NUMBER_OF_CONNECTED_gNB_MAX];
#endif
/// Transmission mode per gNB
uint8_t transmission_mode[NUMBER_OF_CONNECTED_gNB_MAX];
time_stats_t phy_proc;
time_stats_t phy_proc_tx;
time_stats_t phy_proc_rx;
......@@ -967,11 +747,6 @@ typedef struct {
/// RF and Interface devices per CC
openair0_device rfdevice;
time_stats_t dlsch_encoding_SIC_stats;
time_stats_t dlsch_scrambling_SIC_stats;
time_stats_t dlsch_modulation_SIC_stats;
time_stats_t dlsch_llr_stripping_unit_SIC_stats;
time_stats_t dlsch_unscrambling_SIC_stats;
#if ENABLE_RAL
hash_table_t *ral_thresholds_timed;
......
openair1/PHY/phy_vars_nr_ue.h
View file @ 652df48a
......@@ -125,7 +125,4 @@ int16_t unscrambling_lut[65536*16] __attribute__((aligned(32)));
/// lookup table for scrambling in TX
uint8_t scrambling_lut[65536*16] __attribute__((aligned(32)));
uint8_t max_ldpc_iterations=4;
uint8_t max_turbo_iterations=4;
#endif
openair1/SCHED_NR_UE/defs.h
View file @ 652df48a
......@@ -91,23 +91,6 @@ typedef struct {
* @{
*/
/*! \brief Top-level entry routine for UE procedures. Called every slot by process scheduler. In even slots, it performs RX functions from previous subframe (if required). On odd slots, it generate TX waveform for the following subframe.
@param phy_vars_ue Pointer to UE variables on which to act
@param eNB_id ID of eNB on which to act
@param abstraction_flag Indicator of PHY abstraction
@param mode calibration/debug mode
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
@param *phy_vars_rn pointer to RN variables
*/
void phy_procedures_UE_lte(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type);
/*! \brief Top-level entry routine for relay node procedures actinf as UE. This proc will make us of the existing UE procs.
@param last_slot Index of last slot (0-19)
@param next_slot Index of next_slot (0-19)
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
*/
int phy_procedures_RN_UE_RX(unsigned char last_slot, unsigned char next_slot, relaying_type_t r_type);
/*! \brief Scheduling for UE TX procedures in normal subframes.
@param ue Pointer to UE variables on which to act
@param proc Pointer to RXn-TXnp4 proc information
......@@ -133,89 +116,6 @@ int phy_procedures_slot_parallelization_nrUE_RX(PHY_VARS_NR_UE *ue, UE_nr_rxtx_p
void processSlotTX(void *arg);
#ifdef UE_SLOT_PARALLELISATION
void *UE_thread_slot1_dl_processing(void *arg);
#endif
/*! \brief Scheduling for UE TX procedures in TDD S-subframes.
@param phy_vars_ue Pointer to UE variables on which to act
@param eNB_id Local id of eNB on which to act
@param abstraction_flag Indicator of PHY abstraction
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
*/
/*! \brief Function to compute subframe type as a function of Frame type and TDD Configuration (implements Table 4.2.2 from 36.211, p.11 from version 8.6) and subframe index.
@param frame_parms Pointer to DL frame parameter descriptor
@param subframe Subframe index
@returns Subframe type (DL,UL,S)
*/
//nr_subframe_t nr_subframe_select(NR_DL_FRAME_PARMS *frame_parms,uint8_t subframe);
/*! \brief Function to compute subframe type as a function of Frame type and TDD Configuration (implements Table 4.2.2 from 36.211, p.11 from version 8.6) and subframe index. Same as nr_subframe_select, except that it uses the Mod_id and is provided as a service to the MAC scheduler.
@param Mod_id Index of eNB
@param CC_id Component Carrier Index
@param subframe Subframe index
@returns Subframe type (DL,UL,S)
*/
nr_subframe_t nr_get_subframe_direction(uint8_t Mod_id, uint8_t CC_id,uint8_t subframe);
/*! \brief Function to compute timing of Msg3 transmission on UL-SCH (first UE transmission in RA procedure). This implements the timing in paragraph a) from Section 6.1.1 in 36.213 (p. 17 in version 8.6). Used by eNB upon transmission of random-access response (RA_RNTI) to program corresponding ULSCH reception procedure. Used by UE upon reception of random-access response (RA_RNTI) to program corresponding ULSCH transmission procedure. This does not support the UL_delay field in RAR (always assumed to be 0).
@param frame_parms Pointer to DL frame parameter descriptor
@param current_subframe Index of subframe where RA_RNTI was received
@param current_frame Index of frame where RA_RNTI was received
@param frame Frame index where Msg3 is to be transmitted (n+6 mod 10 for FDD, different for TDD)
@param subframe subframe index where Msg3 is to be transmitted (n, n+1 or n+2)
*/
void nr_get_Msg3_alloc(NR_DL_FRAME_PARMS *frame_parms,
uint8_t current_subframe,
uint32_t current_frame,
uint32_t *frame,
uint8_t *subframe);
/*! \brief Function to compute timing of Msg3 retransmission on UL-SCH (first UE transmission in RA procedure).
@param frame_parms Pointer to DL frame parameter descriptor
@param current_subframe Index of subframe where RA_RNTI was received
@param current_frame Index of frame where RA_RNTI was received
@param frame Frame index where Msg3 is to be transmitted (n+6 mod 10 for FDD, different for TDD)
@param subframe subframe index where Msg3 is to be transmitted (n, n+1 or n+2)
*/
void nr_get_Msg3_alloc_ret(NR_DL_FRAME_PARMS *frame_parms,
uint8_t current_subframe,
uint32_t current_frame,
uint32_t *frame,
uint8_t *subframe);
/*! \brief Get ULSCH harq_pid for Msg3 from RAR subframe. This returns n+k mod 10 (k>6) and corresponds to the rule in Section 6.1.1 from 36.213
@param frame_parms Pointer to DL Frame Parameters
@param frame Frame index
@param current_subframe subframe of RAR transmission
@returns harq_pid (0 ... 7)
*/
uint8_t nr_get_Msg3_harq_pid(NR_DL_FRAME_PARMS *frame_parms,uint32_t frame,uint8_t current_subframe);
/*! \brief Get ULSCH harq_pid from PHICH subframe
@param frame_parms Pointer to DL Frame Parameters
@param subframe subframe of PHICH
@returns harq_pid (0 ... 7)
*/
/*! \brief Function to indicate failure of contention resolution or RA procedure. It places the UE back in PRACH mode.
@param Mod_id Instance index of UE
@param CC_id Component Carrier Index
@param eNB_index Index of eNB
*/
void ra_failed(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
/*! \brief Function to indicate success of contention resolution or RA procedure.
@param Mod_id Instance index of UE
@param CC_id Component Carrier Index
@param eNB_index Index of eNB
*/
void ra_succeeded(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
/*! \brief UE PRACH procedures.
@param
@param
......@@ -223,74 +123,6 @@ void ra_succeeded(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
*/
void nr_ue_prach_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t gNB_id);
int is_nr_prach_subframe(NR_DL_FRAME_PARMS *frame_parms, uint32_t frame, uint8_t subframe);
#if 0
/*! \brief Compute ACK/NACK information for PUSCH/PUCCH for UE transmission in subframe n. This function implements table 10.1-1 of 36.213, p. 69.
@param frame_parms Pointer to DL frame parameter descriptor
@param harq_ack Pointer to dlsch_ue harq_ack status descriptor
@param subframe Subframe for UE transmission (n in 36.213)
@param o_ACK Pointer to ACK/NAK payload for PUCCH/PUSCH
@returns status indicator for PUCCH/PUSCH transmission
*/
uint8_t nr_get_ack(NR_DL_FRAME_PARMS *frame_parms,nr_harq_status_t *harq_ack,uint8_t subframe_tx,uint8_t subframe_rx,uint8_t *o_ACK, uint8_t cw_idx);
/*! \brief Reset ACK/NACK information
@param frame_parms Pointer to DL frame parameter descriptor
@param harq_ack Pointer to dlsch_ue harq_ack status descriptor
@param subframe Subframe for UE transmission (n in 36.213)
@param o_ACK Pointer to ACK/NAK payload for PUCCH/PUSCH
@returns status indicator for PUCCH/PUSCH transmission
*/
uint8_t nr_reset_ack(NR_DL_FRAME_PARMS *frame_parms,
nr_harq_status_t *harq_ack,
unsigned char subframe_tx,
unsigned char subframe_rx,
unsigned char *o_ACK,
uint8_t *pN_bundled,
uint8_t cw_idx);
/*! \brief Compute UL ACK subframe from DL subframe. This is used to retrieve corresponding DLSCH HARQ pid at eNB upon reception of ACK/NAK information on PUCCH/PUSCH. Derived from Table 10.1-1 in 36.213 (p. 69 in version 8.6)
@param frame_parms Pointer to DL frame parameter descriptor
@param subframe Subframe for UE transmission (n in 36.213)
@param ACK_index TTI bundling index (0,1)
@returns Subframe index for corresponding DL transmission
*/
uint8_t nr_ul_ACK_subframe2_dl_subframe(NR_DL_FRAME_PARMS *frame_parms,uint8_t subframe,uint8_t ACK_index);
/*! \brief Computes number of DL subframes represented by a particular ACK received on UL (M from Table 10.1-1 in 36.213, p. 69 in version 8.6)
@param frame_parms Pointer to DL frame parameter descriptor
@param subframe Subframe for UE transmission (n in 36.213)
@returns Number of DL subframes (M)
*/
uint8_t nr_ul_ACK_subframe2_M(NR_DL_FRAME_PARMS *frame_parms,unsigned char subframe);
/*! \brief Indicates the SR TXOp in current subframe. Implements Table 10.1-5 from 36.213.
@param phy_vars_ue Pointer to UE variables
@param proc Pointer to RXn_TXnp4 thread context
@param eNB_id ID of eNB which is to receive the SR
@returns 1 if TXOp is active.
*/
#endif
uint8_t nr_is_SR_TXOp(PHY_VARS_NR_UE *phy_vars_ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id);
/*! \brief Gives the UL subframe corresponding to a PDDCH order in subframe n
@param frame_parms Pointer to DL frame parameters
@param proc Pointer to RXn-TXnp4 proc information
@param n subframe of PDCCH
@returns UL subframe corresponding to pdcch order
*/
uint8_t nr_pdcch_alloc2ul_subframe(NR_DL_FRAME_PARMS *frame_parms,uint8_t n);
/*! \brief Gives the UL frame corresponding to a PDDCH order in subframe n
@param frame_parms Pointer to DL frame parameters
@param frame Frame of received PDCCH
@param n subframe of PDCCH
@returns UL frame corresponding to pdcch order
*/
uint32_t nr_pdcch_alloc2ul_frame(NR_DL_FRAME_PARMS *frame_parms,uint32_t frame, uint8_t n);
int8_t nr_find_ue(uint16_t rnti, PHY_VARS_eNB *phy_vars_eNB);
/*! \brief UL time alignment procedures for TA application
......@@ -302,61 +134,6 @@ void ue_ta_procedures(PHY_VARS_NR_UE *ue, int slot_tx, int frame_tx);
unsigned int nr_get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb);
void phy_reset_ue(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
#if 0
/*! \brief This function retrives the resource (n1_pucch) corresponding to a PDSCH transmission in
subframe n-4 which is acknowledged in subframe n (for FDD) according to n1_pucch = Ncce + N1_pucch. For
TDD, this routine computes the complex procedure described in Section 10.1 of 36.213 (through tables 10.1-1,10.1-2)
@param phy_vars_ue Pointer to UE variables
@param proc Pointer to RXn-TXnp4 proc information
@param harq_ack Pointer to dlsch_ue harq_ack status descriptor
@param eNB_id Index of eNB
@param b Pointer to PUCCH payload (b[0],b[1])
@param SR 1 means there's a positive SR in parallel to ACK/NAK
@returns n1_pucch
*/
uint16_t nr_get_n1_pucch(PHY_VARS_NR_UE *phy_vars_ue,
UE_nr_rxtx_proc_t *proc,
nr_harq_status_t *harq_ack,
uint8_t eNB_id,
uint8_t *b,
uint8_t SR);
#endif
/*! \brief This function retrieves the PHY UE mode. It is used as a helper function for the UE MAC.
@param Mod_id Local UE index on which to act
@param CC_id Component Carrier Index
@param gNB_index ID of gNB
@returns UE mode
*/
UE_MODE_t get_nrUE_mode(uint8_t Mod_id,uint8_t CC_id,uint8_t gNB_index);
/*! \brief This function implements the power control mechanism for PUCCH from 36.213.
@param phy_vars_ue PHY variables
@param proc Pointer to proc descriptor
@param eNB_id Index of eNB
@param pucch_fmt Format of PUCCH that is being transmitted
@returns Transmit power
*/
int16_t nr_pucch_power_cntl(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t subframe,uint8_t eNB_id,PUCCH_FMT_t pucch_fmt);
/*! \brief This function implements the power control mechanism for PUCCH from 36.213.
@param phy_vars_ue PHY variables
@param proc Pointer to proc descriptor
@param eNB_id Index of eNB
@param j index of type of PUSCH (SPS, Normal, Msg3)
@returns Transmit power
*/
void nr_pusch_power_cntl(PHY_VARS_NR_UE *phy_vars_ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t j, uint8_t abstraction_flag);
void nr_get_cqipmiri_params(PHY_VARS_NR_UE *ue,uint8_t eNB_id);
void nr_dump_dlsch(PHY_VARS_NR_UE *phy_vars_ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subframe,uint8_t harq_pid);
void nr_dump_dlsch_SI(PHY_VARS_NR_UE *phy_vars_ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subframe);
void nr_dump_dlsch_ra(PHY_VARS_NR_UE *phy_vars_ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subframe);
void set_tx_harq_id(NR_UE_ULSCH_t *ulsch, int harq_pid, int slot_tx);
int get_tx_harq_id(NR_UE_ULSCH_t *ulsch, int slot_tx);
......
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @ 652df48a
......@@ -227,10 +227,6 @@ int get_tx_amp_prach(int power_dBm, int power_max_dBm, int N_RB_UL){
return (amp_x_100);
}
UE_MODE_t get_nrUE_mode(uint8_t Mod_id,uint8_t CC_id,uint8_t gNB_id){
return(PHY_vars_UE_g[Mod_id][CC_id]->UE_mode[gNB_id]);
}
// convert time factor "16 * 64 * T_c / (2^mu)" in N_TA calculation in TS38.213 section 4.2 to samples by multiplying with samples per second
// 16 * 64 * T_c / (2^mu) * samples_per_second
// = 16 * T_s / (2^mu) * samples_per_second
......@@ -1042,273 +1038,6 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
}
/*!
* \brief This is the UE synchronize thread.
* It performs band scanning and synchonization.
* \param arg is a pointer to a \ref PHY_VARS_NR_UE structure.
* \returns a pointer to an int. The storage is not on the heap and must not be freed.
*/
#ifdef UE_SLOT_PARALLELISATION
#define FIFO_PRIORITY 40
void *UE_thread_slot1_dl_processing(void *arg) {
static __thread int UE_dl_slot1_processing_retval;
struct rx_tx_thread_data *rtd = arg;
UE_nr_rxtx_proc_t *proc = rtd->proc;
PHY_VARS_NR_UE *ue = rtd->UE;
uint8_t pilot1;
proc->instance_cnt_slot1_dl_processing=-1;
proc->nr_slot_rx = proc->sub_frame_start * ue->frame_parms.slots_per_subframe;
char threadname[256];
sprintf(threadname,"UE_thread_slot1_dl_processing_%d", proc->sub_frame_start);
cpu_set_t cpuset;
CPU_ZERO(&cpuset);
if ( (proc->sub_frame_start+1)%RX_NB_TH == 0 && threads.slot1_proc_one != -1 )
CPU_SET(threads.slot1_proc_one, &cpuset);
if ( RX_NB_TH > 1 && (proc->sub_frame_start+1)%RX_NB_TH == 1 && threads.slot1_proc_two != -1 )
CPU_SET(threads.slot1_proc_two, &cpuset);
if ( RX_NB_TH > 2 && (proc->sub_frame_start+1)%RX_NB_TH == 2 && threads.slot1_proc_three != -1 )
CPU_SET(threads.slot1_proc_three, &cpuset);
init_thread(900000,1000000 , FIFO_PRIORITY-1, &cpuset,
threadname);
while (!oai_exit) {
if (pthread_mutex_lock(&proc->mutex_slot1_dl_processing) != 0) {
LOG_E( PHY, "[SCHED][UE] error locking mutex for UE slot1 dl processing\n" );
exit_fun("nothing to add");
}
while (proc->instance_cnt_slot1_dl_processing < 0) {
// most of the time, the thread is waiting here
pthread_cond_wait( &proc->cond_slot1_dl_processing, &proc->mutex_slot1_dl_processing );
}
if (pthread_mutex_unlock(&proc->mutex_slot1_dl_processing) != 0) {
LOG_E( PHY, "[SCHED][UE] error unlocking mutex for UE slot1 dl processing \n" );
exit_fun("nothing to add");
}
int frame_rx = proc->frame_rx;
uint8_t subframe_rx = proc->nr_slot_rx / ue->frame_parms.slots_per_subframe;
uint8_t next_subframe_rx = (1 + subframe_rx) % NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
uint8_t next_subframe_slot0 = next_subframe_rx * ue->frame_parms.slots_per_subframe;
uint8_t slot1 = proc->nr_slot_rx + 1;
uint8_t pilot0 = 0;
//printf("AbsSubframe %d.%d execute dl slot1 processing \n", frame_rx, nr_slot_rx);
if (ue->frame_parms.Ncp == 0) { // normal prefix
pilot1 = 4;
} else { // extended prefix
pilot1 = 3;
}
/**** Slot1 FE Processing ****/
start_meas(&ue->ue_front_end_per_slot_stat[proc->thread_id][1]);
// I- start dl slot1 processing
// do first symbol of next downlink nr_slot_rx for channel estimation
/*
// 1- perform FFT for pilot ofdm symbols first (ofdmSym0 next nr_slot_rx ofdmSym11)
if (nr_subframe_select(&ue->frame_parms,next_nr_slot_rx) != SF_UL)
{
front_end_fft(ue,
pilot0,
next_subframe_slot0,
0,
0);
}
front_end_fft(ue,
pilot1,
slot1,
0,
0);
*/
// 1- perform FFT
for (int l=1; l<ue->frame_parms.symbols_per_slot>>1; l++)
{
//if( (l != pilot0) && (l != pilot1))
{
start_meas(&ue->ofdm_demod_stats);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_IN);
//printf("AbsSubframe %d.%d FFT slot %d, symbol %d\n", frame_rx,nr_slot_rx,slot1,l);
front_end_fft(ue,
l,
slot1,
0,
0);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_OUT);
stop_meas(&ue->ofdm_demod_stats);
}
} // for l=1..l2
if (nr_subframe_select(&ue->frame_parms,next_nr_slot_rx) != SF_UL)
{
//printf("AbsSubframe %d.%d FFT slot %d, symbol %d\n", frame_rx,nr_slot_rx,next_subframe_slot0,pilot0);
front_end_fft(ue,
pilot0,
next_subframe_slot0,
0,
0);
}
// 2- perform Channel Estimation for slot1
for (int l=1; l<ue->frame_parms.symbols_per_slot>>1; l++)
{
if(l == pilot1)
{
//wait until channel estimation for pilot0/slot1 is available
uint32_t wait = 0;
while(proc->chan_est_pilot0_slot1_available == 0)
{
usleep(1);
wait++;
}
//printf("[slot1 dl processing] ChanEst symbol %d slot %d wait%d\n",l,slot1,wait);
}
//printf("AbsSubframe %d.%d ChanEst slot %d, symbol %d\n", frame_rx,nr_slot_rx,slot1,l);
front_end_chanEst(ue,
l,
slot1,
0);
ue_measurement_procedures(l-1,ue,proc,0,slot1,0,ue->mode);
}
//printf("AbsSubframe %d.%d ChanEst slot %d, symbol %d\n", frame_rx,nr_slot_rx,next_subframe_slot0,pilot0);
front_end_chanEst(ue,
pilot0,
next_subframe_slot0,
0);
if ( (nr_slot_rx == 0) && (ue->decode_MIB == 1))
{
ue_pbch_procedures(0,ue,proc,0);
}
proc->chan_est_slot1_available = 1;
//printf("Set available slot 1channelEst to 1 AbsSubframe %d.%d \n",frame_rx,nr_slot_rx);
//printf(" [slot1 dl processing] ==> FFT/CHanEst Done for AbsSubframe %d.%d \n", proc->frame_rx, proc->nr_slot_rx);
//printf(" [slot1 dl processing] ==> Start LLR Comuptation slot1 for AbsSubframe %d.%d \n", proc->frame_rx, proc->nr_slot_rx);
stop_meas(&ue->ue_front_end_per_slot_stat[proc->thread_id][1]);
if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY, "[AbsSFN %d.%d] Slot1: FFT + Channel Estimate + Pdsch Proc Slot0 %5.2f \n",frame_rx,nr_slot_rx,ue->ue_front_end_per_slot_stat[proc->thread_id][1].p_time/(cpuf*1000.0));
//wait until pdcch is decoded
uint32_t wait = 0;
while(proc->dci_slot0_available == 0)
{
usleep(1);
wait++;
}
//printf("[slot1 dl processing] AbsSubframe %d.%d LLR Computation Start wait DCI %d\n",frame_rx,nr_slot_rx,wait);
/**** Pdsch Procedure Slot1 ****/
// start slot1 thread for Pdsch Procedure (slot1)
// do procedures for C-RNTI
//printf("AbsSubframe %d.%d Pdsch Procedure (slot1)\n",frame_rx,nr_slot_rx);
start_meas(&ue->pdsch_procedures_per_slot_stat[proc->thread_id][1]);
// start slave thread for Pdsch Procedure (slot1)
// do procedures for C-RNTI
uint8_t gNB_id = 0;
if (ue->dlsch[proc->thread_id][gNB_id][0]->active == 1) {
//wait until first ofdm symbol is processed
//wait = 0;
//while(proc->first_symbol_available == 0)
//{
// usleep(1);
// wait++;
//}
//printf("[slot1 dl processing] AbsSubframe %d.%d LLR Computation Start wait First Ofdm Sym %d\n",frame_rx,nr_slot_rx,wait);
//VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN);
ue_pdsch_procedures(ue,
proc,
gNB_id,
PDSCH,
ue->dlsch[proc->thread_id][gNB_id][0],
NULL,
(ue->frame_parms.symbols_per_slot>>1),
ue->frame_parms.symbols_per_slot-1,
abstraction_flag);
LOG_D(PHY," ------ end PDSCH ChannelComp/LLR slot 0: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_slot_rx);
LOG_D(PHY," ------ --> PDSCH Turbo Decoder slot 0/1: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_slot_rx);
}
// do procedures for SI-RNTI
if ((ue->dlsch_SI[gNB_id]) && (ue->dlsch_SI[gNB_id]->active == 1)) {
ue_pdsch_procedures(ue,
proc,
gNB_id,
SI_PDSCH,
ue->dlsch_SI[gNB_id],
NULL,
(ue->frame_parms.symbols_per_slot>>1),
ue->frame_parms.symbols_per_slot-1,
abstraction_flag);
}
// do procedures for P-RNTI
if ((ue->dlsch_p[gNB_id]) && (ue->dlsch_p[gNB_id]->active == 1)) {
ue_pdsch_procedures(ue,
proc,
gNB_id,
P_PDSCH,
ue->dlsch_p[gNB_id],
NULL,
(ue->frame_parms.symbols_per_slot>>1),
ue->frame_parms.symbols_per_slot-1,
abstraction_flag);
}
// do procedures for RA-RNTI
if ((ue->dlsch_ra[gNB_id]) && (ue->dlsch_ra[gNB_id]->active == 1) && (UE_mode != PUSCH)) {
ue_pdsch_procedures(ue,
proc,
gNB_id,
RA_PDSCH,
ue->dlsch_ra[gNB_id],
NULL,
(ue->frame_parms.symbols_per_slot>>1),
ue->frame_parms.symbols_per_slot-1,
abstraction_flag);
}
proc->llr_slot1_available=1;
//printf("Set available LLR slot1 to 1 AbsSubframe %d.%d \n",frame_rx,nr_slot_rx);
stop_meas(&ue->pdsch_procedures_per_slot_stat[proc->thread_id][1]);
if (cpumeas(CPUMEAS_GETSTATE))
LOG_D(PHY, "[AbsSFN %d.%d] Slot1: LLR Computation %5.2f \n",frame_rx,nr_slot_rx,ue->pdsch_procedures_per_slot_stat[proc->thread_id][1].p_time/(cpuf*1000.0));
if (pthread_mutex_lock(&proc->mutex_slot1_dl_processing) != 0) {
LOG_E( PHY, "[SCHED][UE] error locking mutex for UE RXTX\n" );
exit_fun("noting to add");
}
proc->instance_cnt_slot1_dl_processing--;
if (pthread_mutex_unlock(&proc->mutex_slot1_dl_processing) != 0) {
LOG_E( PHY, "[SCHED][UE] error unlocking mutex for UE FEP Slo1\n" );
exit_fun("noting to add");
}
}
// thread finished
free(arg);
return &UE_dl_slot1_processing_retval;
}
#endif
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t gNB_id,
......@@ -1717,50 +1446,6 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
}
uint8_t nr_is_cqi_TXOp(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t gNB_id)
{
int subframe = proc->nr_slot_tx / ue->frame_parms.slots_per_subframe;
int frame = proc->frame_tx;
CQI_REPORTPERIODIC *cqirep = &ue->cqi_report_config[gNB_id].CQI_ReportPeriodic;
//LOG_I(PHY,"[UE %d][CRNTI %x] AbsSubFrame %d.%d Checking for CQI TXOp (cqi_ConfigIndex %d) isCQIOp %d\n",
// ue->Mod_id,ue->pdcch_vars[gNB_id]->crnti,frame,subframe,
// cqirep->cqi_PMI_ConfigIndex,
// (((10*frame + subframe) % cqirep->Npd) == cqirep->N_OFFSET_CQI));
if (cqirep->cqi_PMI_ConfigIndex==-1)
return(0);
else if (((10*frame + subframe) % cqirep->Npd) == cqirep->N_OFFSET_CQI)
return(1);
else
return(0);
}
uint8_t nr_is_ri_TXOp(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t gNB_id)
{
int subframe = proc->nr_slot_tx / ue->frame_parms.slots_per_subframe;
int frame = proc->frame_tx;
CQI_REPORTPERIODIC *cqirep = &ue->cqi_report_config[gNB_id].CQI_ReportPeriodic;
int log2Mri = cqirep->ri_ConfigIndex/161;
int N_OFFSET_RI = cqirep->ri_ConfigIndex % 161;
//LOG_I(PHY,"[UE %d][CRNTI %x] AbsSubFrame %d.%d Checking for RI TXOp (ri_ConfigIndex %d) isRIOp %d\n",
// ue->Mod_id,ue->pdcch_vars[gNB_id]->crnti,frame,subframe,
// cqirep->ri_ConfigIndex,
// (((10*frame + subframe + cqirep->N_OFFSET_CQI - N_OFFSET_RI) % (cqirep->Npd<<log2Mri)) == 0));
if (cqirep->ri_ConfigIndex==-1)
return(0);
else if (((10*frame + subframe + cqirep->N_OFFSET_CQI - N_OFFSET_RI) % (cqirep->Npd<<log2Mri)) == 0)
return(1);
else
return(0);
}
// todo:
// - power control as per 38.213 ch 7.4
void nr_ue_prach_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t gNB_id) {
......
openair1/SCHED_NR_UE/pucch_uci_ue_nr.c
View file @ 652df48a
......@@ -54,9 +54,6 @@
#endif
uint8_t nr_is_cqi_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t gNB_id);
uint8_t nr_is_ri_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t gNB_id);
long
binary_search_float_nr(
float elements[],
......
openair2/LAYER2/NR_MAC_UE/mac_defs.h
View file @ 652df48a
......@@ -445,85 +445,6 @@ typedef struct {
} NR_UE_MAC_INST_t;
typedef enum seach_space_mask_e {
type0_pdcch = 0x1,
type0a_pdcch = 0x2,
type1_pdcch = 0x4,
type2_pdcch = 0x8,
type3_pdcch = 0x10
} search_space_mask_t;
typedef struct {
uint8_t identifier_dci_formats ; // 0 IDENTIFIER_DCI_FORMATS:
uint8_t carrier_ind ; // 1 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
uint8_t sul_ind_0_1 ; // 2 SUL_IND_0_1:
uint8_t slot_format_ind ; // 3 SLOT_FORMAT_IND: size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
uint8_t pre_emption_ind ; // 4 PRE_EMPTION_IND: size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
uint8_t block_number ; // 5 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
uint8_t close_loop_ind ; // 6 CLOSE_LOOP_IND:
uint8_t bandwidth_part_ind ; // 7 BANDWIDTH_PART_IND:
uint8_t short_message_ind ; // 8 SHORT_MESSAGE_IND:
uint8_t short_messages ; // 9 SHORT_MESSAGES:
uint16_t freq_dom_resource_assignment_UL; // 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
// (NOTE 1) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is larger than the payload size of the DCI format 1_0 monitored in common search space
// the bitwidth of the frequency domain resource allocation field in the DCI format 0_0
// is reduced such that the size of DCI format 0_0 equals to the size of the DCI format 1_0
uint16_t freq_dom_resource_assignment_DL; // 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
uint8_t time_dom_resource_assignment ; // 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
// where I the number of entries in the higher layer parameter pusch-AllocationList
uint8_t vrb_to_prb_mapping ; // 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
uint8_t prb_bundling_size_ind ; // 14 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
uint8_t rate_matching_ind ; // 15 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
uint8_t zp_csi_rs_trigger ; // 16 ZP_CSI_RS_TRIGGER:
uint8_t freq_hopping_flag ; // 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
uint8_t tb1_mcs ; // 18 TB1_MCS:
uint8_t tb1_ndi ; // 19 TB1_NDI:
uint8_t tb1_rv ; // 20 TB1_RV:
uint8_t tb2_mcs ; // 21 TB2_MCS:
uint8_t tb2_ndi ; // 22 TB2_NDI:
uint8_t tb2_rv ; // 23 TB2_RV:
uint8_t mcs ; // 24 MCS:
uint8_t ndi ; // 25 NDI:
uint8_t rv ; // 26 RV:
uint8_t harq_process_number ; // 27 HARQ_PROCESS_NUMBER:
uint8_t dai ; // 28 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
// 2 if one serving cell is configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 bits are the counter DAI
// 0 otherwise
uint8_t first_dai ; // 29 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK
uint8_t second_dai ; // 30 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks
uint8_t tb_scaling ; // 31 TB_SCALING:
uint8_t tpc_pusch ; // 32 TPC_PUSCH:
uint8_t tpc_pucch ; // 33 TPC_PUCCH:
uint8_t pucch_resource_ind ; // 34 PUCCH_RESOURCE_IND:
uint8_t pdsch_to_harq_feedback_time_ind ; // 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
uint8_t srs_resource_ind ; // 36 SRS_RESOURCE_IND:
uint8_t precod_nbr_layers ; // 37 PRECOD_NBR_LAYERS:
uint8_t antenna_ports ; // 38 ANTENNA_PORTS:
uint8_t tci ; // 39 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
uint8_t srs_request ; // 40 SRS_REQUEST:
uint8_t tpc_cmd ; // 41 TPC_CMD:
uint8_t csi_request ; // 42 CSI_REQUEST:
uint8_t cbgti ; // 43 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
uint8_t cbgfi ; // 44 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
uint8_t ptrs_dmrs ; // 45 PTRS_DMRS:
uint8_t beta_offset_ind ; // 46 BETA_OFFSET_IND:
uint8_t dmrs_seq_ini ; // 47 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding
// is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise
uint8_t ul_sch_ind ; // 48 UL_SCH_IND: value of "1" indicates UL-SCH shall be transmitted on the PUSCH and a value of "0" indicates UL-SCH shall not be transmitted on the PUSCH
uint16_t padding_nr_dci ; // 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is less than the payload size of the DCI format 1_0 monitored in common search space
// zeros shall be appended to the DCI format 0_0
// until the payload size equals that of the DCI format 1_0
uint8_t sul_ind_0_0 ; // 50 SUL_IND_0_0:
uint8_t ra_preamble_index ; // 51 RA_PREAMBLE_INDEX:
uint8_t sul_ind_1_0 ; // 52 SUL_IND_1_0:
uint8_t ss_pbch_index ; // 53 SS_PBCH_INDEX
uint8_t prach_mask_index ; // 54 PRACH_MASK_INDEX
uint8_t reserved_nr_dci ; // 55 RESERVED_NR_DCI
} nr_dci_pdu_rel15_t;
// The PRACH Config period is a series of selected slots in one or multiple frames
typedef struct prach_conf_period {
......
openair2/LAYER2/NR_MAC_UE/mac_proto.h
View file @ 652df48a
......@@ -34,7 +34,6 @@
#define __LAYER2_MAC_UE_PROTO_H__
#include "mac_defs.h"
#include "PHY/defs_nr_UE.h"
#include "RRC/NR_UE/rrc_defs.h"
#define NR_DL_MAX_DAI (4) /* TS 38.213 table 9.1.3-1 Value of counter DAI for DCI format 1_0 and 1_1 */
......@@ -177,13 +176,6 @@ uint8_t nr_locate_BsrIndexByBufferSize(const uint32_t *table, int size,
*/
int nr_get_sf_periodicBSRTimer(uint8_t bucketSize);
/*! \fn int nr_get_ms_bucketsizeduration(uint8_t bucketSize)
\brief get the time in ms form the bucket size duration configured by the higher layer
\param[in] bucketSize the bucket size duration
\return the time in ms
*/
int nr_get_ms_bucketsizeduration(uint8_t bucketsizeduration);
/*! \fn int nr_get_sf_retxBSRTimer(uint8_t retxBSR_Timer)
\brief get the number of subframe form the bucket size duration configured by the higher layer
\param[in] retxBSR_Timer timer for regular BSR
......@@ -394,8 +386,6 @@ random-access procedure
*/
int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment, int pdu_id);
void nr_process_rar(nr_downlink_indication_t *dl_info);
void nr_ue_contention_resolution(module_id_t module_id, int cc_id, frame_t frame, int slot, NR_PRACH_RESOURCES_t *prach_resources);
void nr_ra_failed(uint8_t mod_id, uint8_t CC_id, NR_PRACH_RESOURCES_t *prach_resources, frame_t frame, int slot);
......
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @ 652df48a
......@@ -53,7 +53,6 @@
#include "openair2/NR_UE_PHY_INTERFACE/NR_Packet_Drop.h"
/* PHY */
#include "PHY/NR_TRANSPORT/nr_dci.h"
#include "executables/softmodem-common.h"
/* utils */
......
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