Commit ebc55ea2 authored by Robert Schmidt's avatar Robert Schmidt

Merge remote-tracking branch 'origin/NR_BWP_config' into integration_2022_wk31b

parents ddc6df0b 9333f53d
...@@ -280,10 +280,9 @@ void nr_dlsim_preprocessor(module_id_t module_id, ...@@ -280,10 +280,9 @@ void nr_dlsim_preprocessor(module_id_t module_id,
NR_UE_info_t *UE_info = RC.nrmac[module_id]->UE_info.list[0]; NR_UE_info_t *UE_info = RC.nrmac[module_id]->UE_info.list[0];
AssertFatal(RC.nrmac[module_id]->UE_info.list[1]==NULL, "can have only a single UE\n"); AssertFatal(RC.nrmac[module_id]->UE_info.list[1]==NULL, "can have only a single UE\n");
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl; NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl;
NR_UE_DL_BWP_t *current_BWP = &UE_info->current_DL_BWP;
NR_ServingCellConfigCommon_t *scc = RC.nrmac[0]->common_channels[0].ServingCellConfigCommon; NR_ServingCellConfigCommon_t *scc = RC.nrmac[0]->common_channels[0].ServingCellConfigCommon;
const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
sched_ctrl->search_space = get_searchspace(NULL, scc, sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Dedicated : NULL, target_ss);
uint8_t nr_of_candidates = 0; uint8_t nr_of_candidates = 0;
if (g_mcsIndex < 4) { if (g_mcsIndex < 4) {
find_aggregation_candidates(&sched_ctrl->aggregation_level, find_aggregation_candidates(&sched_ctrl->aggregation_level,
...@@ -295,7 +294,6 @@ void nr_dlsim_preprocessor(module_id_t module_id, ...@@ -295,7 +294,6 @@ void nr_dlsim_preprocessor(module_id_t module_id,
&nr_of_candidates, &nr_of_candidates,
sched_ctrl->search_space,4); sched_ctrl->search_space,4);
} }
sched_ctrl->coreset = get_coreset(RC.nrmac[module_id], scc, sched_ctrl->active_bwp->bwp_Dedicated, sched_ctrl->search_space, target_ss);
uint32_t Y = get_Y(sched_ctrl->search_space, slot, UE_info->rnti); uint32_t Y = get_Y(sched_ctrl->search_space, slot, UE_info->rnti);
int CCEIndex = find_pdcch_candidate(RC.nrmac[module_id], int CCEIndex = find_pdcch_candidate(RC.nrmac[module_id],
/* CC_id = */ 0, /* CC_id = */ 0,
...@@ -309,11 +307,8 @@ void nr_dlsim_preprocessor(module_id_t module_id, ...@@ -309,11 +307,8 @@ void nr_dlsim_preprocessor(module_id_t module_id,
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static; NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
nr_set_pdsch_semi_static(NULL, nr_set_pdsch_semi_static(current_BWP,
scc, scc,
UE_info->CellGroup,
sched_ctrl->active_bwp,
NULL,
/* tda = */ 0, /* tda = */ 0,
g_nrOfLayers, g_nrOfLayers,
sched_ctrl, sched_ctrl,
...@@ -325,10 +320,10 @@ void nr_dlsim_preprocessor(module_id_t module_id, ...@@ -325,10 +320,10 @@ void nr_dlsim_preprocessor(module_id_t module_id,
sched_pdsch->mcs = g_mcsIndex; sched_pdsch->mcs = g_mcsIndex;
/* the following might override the table that is mandated by RRC /* the following might override the table that is mandated by RRC
* configuration */ * configuration */
ps->mcsTableIdx = g_mcsTableIdx; current_BWP->mcsTableIdx = g_mcsTableIdx;
sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx); sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, current_BWP->mcsTableIdx);
sched_pdsch->R = nr_get_code_rate_dl(sched_pdsch->mcs, ps->mcsTableIdx); sched_pdsch->R = nr_get_code_rate_dl(sched_pdsch->mcs, current_BWP->mcsTableIdx);
sched_pdsch->tb_size = nr_compute_tbs(sched_pdsch->Qm, sched_pdsch->tb_size = nr_compute_tbs(sched_pdsch->Qm,
sched_pdsch->R, sched_pdsch->R,
sched_pdsch->rbSize, sched_pdsch->rbSize,
...@@ -356,7 +351,7 @@ void nr_dlsim_preprocessor(module_id_t module_id, ...@@ -356,7 +351,7 @@ void nr_dlsim_preprocessor(module_id_t module_id,
AssertFatal(sched_pdsch->rbStart >= 0, "invalid rbStart %d\n", sched_pdsch->rbStart); AssertFatal(sched_pdsch->rbStart >= 0, "invalid rbStart %d\n", sched_pdsch->rbStart);
AssertFatal(sched_pdsch->rbSize > 0, "invalid rbSize %d\n", sched_pdsch->rbSize); AssertFatal(sched_pdsch->rbSize > 0, "invalid rbSize %d\n", sched_pdsch->rbSize);
AssertFatal(sched_pdsch->mcs >= 0, "invalid mcs %d\n", sched_pdsch->mcs); AssertFatal(sched_pdsch->mcs >= 0, "invalid mcs %d\n", sched_pdsch->mcs);
AssertFatal(ps->mcsTableIdx >= 0 && ps->mcsTableIdx <= 2, "invalid mcsTableIdx %d\n", ps->mcsTableIdx); AssertFatal(current_BWP->mcsTableIdx >= 0 && current_BWP->mcsTableIdx <= 2, "invalid mcsTableIdx %d\n", current_BWP->mcsTableIdx);
} }
typedef struct { typedef struct {
...@@ -876,6 +871,8 @@ int main(int argc, char **argv) ...@@ -876,6 +871,8 @@ int main(int argc, char **argv)
N_RB_DL = gNB->frame_parms.N_RB_DL; N_RB_DL = gNB->frame_parms.N_RB_DL;
NR_UE_info_t *UE_info = RC.nrmac[0]->UE_info.list[0]; NR_UE_info_t *UE_info = RC.nrmac[0]->UE_info.list[0];
configure_UE_BWP(RC.nrmac[0], scc, &UE_info->UE_sched_ctrl, NULL, UE_info);
// stub to configure frame_parms // stub to configure frame_parms
// nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,Nid_cell,SSB_positions); // nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,Nid_cell,SSB_positions);
// call MAC to configure common parameters // call MAC to configure common parameters
......
...@@ -4128,22 +4128,22 @@ uint16_t compute_pucch_prb_size(uint8_t format, ...@@ -4128,22 +4128,22 @@ uint16_t compute_pucch_prb_size(uint8_t format,
} }
} }
int get_bw_tbslbrm(NR_BWP_t *genericParameters, int get_bw_tbslbrm(int scc_bwpsize,
NR_CellGroupConfig_t *cg) { NR_CellGroupConfig_t *cg) {
int bw = 0; int bw = scc_bwpsize;
if (cg && cg->spCellConfig && cg->spCellConfig->spCellConfigDedicated && if (cg && cg->spCellConfig && cg->spCellConfig->spCellConfigDedicated) {
cg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList) { const NR_ServingCellConfig_t *servingCellConfig = cg->spCellConfig->spCellConfigDedicated;
struct NR_ServingCellConfig__downlinkBWP_ToAddModList *BWP_list = cg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList; if(servingCellConfig->downlinkBWP_ToAddModList) {
struct NR_ServingCellConfig__downlinkBWP_ToAddModList *BWP_list = servingCellConfig->downlinkBWP_ToAddModList;
for (int i=0; i<BWP_list->list.count; i++) { for (int i=0; i<BWP_list->list.count; i++) {
genericParameters = &BWP_list->list.array[i]->bwp_Common->genericParameters; NR_BWP_t genericParameters = BWP_list->list.array[i]->bwp_Common->genericParameters;
int curr_bw = NRRIV2BW(genericParameters->locationAndBandwidth, MAX_BWP_SIZE); int curr_bw = NRRIV2BW(genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
if (curr_bw > bw) if (curr_bw > bw)
bw = curr_bw; bw = curr_bw;
} }
} }
else }
bw = NRRIV2BW(genericParameters->locationAndBandwidth, MAX_BWP_SIZE);
return bw; return bw;
} }
......
...@@ -142,7 +142,7 @@ uint32_t nr_get_code_rate_ul(uint8_t Imcs, uint8_t table_idx); ...@@ -142,7 +142,7 @@ uint32_t nr_get_code_rate_ul(uint8_t Imcs, uint8_t table_idx);
uint16_t get_nr_srs_offset(NR_SRS_PeriodicityAndOffset_t periodicityAndOffset); uint16_t get_nr_srs_offset(NR_SRS_PeriodicityAndOffset_t periodicityAndOffset);
int get_bw_tbslbrm(NR_BWP_t *genericParameters, int get_bw_tbslbrm(int scc_bwpsize,
NR_CellGroupConfig_t *cg); NR_CellGroupConfig_t *cg);
uint32_t nr_compute_tbslbrm(uint16_t table, uint32_t nr_compute_tbslbrm(uint16_t table,
......
...@@ -964,7 +964,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -964,7 +964,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
if (mac->scc || mac->scc_SIB || mac->cg) { if (mac->scc || mac->scc_SIB || mac->cg) {
NR_BWP_t genericParameters = mac->scc ? mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters : NR_BWP_t genericParameters = mac->scc ? mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters :
mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters; mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters;
bw_tbslbrm = get_bw_tbslbrm(&genericParameters, mac->cg); int BWPSize = NRRIV2BW(genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
bw_tbslbrm = get_bw_tbslbrm(BWPSize, mac->cg);
} }
else else
bw_tbslbrm = dlsch_config_pdu_1_0->BWPSize; bw_tbslbrm = dlsch_config_pdu_1_0->BWPSize;
...@@ -1404,7 +1405,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -1404,7 +1405,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
int nl_tbslbrm = *maxMIMO_Layers < 4 ? *maxMIMO_Layers : 4; int nl_tbslbrm = *maxMIMO_Layers < 4 ? *maxMIMO_Layers : 4;
NR_BWP_t genericParameters = mac->scc ? mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters : NR_BWP_t genericParameters = mac->scc ? mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters :
mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters; mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters;
int bw_tbslbrm = get_bw_tbslbrm(&genericParameters, mac->cg); int BWPSize = NRRIV2BW(genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
int bw_tbslbrm = get_bw_tbslbrm(BWPSize, mac->cg);
dlsch_config_pdu_1_1->tbslbrm = nr_compute_tbslbrm(dlsch_config_pdu_1_1->mcs_table, dlsch_config_pdu_1_1->tbslbrm = nr_compute_tbslbrm(dlsch_config_pdu_1_1->mcs_table,
bw_tbslbrm, bw_tbslbrm,
nl_tbslbrm); nl_tbslbrm);
......
...@@ -310,7 +310,6 @@ uint32_t schedule_control_sib1(module_id_t module_id, ...@@ -310,7 +310,6 @@ uint32_t schedule_control_sib1(module_id_t module_id,
} }
gNB_mac->sched_ctrlCommon->pdsch_semi_static.time_domain_allocation = time_domain_allocation; gNB_mac->sched_ctrlCommon->pdsch_semi_static.time_domain_allocation = time_domain_allocation;
gNB_mac->sched_ctrlCommon->pdsch_semi_static.mcsTableIdx = 0;
gNB_mac->sched_ctrlCommon->sched_pdsch.mcs = 0; // starting from mcs 0 gNB_mac->sched_ctrlCommon->sched_pdsch.mcs = 0; // starting from mcs 0
gNB_mac->sched_ctrlCommon->num_total_bytes = num_total_bytes; gNB_mac->sched_ctrlCommon->num_total_bytes = num_total_bytes;
...@@ -347,6 +346,7 @@ uint32_t schedule_control_sib1(module_id_t module_id, ...@@ -347,6 +346,7 @@ uint32_t schedule_control_sib1(module_id_t module_id,
uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData * 6; uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData * 6;
uint16_t dmrs_length = get_num_dmrs(dlDmrsSymbPos); uint16_t dmrs_length = get_num_dmrs(dlDmrsSymbPos);
LOG_D(MAC,"dlDmrsSymbPos %x\n",dlDmrsSymbPos); LOG_D(MAC,"dlDmrsSymbPos %x\n",dlDmrsSymbPos);
int mcsTableIdx = 0;
int rbSize = 0; int rbSize = 0;
uint32_t TBS = 0; uint32_t TBS = 0;
do { do {
...@@ -358,8 +358,8 @@ uint32_t schedule_control_sib1(module_id_t module_id, ...@@ -358,8 +358,8 @@ uint32_t schedule_control_sib1(module_id_t module_id,
else else
break; break;
} }
TBS = nr_compute_tbs(nr_get_Qm_dl(gNB_mac->sched_ctrlCommon->sched_pdsch.mcs, gNB_mac->sched_ctrlCommon->pdsch_semi_static.mcsTableIdx), TBS = nr_compute_tbs(nr_get_Qm_dl(gNB_mac->sched_ctrlCommon->sched_pdsch.mcs, mcsTableIdx),
nr_get_code_rate_dl(gNB_mac->sched_ctrlCommon->sched_pdsch.mcs, gNB_mac->sched_ctrlCommon->pdsch_semi_static.mcsTableIdx), nr_get_code_rate_dl(gNB_mac->sched_ctrlCommon->sched_pdsch.mcs, mcsTableIdx),
rbSize, nrOfSymbols, N_PRB_DMRS * dmrs_length,0, 0,1) >> 3; rbSize, nrOfSymbols, N_PRB_DMRS * dmrs_length,0, 0,1) >> 3;
} while (TBS < gNB_mac->sched_ctrlCommon->num_total_bytes); } while (TBS < gNB_mac->sched_ctrlCommon->num_total_bytes);
...@@ -401,7 +401,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, ...@@ -401,7 +401,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
gNB_MAC_INST *gNB_mac = RC.nrmac[Mod_idP]; gNB_MAC_INST *gNB_mac = RC.nrmac[Mod_idP];
NR_COMMON_channels_t *cc = gNB_mac->common_channels; NR_COMMON_channels_t *cc = gNB_mac->common_channels;
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
int mcsTableIdx = 0;
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
memset((void*)dl_tti_pdcch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t)); memset((void*)dl_tti_pdcch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t));
dl_tti_pdcch_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE; dl_tti_pdcch_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE;
...@@ -410,7 +410,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, ...@@ -410,7 +410,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15; nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
nr_configure_pdcch(pdcch_pdu_rel15, nr_configure_pdcch(pdcch_pdu_rel15,
gNB_mac->sched_ctrlCommon->coreset, gNB_mac->sched_ctrlCommon->coreset,
NULL, true, // sib1
&gNB_mac->sched_ctrlCommon->sched_pdcch); &gNB_mac->sched_ctrlCommon->sched_pdcch);
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
...@@ -452,9 +452,9 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, ...@@ -452,9 +452,9 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
pdsch_pdu_rel15->rbSize = gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize; pdsch_pdu_rel15->rbSize = gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize;
pdsch_pdu_rel15->VRBtoPRBMapping = 0; pdsch_pdu_rel15->VRBtoPRBMapping = 0;
pdsch_pdu_rel15->qamModOrder[0] = nr_get_Qm_dl(gNB_mac->sched_ctrlCommon->sched_pdsch.mcs, pdsch_pdu_rel15->qamModOrder[0] = nr_get_Qm_dl(gNB_mac->sched_ctrlCommon->sched_pdsch.mcs,
gNB_mac->sched_ctrlCommon->pdsch_semi_static.mcsTableIdx); mcsTableIdx);
pdsch_pdu_rel15->TBSize[0] = TBS; pdsch_pdu_rel15->TBSize[0] = TBS;
pdsch_pdu_rel15->mcsTable[0] = gNB_mac->sched_ctrlCommon->pdsch_semi_static.mcsTableIdx; pdsch_pdu_rel15->mcsTable[0] = mcsTableIdx;
pdsch_pdu_rel15->StartSymbolIndex = StartSymbolIndex; pdsch_pdu_rel15->StartSymbolIndex = StartSymbolIndex;
pdsch_pdu_rel15->NrOfSymbols = NrOfSymbols; pdsch_pdu_rel15->NrOfSymbols = NrOfSymbols;
pdsch_pdu_rel15->dlDmrsSymbPos = dlDmrsSymbPos; pdsch_pdu_rel15->dlDmrsSymbPos = dlDmrsSymbPos;
...@@ -503,6 +503,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, ...@@ -503,6 +503,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
int rnti_type = NR_RNTI_SI; int rnti_type = NR_RNTI_SI;
fill_dci_pdu_rel15(scc, fill_dci_pdu_rel15(scc,
NULL,
NULL, NULL,
&pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci - 1], &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci - 1],
&dci_payload, &dci_payload,
...@@ -510,7 +511,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP, ...@@ -510,7 +511,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
rnti_type, rnti_type,
pdsch_pdu_rel15->BWPSize, pdsch_pdu_rel15->BWPSize,
0, 0,
0, gNB_mac->sched_ctrlCommon->coreset,
gNB_mac->cset0_bwp_size); gNB_mac->cset0_bwp_size);
LOG_D(MAC,"BWPSize: %i\n", pdcch_pdu_rel15->BWPSize); LOG_D(MAC,"BWPSize: %i\n", pdcch_pdu_rel15->BWPSize);
......
...@@ -195,17 +195,18 @@ void nr_preprocessor_phytest(module_id_t module_id, ...@@ -195,17 +195,18 @@ void nr_preprocessor_phytest(module_id_t module_id,
NR_UE_info_t *UE = RC.nrmac[module_id]->UE_info.list[0]; NR_UE_info_t *UE = RC.nrmac[module_id]->UE_info.list[0];
NR_ServingCellConfigCommon_t *scc = RC.nrmac[module_id]->common_channels[0].ServingCellConfigCommon; NR_ServingCellConfigCommon_t *scc = RC.nrmac[module_id]->common_channels[0].ServingCellConfigCommon;
NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl; NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
NR_UE_DL_BWP_t *dl_bwp = &UE->current_DL_BWP;
const int CC_id = 0; const int CC_id = 0;
const int tda = get_dl_tda(RC.nrmac[module_id], scc, slot); const int tda = get_dl_tda(RC.nrmac[module_id], scc, slot);
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static; NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
ps->nrOfLayers = target_dl_Nl; ps->nrOfLayers = target_dl_Nl;
if (ps->time_domain_allocation != tda || ps->nrOfLayers != target_dl_Nl) if (ps->time_domain_allocation != tda || ps->nrOfLayers != target_dl_Nl)
nr_set_pdsch_semi_static(NULL, scc, UE->CellGroup, sched_ctrl->active_bwp, NULL, tda, target_dl_Nl,sched_ctrl , ps); nr_set_pdsch_semi_static(dl_bwp, scc, tda, target_dl_Nl,sched_ctrl , ps);
/* find largest unallocated chunk */ /* find largest unallocated chunk */
const int bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); const int bwpSize = dl_bwp->BWPSize;
const int BWPStart = NRRIV2PRBOFFSET(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); const int BWPStart = dl_bwp->BWPStart;
int rbStart = 0; int rbStart = 0;
int rbSize = 0; int rbSize = 0;
...@@ -278,7 +279,7 @@ void nr_preprocessor_phytest(module_id_t module_id, ...@@ -278,7 +279,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
__func__, __func__,
UE->rnti); UE->rnti);
int r_pucch = nr_get_pucch_resource(sched_ctrl->coreset, sched_ctrl->active_ubwp, NULL, CCEIndex); int r_pucch = nr_get_pucch_resource(sched_ctrl->coreset, UE->current_UL_BWP.pucch_Config, CCEIndex);
const int alloc = nr_acknack_scheduling(module_id, UE, frame, slot, r_pucch, 0); const int alloc = nr_acknack_scheduling(module_id, UE, frame, slot, r_pucch, 0);
if (alloc < 0) { if (alloc < 0) {
LOG_D(MAC, LOG_D(MAC,
...@@ -308,9 +309,9 @@ void nr_preprocessor_phytest(module_id_t module_id, ...@@ -308,9 +309,9 @@ void nr_preprocessor_phytest(module_id_t module_id,
sched_pdsch->rbSize = rbSize; sched_pdsch->rbSize = rbSize;
sched_pdsch->mcs = target_dl_mcs; sched_pdsch->mcs = target_dl_mcs;
sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, dl_bwp->mcsTableIdx);
sched_pdsch->R = nr_get_code_rate_dl(sched_pdsch->mcs, dl_bwp->mcsTableIdx);
sched_ctrl->dl_bler_stats.mcs = target_dl_mcs; /* for logging output */ sched_ctrl->dl_bler_stats.mcs = target_dl_mcs; /* for logging output */
sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx);
sched_pdsch->R = nr_get_code_rate_dl(sched_pdsch->mcs, ps->mcsTableIdx);
sched_pdsch->tb_size = nr_compute_tbs(sched_pdsch->Qm, sched_pdsch->tb_size = nr_compute_tbs(sched_pdsch->Qm,
sched_pdsch->R, sched_pdsch->R,
sched_pdsch->rbSize, sched_pdsch->rbSize,
...@@ -340,7 +341,6 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ ...@@ -340,7 +341,6 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
gNB_MAC_INST *nr_mac = RC.nrmac[module_id]; gNB_MAC_INST *nr_mac = RC.nrmac[module_id];
NR_COMMON_channels_t *cc = nr_mac->common_channels; NR_COMMON_channels_t *cc = nr_mac->common_channels;
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
const int mu = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing;
NR_UE_info_t *UE = nr_mac->UE_info.list[0]; NR_UE_info_t *UE = nr_mac->UE_info.list[0];
AssertFatal(nr_mac->UE_info.list[1] == NULL, AssertFatal(nr_mac->UE_info.list[1] == NULL,
...@@ -351,9 +351,10 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ ...@@ -351,9 +351,10 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
const int CC_id = 0; const int CC_id = 0;
NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl; NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
NR_UE_UL_BWP_t *ul_bwp = &UE->current_UL_BWP;
const int mu = ul_bwp->scs;
const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = ul_bwp->tdaList;
sched_ctrl->active_ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
const int temp_tda = get_ul_tda(nr_mac, scc, slot); const int temp_tda = get_ul_tda(nr_mac, scc, slot);
if (temp_tda < 0) if (temp_tda < 0)
return false; return false;
...@@ -361,7 +362,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ ...@@ -361,7 +362,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
"time domain assignment %d >= %d\n", "time domain assignment %d >= %d\n",
temp_tda, temp_tda,
tdaList->list.count); tdaList->list.count);
int K2 = get_K2(scc,NULL,sched_ctrl->active_ubwp, temp_tda, mu); int K2 = get_K2(ul_bwp->tdaList, temp_tda, mu);
const int sched_frame = frame + (slot + K2 >= nr_slots_per_frame[mu]); const int sched_frame = frame + (slot + K2 >= nr_slots_per_frame[mu]);
const int sched_slot = (slot + K2) % nr_slots_per_frame[mu]; const int sched_slot = (slot + K2) % nr_slots_per_frame[mu];
const int tda = get_ul_tda(nr_mac, scc, sched_slot); const int tda = get_ul_tda(nr_mac, scc, sched_slot);
...@@ -377,33 +378,19 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ ...@@ -377,33 +378,19 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
if (!is_xlsch_in_slot(ulsch_slot_bitmap, sched_slot)) if (!is_xlsch_in_slot(ulsch_slot_bitmap, sched_slot))
return false; return false;
const long f = (sched_ctrl->active_bwp && sched_ctrl->search_space &&
sched_ctrl->search_space->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_ue_Specific) ?
sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0;
const int dci_format = f ? NR_UL_DCI_FORMAT_0_1 : NR_UL_DCI_FORMAT_0_0;
uint8_t num_dmrs_cdm_grps_no_data = 1;
if ((target_ul_Nl==4)||(target_ul_Nl==3))
num_dmrs_cdm_grps_no_data = 2;
/* we want to avoid a lengthy deduction of DMRS and other parameters in /* we want to avoid a lengthy deduction of DMRS and other parameters in
* every TTI if we can save it, so check whether dci_format, TDA, or * every TTI if we can save it, so check whether TDA, or
* num_dmrs_cdm_grps_no_data has changed and only then recompute */ * num_dmrs_cdm_grps_no_data has changed and only then recompute */
NR_pusch_semi_static_t *ps = &sched_ctrl->pusch_semi_static; NR_pusch_semi_static_t *ps = &sched_ctrl->pusch_semi_static;
if (ps->time_domain_allocation != tda if (ps->time_domain_allocation != tda
|| ps->dci_format != dci_format || ps->nrOfLayers != target_ul_Nl)
|| ps->nrOfLayers != target_ul_Nl nr_set_pusch_semi_static(ul_bwp, scc, tda, target_ul_Nl,ps);
|| ps->num_dmrs_cdm_grps_no_data != num_dmrs_cdm_grps_no_data)
nr_set_pusch_semi_static(NULL, scc, sched_ctrl->active_ubwp, NULL,dci_format, tda, num_dmrs_cdm_grps_no_data,target_ul_Nl,ps);
uint16_t rbStart = 0; uint16_t rbStart = 0;
uint16_t rbSize; uint16_t rbSize;
const int bw = NRRIV2BW(sched_ctrl->active_ubwp ? const int bw = ul_bwp->BWPSize;
sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth : const int BWPStart = ul_bwp->BWPStart;
scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
const int BWPStart = NRRIV2PRBOFFSET(sched_ctrl->active_ubwp ?
sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth :
scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
if (target_ul_bw>bw) if (target_ul_bw>bw)
rbSize = bw; rbSize = bw;
...@@ -466,10 +453,10 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ ...@@ -466,10 +453,10 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
/* Calculate TBS from MCS */ /* Calculate TBS from MCS */
ps->nrOfLayers = target_ul_Nl; ps->nrOfLayers = target_ul_Nl;
sched_pusch->R = nr_get_code_rate_ul(mcs, ps->mcs_table); sched_pusch->R = nr_get_code_rate_ul(mcs, ul_bwp->mcs_table);
sched_pusch->Qm = nr_get_Qm_ul(mcs, ps->mcs_table); sched_pusch->Qm = nr_get_Qm_ul(mcs, ul_bwp->mcs_table);
if (ps->pusch_Config->tp_pi2BPSK if (ul_bwp->pusch_Config->tp_pi2BPSK
&& ((ps->mcs_table == 3 && mcs < 2) || (ps->mcs_table == 4 && mcs < 6))) { && ((ul_bwp->mcs_table == 3 && mcs < 2) || (ul_bwp->mcs_table == 4 && mcs < 6))) {
sched_pusch->R >>= 1; sched_pusch->R >>= 1;
sched_pusch->Qm <<= 1; sched_pusch->Qm <<= 1;
} }
......
...@@ -36,20 +36,13 @@ extern RAN_CONTEXT_t RC; ...@@ -36,20 +36,13 @@ extern RAN_CONTEXT_t RC;
void nr_configure_srs(nfapi_nr_srs_pdu_t *srs_pdu, int module_id, int CC_id,NR_UE_info_t* UE, NR_SRS_Resource_t *srs_resource) { void nr_configure_srs(nfapi_nr_srs_pdu_t *srs_pdu, int module_id, int CC_id,NR_UE_info_t* UE, NR_SRS_Resource_t *srs_resource) {
gNB_MAC_INST *nrmac = RC.nrmac[module_id]; NR_UE_UL_BWP_t *current_BWP = &UE->current_UL_BWP;
NR_ServingCellConfigCommon_t *scc = nrmac->common_channels[CC_id].ServingCellConfigCommon;
NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
const NR_SIB1_t *sib1 = nrmac->common_channels[0].sib1 ? nrmac->common_channels[0].sib1->message.choice.c1->choice.systemInformationBlockType1 : NULL;
const NR_BWP_t *genericParameters = get_ul_bwp_genericParameters(sched_ctrl->active_ubwp,
scc,
sib1);
srs_pdu->rnti = UE->rnti; srs_pdu->rnti = UE->rnti;
srs_pdu->handle = 0; srs_pdu->handle = 0;
srs_pdu->bwp_size = NRRIV2BW(genericParameters->locationAndBandwidth, MAX_BWP_SIZE);; srs_pdu->bwp_size = current_BWP->BWPSize;
srs_pdu->bwp_start = NRRIV2PRBOFFSET(genericParameters->locationAndBandwidth, MAX_BWP_SIZE);; srs_pdu->bwp_start = current_BWP->BWPStart;
srs_pdu->subcarrier_spacing = genericParameters->subcarrierSpacing; srs_pdu->subcarrier_spacing = current_BWP->scs;
srs_pdu->cyclic_prefix = 0; srs_pdu->cyclic_prefix = 0;
srs_pdu->num_ant_ports = srs_resource->nrofSRS_Ports; srs_pdu->num_ant_ports = srs_resource->nrofSRS_Ports;
srs_pdu->num_symbols = srs_resource->resourceMapping.nrofSymbols; srs_pdu->num_symbols = srs_resource->resourceMapping.nrofSymbols;
...@@ -115,9 +108,8 @@ void nr_schedule_srs(int module_id, frame_t frame) { ...@@ -115,9 +108,8 @@ void nr_schedule_srs(int module_id, frame_t frame) {
UE_iterator(UE_info->list, UE) { UE_iterator(UE_info->list, UE) {
const int CC_id = 0; const int CC_id = 0;
NR_ServingCellConfigCommon_t *scc = RC.nrmac[module_id]->common_channels[CC_id].ServingCellConfigCommon;
NR_CellGroupConfig_t *cg = UE->CellGroup;
NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl; NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
NR_UE_UL_BWP_t *current_BWP = &UE->current_UL_BWP;
sched_ctrl->sched_srs.frame = -1; sched_ctrl->sched_srs.frame = -1;
sched_ctrl->sched_srs.slot = -1; sched_ctrl->sched_srs.slot = -1;
...@@ -128,23 +120,9 @@ void nr_schedule_srs(int module_id, frame_t frame) { ...@@ -128,23 +120,9 @@ void nr_schedule_srs(int module_id, frame_t frame) {
continue; continue;
} }
NR_SRS_Config_t *srs_config = NULL; NR_SRS_Config_t *srs_config = current_BWP->srs_Config;
if (sched_ctrl->active_ubwp) { if (!srs_config)
if (sched_ctrl->active_ubwp->bwp_Dedicated &&
sched_ctrl->active_ubwp->bwp_Dedicated->srs_Config) {
srs_config = sched_ctrl->active_ubwp->bwp_Dedicated->srs_Config->choice.setup;
}
} else if (cg &&
cg->spCellConfig &&
cg->spCellConfig->spCellConfigDedicated &&
cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP) {
srs_config = cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->srs_Config->choice.setup;
}
if (!srs_config) {
continue; continue;
}
for(int rs = 0; rs < srs_config->srs_ResourceSetToAddModList->list.count; rs++) { for(int rs = 0; rs < srs_config->srs_ResourceSetToAddModList->list.count; rs++) {
...@@ -172,15 +150,9 @@ void nr_schedule_srs(int module_id, frame_t frame) { ...@@ -172,15 +150,9 @@ void nr_schedule_srs(int module_id, frame_t frame) {
continue; continue;
} }
const NR_SIB1_t *sib1 = nrmac->common_channels[0].sib1 ? nrmac->common_channels[0].sib1->message.choice.c1->choice.systemInformationBlockType1 : NULL;
const NR_BWP_t *genericParameters = get_ul_bwp_genericParameters(sched_ctrl->active_ubwp,
scc,
sib1);
uint16_t period = srs_period[srs_resource->resourceType.choice.periodic->periodicityAndOffset_p.present]; uint16_t period = srs_period[srs_resource->resourceType.choice.periodic->periodicityAndOffset_p.present];
uint16_t offset = get_nr_srs_offset(srs_resource->resourceType.choice.periodic->periodicityAndOffset_p); uint16_t offset = get_nr_srs_offset(srs_resource->resourceType.choice.periodic->periodicityAndOffset_p);
int n_slots_frame = nr_slots_per_frame[current_BWP->scs];
const int n_slots_frame = nr_slots_per_frame[genericParameters->subcarrierSpacing];
// Check if UE will transmit the SRS in this frame // Check if UE will transmit the SRS in this frame
if ( ((frame - offset/n_slots_frame)*n_slots_frame)%period == 0) { if ( ((frame - offset/n_slots_frame)*n_slots_frame)%period == 0) {
......
...@@ -38,8 +38,6 @@ void set_cset_offset(uint16_t); ...@@ -38,8 +38,6 @@ void set_cset_offset(uint16_t);
void mac_top_init_gNB(void); void mac_top_init_gNB(void);
void process_CellGroup(NR_CellGroupConfig_t *CellGroup, NR_UE_sched_ctrl_t *sched_ctrl);
void config_common(int Mod_idP, void config_common(int Mod_idP,
int pdsch_AntennaPorts, int pdsch_AntennaPorts,
int pusch_AntennaPorts, int pusch_AntennaPorts,
...@@ -132,7 +130,6 @@ int nr_allocate_CCEs(int module_idP, int CC_idP, frame_t frameP, sub_frame_t slo ...@@ -132,7 +130,6 @@ int nr_allocate_CCEs(int module_idP, int CC_idP, frame_t frameP, sub_frame_t slo
void nr_get_Msg3alloc(module_id_t module_id, void nr_get_Msg3alloc(module_id_t module_id,
int CC_id, int CC_id,
NR_ServingCellConfigCommon_t *scc, NR_ServingCellConfigCommon_t *scc,
NR_BWP_Uplink_t *ubwp,
sub_frame_t current_subframe, sub_frame_t current_subframe,
frame_t current_frame, frame_t current_frame,
NR_RA_t *ra, NR_RA_t *ra,
...@@ -190,16 +187,12 @@ void handle_nr_uci_pucch_2_3_4(module_id_t mod_id, ...@@ -190,16 +187,12 @@ void handle_nr_uci_pucch_2_3_4(module_id_t mod_id,
void config_uldci(const NR_SIB1_t *sib1, void config_uldci(const NR_SIB1_t *sib1,
const NR_BWP_Uplink_t *ubwp,
const NR_BWP_UplinkDedicated_t *ubwpd,
const NR_ServingCellConfigCommon_t *scc, const NR_ServingCellConfigCommon_t *scc,
const nfapi_nr_pusch_pdu_t *pusch_pdu, const nfapi_nr_pusch_pdu_t *pusch_pdu,
dci_pdu_rel15_t *dci_pdu_rel15, dci_pdu_rel15_t *dci_pdu_rel15,
int dci_format,
int time_domain_assignment, int time_domain_assignment,
uint8_t tpc, uint8_t tpc,
int n_ubwp, NR_UE_UL_BWP_t *ul_bwp);
int bwp_id);
void nr_schedule_pucch(gNB_MAC_INST *nrmac, void nr_schedule_pucch(gNB_MAC_INST *nrmac,
frame_t frameP, frame_t frameP,
...@@ -223,9 +216,8 @@ int nr_acknack_scheduling(int Mod_idP, ...@@ -223,9 +216,8 @@ int nr_acknack_scheduling(int Mod_idP,
int r_pucch, int r_pucch,
int do_common); int do_common);
void get_pdsch_to_harq_feedback(NR_UE_info_t *, void get_pdsch_to_harq_feedback(NR_PUCCH_Config_t *pucch_Config,
int bwp_id, nr_dci_format_t dci_format,
NR_SearchSpace__searchSpaceType_PR ss_type,
int *max_fb_time, int *max_fb_time,
uint8_t *pdsch_to_harq_feedback); uint8_t *pdsch_to_harq_feedback);
...@@ -249,17 +241,12 @@ int nr_is_dci_opportunity(nfapi_nr_search_space_t search_space, ...@@ -249,17 +241,12 @@ int nr_is_dci_opportunity(nfapi_nr_search_space_t search_space,
*/ */
int nr_get_pucch_resource(NR_ControlResourceSet_t *coreset, int nr_get_pucch_resource(NR_ControlResourceSet_t *coreset,
NR_BWP_Uplink_t *bwp, NR_PUCCH_Config_t *pucch_Config,
NR_BWP_UplinkDedicated_t *bwpd,
int CCEIndex); int CCEIndex);
void nr_configure_pucch(const NR_SIB1_t *sib1, void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
nfapi_nr_pucch_pdu_t* pucch_pdu,
NR_ServingCellConfigCommon_t *scc, NR_ServingCellConfigCommon_t *scc,
NR_CellGroupConfig_t *CellGroup, NR_UE_info_t* UE,
NR_BWP_Uplink_t *bwp,
NR_BWP_UplinkDedicated_t *bwpd,
uint16_t rnti,
uint8_t pucch_resource, uint8_t pucch_resource,
uint16_t O_csi, uint16_t O_csi,
uint16_t O_ack, uint16_t O_ack,
...@@ -272,7 +259,7 @@ void find_search_space(int ss_type, ...@@ -272,7 +259,7 @@ void find_search_space(int ss_type,
void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu, void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu,
NR_ControlResourceSet_t *coreset, NR_ControlResourceSet_t *coreset,
NR_BWP_t *bwp, bool is_sib1,
NR_sched_pdcch_t *pdcch); NR_sched_pdcch_t *pdcch);
NR_sched_pdcch_t set_pdcch_structure(gNB_MAC_INST *gNB_mac, NR_sched_pdcch_t set_pdcch_structure(gNB_MAC_INST *gNB_mac,
...@@ -298,19 +285,21 @@ void fill_pdcch_vrb_map(gNB_MAC_INST *mac, ...@@ -298,19 +285,21 @@ void fill_pdcch_vrb_map(gNB_MAC_INST *mac,
void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc, void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
const NR_CellGroupConfig_t *CellGroup, const NR_CellGroupConfig_t *CellGroup,
const NR_UE_DL_BWP_t *dl_bwp,
nfapi_nr_dl_dci_pdu_t *pdcch_dci_pdu, nfapi_nr_dl_dci_pdu_t *pdcch_dci_pdu,
dci_pdu_rel15_t *dci_pdu_rel15, dci_pdu_rel15_t *dci_pdu_rel15,
int dci_formats, int dci_formats,
int rnti_types, int rnti_types,
int N_RB, int N_RB,
int bwp_id, int bwp_id,
NR_ControlResourceSetId_t coreset_id, NR_ControlResourceSet_t *coreset,
uint16_t cset0_bwp_size); uint16_t cset0_bwp_size);
void prepare_dci(const NR_CellGroupConfig_t *CellGroup, void prepare_dci(const NR_CellGroupConfig_t *CellGroup,
const NR_UE_DL_BWP_t *dl_bwp,
const NR_ControlResourceSet_t *coreset,
dci_pdu_rel15_t *dci_pdu_rel15, dci_pdu_rel15_t *dci_pdu_rel15,
nr_dci_format_t format, nr_dci_format_t format);
int bwp_id);
void set_r_pucch_parms(int rsetindex, void set_r_pucch_parms(int rsetindex,
int r_pucch, int r_pucch,
...@@ -320,18 +309,6 @@ void set_r_pucch_parms(int rsetindex, ...@@ -320,18 +309,6 @@ void set_r_pucch_parms(int rsetindex,
int *nr_of_symbols, int *nr_of_symbols,
int *start_symbol_index); int *start_symbol_index);
NR_BWP_t *get_dl_bwp_genericParameters(NR_BWP_Downlink_t *active_bwp,
NR_ServingCellConfigCommon_t *ServingCellConfigCommon,
const NR_SIB1_t *sib1);
NR_BWP_t *get_ul_bwp_genericParameters(NR_BWP_Uplink_t *active_ubwp,
NR_ServingCellConfigCommon_t *ServingCellConfigCommon,
const NR_SIB1_t *sib1);
NR_PDSCH_TimeDomainResourceAllocationList_t *get_pdsch_TimeDomainAllocationList(const NR_BWP_Downlink_t *active_bwp,
const NR_ServingCellConfigCommon_t *ServingCellConfigCommon,
const NR_SIB1_t *sib1);
/* find coreset within the search space */ /* find coreset within the search space */
NR_ControlResourceSet_t *get_coreset(gNB_MAC_INST *nrmac, NR_ControlResourceSet_t *get_coreset(gNB_MAC_INST *nrmac,
NR_ServingCellConfigCommon_t *scc, NR_ServingCellConfigCommon_t *scc,
...@@ -340,34 +317,24 @@ NR_ControlResourceSet_t *get_coreset(gNB_MAC_INST *nrmac, ...@@ -340,34 +317,24 @@ NR_ControlResourceSet_t *get_coreset(gNB_MAC_INST *nrmac,
NR_SearchSpace__searchSpaceType_PR ss_type); NR_SearchSpace__searchSpaceType_PR ss_type);
/* find a search space within a BWP */ /* find a search space within a BWP */
NR_SearchSpace_t *get_searchspace(const NR_SIB1_t *sib1, NR_SearchSpace_t *get_searchspace(NR_ServingCellConfigCommon_t *scc,
NR_ServingCellConfigCommon_t *scc,
NR_BWP_DownlinkDedicated_t *bwp_Dedicated, NR_BWP_DownlinkDedicated_t *bwp_Dedicated,
NR_SearchSpace__searchSpaceType_PR target_ss); NR_SearchSpace__searchSpaceType_PR target_ss);
long get_K2(NR_ServingCellConfigCommon_t *scc, long get_K2(NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList,
NR_ServingCellConfigCommonSIB_t *scc_sib1,
NR_BWP_Uplink_t *ubwp,
int time_domain_assignment, int time_domain_assignment,
int mu); int mu);
void nr_set_pdsch_semi_static(const NR_SIB1_t *sib1, void nr_set_pdsch_semi_static(const NR_UE_DL_BWP_t *dl_bwp,
const NR_ServingCellConfigCommon_t *scc, const NR_ServingCellConfigCommon_t *scc,
const NR_CellGroupConfig_t *secondaryCellGroup,
const NR_BWP_Downlink_t *bwp,
const NR_BWP_DownlinkDedicated_t *bwpd0,
int tda, int tda,
uint8_t layers, uint8_t layers,
NR_UE_sched_ctrl_t *sched_ctrl, NR_UE_sched_ctrl_t *sched_ctrl,
NR_pdsch_semi_static_t *ps); NR_pdsch_semi_static_t *ps);
void nr_set_pusch_semi_static(const NR_SIB1_t *sib1, void nr_set_pusch_semi_static(const NR_UE_UL_BWP_t *ul_bwp,
const NR_ServingCellConfigCommon_t *scc, const NR_ServingCellConfigCommon_t *scc,
const NR_BWP_Uplink_t *ubwp,
const NR_BWP_UplinkDedicated_t *ubwpd,
long dci_format,
int tda, int tda,
uint8_t num_dmrs_cdm_grps_no_data,
uint8_t nrOfLayers, uint8_t nrOfLayers,
NR_pusch_semi_static_t *ps); NR_pusch_semi_static_t *ps);
...@@ -402,7 +369,13 @@ NR_UE_info_t * find_nr_UE(NR_UEs_t* UEs, rnti_t rntiP); ...@@ -402,7 +369,13 @@ NR_UE_info_t * find_nr_UE(NR_UEs_t* UEs, rnti_t rntiP);
int find_nr_RA_id(module_id_t mod_idP, int CC_idP, rnti_t rntiP); int find_nr_RA_id(module_id_t mod_idP, int CC_idP, rnti_t rntiP);
NR_UE_info_t*add_new_nr_ue(gNB_MAC_INST *nr_mac, rnti_t rntiP, NR_CellGroupConfig_t *CellGroup); void configure_UE_BWP(gNB_MAC_INST *nr_mac,
NR_ServingCellConfigCommon_t *scc,
NR_UE_sched_ctrl_t *sched_ctrl,
NR_RA_t *ra,
NR_UE_info_t *UE);
NR_UE_info_t* add_new_nr_ue(gNB_MAC_INST *nr_mac, rnti_t rntiP, NR_CellGroupConfig_t *CellGroup);
void mac_remove_nr_ue(gNB_MAC_INST *nr_mac, rnti_t rnti); void mac_remove_nr_ue(gNB_MAC_INST *nr_mac, rnti_t rnti);
...@@ -499,7 +472,6 @@ uint8_t get_mcs_from_cqi(int mcs_table, int cqi_table, int cqi_idx); ...@@ -499,7 +472,6 @@ uint8_t get_mcs_from_cqi(int mcs_table, int cqi_table, int cqi_idx);
uint8_t set_dl_nrOfLayers(NR_UE_sched_ctrl_t *sched_ctrl); uint8_t set_dl_nrOfLayers(NR_UE_sched_ctrl_t *sched_ctrl);
int get_dci_format(NR_UE_sched_ctrl_t *sched_ctrl);
const int get_dl_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot); const int get_dl_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot);
const int get_ul_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot); const int get_ul_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int slot);
......
...@@ -90,6 +90,37 @@ typedef struct { ...@@ -90,6 +90,37 @@ typedef struct {
int len; int len;
} NR_list_t; } NR_list_t;
typedef struct NR_UE_DL_BWP {
NR_BWP_Id_t bwp_id;
int n_dl_bwp;
int scs;
long *cyclicprefix;
uint16_t BWPSize;
uint16_t BWPStart;
NR_PDSCH_TimeDomainResourceAllocationList_t *tdaList;
NR_PDSCH_Config_t *pdsch_Config;
NR_PDSCH_ServingCellConfig_t *pdsch_servingcellconfig;
uint8_t mcsTableIdx;
nr_dci_format_t dci_format;
} NR_UE_DL_BWP_t;
typedef struct NR_UE_UL_BWP {
NR_BWP_Id_t bwp_id;
int n_ul_bwp;
int scs;
long *cyclicprefix;
uint16_t BWPSize;
uint16_t BWPStart;
NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList;
NR_PUSCH_Config_t *pusch_Config;
NR_PUCCH_Config_t *pucch_Config;
NR_PUCCH_ConfigCommon_t *pucch_ConfigCommon;
NR_CSI_MeasConfig_t *csi_MeasConfig;
NR_SRS_Config_t *srs_Config;
uint8_t transform_precoding;
uint8_t mcs_table;
nr_dci_format_t dci_format;
} NR_UE_UL_BWP_t;
typedef enum { typedef enum {
RA_IDLE = 0, RA_IDLE = 0,
...@@ -123,10 +154,6 @@ typedef struct NR_sched_pdcch { ...@@ -123,10 +154,6 @@ typedef struct NR_sched_pdcch {
typedef struct { typedef struct {
/// Flag to indicate this process is active /// Flag to indicate this process is active
RA_gNB_state_t state; RA_gNB_state_t state;
/// DL BWP id of RA process
int dl_bwp_id;
/// UL BWP id of RA process
int ul_bwp_id;
/// CORESET0 configured flag /// CORESET0 configured flag
int coreset0_configured; int coreset0_configured;
/// Slot where preamble was received /// Slot where preamble was received
...@@ -198,6 +225,9 @@ typedef struct { ...@@ -198,6 +225,9 @@ typedef struct {
rnti_t crnti; rnti_t crnti;
/// CFRA flag /// CFRA flag
bool cfra; bool cfra;
// BWP for RA
NR_UE_DL_BWP_t DL_BWP;
NR_UE_UL_BWP_t UL_BWP;
} NR_RA_t; } NR_RA_t;
/*! \brief gNB common channels */ /*! \brief gNB common channels */
...@@ -345,18 +375,11 @@ typedef struct NR_sched_pucch { ...@@ -345,18 +375,11 @@ typedef struct NR_sched_pucch {
* recalculate all S/L, MCS table, or DMRS-related parameters over and over * recalculate all S/L, MCS table, or DMRS-related parameters over and over
* again. Hence, we store them in this struct for easy reference. */ * again. Hence, we store them in this struct for easy reference. */
typedef struct NR_pusch_semi_static_t { typedef struct NR_pusch_semi_static_t {
int dci_format;
int time_domain_allocation; int time_domain_allocation;
uint8_t nrOfLayers; uint8_t nrOfLayers;
uint8_t num_dmrs_cdm_grps_no_data; uint8_t num_dmrs_cdm_grps_no_data;
int startSymbolIndex; int startSymbolIndex;
int nrOfSymbols; int nrOfSymbols;
NR_PUSCH_Config_t *pusch_Config;
uint8_t transform_precoding;
uint8_t mcs_table;
long mapping_type; long mapping_type;
NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig; NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig;
uint16_t dmrs_config_type; uint16_t dmrs_config_type;
...@@ -408,7 +431,6 @@ typedef struct NR_pdsch_semi_static { ...@@ -408,7 +431,6 @@ typedef struct NR_pdsch_semi_static {
int startSymbolIndex; int startSymbolIndex;
int nrOfSymbols; int nrOfSymbols;
uint8_t nrOfLayers; uint8_t nrOfLayers;
uint8_t mcsTableIdx;
uint8_t dmrs_ports_id; uint8_t dmrs_ports_id;
uint8_t N_PRB_DMRS; uint8_t N_PRB_DMRS;
uint8_t N_DMRS_SLOT; uint8_t N_DMRS_SLOT;
...@@ -534,11 +556,6 @@ typedef struct NR_UE_ul_harq { ...@@ -534,11 +556,6 @@ typedef struct NR_UE_ul_harq {
/*! \brief scheduling control information set through an API */ /*! \brief scheduling control information set through an API */
#define MAX_CSI_REPORTS 48 #define MAX_CSI_REPORTS 48
typedef struct { typedef struct {
/// the currently active BWP in DL
NR_BWP_Downlink_t *active_bwp;
/// the currently active BWP in UL
NR_BWP_Uplink_t *active_ubwp;
/// the next active BWP ID in DL /// the next active BWP ID in DL
NR_BWP_Id_t next_dl_bwp_id; NR_BWP_Id_t next_dl_bwp_id;
/// the next active BWP ID in UL /// the next active BWP ID in UL
...@@ -553,8 +570,6 @@ typedef struct { ...@@ -553,8 +570,6 @@ typedef struct {
/// corresponding to the sched_pusch/sched_pdsch structures below /// corresponding to the sched_pusch/sched_pdsch structures below
int cce_index; int cce_index;
uint8_t aggregation_level; uint8_t aggregation_level;
/// maximum aggregation level for UE, can be used to select level
int maxL;
/// PUCCH scheduling information. Array of two: HARQ+SR in the first field, /// PUCCH scheduling information. Array of two: HARQ+SR in the first field,
/// CSI in second. This order is important for nr_acknack_scheduling()! /// CSI in second. This order is important for nr_acknack_scheduling()!
NR_sched_pucch_t sched_pucch[2]; NR_sched_pucch_t sched_pucch[2];
...@@ -676,12 +691,12 @@ typedef struct { ...@@ -676,12 +691,12 @@ typedef struct {
/// scheduling control info /// scheduling control info
nr_csi_report_t csi_report_template[MAX_CSI_REPORTCONFIG]; nr_csi_report_t csi_report_template[MAX_CSI_REPORTCONFIG];
NR_UE_sched_ctrl_t UE_sched_ctrl; NR_UE_sched_ctrl_t UE_sched_ctrl;
NR_UE_DL_BWP_t current_DL_BWP;
NR_UE_UL_BWP_t current_UL_BWP;
NR_mac_stats_t mac_stats; NR_mac_stats_t mac_stats;
NR_CellGroupConfig_t *CellGroup; NR_CellGroupConfig_t *CellGroup;
char cg_buf[32768]; /* arbitrary size */ char cg_buf[32768]; /* arbitrary size */
asn_enc_rval_t enc_rval; asn_enc_rval_t enc_rval;
/// CCE indexing
int m;
// UE selected beam index // UE selected beam index
uint8_t UE_beam_index; uint8_t UE_beam_index;
bool Msg3_dcch_dtch; bool Msg3_dcch_dtch;
......
...@@ -306,10 +306,10 @@ uint8_t do_MIB_NR(gNB_RRC_INST *rrc,uint32_t frame) { ...@@ -306,10 +306,10 @@ uint8_t do_MIB_NR(gNB_RRC_INST *rrc,uint32_t frame) {
return((enc_rval.encoded+7)/8); return((enc_rval.encoded+7)/8);
} }
uint16_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier, gNB_RrcConfigurationReq *configuration) { uint16_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier,
gNB_RrcConfigurationReq *configuration) {
asn_enc_rval_t enc_rval; asn_enc_rval_t enc_rval;
NR_BCCH_DL_SCH_Message_t *sib1_message = CALLOC(1,sizeof(NR_BCCH_DL_SCH_Message_t)); NR_BCCH_DL_SCH_Message_t *sib1_message = CALLOC(1,sizeof(NR_BCCH_DL_SCH_Message_t));
carrier->siblock1 = sib1_message; carrier->siblock1 = sib1_message;
sib1_message->message.present = NR_BCCH_DL_SCH_MessageType_PR_c1; sib1_message->message.present = NR_BCCH_DL_SCH_MessageType_PR_c1;
......
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