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wangwenhui
OpenXG-RAN
Commits
f9b49d1a
Commit
f9b49d1a
authored
4 years ago
by
vr.devendra
Committed by
Rigiel Antony
4 years ago
Browse files
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GlobalEdge: CSI and TCI related MAC CE intial commit
parent
45daaedb
develop
1
128-ues
256_QAM_demod
NCTU_OpinConnect_LDPC
NR-PHY-MAC-IF-multi-UE
NR_10MHz
NR_CSI_reporting
NR_DCI_01
NR_DLUL_PF
NR_DLUL_PF_rebased
NR_DL_sched_fixes
NR_DL_scheduler
NR_FAPI_beamindex_SSB_RO
NR_FR2_RA
NR_FR2_RRC_SSB
NR_MAC_CE_GlobalEdge
NR_MAC_Multi_Rach_GlobalEdge
NR_MAC_SSB_RO_GlobalEdge
NR_MAC_SSB_RO_UE_IDCC
NR_MAC_SSB_RO_merge
NR_MAC_TCI_UCI_GlobalEdge
NR_NGAP
NR_PUCCH_MultiUE
NR_RA_updates
NR_RRCConfiguration_FR2
NR_RRC_PDCP
NR_RRC_X2AP_AMBR_Change_Global_edge
NR_RRC_config_simplified
NR_SA_F1AP_dev
NR_SA_NGAP_RRC
NR_SA_NGAP_RRC_wk42
NR_SA_itti_sim_wk48
NR_SA_itti_sim_wk48_hs
NR_SA_itti_sim_wk48_hs1
NR_SCHED_HARQ
NR_SCHED_PDCCH_PUCCH_HARQ
NR_SCHED_PDCCH_PUCCH_HARQ_rebased
NR_SCHED_fixes
NR_SRB_Config
NR_UE_MAC_scheduler
NR_UE_RA_fixes
NR_UE_UL_DCI_improvements
NR_UE_dlsch_bugfix
NR_UE_enable_parallelization
NR_UE_stability_fixes
NR_UL_scheduler
NR_UL_scheduler_rebased
NR_UL_scheduling
NR_beam_simulation
NR_mac_uci_functions_rework
NR_scheduling_CSIRS
NR_scheduling_request
NR_scheduling_request2
NR_ue_dlsch_dmrs_cdm
PUSCH_TA_update
RA_CI_test
UE_DL_DCI_hotfix
bch-fixes-bitmap
benetel_5g_prach_fix
benetel_driver_update
benetel_phase_rotation
benetel_phase_rotation_old
bugfix-minor-remove-wrong-log
bugfix-nr-bands
bugfix-nr-ldpc-post-processing
bugfix-nr-ldpc-size-typo
bugfix-nr-pdcp-sn-size
bugfix-nr-rate-matching-assertion
cce_indexing_fix
cce_indexing_fix2
ci-deploy-asterix
ci-deploy-docker-compose
ci-rd-july-improvements
ci-test
ci-ul-iperf-from-trf-container
cleanup_softmodem_main
constant_power
develop-SnT
develop-oriecpriupdates
develop-sib1
develop-sib1-local
develop-sib1-lts
develop_stable
dfts_alternatives
dlsch-all-dlslots
dlsch_encode_mthread
dlsch_parallel
dongzhanyi-zte-develop
dongzhanyi-zte-develop2
feature/make-s1-mme-port-configurable
feature/make-s1-mme-port-configurable-with-astyle-fixes
fembms-enb-ue
finalize-oaicn-integration
firas
fix-ci-tun
fix-itti-segv
fix-softmodem-restart
fix_NR_DLUL_PF
fix_do_ra_data
fix_pdsch_low_prb
fix_rfsim_mimo
fix_rrc_x2_ticking
fixes-CE-RLC-PDU-size
fixes-mac-sched-nfapi
fixes-mac-sched-tun
fixes-tun
flexran-apps
flexran-repair-mme-mgmt
fujitsu_lte_contribution
fujitsu_lte_contribution-128
gnb-only-test
harq-hotfix
hotfix-minor-remove-nr-rlc-cppcheck-error
hotfix-nr-rlc-tick
hotfix-ocp-executable
improve_nr_modulation
improve_ue_stability
integration_2020_wk40
integration_2020_wk41
integration_2020_wk42_2
integration_2020_wk45
integration_2020_wk45_2
integration_2020_wk46
integration_2020_wk46_2
integration_2020_wk47
integration_2020_wk48
integration_2020_wk48_2
integration_2020_wk49
integration_2020_wk50
integration_2020_wk50_1
integration_2020_wk51
integration_2020_wk51_2
integration_2021_wk02
integration_2021_wk02_wMR988
inter-RRU-final
itti-enhancement
ldpc-decoder-codegen
ldpc-decoder-codegen2
ldpc_short_codeword_fixes
load_gnb
lte_uplink_improvement
mac-fixes-wk45_2
minor-fix-doc-basic-sim
mosaic5g-oai-ran
mosaic5g-oai-sim
nasmesh_kernel_5.8
nfapi_nr_develop
ngap-dlul
ngap-support
ngap-w48-merge2
ngap-wf
ngap-wf-1120
ngap-wf-1120-srb
ngap-wf-1120-srb-gtp
ngap-wf-1120-srb-gtp-hs
ngap-wf-1120-srb-gtp-hs1
ngap-wf-1120-srb-gtp-hs2
ngap-wf-1120-srb-gtp-yhz
ngap-wf-1203-yunsdr
ngap-wf-liuyu
ngap_lfq_1120
ngap_merge
noCore
nr-mac-pdu-wireshark
nr-mac-remove-ue-list
nr-rlc-am-bugfix-w44
nr-rlc-bugfix-w44
nrUE
nrUE-hs
nrUE-upper-layer
nr_bsr
nr_dl_dmrs_type2
nr_dl_pf
nr_dl_pf2
nr_dl_ul_ptrs
nr_fdd_if_fix
nr_polar_decoder_improvement
nr_prach_fr2
nr_ue_msg3
nr_ue_tti_cleanup
nr_ul_pf
nr_ul_scfdma
nrue_msg2_reception
nsa-ue
nsa_remove_band_hardcodings
oai-sim
oairu
oc-docker-october-improvements
openxg/develop
ptrs_rrc_config
pusch-mthread-scaling-fix
pusch-retrans-fix-ue
ra-dl-ul
remove_nos1_hack_pdcp
remove_x2_gnb_hardcoding
repair-TA
revert_memcpy
rh-ci-add-ue-parallelization
rh_ci_fix_autoterminate
rh_ci_fr1_update
rh_ci_oc
rh_ci_py
rh_ci_rfsim_ra
rh_fr1_newjenkins
rh_fr1_update
rh_gnb_compile_fix
rh_wk50_debug
rlc-v2-bugfix-status-reporting
rlc-v2-tick
rrc-enb-phy-testmode
s1-subnormal_rewrite
s1_subnormal
s1_subnormal-robert
s1ap-bugfix-rab_setup
sa-demo
sa-merge-rrc-srb
sa-msg4
sa-msg4-rrc
sa-msg4-rrc-yihz
sa-msg4-rrc-yihz-hs
sa_rrc_yihz
small-bugfixes-w40
small-config-change
smallcleanup
testing_with_external_txdata
tp-ota-test
ue-csi
ue_beam_selection
ul-freq-iq-samps-to-file
ul_dl_dci_same_slot
ul_harq
ulsch_decode_mthread
ulsim_changes
wireshark-log-scheduling-requests
x2-endc-processing
xiangwab
xiangwan
yihongzheng_srb
zzs
2021.w02
2020.w51_2
2020.w51
2020.w50
2020.w49
2020.w48_2
2020.w48
2020.w47
2020.w46_2
2020.w46
2020.w45_2
2020.w45
2020.w44
2020.w42_2
2020.w42
2020.w41
2020.w39
2020.w38
2020.w37
2020.w36
2020.w34
2020.w33
2020.w31
2020.w30
2020.w29
2020.w28
2020.w26
benetel_phase_rotation
No related merge requests found
Changes
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4 changed files
with
476 additions
and
166 deletions
+476
-166
cmake_targets/CMakeLists.txt
cmake_targets/CMakeLists.txt
+1
-0
openair2/LAYER2/NR_MAC_COMMON/nr_mac.h
openair2/LAYER2/NR_MAC_COMMON/nr_mac.h
+114
-54
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+291
-110
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+70
-2
No files found.
cmake_targets/CMakeLists.txt
View file @
f9b49d1a
...
...
@@ -249,6 +249,7 @@ add_boolean_option(UE_AUTOTEST_TRACE False "Activate UE autotest specific logs
add_boolean_option
(
UE_DEBUG_TRACE False
"Activate UE debug trace"
)
add_boolean_option
(
UE_TIMING_TRACE False
"Activate UE timing trace"
)
add_boolean_option
(
DEBUG_CONSOLE False
"makes debugging easier, disables stdout/stderr buffering"
)
add_boolean_option
(
GES_SUPPORT True
"To enable the GES Code"
)
set
(
OCP_ITTI
${
OPENAIR_DIR
}
/common/utils/ocp_itti
)
add_library
(
ITTI
...
...
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Click to expand it.
openair2/LAYER2/NR_MAC_COMMON/nr_mac.h
View file @
f9b49d1a
...
...
@@ -71,72 +71,132 @@
// R: Reserved bit, set to zero.
typedef
struct
{
uint8_t
LCID
:
6
;
// octet 1 [5:0]
uint8_t
F
:
1
;
// octet 1 [6]
uint8_t
R
:
1
;
// octet 1 [7]
uint8_t
L
:
8
;
// octet 2 [7:0]
uint8_t
LCID
:
6
;
// octet 1 [5:0]
uint8_t
F
:
1
;
// octet 1 [6]
uint8_t
R
:
1
;
// octet 1 [7]
uint8_t
L
:
8
;
// octet 2 [7:0]
}
__attribute__
((
__packed__
))
NR_MAC_SUBHEADER_SHORT
;
typedef
struct
{
uint8_t
LCID
:
6
;
// octet 1 [5:0]
uint8_t
F
:
1
;
// octet 1 [6]
uint8_t
R
:
1
;
// octet 1 [7]
uint8_t
L1
:
8
;
// octet 2 [7:0]
uint8_t
L2
:
8
;
// octet 3 [7:0]
uint8_t
LCID
:
6
;
// octet 1 [5:0]
uint8_t
F
:
1
;
// octet 1 [6]
uint8_t
R
:
1
;
// octet 1 [7]
uint8_t
L1
:
8
;
// octet 2 [7:0]
uint8_t
L2
:
8
;
// octet 3 [7:0]
}
__attribute__
((
__packed__
))
NR_MAC_SUBHEADER_LONG
;
typedef
struct
{
uint8_t
LCID
:
6
;
// octet 1 [5:0]
uint8_t
R
:
2
;
// octet 1 [7:6]
uint8_t
LCID
:
6
;
// octet 1 [5:0]
uint8_t
R
:
2
;
// octet 1 [7:6]
}
__attribute__
((
__packed__
))
NR_MAC_SUBHEADER_FIXED
;
// BSR MAC CEs
// TS 38.321 ch. 6.1.3.1
// Short BSR for a specific logical channel group ID
typedef
struct
{
uint8_t
Buffer_size
:
5
;
// octet 1 LSB
uint8_t
LcgID
:
3
;
// octet 1 MSB
uint8_t
Buffer_size
:
5
;
// octet 1 LSB
uint8_t
LcgID
:
3
;
// octet 1 MSB
}
__attribute__
((
__packed__
))
NR_BSR_SHORT
;
typedef
NR_BSR_SHORT
NR_BSR_SHORT_TRUNCATED
;
// Long BSR for all logical channel group ID
typedef
struct
{
uint8_t
Buffer_size7
:
8
;
uint8_t
Buffer_size6
:
8
;
uint8_t
Buffer_size5
:
8
;
uint8_t
Buffer_size4
:
8
;
uint8_t
Buffer_size3
:
8
;
uint8_t
Buffer_size2
:
8
;
uint8_t
Buffer_size1
:
8
;
uint8_t
Buffer_size0
:
8
;
uint8_t
LcgID0
:
1
;
uint8_t
LcgID1
:
1
;
uint8_t
LcgID2
:
1
;
uint8_t
LcgID3
:
1
;
uint8_t
LcgID4
:
1
;
uint8_t
LcgID5
:
1
;
uint8_t
LcgID6
:
1
;
uint8_t
LcgID7
:
1
;
uint8_t
Buffer_size7
:
8
;
uint8_t
Buffer_size6
:
8
;
uint8_t
Buffer_size5
:
8
;
uint8_t
Buffer_size4
:
8
;
uint8_t
Buffer_size3
:
8
;
uint8_t
Buffer_size2
:
8
;
uint8_t
Buffer_size1
:
8
;
uint8_t
Buffer_size0
:
8
;
uint8_t
LcgID0
:
1
;
uint8_t
LcgID1
:
1
;
uint8_t
LcgID2
:
1
;
uint8_t
LcgID3
:
1
;
uint8_t
LcgID4
:
1
;
uint8_t
LcgID5
:
1
;
uint8_t
LcgID6
:
1
;
uint8_t
LcgID7
:
1
;
}
__attribute__
((
__packed__
))
NR_BSR_LONG
;
typedef
NR_BSR_LONG
NR_BSR_LONG_TRUNCATED
;
// 38.321 ch. 6.1.3.4
typedef
struct
{
uint8_t
TA_COMMAND
:
6
;
// octet 1 [5:0]
uint8_t
TAGID
:
2
;
// octet 1 [7:6]
uint8_t
TA_COMMAND
:
6
;
// octet 1 [5:0]
uint8_t
TAGID
:
2
;
// octet 1 [7:6]
}
__attribute__
((
__packed__
))
NR_MAC_CE_TA
;
// single Entry PHR MAC CE
// TS 38.321 ch. 6.1.3.8
typedef
struct
{
uint8_t
PH
:
6
;
uint8_t
R1
:
2
;
uint8_t
PCMAX
:
6
;
uint8_t
R2
:
6
;
uint8_t
PH
:
6
;
uint8_t
R1
:
2
;
uint8_t
PCMAX
:
6
;
uint8_t
R2
:
6
;
}
__attribute__
((
__packed__
))
NR_SINGLE_ENTRY_PHR_MAC_CE
;
#ifdef GES_SUPPORT
// SP ZP CSI-RS Resource Set Activation/Deactivation MAC CE
// 38.321 ch. 6.1.3.19
typedef
struct
{
uint8_t
BWPID
:
2
;
// octet 1 [1:0]
uint8_t
CELLID
:
5
;
// octet 1 [6:2]
uint8_t
A_D
:
1
;
// octet 1 [7]
uint8_t
CSIRS_RSC_ID
:
4
;
// octet 2 [3:0]
uint8_t
R
:
4
// octet 2 [7:4]
}
__attribute__
((
__packed__
))
NR_MAC_CE_SP_ZP_CSI_RS_RES_SET
;
//TS 38.321 Sec 6.1.3.15, TCI State indicaton for UE-Specific PDCCH MAC CE
typedef
struct
{
uint8_t
CoresetId1
:
3
;
//Octect 1 [2:0]
uint8_t
ServingCellId
:
5
;
//Octect 1 [7:3]
uint8_t
TciStateId
:
7
;
//Octect 2 [6:0]
uint8_t
CoresetId2
:
1
;
//Octect 2 [7]
}
__attribute__
((
__packed__
))
NR_TCI_PDCCH
;
//TS 38.321 Sec 6.1.3.14, TCI State activation/deactivation for UE Specific PDSCH MAC CE
typedef
struct
{
uint8_t
BWP_Id
:
2
;
//Octect 1 [1:0]
uint8_t
ServingCellId
:
5
;
//Octect 1 [6:2]
uint8_t
R
:
1
;
//Octect 1 [7]
uint8_t
T
[];
//Octects 2 to MAX TCI States/8
}
__attribute__
((
__packed__
))
NR_TCI_PDSCH_APERIODIC_CSI
;
//TS 6.1.3.16, SP CSI reporting on PUCCH Activation/Deactivation MAC CE
typedef
struct
{
uint8_t
BWP_Id
:
2
;
//Octect 1 [1:0]
uint8_t
ServingCellId
:
5
;
//Octect 1 [6:2]
uint8_t
R1
:
1
;
//Octect 1 [7]
uint8_t
S0
:
1
;
//Octect 2 [0]
uint8_t
S1
:
1
;
//Octect 2 [1]
uint8_t
S2
:
1
;
//Octect 2 [2]
uint8_t
S3
:
1
;
//Octect 2 [3]
uint8_t
R2
:
4
;
//Octect 2 [7:4]
}
__attribute__
((
__packed__
))
NR_PUCCH_CSI_REPORTING
;
//TS 38.321 sec 6.1.3.12
//SP CSI-RS / CSI-IM Resource Set Activation/Deactivation MAC CE
typedef
struct
{
uint8_t
BWP_ID
:
2
;
uint8_t
SCID
:
5
;
uint8_t
A_D
:
1
;
uint8_t
SP_CSI_RSID
:
6
;
uint8_t
IM
:
1
;
uint8_t
R1
:
1
;
uint8_t
SP_CSI_IMID
:
6
;
uint8_t
R2
:
2
;
struct
TCI_S
{
uint8_t
TCI_STATE_ID
:
6
;
uint8_t
R
:
2
;
}
__attribute__
((
__packed__
))
TCI_STATE
;
}
__attribute__
((
__packed__
))
CSI_RS_CSI_IM_ACT_DEACT_MAC_CE
;
#endif
//* RAR MAC subheader // TS 38.321 ch. 6.1.5, 6.2.2 *//
// - E: The Extension field is a flag indicating if the MAC subPDU including this MAC subheader is the last MAC subPDU or not in the MAC PDU
// - T: The Type field is a flag indicating whether the MAC subheader contains a Random Access Preamble ID or a Backoff Indicator (0, BI) (1, RAPID)
...
...
@@ -146,30 +206,30 @@ typedef struct {
/*!\brief RAR MAC subheader with RAPID */
typedef
struct
{
uint8_t
RAPID
:
6
;
uint8_t
T
:
1
;
uint8_t
E
:
1
;
uint8_t
RAPID
:
6
;
uint8_t
T
:
1
;
uint8_t
E
:
1
;
}
__attribute__
((
__packed__
))
NR_RA_HEADER_RAPID
;
/*!\brief RAR MAC subheader with Backoff Indicator */
typedef
struct
{
uint8_t
BI
:
4
;
uint8_t
R
:
2
;
uint8_t
T
:
1
;
uint8_t
E
:
1
;
uint8_t
BI
:
4
;
uint8_t
R
:
2
;
uint8_t
T
:
1
;
uint8_t
E
:
1
;
}
__attribute__
((
__packed__
))
NR_RA_HEADER_BI
;
// TS 38.321 ch. 6.2.3
typedef
struct
{
uint8_t
TA1
:
7
;
// octet 1 [6:0]
uint8_t
R
:
1
;
// octet 1 [7]
uint8_t
UL_GRANT_1
:
3
;
// octet 2 [2:0]
uint8_t
TA2
:
5
;
// octet 2 [7:3]
uint8_t
UL_GRANT_2
:
8
;
// octet 3 [7:0]
uint8_t
UL_GRANT_3
:
8
;
// octet 4 [7:0]
uint8_t
UL_GRANT_4
:
8
;
// octet 5 [7:0]
uint8_t
TCRNTI_1
:
8
;
// octet 6 [7:0]
uint8_t
TCRNTI_2
:
8
;
// octet 7 [7:0]
uint8_t
TA1
:
7
;
// octet 1 [6:0]
uint8_t
R
:
1
;
// octet 1 [7]
uint8_t
UL_GRANT_1
:
3
;
// octet 2 [2:0]
uint8_t
TA2
:
5
;
// octet 2 [7:3]
uint8_t
UL_GRANT_2
:
8
;
// octet 3 [7:0]
uint8_t
UL_GRANT_3
:
8
;
// octet 4 [7:0]
uint8_t
UL_GRANT_4
:
8
;
// octet 5 [7:0]
uint8_t
TCRNTI_1
:
8
;
// octet 6 [7:0]
uint8_t
TCRNTI_2
:
8
;
// octet 7 [7:0]
}
__attribute__
((
__packed__
))
NR_MAC_RAR
;
// 38.321 ch6.2.1, 38.331
...
...
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openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
View file @
f9b49d1a
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openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
View file @
f9b49d1a
...
...
@@ -179,6 +179,71 @@ typedef struct {
uint8_t
num_sf_allocation_pattern
;
}
NR_COMMON_channels_t
;
// SP ZP CSI-RS Resource Set Activation/Deactivation MAC CE
typedef
struct
sp_zp_csirs
{
bool
is_scheduled
;
//ZP CSI-RS ACT/Deact MAC CE is scheduled
bool
act_deact
;
//Activation/Deactivation indication
uint8_t
serv_cell_id
;
//Identity of Serving cell for which MAC CE applies
uint8_t
bwpid
;
//Downlink BWP id
uint8_t
rsc_id
;
//SP ZP CSI-RS resource set
}
sp_zp_csirs_t
;
//SP CSI-RS / CSI-IM Resource Set Activation/Deactivation MAC CE
#define MAX_CSI_RESOURCE_SET 64
typedef
struct
csi_rs_im
{
bool
is_scheduled
;
bool
act_deact
;
uint8_t
serv_cellid
;
uint8_t
bwp_id
;
bool
im
;
uint8_t
csi_im_rsc_id
;
uint8_t
nzp_csi_rsc_id
;
uint8_t
nb_tci_resource_set_id
;
uint8_t
tci_state_id
[
MAX_CSI_RESOURCE_SET
];
}
csi_rs_im_t
;
typedef
struct
pdcchStateInd
{
bool
is_scheduled
;
uint8_t
servingCellId
;
uint8_t
coresetId
;
uint8_t
tciStateId
;
}
pdcchStateInd_t
;
typedef
struct
SPCSIReportingpucch
{
bool
is_scheduled
;
uint8_t
servingCellId
;
uint8_t
bwpId
;
bool
s0tos3_actDeact
[
4
];
}
SPCSIReportingpucch_t
;
#define MAX_APERIODIC_TRIGGER_STATES 128 //38.331
typedef
struct
aperiodicCSI_triggerStateSelection
{
bool
is_scheduled
;
uint8_t
servingCellId
;
uint8_t
bwpId
;
uint8_t
highestTriggerStateSelected
;
bool
triggerStateSelection
[
MAX_APERIODIC_TRIGGER_STATES
];
}
aperiodicCSI_triggerStateSelection_t
;
#define MAX_TCI_STATES 128 //38.331
typedef
struct
pdschTciStatesActDeact
{
bool
is_scheduled
;
uint8_t
servingCellId
;
uint8_t
bwpId
;
uint8_t
highestTciStateActivated
;
bool
tciStateActDeact
[
MAX_TCI_STATES
];
}
pdschTciStatesActDeact_t
;
typedef
struct
UE_info
{
sp_zp_csirs_t
sp_zp_csi_rs
;
csi_rs_im_t
csi_im
;
pdcchStateInd_t
pdcch_state_ind
;
SPCSIReportingpucch_t
SP_CSI_reporting_pucch
;
aperiodicCSI_triggerStateSelection_t
aperi_CSI_trigger
;
pdschTciStatesActDeact_t
pdsch_TCI_States_ActDeact
;
}
NR_UE_mac_ce_ctrl_t
;
typedef
struct
NR_sched_pucch
{
int
frame
;
int
ul_slot
;
...
...
@@ -188,6 +253,7 @@ typedef struct NR_sched_pucch {
struct
NR_sched_pucch
*
next_sched_pucch
;
}
NR_sched_pucch
;
/*! \brief scheduling control information set through an API */
typedef
struct
{
uint64_t
dlsch_in_slot_bitmap
;
// static bitmap signaling which slot in a tdd period contains dlsch
...
...
@@ -195,6 +261,8 @@ typedef struct {
NR_sched_pucch
*
sched_pucch
;
uint16_t
ta_timer
;
int16_t
ta_update
;
int
dummy
;
NR_UE_mac_ce_ctrl_t
UE_mac_ce_ctrl
;
// MAC CE related information
}
NR_UE_sched_ctrl_t
;
/*! \brief UE list used by gNB to order UEs/CC for scheduling*/
...
...
@@ -213,7 +281,7 @@ typedef struct {
NR_CellGroupConfig_t
*
secondaryCellGroup
[
MAX_MOBILES_PER_GNB
];
}
NR_UE_list_t
;
/*! \brief top level
g
NB MAC structure */
/*! \brief top level
e
NB MAC structure */
typedef
struct
gNB_MAC_INST_s
{
/// Ethernet parameters for northbound midhaul interface
eth_params_t
eth_params_n
;
...
...
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