Commit 8dac3a46 authored by Florian Kaltenberger's avatar Florian Kaltenberger

Merge remote-tracking branch 'origin/NR_RRCConfiguration' into NR_RRC_PUSCH

parents 9624fb01 1ce8540d
...@@ -512,7 +512,8 @@ const char* eurecomFunctionsNames[] = { ...@@ -512,7 +512,8 @@ const char* eurecomFunctionsNames[] = {
/*NR softmodem signal*/ /*NR softmodem signal*/
"wakeup_txfh", "wakeup_txfh",
"gNB_thread_rxtx0", "gNB_thread_rxtx0",
"gNB_thread_rxtx1" "gNB_thread_rxtx1",
"ru_thread_tx_wait"
}; };
struct vcd_module_s vcd_modules[] = { struct vcd_module_s vcd_modules[] = {
......
...@@ -505,6 +505,7 @@ typedef enum { ...@@ -505,6 +505,7 @@ typedef enum {
VCD_SIGNAL_DUMPER_FUNCTIONS_WAKEUP_TXFH, VCD_SIGNAL_DUMPER_FUNCTIONS_WAKEUP_TXFH,
VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PROC_RXTX0, VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PROC_RXTX0,
VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PROC_RXTX1, VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PROC_RXTX1,
VCD_SIGNAL_DUMPER_FUNCTIONS_RU_TX_WAIT,
VCD_SIGNAL_DUMPER_FUNCTIONS_END VCD_SIGNAL_DUMPER_FUNCTIONS_END
} vcd_signal_dump_functions; } vcd_signal_dump_functions;
......
...@@ -73,7 +73,7 @@ typedef struct { ...@@ -73,7 +73,7 @@ typedef struct {
} T_cache_t; } T_cache_t;
/* number of VCD functions (to be kept up to date! see in T_messages.txt) */ /* number of VCD functions (to be kept up to date! see in T_messages.txt) */
#define VCD_NUM_FUNCTIONS (245) #define VCD_NUM_FUNCTIONS (246)
/* number of VCD variables (to be kept up to date! see in T_messages.txt) */ /* number of VCD variables (to be kept up to date! see in T_messages.txt) */
#define VCD_NUM_VARIABLES (186) #define VCD_NUM_VARIABLES (186)
......
...@@ -3285,3 +3285,8 @@ ID = VCD_FUNCTION_gNB_PROC_RXTX1 ...@@ -3285,3 +3285,8 @@ ID = VCD_FUNCTION_gNB_PROC_RXTX1
GROUP = ALL:VCD:ENB:VCD_FUNCTION GROUP = ALL:VCD:ENB:VCD_FUNCTION
FORMAT = int,value FORMAT = int,value
VCD_NAME = gNB_thread_rxtx1 VCD_NAME = gNB_thread_rxtx1
ID = VCD_FUNCTION_RU_TX_WAIT
DESC = VCD function RU_TX_WAIT
GROUP = ALL:VCD:ENB:VCD_FUNCTION
FORMAT = int,value
VCD_NAME = ru_thread_tx_wait
...@@ -432,11 +432,16 @@ int wakeup_txfh(PHY_VARS_gNB *gNB,gNB_L1_rxtx_proc_t *proc,int frame_tx,int slot ...@@ -432,11 +432,16 @@ int wakeup_txfh(PHY_VARS_gNB *gNB,gNB_L1_rxtx_proc_t *proc,int frame_tx,int slot
// note this should depend on the numerology used by the TX L1 thread, set here for 500us slot time // note this should depend on the numerology used by the TX L1 thread, set here for 500us slot time
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GAIN_CONTROL,1); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GAIN_CONTROL,1);
waitret=wait_on_condition(&proc->mutex_RUs_tx,&proc->cond_RUs,&proc->instance_cnt_RUs,"wakeup_txfh"); AssertFatal((ret = pthread_mutex_lock(&proc->mutex_RUs_tx))==0,"mutex_lock returns %d\n",ret);
AssertFatal(release_thread(&proc->mutex_RUs_tx,&proc->instance_cnt_RUs,"wakeup_txfh")==0, "error releaseing gNB lock on RUs\n"); while (proc->instance_cnt_RUs < 0) {
pthread_cond_wait(&proc->cond_RUs,&proc->mutex_RUs_tx); // this unlocks mutex_rxtx while waiting and then locks it again
}
proc->instance_cnt_RUs = -1;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_UE,proc->instance_cnt_RUs);
AssertFatal((ret = pthread_mutex_unlock(&proc->mutex_RUs_tx))==0,"mutex_unlock returns %d\n",ret);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GAIN_CONTROL,0); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GAIN_CONTROL,0);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_UE,proc->instance_cnt_RUs);
if (waitret == ETIMEDOUT) { if (waitret == ETIMEDOUT) {
LOG_W(PHY,"Dropping TX slot (%d.%d) because FH is blocked more than 1 slot times (500us)\n",frame_tx,slot_tx); LOG_W(PHY,"Dropping TX slot (%d.%d) because FH is blocked more than 1 slot times (500us)\n",frame_tx,slot_tx);
...@@ -474,6 +479,8 @@ int wakeup_txfh(PHY_VARS_gNB *gNB,gNB_L1_rxtx_proc_t *proc,int frame_tx,int slot ...@@ -474,6 +479,8 @@ int wakeup_txfh(PHY_VARS_gNB *gNB,gNB_L1_rxtx_proc_t *proc,int frame_tx,int slot
return(-1); return(-1);
} }
AssertFatal((ret=pthread_mutex_lock(&ru_proc->mutex_gNBs))==0,"mutex_lock returned %d\n",ret);
ru_proc->instance_cnt_gNBs = 0; ru_proc->instance_cnt_gNBs = 0;
ru_proc->timestamp_tx = timestamp_tx; ru_proc->timestamp_tx = timestamp_tx;
ru_proc->tti_tx = slot_tx; ru_proc->tti_tx = slot_tx;
......
...@@ -721,8 +721,9 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) { ...@@ -721,8 +721,9 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
T(T_ENB_PHY_OUTPUT_SIGNAL, T_INT(0), T_INT(0), T_INT(frame), T_INT(slot), T(T_ENB_PHY_OUTPUT_SIGNAL, T_INT(0), T_INT(0), T_INT(frame), T_INT(slot),
T_INT(0), T_BUFFER(&ru->common.txdata[0][slot * fp->samples_per_slot], fp->samples_per_slot * 4)); T_INT(0), T_BUFFER(&ru->common.txdata[0][slot * fp->samples_per_slot], fp->samples_per_slot * 4));
int slot_type = nr_slot_select(cfg,frame,slot); int slot_type = nr_slot_select(cfg,frame,slot%fp->slots_per_frame);
int prevslot_type = nr_slot_select(cfg,frame,(slot+fp->slots_per_frame-1)%fp->slots_per_frame); int prevslot_type = nr_slot_select(cfg,frame,(slot+(fp->slots_per_frame-1))%fp->slots_per_frame);
int nextslot_type = nr_slot_select(cfg,frame,(slot+1)%fp->slots_per_frame);
int sf_extension = 0; //sf_extension = ru->sf_extension; int sf_extension = 0; //sf_extension = ru->sf_extension;
int siglen=fp->samples_per_slot; int siglen=fp->samples_per_slot;
int flags=1; int flags=1;
...@@ -747,7 +748,14 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) { ...@@ -747,7 +748,14 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
prevslot_type == NR_UPLINK_SLOT) { prevslot_type == NR_UPLINK_SLOT) {
flags = 2; // start of burst flags = 2; // start of burst
} }
if (cfg->cell_config.frame_duplex_type.value == TDD &&
slot_type == NR_DOWNLINK_SLOT &&
nextslot_type == NR_UPLINK_SLOT) {
flags = 3; // end of burst
}
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_WRITE_FLAGS, flags );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, frame ); VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, frame );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, slot ); VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, slot );
for (i=0; i<ru->nb_tx; i++) for (i=0; i<ru->nb_tx; i++)
...@@ -1098,6 +1106,18 @@ void fill_rf_config(RU_t *ru, char *rf_config_file) { ...@@ -1098,6 +1106,18 @@ void fill_rf_config(RU_t *ru, char *rf_config_file) {
} else { } else {
AssertFatal(0==1,"N_RB %d not yet supported for numerology %d\n",N_RB,mu); AssertFatal(0==1,"N_RB %d not yet supported for numerology %d\n",N_RB,mu);
} }
} else if (mu == NR_MU_3) {
if (N_RB == 66) {
cfg->sample_rate = 122.88e6;
cfg->samples_per_frame = 1228800;
cfg->tx_bw = 100e6;
cfg->rx_bw = 100e6;
} else if(N_RB == 32) {
cfg->sample_rate=61.44e6;
cfg->samples_per_frame = 614400;
cfg->tx_bw = 50e6;
cfg->rx_bw = 50e6;
}
} else { } else {
AssertFatal(0 == 1,"Numerology %d not supported for the moment\n",mu); AssertFatal(0 == 1,"Numerology %d not supported for the moment\n",mu);
} }
...@@ -1113,8 +1133,14 @@ void fill_rf_config(RU_t *ru, char *rf_config_file) { ...@@ -1113,8 +1133,14 @@ void fill_rf_config(RU_t *ru, char *rf_config_file) {
cfg->rx_num_channels=ru->nb_rx; cfg->rx_num_channels=ru->nb_rx;
for (i=0; i<ru->nb_tx; i++) { for (i=0; i<ru->nb_tx; i++) {
cfg->tx_freq[i] = (double)fp->dl_CarrierFreq; if (ru->if_frequency == 0) {
cfg->rx_freq[i] = (double)fp->ul_CarrierFreq; cfg->tx_freq[i] = (double)fp->dl_CarrierFreq;
cfg->rx_freq[i] = (double)fp->ul_CarrierFreq;
}
else {
cfg->tx_freq[i] = (double)ru->if_frequency;
cfg->rx_freq[i] = (double)(ru->if_frequency+fp->ul_CarrierFreq-fp->dl_CarrierFreq);
}
cfg->tx_gain[i] = ru->att_tx; cfg->tx_gain[i] = ru->att_tx;
cfg->rx_gain[i] = ru->max_rxgain-ru->att_rx; cfg->rx_gain[i] = ru->max_rxgain-ru->att_rx;
cfg->configFilename = rf_config_file; cfg->configFilename = rf_config_file;
...@@ -1244,7 +1270,10 @@ void *ru_thread_tx( void *param ) { ...@@ -1244,7 +1270,10 @@ void *ru_thread_tx( void *param ) {
LOG_D(PHY,"ru_thread_tx: Waiting for TX processing\n"); LOG_D(PHY,"ru_thread_tx: Waiting for TX processing\n");
// wait until eNBs are finished subframe RX n and TX n+4 // wait until eNBs are finished subframe RX n and TX n+4
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_RU_TX_WAIT, 1 );
wait_on_condition(&proc->mutex_gNBs,&proc->cond_gNBs,&proc->instance_cnt_gNBs,"ru_thread_tx"); wait_on_condition(&proc->mutex_gNBs,&proc->cond_gNBs,&proc->instance_cnt_gNBs,"ru_thread_tx");
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_RU_TX_WAIT, 0 );
ret = pthread_mutex_lock(&proc->mutex_gNBs); ret = pthread_mutex_lock(&proc->mutex_gNBs);
AssertFatal(ret == 0,"mutex_lock return %d\n",ret); AssertFatal(ret == 0,"mutex_lock return %d\n",ret);
...@@ -1337,14 +1366,14 @@ void *ru_thread_tx( void *param ) { ...@@ -1337,14 +1366,14 @@ void *ru_thread_tx( void *param ) {
ret = pthread_mutex_lock(&L1_proc->mutex_RUs_tx); ret = pthread_mutex_lock(&L1_proc->mutex_RUs_tx);
AssertFatal(ret == 0,"mutex_lock returns %d\n",ret); AssertFatal(ret == 0,"mutex_lock returns %d\n",ret);
// the thread can now be woken up // the thread can now be woken up
//if (L1_proc->instance_cnt_RUs == -1) { if (L1_proc->instance_cnt_RUs == -1) {
L1_proc->instance_cnt_RUs = 0; L1_proc->instance_cnt_RUs = 0;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_UE,L1_proc->instance_cnt_RUs);
AssertFatal(pthread_cond_signal(&L1_proc->cond_RUs) == 0, AssertFatal(pthread_cond_signal(&L1_proc->cond_RUs) == 0,
"ERROR pthread_cond_signal for gNB_L1_thread\n"); "ERROR pthread_cond_signal for gNB_L1_thread\n");
//} //else AssertFatal(1==0,"gNB TX thread is not ready\n"); } //else AssertFatal(1==0,"gNB TX thread is not ready\n");
ret = pthread_mutex_unlock(&L1_proc->mutex_RUs_tx); ret = pthread_mutex_unlock(&L1_proc->mutex_RUs_tx);
AssertFatal(ret == 0,"mutex_unlock returns %d\n",ret); AssertFatal(ret == 0,"mutex_unlock returns %d\n",ret);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_UE,L1_proc->instance_cnt_RUs);
} }
} }
} }
...@@ -2332,6 +2361,7 @@ void RCconfig_RU(void) ...@@ -2332,6 +2361,7 @@ void RCconfig_RU(void)
RC.ru[j]->nb_rx = *(RUParamList.paramarray[j][RU_NB_RX_IDX].uptr); RC.ru[j]->nb_rx = *(RUParamList.paramarray[j][RU_NB_RX_IDX].uptr);
RC.ru[j]->att_tx = *(RUParamList.paramarray[j][RU_ATT_TX_IDX].uptr); RC.ru[j]->att_tx = *(RUParamList.paramarray[j][RU_ATT_TX_IDX].uptr);
RC.ru[j]->att_rx = *(RUParamList.paramarray[j][RU_ATT_RX_IDX].uptr); RC.ru[j]->att_rx = *(RUParamList.paramarray[j][RU_ATT_RX_IDX].uptr);
RC.ru[j]->if_frequency = *(RUParamList.paramarray[j][RU_IF_FREQUENCY].uptr);
if (config_isparamset(RUParamList.paramarray[j], RU_BF_WEIGHTS_LIST_IDX)) { if (config_isparamset(RUParamList.paramarray[j], RU_BF_WEIGHTS_LIST_IDX)) {
RC.ru[j]->nb_bfw = RUParamList.paramarray[j][RU_BF_WEIGHTS_LIST_IDX].numelt; RC.ru[j]->nb_bfw = RUParamList.paramarray[j][RU_BF_WEIGHTS_LIST_IDX].numelt;
......
...@@ -127,7 +127,7 @@ extern pthread_mutex_t sync_mutex; ...@@ -127,7 +127,7 @@ extern pthread_mutex_t sync_mutex;
extern int sync_var; extern int sync_var;
extern uint32_t downlink_frequency[MAX_NUM_CCs][4]; extern uint64_t downlink_frequency[MAX_NUM_CCs][4];
extern int32_t uplink_frequency_offset[MAX_NUM_CCs][4]; extern int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
extern int rx_input_level_dBm; extern int rx_input_level_dBm;
......
...@@ -113,7 +113,7 @@ int single_thread_flag=1; ...@@ -113,7 +113,7 @@ int single_thread_flag=1;
static int8_t threequarter_fs=0; static int8_t threequarter_fs=0;
uint32_t downlink_frequency[MAX_NUM_CCs][4]; uint64_t downlink_frequency[MAX_NUM_CCs][4];
int32_t uplink_frequency_offset[MAX_NUM_CCs][4]; int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
//Temp fix for inexisting NR upper layer //Temp fix for inexisting NR upper layer
...@@ -679,7 +679,7 @@ void wait_RUs(void) { ...@@ -679,7 +679,7 @@ void wait_RUs(void) {
} }
void wait_gNBs(void) { void wait_gNBs(void) {
int i,j; int i;
int waiting=1; int waiting=1;
while (waiting==1) { while (waiting==1) {
...@@ -855,7 +855,7 @@ void init_pdcp(void) { ...@@ -855,7 +855,7 @@ void init_pdcp(void) {
int main( int argc, char **argv ) int main( int argc, char **argv )
{ {
int i, ru_id, CC_id = 0; int ru_id, CC_id = 0;
start_background_system(); start_background_system();
///static configuration for NR at the moment ///static configuration for NR at the moment
......
...@@ -26,7 +26,7 @@ ...@@ -26,7 +26,7 @@
{"wait-for-sync", NULL, PARAMFLAG_BOOL, iptr:&wait_for_sync, defintval:0, TYPE_INT, 0}, \ {"wait-for-sync", NULL, PARAMFLAG_BOOL, iptr:&wait_for_sync, defintval:0, TYPE_INT, 0}, \
{"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \ {"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \
{"A" , CONFIG_HLP_TADV, 0, uptr:&timing_advance, defintval:0, TYPE_UINT, 0}, \ {"A" , CONFIG_HLP_TADV, 0, uptr:&timing_advance, defintval:0, TYPE_UINT, 0}, \
{"C" , CONFIG_HLP_DLF, 0, uptr:&(downlink_frequency[0][0]), defuintval:DEFAULT_DLF, TYPE_UINT, 0}, \ {"C" , CONFIG_HLP_DLF, 0, u64ptr:&(downlink_frequency[0][0]), defuintval:DEFAULT_DLF, TYPE_UINT64, 0}, \
{"a" , CONFIG_HLP_CHOFF, 0, iptr:&chain_offset, defintval:0, TYPE_INT, 0}, \ {"a" , CONFIG_HLP_CHOFF, 0, iptr:&chain_offset, defintval:0, TYPE_INT, 0}, \
{"d" , CONFIG_HLP_SOFTS, PARAMFLAG_BOOL, uptr:(uint32_t *)&do_forms, defintval:0, TYPE_INT8, 0}, \ {"d" , CONFIG_HLP_SOFTS, PARAMFLAG_BOOL, uptr:(uint32_t *)&do_forms, defintval:0, TYPE_INT8, 0}, \
{"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, i8ptr:&threequarter_fs, defintval:0, TYPE_INT8, 0}, \ {"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, i8ptr:&threequarter_fs, defintval:0, TYPE_INT8, 0}, \
......
...@@ -170,7 +170,6 @@ static void UE_synch(void *arg) { ...@@ -170,7 +170,6 @@ static void UE_synch(void *arg) {
UE->is_synchronized = 0; UE->is_synchronized = 0;
if (UE->UE_scan == 0) { if (UE->UE_scan == 0) {
LOG_I( PHY, "[SCHED][UE] Check absolute frequency DL %"PRIu64", UL %"PRIu64" (oai_exit %d, rx_num_channels %d)\n", LOG_I( PHY, "[SCHED][UE] Check absolute frequency DL %"PRIu64", UL %"PRIu64" (oai_exit %d, rx_num_channels %d)\n",
UE->frame_parms.dl_CarrierFreq, UE->frame_parms.ul_CarrierFreq, UE->frame_parms.dl_CarrierFreq, UE->frame_parms.ul_CarrierFreq,
oai_exit, openair0_cfg[0].rx_num_channels); oai_exit, openair0_cfg[0].rx_num_channels);
...@@ -292,6 +291,12 @@ static void UE_synch(void *arg) { ...@@ -292,6 +291,12 @@ static void UE_synch(void *arg) {
openair0_cfg[UE->rf_map.card].tx_bw=10.0e6; openair0_cfg[UE->rf_map.card].tx_bw=10.0e6;
// openair0_cfg[0].rx_gain[0] -= 0; // openair0_cfg[0].rx_gain[0] -= 0;
break; break;
case 66:
openair0_cfg[UE->rf_map.card].sample_rate=122.88e6;
openair0_cfg[UE->rf_map.card].rx_bw=100.e6;
openair0_cfg[UE->rf_map.card].tx_bw=100.e6;
break;
} }
if (UE->mode != loop_through_memory) { if (UE->mode != loop_through_memory) {
...@@ -383,7 +388,7 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { ...@@ -383,7 +388,7 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
rvidx = 0; rvidx = 0;
//------------------------------------------------------------------------------// //------------------------------------------------------------------------------//
scheduled_response.ul_config->sfn_slot = 8; scheduled_response.ul_config->slot = 8;
scheduled_response.ul_config->number_pdus = 1; scheduled_response.ul_config->number_pdus = 1;
scheduled_response.ul_config->ul_config_list[0].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH; scheduled_response.ul_config->ul_config_list[0].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.rnti = n_rnti; scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.rnti = n_rnti;
...@@ -610,7 +615,6 @@ void *UE_thread(void *arg) { ...@@ -610,7 +615,6 @@ void *UE_thread(void *arg) {
openair0_timestamp timestamp; openair0_timestamp timestamp;
void *rxp[NB_ANTENNAS_RX], *txp[NB_ANTENNAS_TX]; void *rxp[NB_ANTENNAS_RX], *txp[NB_ANTENNAS_TX];
int start_rx_stream = 0; int start_rx_stream = 0;
const uint16_t table_sf_slot[20] = {0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,8,8,9,9};
AssertFatal(0== openair0_device_load(&(UE->rfdevice), &openair0_cfg[0]), ""); AssertFatal(0== openair0_device_load(&(UE->rfdevice), &openair0_cfg[0]), "");
UE->rfdevice.host_type = RAU_HOST; UE->rfdevice.host_type = RAU_HOST;
AssertFatal(UE->rfdevice.trx_start_func(&UE->rfdevice) == 0, "Could not start the device\n"); AssertFatal(UE->rfdevice.trx_start_func(&UE->rfdevice) == 0, "Could not start the device\n");
...@@ -696,7 +700,7 @@ void *UE_thread(void *arg) { ...@@ -696,7 +700,7 @@ void *UE_thread(void *arg) {
curMsg->UE->current_thread_id[slot_nr] = thread_idx; curMsg->UE->current_thread_id[slot_nr] = thread_idx;
curMsg->proc.CC_id = 0; curMsg->proc.CC_id = 0;
curMsg->proc.nr_tti_rx= slot_nr; curMsg->proc.nr_tti_rx= slot_nr;
curMsg->proc.subframe_rx=table_sf_slot[slot_nr]; curMsg->proc.subframe_rx=slot_nr/(nb_slot_frame/10);
curMsg->proc.nr_tti_tx = (absolute_slot + DURATION_RX_TO_TX) % nb_slot_frame; curMsg->proc.nr_tti_tx = (absolute_slot + DURATION_RX_TO_TX) % nb_slot_frame;
curMsg->proc.subframe_tx=curMsg->proc.nr_tti_rx; curMsg->proc.subframe_tx=curMsg->proc.nr_tti_rx;
curMsg->proc.frame_rx = ((absolute_slot/nb_slot_frame)+UE->frame_gap) % MAX_FRAME_NUMBER; curMsg->proc.frame_rx = ((absolute_slot/nb_slot_frame)+UE->frame_gap) % MAX_FRAME_NUMBER;
......
...@@ -122,7 +122,7 @@ static double snr_dB=20; ...@@ -122,7 +122,7 @@ static double snr_dB=20;
int threequarter_fs=0; int threequarter_fs=0;
uint32_t downlink_frequency[MAX_NUM_CCs][4]; uint64_t downlink_frequency[MAX_NUM_CCs][4];
int32_t uplink_frequency_offset[MAX_NUM_CCs][4]; int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
...@@ -517,8 +517,17 @@ void init_openair0(void) { ...@@ -517,8 +517,17 @@ void init_openair0(void) {
for (card=0; card<MAX_CARDS; card++) { for (card=0; card<MAX_CARDS; card++) {
openair0_cfg[card].configFilename = NULL; openair0_cfg[card].configFilename = NULL;
openair0_cfg[card].threequarter_fs = frame_parms[0]->threequarter_fs; openair0_cfg[card].threequarter_fs = frame_parms[0]->threequarter_fs;
numerology = frame_parms[0]->numerology_index;
if(frame_parms[0]->N_RB_DL == 217) { if(frame_parms[0]->N_RB_DL == 66) {
if (numerology==3) {
openair0_cfg[card].sample_rate=122.88e6;
openair0_cfg[card].samples_per_frame = 1228800;
} else {
LOG_E(PHY,"Unsupported numerology! FR2 supports only 120KHz SCS for now.\n");
exit(-1);
}
}else if(frame_parms[0]->N_RB_DL == 217) {
if (numerology==1) { if (numerology==1) {
if (frame_parms[0]->threequarter_fs) { if (frame_parms[0]->threequarter_fs) {
openair0_cfg[card].sample_rate=92.16e6; openair0_cfg[card].sample_rate=92.16e6;
......
...@@ -69,7 +69,7 @@ ...@@ -69,7 +69,7 @@
{"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \ {"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \
{"nr-dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&nr_dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \ {"nr-dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&nr_dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \
{"A" , CONFIG_HLP_TADV, 0, uptr:&timing_advance, defintval:0, TYPE_UINT, 0}, \ {"A" , CONFIG_HLP_TADV, 0, uptr:&timing_advance, defintval:0, TYPE_UINT, 0}, \
{"C" , CONFIG_HLP_DLF, 0, uptr:&(downlink_frequency[0][0]), defuintval:2680000000, TYPE_UINT, 0}, \ {"C" , CONFIG_HLP_DLF, 0, u64ptr:&(downlink_frequency[0][0]), defuintval:2680000000, TYPE_UINT64, 0}, \
{"a" , CONFIG_HLP_CHOFF, 0, iptr:&chain_offset, defintval:0, TYPE_INT, 0}, \ {"a" , CONFIG_HLP_CHOFF, 0, iptr:&chain_offset, defintval:0, TYPE_INT, 0}, \
{"d" , CONFIG_HLP_SOFTS, PARAMFLAG_BOOL, uptr:&do_forms, defintval:0, TYPE_INT, 0}, \ {"d" , CONFIG_HLP_SOFTS, PARAMFLAG_BOOL, uptr:&do_forms, defintval:0, TYPE_INT, 0}, \
{"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, iptr:&threequarter_fs, defintval:0, TYPE_INT, 0}, \ {"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, iptr:&threequarter_fs, defintval:0, TYPE_INT, 0}, \
...@@ -79,7 +79,7 @@ ...@@ -79,7 +79,7 @@
{"S" , CONFIG_HLP_MSLOTS, PARAMFLAG_BOOL, u8ptr:&exit_missed_slots, defintval:1, TYPE_UINT8, 0}, \ {"S" , CONFIG_HLP_MSLOTS, PARAMFLAG_BOOL, u8ptr:&exit_missed_slots, defintval:1, TYPE_UINT8, 0}, \
{"T" , CONFIG_HLP_TDD, PARAMFLAG_BOOL, iptr:&tddflag, defintval:0, TYPE_INT, 0}, \ {"T" , CONFIG_HLP_TDD, PARAMFLAG_BOOL, iptr:&tddflag, defintval:0, TYPE_INT, 0}, \
{"V" , CONFIG_HLP_VCD, PARAMFLAG_BOOL, iptr:&vcdflag, defintval:0, TYPE_INT, 0}, \ {"V" , CONFIG_HLP_VCD, PARAMFLAG_BOOL, iptr:&vcdflag, defintval:0, TYPE_INT, 0}, \
{"numerology" , CONFIG_HLP_NUMEROLOGY, PARAMFLAG_BOOL, iptr:&numerology, defintval:0, TYPE_INT, 0}, \ {"numerology" , CONFIG_HLP_NUMEROLOGY, 0, iptr:&numerology, defintval:0, TYPE_INT, 0}, \
{"emulate-rf" , CONFIG_HLP_EMULATE_RF, PARAMFLAG_BOOL, iptr:&emulate_rf, defintval:0, TYPE_INT, 0}, \ {"emulate-rf" , CONFIG_HLP_EMULATE_RF, PARAMFLAG_BOOL, iptr:&emulate_rf, defintval:0, TYPE_INT, 0}, \
{"parallel-config", CONFIG_HLP_PARALLEL_CMD,0, strptr:(char **)&parallel_config, defstrval:NULL, TYPE_STRING, 0}, \ {"parallel-config", CONFIG_HLP_PARALLEL_CMD,0, strptr:(char **)&parallel_config, defstrval:NULL, TYPE_STRING, 0}, \
{"worker-config", CONFIG_HLP_WORKER_CMD, 0, strptr:(char **)&worker_config, defstrval:NULL, TYPE_STRING, 0}, \ {"worker-config", CONFIG_HLP_WORKER_CMD, 0, strptr:(char **)&worker_config, defstrval:NULL, TYPE_STRING, 0}, \
......
...@@ -979,14 +979,14 @@ void set_default_frame_parms_single(nfapi_nr_config_request_t *config, ...@@ -979,14 +979,14 @@ void set_default_frame_parms_single(nfapi_nr_config_request_t *config,
config->subframe_config.numerology_index_mu.value =1; config->subframe_config.numerology_index_mu.value =1;
config->subframe_config.duplex_mode.value = 1; //FDD config->subframe_config.duplex_mode.value = 1; //FDD
config->subframe_config.dl_cyclic_prefix_type.value = 0; //NORMAL config->subframe_config.dl_cyclic_prefix_type.value = 0; //NORMAL
config->rf_config.dl_carrier_bandwidth.value = 106; config->rf_config.dl_carrier_bandwidth.value = 100;
config->rf_config.ul_carrier_bandwidth.value = 106; config->rf_config.ul_carrier_bandwidth.value = 100;
config->sch_config.physical_cell_id.value = 0; config->sch_config.physical_cell_id.value = 0;
frame_parms->frame_type = FDD; frame_parms->frame_type = FDD;
//frame_parms[CC_id]->tdd_config_S = 0; //frame_parms[CC_id]->tdd_config_S = 0;
frame_parms->N_RB_DL = 100; frame_parms->N_RB_DL = 106;
frame_parms->N_RB_UL = 100; frame_parms->N_RB_UL = 106;
frame_parms->Ncp = NORMAL; frame_parms->Ncp = NORMAL;
//frame_parms[CC_id]->Ncp_UL = NORMAL; //frame_parms[CC_id]->Ncp_UL = NORMAL;
frame_parms->Nid_cell = 0; frame_parms->Nid_cell = 0;
......
...@@ -194,6 +194,22 @@ void set_scs_parameters (NR_DL_FRAME_PARMS *fp, int mu) ...@@ -194,6 +194,22 @@ void set_scs_parameters (NR_DL_FRAME_PARMS *fp, int mu)
fp->subcarrier_spacing = nr_subcarrier_spacing[NR_MU_3]; fp->subcarrier_spacing = nr_subcarrier_spacing[NR_MU_3];
fp->slots_per_subframe = nr_slots_per_subframe[NR_MU_3]; fp->slots_per_subframe = nr_slots_per_subframe[NR_MU_3];
fp->ssb_type = nr_ssb_type_D; fp->ssb_type = nr_ssb_type_D;
switch(fp->N_RB_DL){
case 66:
fp->ofdm_symbol_size = 1024;
fp->first_carrier_offset = 628; //1024 - ( (66*12) / 2 )
fp->nb_prefix_samples0 = 88;
fp->nb_prefix_samples = 72;
break;
case 32:
fp->ofdm_symbol_size = 512;
fp->first_carrier_offset = 320; //1024 - ( (66*12) / 2 )
fp->nb_prefix_samples0 = 44;
fp->nb_prefix_samples = 36;
break;
default:
AssertFatal(1==0,"Number of resource blocks %d undefined for mu %d, frame parms = %p\n", fp->N_RB_DL, mu, fp);
}
break; break;
case NR_MU_4: case NR_MU_4:
......
...@@ -117,8 +117,8 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue, ...@@ -117,8 +117,8 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
return(-1); return(-1);
}*/ }*/
if (Ns<0 || Ns>=20) { if (Ns<0 || Ns>(frame_parms->slots_per_frame-1)) {
printf("slot_fep: Ns must be between 0 and 19\n"); printf("slot_fep: Ns must be between 0 and %d\n",frame_parms->slots_per_frame-1);
return(-1); return(-1);
} }
......
...@@ -226,7 +226,6 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch, ...@@ -226,7 +226,6 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
int16_t amp, int16_t amp,
uint8_t ssb_start_symbol, uint8_t ssb_start_symbol,
uint8_t n_hf, uint8_t n_hf,
uint8_t Lmax,
int sfn, int sfn,
nfapi_nr_config_request_scf_t *config, nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms) { NR_DL_FRAME_PARMS *frame_parms) {
...@@ -244,11 +243,11 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch, ...@@ -244,11 +243,11 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
pbch->pbch_a=0; pbch->pbch_a=0;
uint8_t ssb_index = frame_parms->ssb_index; uint8_t ssb_index = frame_parms->ssb_index;
uint8_t *pbch_pdu = (uint8_t*)&ssb_pdu->ssb_pdu_rel15.bchPayload; uint8_t *pbch_pdu = (uint8_t*)&ssb_pdu->ssb_pdu_rel15.bchPayload;
uint8_t Lmax = frame_parms->Lmax;
for (int i=0; i<NR_PBCH_PDU_BITS; i++) for (int i=0; i<NR_PBCH_PDU_BITS; i++)
pbch->pbch_a |= ((pbch_pdu[i>>3]>>(7-(i&7)))&1)<<i; pbch->pbch_a |= ((pbch_pdu[i>>3]>>(7-(i&7)))&1)<<i;
#ifdef DEBUG_PBCH_ENCODING #ifdef DEBUG_PBCH_ENCODING
for (int i=0; i<3; i++) for (int i=0; i<3; i++)
printf("pbch_pdu[%d]: 0x%02x\n", i, pbch_pdu[i]); printf("pbch_pdu[%d]: 0x%02x\n", i, pbch_pdu[i]);
......
...@@ -92,7 +92,6 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch, ...@@ -92,7 +92,6 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
int16_t amp, int16_t amp,
uint8_t ssb_start_symbol, uint8_t ssb_start_symbol,
uint8_t n_hf, uint8_t n_hf,
uint8_t Lmax,
int sfn, int sfn,
nfapi_nr_config_request_scf_t *config, nfapi_nr_config_request_scf_t *config,
NR_DL_FRAME_PARMS *frame_parms); NR_DL_FRAME_PARMS *frame_parms);
......
...@@ -39,6 +39,7 @@ ...@@ -39,6 +39,7 @@
#include "PHY/phy_extern_nr_ue.h" #include "PHY/phy_extern_nr_ue.h"
#include "PHY/CODING/coding_extern.h" #include "PHY/CODING/coding_extern.h"
#include "PHY/sse_intrin.h" #include "PHY/sse_intrin.h"
#include "PHY/NR_TRANSPORT/nr_dci.h"
#include "assertions.h" #include "assertions.h"
#include "T.h" #include "T.h"
...@@ -725,52 +726,52 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue, ...@@ -725,52 +726,52 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
s, s,
log2_maxh, log2_maxh,
n_rb); // log2_maxh+I0_shift n_rb); // log2_maxh+I0_shift
if (frame_parms->nb_antennas_rx > 1) { if (frame_parms->nb_antennas_rx > 1) {
LOG_DD("we enter pdcch_detection_mrc(frame_parms->nb_antennas_rx=%d)\n", LOG_DD("we enter pdcch_detection_mrc(frame_parms->nb_antennas_rx=%d)\n",
frame_parms->nb_antennas_rx); frame_parms->nb_antennas_rx);
pdcch_detection_mrc(frame_parms, pdcch_vars->rxdataF_comp,s); pdcch_detection_mrc(frame_parms, pdcch_vars->rxdataF_comp,s);
} }
LOG_DD("we enter nr_pdcch_llr(for symbol %d), pdcch_vars[eNB_id]->rxdataF_comp ---> pdcch_vars[eNB_id]->llr \n",s); LOG_DD("we enter nr_pdcch_llr(for symbol %d), pdcch_vars[eNB_id]->rxdataF_comp ---> pdcch_vars[eNB_id]->llr \n",s);
LOG_DD("in nr_pdcch_llr(rxdataF_comp -> llr)\n"); LOG_DD("in nr_pdcch_llr(rxdataF_comp -> llr)\n");
nr_pdcch_llr(frame_parms, nr_pdcch_llr(frame_parms,
pdcch_vars->rxdataF_comp, pdcch_vars->rxdataF_comp,
pdcch_vars->llr, pdcch_vars->llr,
s, s,
n_rb); n_rb);
#if T_TRACER #if T_TRACER
// T(T_UE_PHY_PDCCH_IQ, T_INT(frame_parms->N_RB_DL), T_INT(frame_parms->N_RB_DL), // T(T_UE_PHY_PDCCH_IQ, T_INT(frame_parms->N_RB_DL), T_INT(frame_parms->N_RB_DL),
// T_INT(n_pdcch_symbols), // T_INT(n_pdcch_symbols),
// T_BUFFER(pdcch_vars[eNB_id]->rxdataF_comp, frame_parms->N_RB_DL*12*n_pdcch_symbols* 4)); // T_BUFFER(pdcch_vars[eNB_id]->rxdataF_comp, frame_parms->N_RB_DL*12*n_pdcch_symbols* 4));
#endif #endif
#ifdef DEBUG_DCI_DECODING #ifdef DEBUG_DCI_DECODING
printf("demapping: slot %d, mi %d\n",slot,get_mi(frame_parms,slot)); printf("demapping: slot %d, mi %d\n",slot,get_mi(frame_parms,slot));
#endif #endif
}
LOG_DD("we enter nr_pdcch_demapping_deinterleaving()\n");
nr_pdcch_demapping_deinterleaving((uint32_t *) pdcch_vars->llr,
(uint32_t *) pdcch_vars->e_rx,
frame_parms,
rel15->coreset.duration,
n_rb,
rel15->coreset.RegBundleSize,
rel15->coreset.InterleaverSize,
rel15->coreset.ShiftIndex);
nr_pdcch_unscrambling(rel15->rnti,
frame_parms,
slot,
pdcch_vars->e_rx,
rel15->coreset.duration*n_rb*9*2,
// get_nCCE(n_pdcch_symbols, frame_parms, mi) * 72,
rel15->coreset.pdcch_dmrs_scrambling_id);
LOG_DD("we end nr_pdcch_unscrambling()\n");
LOG_DD("Ending nr_rx_pdcch() function\n");
return (0);
} }
LOG_DD("we enter nr_pdcch_demapping_deinterleaving()\n");
nr_pdcch_demapping_deinterleaving((uint32_t *) pdcch_vars->llr,
(uint32_t *) pdcch_vars->e_rx,
frame_parms,
rel15->coreset.duration,
n_rb,
rel15->coreset.RegBundleSize,
rel15->coreset.InterleaverSize,
rel15->coreset.ShiftIndex);
nr_pdcch_unscrambling(rel15->rnti,
frame_parms,
slot,
pdcch_vars->e_rx,
rel15->coreset.duration*n_rb*9*2,
// get_nCCE(n_pdcch_symbols, frame_parms, mi) * 72,
rel15->coreset.pdcch_dmrs_scrambling_id);
LOG_DD("we end nr_pdcch_unscrambling()\n");
LOG_DD("Ending nr_rx_pdcch() function\n");
}
return (0);
} }
/* /*
int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue, int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
......
...@@ -606,6 +606,8 @@ typedef struct RU_t_s { ...@@ -606,6 +606,8 @@ typedef struct RU_t_s {
int wakeup_L1_sleeptime; int wakeup_L1_sleeptime;
/// maximum number of sleeps /// maximum number of sleeps
int wakeup_L1_sleep_cnt_max; int wakeup_L1_sleep_cnt_max;
/// DL IF frequency in Hz
uint64_t if_frequency;
} RU_t; } RU_t;
......
...@@ -627,8 +627,6 @@ typedef struct PHY_VARS_gNB_s { ...@@ -627,8 +627,6 @@ typedef struct PHY_VARS_gNB_s {
nfapi_nr_ul_dci_request_pdus_t *ul_dci_pdu; nfapi_nr_ul_dci_request_pdus_t *ul_dci_pdu;
nfapi_nr_dl_tti_ssb_pdu ssb_pdu; nfapi_nr_dl_tti_ssb_pdu ssb_pdu;
uint8_t skipped_slots; // for 120kHz SSB transmission
int num_pdsch_rnti; int num_pdsch_rnti;
NR_gNB_PBCH pbch; NR_gNB_PBCH pbch;
nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL]; nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL];
......
...@@ -352,6 +352,7 @@ typedef struct nr_bandentry_s { ...@@ -352,6 +352,7 @@ typedef struct nr_bandentry_s {
uint64_t dl_max; uint64_t dl_max;
uint64_t step_size; uint64_t step_size;
uint64_t N_OFFs_DL; uint64_t N_OFFs_DL;
uint8_t deltaf_raster;
} nr_bandentry_t; } nr_bandentry_t;
typedef struct nr_band_info_s { typedef struct nr_band_info_s {
......
...@@ -48,6 +48,8 @@ ...@@ -48,6 +48,8 @@
#include "intertask_interface.h" #include "intertask_interface.h"
#endif #endif
uint8_t SSB_Table[38]={0,2,4,6,8,10,12,14,254,254,16,18,20,22,24,26,28,30,254,254,32,34,36,38,40,42,44,46,254,254,48,50,52,54,56,58,60,62};
extern uint8_t nfapi_mode; extern uint8_t nfapi_mode;
void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_scf_t *cfg, NR_DL_FRAME_PARMS *fp) { void nr_set_ssb_first_subcarrier(nfapi_nr_config_request_scf_t *cfg, NR_DL_FRAME_PARMS *fp) {
...@@ -65,9 +67,6 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) { ...@@ -65,9 +67,6 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
int txdataF_offset = (slot%2)*fp->samples_per_slot_wCP; int txdataF_offset = (slot%2)*fp->samples_per_slot_wCP;
uint16_t slots_per_hf = (fp->slots_per_frame)>>1; uint16_t slots_per_hf = (fp->slots_per_frame)>>1;
if (slot==0)
gNB->skipped_slots = 0;
n_hf = fp->half_frame_bit; n_hf = fp->half_frame_bit;
// if SSB periodicity is 5ms, they are transmitted in both half frames // if SSB periodicity is 5ms, they are transmitted in both half frames
...@@ -83,39 +82,37 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) { ...@@ -83,39 +82,37 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
LOG_D(PHY,"common_signal_procedures: frame %d, slot %d\n",frame,slot); LOG_D(PHY,"common_signal_procedures: frame %d, slot %d\n",frame,slot);
if ((slot==8) || (slot==9) || (slot==18) || (slot==19) || (slot==28) || (slot==29)) if(rel_slot<38 && rel_slot>=0) { // there is no SSB beyond slot 37
gNB->skipped_slots = gNB->skipped_slots + 1;
else { for (int i=0; i<2; i++) { // max two SSB per frame
if(rel_slot<slots_per_hf && rel_slot>=0) {
for (int i=0; i<2; i++) { // max two SSB per frame
ssb_index = i + ((rel_slot - gNB->skipped_slots)<<1); // computing the ssb_index ssb_index = i + SSB_Table[rel_slot]; // computing the ssb_index
if ((fp->L_ssb >> ssb_index) & 0x01) { // generating the ssb only if the bit of L_ssb at current ssb index is 1
if ((ssb_index<64) && ((fp->L_ssb >> ssb_index) & 0x01)) { // generating the ssb only if the bit of L_ssb at current ssb index is 1
fp->ssb_index = ssb_index;
int ssb_start_symbol_abs = nr_get_ssb_start_symbol(fp); // computing the starting symbol for current ssb fp->ssb_index = ssb_index;
ssb_start_symbol = ssb_start_symbol_abs % fp->symbols_per_slot; // start symbol wrt slot int ssb_start_symbol_abs = nr_get_ssb_start_symbol(fp); // computing the starting symbol for current ssb
ssb_start_symbol = ssb_start_symbol_abs % fp->symbols_per_slot; // start symbol wrt slot
nr_set_ssb_first_subcarrier(cfg, fp); // setting the first subcarrier
nr_set_ssb_first_subcarrier(cfg, fp); // setting the first subcarrier
LOG_D(PHY,"SS TX: frame %d, slot %d, start_symbol %d\n",frame,slot, ssb_start_symbol); LOG_D(PHY,"SS TX: frame %d, slot %d, start_symbol %d\n",frame,slot, ssb_start_symbol);
nr_generate_pss(gNB->d_pss, &txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp); nr_generate_pss(gNB->d_pss, &txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
nr_generate_sss(gNB->d_sss, &txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp); nr_generate_sss(gNB->d_sss, &txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
if (cfg->carrier_config.num_tx_ant.value <= 4) if (cfg->carrier_config.num_tx_ant.value <= 4)
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp); nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
else else
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[0][ssb_index],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp); nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[0][ssb_index&7],&txdataF[0][txdataF_offset], AMP, ssb_start_symbol, cfg, fp);
nr_generate_pbch(&gNB->pbch, nr_generate_pbch(&gNB->pbch,
&gNB->ssb_pdu, &gNB->ssb_pdu,
gNB->nr_pbch_interleaver, gNB->nr_pbch_interleaver,
&txdataF[0][txdataF_offset], &txdataF[0][txdataF_offset],
AMP, AMP,
ssb_start_symbol, ssb_start_symbol,
n_hf,cfg->carrier_config.num_tx_ant.value, n_hf, frame, cfg, fp);
frame, cfg, fp);
}
} }
} }
} }
...@@ -297,6 +294,7 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int ULSCH_ ...@@ -297,6 +294,7 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int ULSCH_
case 106: timing_advance_update /= 16; break; case 106: timing_advance_update /= 16; break;
case 217: timing_advance_update /= 32; break; case 217: timing_advance_update /= 32; break;
case 273: timing_advance_update /= 32; break; case 273: timing_advance_update /= 32; break;
case 66: timing_advance_update /= 12; break;
default: abort(); default: abort();
} }
......
...@@ -128,7 +128,7 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue, ...@@ -128,7 +128,7 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
*/ */
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706) #if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)
extern uint32_t downlink_frequency[MAX_NUM_CCs][4]; extern uint64_t downlink_frequency[MAX_NUM_CCs][4];
#endif #endif
......
...@@ -78,7 +78,7 @@ extern double cpuf; ...@@ -78,7 +78,7 @@ extern double cpuf;
void Msg1_transmitted(module_id_t module_idP, uint8_t CC_id, frame_t frameP, uint8_t eNB_id); void Msg1_transmitted(module_id_t module_idP, uint8_t CC_id, frame_t frameP, uint8_t eNB_id);
void Msg3_transmitted(module_id_t module_idP, uint8_t CC_id, frame_t frameP, uint8_t eNB_id); void Msg3_transmitted(module_id_t module_idP, uint8_t CC_id, frame_t frameP, uint8_t eNB_id);
extern uint32_t downlink_frequency[MAX_NUM_CCs][4]; extern uint64_t downlink_frequency[MAX_NUM_CCs][4];
void get_dumpparam(PHY_VARS_UE *ue, void get_dumpparam(PHY_VARS_UE *ue,
UE_rxtx_proc_t *proc, UE_rxtx_proc_t *proc,
......
...@@ -92,7 +92,7 @@ int main(int argc, char **argv) ...@@ -92,7 +92,7 @@ int main(int argc, char **argv)
//char input_val_str[50],input_val_str2[50]; //char input_val_str[50],input_val_str2[50];
//uint16_t NB_RB=25; //uint16_t NB_RB=25;
SCM_t channel_model = AWGN; //Rayleigh1_anticorr; SCM_t channel_model = AWGN; //Rayleigh1_anticorr;
uint16_t N_RB_DL = 106, mu = 1; uint16_t N_RB_DL = 106, mu = 1;
//unsigned char frame_type = 0; //unsigned char frame_type = 0;
unsigned char pbch_phase = 0; unsigned char pbch_phase = 0;
int frame = 0, slot = 0; int frame = 0, slot = 0;
...@@ -628,7 +628,7 @@ int main(int argc, char **argv) ...@@ -628,7 +628,7 @@ int main(int argc, char **argv)
for (i = 0; i < 2; i++) { for (i = 0; i < 2; i++) {
printf("gNB %d\n", i); printf("gNB %d\n", i);
free_gNB_dlsch(&(gNB->dlsch[0][i])); free_gNB_dlsch(&(gNB->dlsch[0][i]),N_RB_DL);
printf("UE %d\n", i); printf("UE %d\n", i);
free_nr_ue_dlsch(&(UE->dlsch[0][0][i]),N_RB_DL); free_nr_ue_dlsch(&(UE->dlsch[0][0][i]),N_RB_DL);
} }
......
...@@ -202,7 +202,6 @@ int main(int argc, char **argv) ...@@ -202,7 +202,6 @@ int main(int argc, char **argv)
int N_RB_DL=106,mu=1; int N_RB_DL=106,mu=1;
nfapi_nr_dl_tti_pdsch_pdu_rel15_t dlsch_config; nfapi_nr_dl_tti_pdsch_pdu_rel15_t dlsch_config;
//unsigned char frame_type = 0; //unsigned char frame_type = 0;
int frame=0,slot=1; int frame=0,slot=1;
...@@ -233,7 +232,7 @@ int main(int argc, char **argv) ...@@ -233,7 +232,7 @@ int main(int argc, char **argv)
int mcsIndex_set=0,rbStart_set=0,rbSize_set=0; int mcsIndex_set=0,rbStart_set=0,rbSize_set=0;
int print_perf = 0; int print_perf = 0;
while ((c = getopt (argc, argv, "f:hA:pf:g:i:j:n:s:S:t:x:y:z:M:N:F:GR:dPIL:Ea:b:e:")) != -1) { while ((c = getopt (argc, argv, "f:hA:pf:g:i:j:n:s:S:t:x:y:z:M:N:F:GR:dPIL:Ea:b:e:m:")) != -1) {
switch (c) { switch (c) {
/*case 'f': /*case 'f':
write_output_file=1; write_output_file=1;
...@@ -381,6 +380,7 @@ int main(int argc, char **argv) ...@@ -381,6 +380,7 @@ int main(int argc, char **argv)
case 'I': case 'I':
run_initial_sync=1; run_initial_sync=1;
target_error_rate=0.1; target_error_rate=0.1;
slot = 0;
break; break;
case 'L': case 'L':
...@@ -408,6 +408,9 @@ int main(int argc, char **argv) ...@@ -408,6 +408,9 @@ int main(int argc, char **argv)
mcsIndex_set=1; mcsIndex_set=1;
break; break;
case 'm':
mu = atoi(optarg);
break;
default: default:
case 'h': case 'h':
...@@ -546,6 +549,14 @@ int main(int argc, char **argv) ...@@ -546,6 +549,14 @@ int main(int argc, char **argv)
fs = 61.44e6; fs = 61.44e6;
bw = 40e6; bw = 40e6;
} }
else if (mu == 3 && N_RB_DL == 66) {
fs = 122.88e6;
bw = 100e6;
}
else if (mu == 3 && N_RB_DL == 32) {
fs = 61.44e6;
bw = 50e6;
}
else AssertFatal(1==0,"Unsupported numerology for mu %d, N_RB %d\n",mu, N_RB_DL); else AssertFatal(1==0,"Unsupported numerology for mu %d, N_RB %d\n",mu, N_RB_DL);
gNB2UE = new_channel_desc_scm(n_tx, gNB2UE = new_channel_desc_scm(n_tx,
...@@ -619,7 +630,6 @@ int main(int argc, char **argv) ...@@ -619,7 +630,6 @@ int main(int argc, char **argv)
nr_gold_pbch(UE); nr_gold_pbch(UE);
nr_gold_pdcch(UE,0,2); nr_gold_pdcch(UE,0,2);
nr_l2_init_ue(NULL); nr_l2_init_ue(NULL);
UE_mac = get_mac_inst(0); UE_mac = get_mac_inst(0);
...@@ -651,7 +661,6 @@ int main(int argc, char **argv) ...@@ -651,7 +661,6 @@ int main(int argc, char **argv)
if (mcsIndex_set==0) dlsch_config.mcsIndex[0]=9; if (mcsIndex_set==0) dlsch_config.mcsIndex[0]=9;
if (rbSize_set==0) dlsch_config.rbSize=N_RB_DL; if (rbSize_set==0) dlsch_config.rbSize=N_RB_DL;
if (rbStart_set==0) dlsch_config.rbStart=0; if (rbStart_set==0) dlsch_config.rbStart=0;
//Configure UE //Configure UE
......
...@@ -553,7 +553,7 @@ int main(int argc, char **argv) ...@@ -553,7 +553,7 @@ int main(int argc, char **argv)
scheduled_response.ul_config = &ul_config; scheduled_response.ul_config = &ul_config;
scheduled_response.dl_config = NULL; scheduled_response.dl_config = NULL;
ul_config.sfn_slot = slot; ul_config.slot = slot;
ul_config.number_pdus = 1; ul_config.number_pdus = 1;
ul_config.ul_config_list[0].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH; ul_config.ul_config_list[0].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
ul_config.ul_config_list[0].ulsch_config_pdu.rnti = n_rnti; ul_config.ul_config_list[0].ulsch_config_pdu.rnti = n_rnti;
......
...@@ -94,6 +94,7 @@ typedef enum { ...@@ -94,6 +94,7 @@ typedef enum {
#define CONFIG_STRING_RU_END_OF_BURST_DELAY "end_of_burst_delay" #define CONFIG_STRING_RU_END_OF_BURST_DELAY "end_of_burst_delay"
#define CONFIG_STRING_RU_OTA_SYNC_ENABLE "ota_sync_enabled" #define CONFIG_STRING_RU_OTA_SYNC_ENABLE "ota_sync_enabled"
#define CONFIG_STRING_RU_BF_WEIGHTS_LIST "bf_weights" #define CONFIG_STRING_RU_BF_WEIGHTS_LIST "bf_weights"
#define CONFIG_STRING_RU_IF_FREQUENCY "if_freq"
#define RU_LOCAL_IF_NAME_IDX 0 #define RU_LOCAL_IF_NAME_IDX 0
#define RU_LOCAL_ADDRESS_IDX 1 #define RU_LOCAL_ADDRESS_IDX 1
...@@ -120,6 +121,7 @@ typedef enum { ...@@ -120,6 +121,7 @@ typedef enum {
#define RU_END_OF_BURST_DELAY_IDX 22 #define RU_END_OF_BURST_DELAY_IDX 22
#define RU_OTA_SYNC_ENABLE_IDX 23 #define RU_OTA_SYNC_ENABLE_IDX 23
#define RU_BF_WEIGHTS_LIST_IDX 24 #define RU_BF_WEIGHTS_LIST_IDX 24
#define RU_IF_FREQUENCY 25
/*-----------------------------------------------------------------------------------------------------------------------------------------*/ /*-----------------------------------------------------------------------------------------------------------------------------------------*/
/* RU configuration parameters */ /* RU configuration parameters */
...@@ -151,6 +153,7 @@ typedef enum { ...@@ -151,6 +153,7 @@ typedef enum {
{CONFIG_STRING_RU_END_OF_BURST_DELAY, NULL, 0, uptr:NULL, defuintval:400, TYPE_UINT, 0}, \ {CONFIG_STRING_RU_END_OF_BURST_DELAY, NULL, 0, uptr:NULL, defuintval:400, TYPE_UINT, 0}, \
{CONFIG_STRING_RU_OTA_SYNC_ENABLE, NULL, 0, strptr:NULL, defstrval:"no", TYPE_STRING, 0}, \ {CONFIG_STRING_RU_OTA_SYNC_ENABLE, NULL, 0, strptr:NULL, defstrval:"no", TYPE_STRING, 0}, \
{CONFIG_STRING_RU_BF_WEIGHTS_LIST, NULL, 0, iptr:NULL, defintarrayval:DEFBFW, TYPE_INTARRAY, 0}, \ {CONFIG_STRING_RU_BF_WEIGHTS_LIST, NULL, 0, iptr:NULL, defintarrayval:DEFBFW, TYPE_INTARRAY, 0}, \
{CONFIG_STRING_RU_IF_FREQUENCY, NULL, 0, uptr:NULL, defuintval:0, TYPE_UINT64, 0}, \
} }
/*---------------------------------------------------------------------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------------------------------------------------------------------*/
......
...@@ -366,14 +366,14 @@ ...@@ -366,14 +366,14 @@
{GNB_CONFIG_STRING_HOPPINGID, NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->hoppingId,defint64val:40,TYPE_INT64,0},\ {GNB_CONFIG_STRING_HOPPINGID, NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->hoppingId,defint64val:40,TYPE_INT64,0},\
{GNB_CONFIG_STRING_P0NOMINAL, NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->p0_nominal,defint64val:1,TYPE_INT64,0},\ {GNB_CONFIG_STRING_P0NOMINAL, NULL,0,i64ptr:scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->p0_nominal,defint64val:1,TYPE_INT64,0},\
{GNB_CONFIG_STRING_SSBPOSITIONSINBURSTPR,NULL,0,uptr:&scc->ssb_PositionsInBurst->present,defuintval:NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap,TYPE_UINT,0/*139*/}, \ {GNB_CONFIG_STRING_SSBPOSITIONSINBURSTPR,NULL,0,uptr:&scc->ssb_PositionsInBurst->present,defuintval:NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap,TYPE_UINT,0/*139*/}, \
{GNB_CONFIG_STRING_SSBPOSITIONSINBURST,NULL,0,iptr:&ssb_bitmap,defintval:0xff,TYPE_INT,0}, \ {GNB_CONFIG_STRING_SSBPOSITIONSINBURST,NULL,0,u64ptr:&ssb_bitmap,defintval:0xff,TYPE_UINT64,0}, \
{GNB_CONFIG_STRING_REFERENCESUBCARRIERSPACING,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing,defint64val:NR_SubcarrierSpacing_kHz30,TYPE_INT64,0},\ {GNB_CONFIG_STRING_REFERENCESUBCARRIERSPACING,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing,defint64val:NR_SubcarrierSpacing_kHz30,TYPE_INT64,0},\
{GNB_CONFIG_STRING_DLULTRANSMISSIONPERIODICITY,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity,defint64val:NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms0p5,TYPE_INT64,0},\ {GNB_CONFIG_STRING_DLULTRANSMISSIONPERIODICITY,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity,defint64val:NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms0p5,TYPE_INT64,0},\
{GNB_CONFIG_STRING_NROFDOWNLINKSLOTS,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots,defint64val:7,TYPE_INT64,0},\ {GNB_CONFIG_STRING_NROFDOWNLINKSLOTS,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots,defint64val:7,TYPE_INT64,0},\
{GNB_CONFIG_STRING_NROFDOWNLINKSYMBOLS,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols,defint64val:6,TYPE_INT64,0},\ {GNB_CONFIG_STRING_NROFDOWNLINKSYMBOLS,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols,defint64val:6,TYPE_INT64,0},\
{GNB_CONFIG_STRING_NROFUPLINKSLOTS,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots,defint64val:2,TYPE_INT64,0},\ {GNB_CONFIG_STRING_NROFUPLINKSLOTS,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots,defint64val:2,TYPE_INT64,0},\
{GNB_CONFIG_STRING_NROFUPLINKSYMBOLS,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols,defint64val:4,TYPE_INT64,0},\ {GNB_CONFIG_STRING_NROFUPLINKSYMBOLS,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols,defint64val:4,TYPE_INT64,0},\
{GNB_CONFIG_STRING_DLULTRANSMISSIONPERIODICITY2,NULL,0,iptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern2->dl_UL_TransmissionPeriodicity,defintval:-1,TYPE_INT,0},\ {GNB_CONFIG_STRING_DLULTRANSMISSIONPERIODICITY2,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern2->dl_UL_TransmissionPeriodicity,defintval:-1,TYPE_INT64,0},\
{GNB_CONFIG_STRING_NROFDOWNLINKSLOTS2,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSlots,defint64val:-1,TYPE_INT64,0},\ {GNB_CONFIG_STRING_NROFDOWNLINKSLOTS2,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSlots,defint64val:-1,TYPE_INT64,0},\
{GNB_CONFIG_STRING_NROFDOWNLINKSYMBOLS2,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSymbols,defint64val:-1,TYPE_INT64,0},\ {GNB_CONFIG_STRING_NROFDOWNLINKSYMBOLS2,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSymbols,defint64val:-1,TYPE_INT64,0},\
{GNB_CONFIG_STRING_NROFUPLINKSLOTS2,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofUplinkSlots,defint64val:-1,TYPE_INT64,0},\ {GNB_CONFIG_STRING_NROFUPLINKSLOTS2,NULL,0,i64ptr:&scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofUplinkSlots,defint64val:-1,TYPE_INT64,0},\
......
...@@ -79,7 +79,7 @@ ...@@ -79,7 +79,7 @@
extern uint16_t sf_ahead; extern uint16_t sf_ahead;
extern int config_check_band_frequencies(int ind, int16_t band, uint32_t downlink_frequency, extern int config_check_band_frequencies(int ind, int16_t band, uint64_t downlink_frequency,
int32_t uplink_frequency_offset, uint32_t frame_type); int32_t uplink_frequency_offset, uint32_t frame_type);
void prepare_scc(NR_ServingCellConfigCommon_t *scc) { void prepare_scc(NR_ServingCellConfigCommon_t *scc) {
...@@ -213,8 +213,7 @@ void prepare_scc(NR_ServingCellConfigCommon_t *scc) { ...@@ -213,8 +213,7 @@ void prepare_scc(NR_ServingCellConfigCommon_t *scc) {
} }
void fix_scc(NR_ServingCellConfigCommon_t *scc,int ssbmap) { void fix_scc(NR_ServingCellConfigCommon_t *scc,uint64_t ssbmap) {
int ssbmaplen = (int)scc->ssb_PositionsInBurst->present; int ssbmaplen = (int)scc->ssb_PositionsInBurst->present;
AssertFatal(ssbmaplen==NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_shortBitmap || ssbmaplen==NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap || ssbmaplen==NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_longBitmap, "illegal ssbmaplen %d\n",ssbmaplen); AssertFatal(ssbmaplen==NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_shortBitmap || ssbmaplen==NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap || ssbmaplen==NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_longBitmap, "illegal ssbmaplen %d\n",ssbmaplen);
...@@ -232,14 +231,8 @@ void fix_scc(NR_ServingCellConfigCommon_t *scc,int ssbmap) { ...@@ -232,14 +231,8 @@ void fix_scc(NR_ServingCellConfigCommon_t *scc,int ssbmap) {
scc->ssb_PositionsInBurst->choice.longBitmap.size = 8; scc->ssb_PositionsInBurst->choice.longBitmap.size = 8;
scc->ssb_PositionsInBurst->choice.longBitmap.bits_unused = 0; scc->ssb_PositionsInBurst->choice.longBitmap.bits_unused = 0;
scc->ssb_PositionsInBurst->choice.longBitmap.buf = CALLOC(1,8); scc->ssb_PositionsInBurst->choice.longBitmap.buf = CALLOC(1,8);
scc->ssb_PositionsInBurst->choice.longBitmap.buf[0] = 0xff; for (int i=0; i<8; i++)
scc->ssb_PositionsInBurst->choice.longBitmap.buf[1] = 0xff; scc->ssb_PositionsInBurst->choice.longBitmap.buf[i] = (ssbmap>>(i<<3))&(0xff);
scc->ssb_PositionsInBurst->choice.longBitmap.buf[2] = 0xff;
scc->ssb_PositionsInBurst->choice.longBitmap.buf[3] = 0xff;
scc->ssb_PositionsInBurst->choice.longBitmap.buf[4] = 0xff;
scc->ssb_PositionsInBurst->choice.longBitmap.buf[5] = 0xff;
scc->ssb_PositionsInBurst->choice.longBitmap.buf[6] = 0xff;
scc->ssb_PositionsInBurst->choice.longBitmap.buf[7] = 0xff;
} }
// fix UL absolute frequency // fix UL absolute frequency
...@@ -290,7 +283,6 @@ void RCconfig_nr_flexran() ...@@ -290,7 +283,6 @@ void RCconfig_nr_flexran()
/* this will possibly truncate the cell id (RRC assumes int32_t). /* this will possibly truncate the cell id (RRC assumes int32_t).
* Both Nid_cell and gnb_id are signed in RRC case, but we use unsigned for * Both Nid_cell and gnb_id are signed in RRC case, but we use unsigned for
* the bitshifting to work properly */ * the bitshifting to work properly */
int32_t Nid_cell = 0;
uint16_t Nid_cell_tr = 0; uint16_t Nid_cell_tr = 0;
uint32_t gnb_id = 0; uint32_t gnb_id = 0;
...@@ -369,7 +361,7 @@ void RCconfig_nr_flexran() ...@@ -369,7 +361,7 @@ void RCconfig_nr_flexran()
} }
void RCconfig_NR_L1(void) { void RCconfig_NR_L1(void) {
int i,j; int j;
paramdef_t L1_Params[] = L1PARAMS_DESC; paramdef_t L1_Params[] = L1PARAMS_DESC;
paramlist_def_t L1_ParamList = {CONFIG_STRING_L1_LIST,NULL,0}; paramlist_def_t L1_ParamList = {CONFIG_STRING_L1_LIST,NULL,0};
...@@ -520,7 +512,7 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) { ...@@ -520,7 +512,7 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
NR_ServingCellConfigCommon_t *scc = calloc(1,sizeof(NR_ServingCellConfigCommon_t)); NR_ServingCellConfigCommon_t *scc = calloc(1,sizeof(NR_ServingCellConfigCommon_t));
int ssb_SubcarrierOffset = 0; int ssb_SubcarrierOffset = 0;
int pdsch_AntennaPorts = 1; int pdsch_AntennaPorts = 1;
int ssb_bitmap=0xff; uint64_t ssb_bitmap=0xff;
memset((void*)scc,0,sizeof(NR_ServingCellConfigCommon_t)); memset((void*)scc,0,sizeof(NR_ServingCellConfigCommon_t));
prepare_scc(scc); prepare_scc(scc);
paramdef_t SCCsParams[] = SCCPARAMS_DESC(scc); paramdef_t SCCsParams[] = SCCPARAMS_DESC(scc);
...@@ -646,7 +638,6 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) { ...@@ -646,7 +638,6 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
// Parse optional physical parameters // Parse optional physical parameters
sprintf(gnbpath,"%s.[%i]",GNB_CONFIG_STRING_GNB_LIST,k), sprintf(gnbpath,"%s.[%i]",GNB_CONFIG_STRING_GNB_LIST,k),
printf("SSB SCO %d\n",ssb_SubcarrierOffset); printf("SSB SCO %d\n",ssb_SubcarrierOffset);
NRRRC_CONFIGURATION_REQ (msg_p).ssb_SubcarrierOffset = ssb_SubcarrierOffset; NRRRC_CONFIGURATION_REQ (msg_p).ssb_SubcarrierOffset = ssb_SubcarrierOffset;
printf("pdsch_AntennaPorts %d\n",pdsch_AntennaPorts); printf("pdsch_AntennaPorts %d\n",pdsch_AntennaPorts);
...@@ -963,8 +954,6 @@ void NRRCConfig(void) { ...@@ -963,8 +954,6 @@ void NRRCConfig(void) {
char aprefix[MAX_OPTNAME_SIZE*2 + 8]; char aprefix[MAX_OPTNAME_SIZE*2 + 8];
/* get global parameters, defined outside any section in the config file */ /* get global parameters, defined outside any section in the config file */
printf("Getting GNBSParams\n"); printf("Getting GNBSParams\n");
......
...@@ -163,6 +163,7 @@ void config_common_ue(NR_UE_MAC_INST_t *mac, ...@@ -163,6 +163,7 @@ void config_common_ue(NR_UE_MAC_INST_t *mac,
*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]); *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]);
cfg->carrier_config.dl_frequency = from_nrarfcn(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], cfg->carrier_config.dl_frequency = from_nrarfcn(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0],
*scc->ssbSubcarrierSpacing,
scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA)/1000; // freq in kHz scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA)/1000; // freq in kHz
for (i=0; i<5; i++) { for (i=0; i<5; i++) {
...@@ -187,6 +188,7 @@ void config_common_ue(NR_UE_MAC_INST_t *mac, ...@@ -187,6 +188,7 @@ void config_common_ue(NR_UE_MAC_INST_t *mac,
UL_pointA = *scc->uplinkConfigCommon->frequencyInfoUL->absoluteFrequencyPointA; UL_pointA = *scc->uplinkConfigCommon->frequencyInfoUL->absoluteFrequencyPointA;
cfg->carrier_config.uplink_frequency = from_nrarfcn(*scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0], cfg->carrier_config.uplink_frequency = from_nrarfcn(*scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0],
*scc->ssbSubcarrierSpacing,
UL_pointA)/1000; // freq in kHz UL_pointA)/1000; // freq in kHz
......
...@@ -138,12 +138,12 @@ void nr_ue_send_sdu(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_f ...@@ -138,12 +138,12 @@ void nr_ue_send_sdu(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_f
void ue_dci_configuration(NR_UE_MAC_INST_t *mac,fapi_nr_dl_config_request_t *dl_config,int frame,int slot); void ue_dci_configuration(NR_UE_MAC_INST_t *mac,fapi_nr_dl_config_request_t *dl_config,int frame,int slot);
int nr_extract_dci_info(NR_UE_MAC_INST_t *mac, void nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
int dci_format, int dci_format,
uint8_t dci_length, uint8_t dci_length,
uint16_t rnti, uint16_t rnti,
uint64_t *dci_pdu, uint64_t *dci_pdu,
nr_dci_pdu_rel15_t *nr_pdci_info_extracted); nr_dci_pdu_rel15_t *nr_pdci_info_extracted);
int set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg, int mu, int set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg, int mu,
......
...@@ -1651,16 +1651,12 @@ uint8_t table_7_3_2_3_3_4_twoCodeword[6][10] = { ...@@ -1651,16 +1651,12 @@ uint8_t table_7_3_2_3_3_4_twoCodeword[6][10] = {
{2,0,1,2,3,6,7,8,0,2}, {2,0,1,2,3,6,7,8,0,2},
{2,0,1,2,3,6,7,8,9,2} {2,0,1,2,3,6,7,8,9,2}
}; };
int8_t nr_ue_process_dci_freq_dom_resource_assignment( int8_t nr_ue_process_dci_freq_dom_resource_assignment(fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu,
fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu,
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu, fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
uint16_t n_RB_ULBWP, uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP, uint16_t n_RB_DLBWP,
uint16_t riv uint16_t riv
){ ){
uint16_t l_RB;
uint16_t start_RB;
uint16_t tmp_RIV;
/* /*
* TS 38.214 subclause 5.1.2.2 Resource allocation in frequency domain (downlink) * TS 38.214 subclause 5.1.2.2 Resource allocation in frequency domain (downlink)
...@@ -3039,12 +3035,12 @@ nr_ue_send_sdu(module_id_t module_idP, ...@@ -3039,12 +3035,12 @@ nr_ue_send_sdu(module_id_t module_idP,
} }
int nr_extract_dci_info(NR_UE_MAC_INST_t *mac, void nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
int dci_format, int dci_format,
uint8_t dci_size, uint8_t dci_size,
uint16_t rnti, uint16_t rnti,
uint64_t *dci_pdu, uint64_t *dci_pdu,
nr_dci_pdu_rel15_t *dci_pdu_rel15) { nr_dci_pdu_rel15_t *dci_pdu_rel15) {
int rnti_type=-1; int rnti_type=-1;
if (rnti == mac->ra_rnti) rnti_type = NR_RNTI_RA; if (rnti == mac->ra_rnti) rnti_type = NR_RNTI_RA;
......
...@@ -68,6 +68,7 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm ...@@ -68,6 +68,7 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm
LOG_I(PHY,"%s() dl_BandwidthP:%d\n", __FUNCTION__, cfg->carrier_config.dl_bandwidth.value); LOG_I(PHY,"%s() dl_BandwidthP:%d\n", __FUNCTION__, cfg->carrier_config.dl_bandwidth.value);
cfg->carrier_config.dl_frequency.value = from_nrarfcn(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], cfg->carrier_config.dl_frequency.value = from_nrarfcn(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0],
*scc->ssbSubcarrierSpacing,
scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA)/1000; // freq in kHz scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA)/1000; // freq in kHz
cfg->carrier_config.dl_frequency.tl.tag = NFAPI_NR_CONFIG_DL_FREQUENCY_TAG; cfg->carrier_config.dl_frequency.tl.tag = NFAPI_NR_CONFIG_DL_FREQUENCY_TAG;
cfg->num_tlv++; cfg->num_tlv++;
...@@ -101,6 +102,7 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm ...@@ -101,6 +102,7 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm
UL_pointA = *scc->uplinkConfigCommon->frequencyInfoUL->absoluteFrequencyPointA; UL_pointA = *scc->uplinkConfigCommon->frequencyInfoUL->absoluteFrequencyPointA;
cfg->carrier_config.uplink_frequency.value = from_nrarfcn(*scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0], cfg->carrier_config.uplink_frequency.value = from_nrarfcn(*scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0],
*scc->ssbSubcarrierSpacing,
UL_pointA)/1000; // freq in kHz UL_pointA)/1000; // freq in kHz
cfg->carrier_config.uplink_frequency.tl.tag = NFAPI_NR_CONFIG_UPLINK_FREQUENCY_TAG; cfg->carrier_config.uplink_frequency.tl.tag = NFAPI_NR_CONFIG_UPLINK_FREQUENCY_TAG;
cfg->num_tlv++; cfg->num_tlv++;
...@@ -232,6 +234,7 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm ...@@ -232,6 +234,7 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm
default: default:
AssertFatal(1==0,"SSB bitmap size value %d undefined (allowed values 1,2,3) \n", scc->ssb_PositionsInBurst->present); AssertFatal(1==0,"SSB bitmap size value %d undefined (allowed values 1,2,3) \n", scc->ssb_PositionsInBurst->present);
} }
cfg->ssb_table.ssb_mask_list[0].ssb_mask.tl.tag = NFAPI_NR_CONFIG_SSB_MASK_TAG; cfg->ssb_table.ssb_mask_list[0].ssb_mask.tl.tag = NFAPI_NR_CONFIG_SSB_MASK_TAG;
cfg->num_tlv++; cfg->num_tlv++;
...@@ -316,7 +319,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, ...@@ -316,7 +319,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
){ ){
if (scc != NULL ) { if (scc != NULL ) {
AssertFatal(scc->ssb_PositionsInBurst->present == NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap, "SSB Bitmap is not 8-bits!\n"); AssertFatal((scc->ssb_PositionsInBurst->present > 0) && (scc->ssb_PositionsInBurst->present < 4), "SSB Bitmap type %d is not valid\n",scc->ssb_PositionsInBurst->present);
LOG_I(MAC,"Configuring common parameters from NR ServingCellConfig\n"); LOG_I(MAC,"Configuring common parameters from NR ServingCellConfig\n");
......
...@@ -42,6 +42,7 @@ void config_common(int Mod_idP, ...@@ -42,6 +42,7 @@ void config_common(int Mod_idP,
int pdsch_AntennaPorts, int pdsch_AntennaPorts,
NR_ServingCellConfigCommon_t *scc NR_ServingCellConfigCommon_t *scc
); );
int rrc_mac_config_req_gNB(module_id_t Mod_idP, int rrc_mac_config_req_gNB(module_id_t Mod_idP,
int ssb_SubcarrierOffset, int ssb_SubcarrierOffset,
int pdsch_AntennaPorts, int pdsch_AntennaPorts,
......
...@@ -26,6 +26,7 @@ ...@@ -26,6 +26,7 @@
#define INDEX_MAX_TBS_TABLE (93) #define INDEX_MAX_TBS_TABLE (93)
#include "common/utils/nr/nr_common.h" #include "common/utils/nr/nr_common.h"
#include <math.h>
//Table 5.1.2.2-2 //Table 5.1.2.2-2
uint16_t Tbstable_nr[INDEX_MAX_TBS_TABLE] = {24,32,40,48,56,64,72,80,88,96,104,112,120,128,136,144,152,160,168,176,184,192,208,224,240,256,272,288,304,320,336,352,368,384,408,432,456,480,504,528,552,576,608,640,672,704,736,768,808,848,888,928,984,1032,1064,1128,1160,1192,1224,1256,1288,1320,1352,1416,1480,1544,1608,1672,1736,1800,1864,1928,2024,2088,2152,2216,2280,2408,2472,2536,2600,2664,2728,2792,2856,2976,3104,3240,3368,3496,3624,3752,3824}; uint16_t Tbstable_nr[INDEX_MAX_TBS_TABLE] = {24,32,40,48,56,64,72,80,88,96,104,112,120,128,136,144,152,160,168,176,184,192,208,224,240,256,272,288,304,320,336,352,368,384,408,432,456,480,504,528,552,576,608,640,672,704,736,768,808,848,888,928,984,1032,1064,1128,1160,1192,1224,1256,1288,1320,1352,1416,1480,1544,1608,1672,1736,1800,1864,1928,2024,2088,2152,2216,2280,2408,2472,2536,2600,2664,2728,2792,2856,2976,3104,3240,3368,3496,3624,3752,3824};
......
...@@ -33,38 +33,50 @@ ...@@ -33,38 +33,50 @@
#include "LAYER2/NR_MAC_gNB/mac_proto.h" #include "LAYER2/NR_MAC_gNB/mac_proto.h"
nr_bandentry_t nr_bandtable[] = { nr_bandentry_t nr_bandtable[] = {
{1, 1920000, 1980000, 2110000, 2170000, 20, 422000}, {1, 1920000, 1980000, 2110000, 2170000, 20, 422000, 100},
{2, 1850000, 1910000, 1930000, 1990000, 20, 386000}, {2, 1850000, 1910000, 1930000, 1990000, 20, 386000, 100},
{3, 1710000, 1785000, 1805000, 1880000, 20, 361000}, {3, 1710000, 1785000, 1805000, 1880000, 20, 361000, 100},
{5, 824000, 849000, 869000, 894000, 20, 173800}, {5, 824000, 849000, 869000, 894000, 20, 173800, 100},
{7, 2500000, 2570000, 2620000, 2690000, 20, 524000}, {7, 2500000, 2570000, 2620000, 2690000, 20, 524000, 100},
{8, 880000, 915000, 925000, 960000, 20, 185000}, {8, 880000, 915000, 925000, 960000, 20, 185000, 100},
{12, 698000, 716000, 728000, 746000, 20, 145800}, {12, 698000, 716000, 728000, 746000, 20, 145800, 100},
{20, 832000, 862000, 791000, 821000, 20, 158200}, {20, 832000, 862000, 791000, 821000, 20, 158200, 100},
{25, 1850000, 1915000, 1930000, 1995000, 20, 386000}, {25, 1850000, 1915000, 1930000, 1995000, 20, 386000, 100},
{28, 703000, 758000, 758000, 813000, 20, 151600}, {28, 703000, 758000, 758000, 813000, 20, 151600, 100},
{34, 2010000, 2025000, 2010000, 2025000, 20, 402000}, {34, 2010000, 2025000, 2010000, 2025000, 20, 402000, 100},
{38, 2570000, 2620000, 2570000, 2630000, 20, 514000}, {38, 2570000, 2620000, 2570000, 2630000, 20, 514000, 100},
{39, 1880000, 1920000, 1880000, 1920000, 20, 376000}, {39, 1880000, 1920000, 1880000, 1920000, 20, 376000, 100},
{40, 2300000, 2400000, 2300000, 2400000, 20, 460000}, {40, 2300000, 2400000, 2300000, 2400000, 20, 460000, 100},
{41, 2496000, 2690000, 2496000, 2690000, 3, 499200}, {41, 2496000, 2690000, 2496000, 2690000, 3, 499200, 15},
{50, 1432000, 1517000, 1432000, 1517000, 20, 286400}, {41, 2496000, 2690000, 2496000, 2690000, 6, 499200, 30},
{51, 1427000, 1432000, 1427000, 1432000, 20, 285400}, {50, 1432000, 1517000, 1432000, 1517000, 20, 286400, 100},
{66, 1710000, 1780000, 2110000, 2200000, 20, 422000}, {51, 1427000, 1432000, 1427000, 1432000, 20, 285400, 100},
{70, 1695000, 1710000, 1995000, 2020000, 20, 399000}, {66, 1710000, 1780000, 2110000, 2200000, 20, 422000, 100},
{71, 663000, 698000, 617000, 652000, 20, 123400}, {70, 1695000, 1710000, 1995000, 2020000, 20, 399000, 100},
{74, 1427000, 1470000, 1475000, 1518000, 20, 295000}, {71, 663000, 698000, 617000, 652000, 20, 123400, 100},
{75, 000, 000, 1432000, 1517000, 20, 286400}, {74, 1427000, 1470000, 1475000, 1518000, 20, 295000, 100},
{76, 000, 000, 1427000, 1432000, 20, 285400}, {75, 000, 000, 1432000, 1517000, 20, 286400, 100},
{77, 3300000, 4200000, 3300000, 4200000, 1, 620000}, {76, 000, 000, 1427000, 1432000, 20, 285400, 100},
{78, 3300000, 3800000, 3300000, 3800000, 1, 620000}, {77, 3300000, 4200000, 3300000, 4200000, 1, 620000, 15},
{79, 4400000, 5000000, 4400000, 5000000, 2, 693334}, {77, 3300000, 4200000, 3300000, 4200000, 2, 620000, 30},
{80, 1710000, 1785000, 000, 000, 20, 342000}, {78, 3300000, 3800000, 3300000, 3800000, 1, 620000, 15},
{81, 860000, 915000, 000, 000, 20, 176000}, {78, 3300000, 3800000, 3300000, 3800000, 2, 620000, 30},
{82, 832000, 862000, 000, 000, 20, 166400}, {79, 4400000, 5000000, 4400000, 5000000, 1, 693334, 15},
{83, 703000, 748000, 000, 000, 20, 140600}, {79, 4400000, 5000000, 4400000, 5000000, 2, 693334, 30},
{84, 1920000, 1980000, 000, 000, 20, 384000}, {80, 1710000, 1785000, 000, 000, 20, 342000, 100},
{86, 1710000, 1785000, 000, 000, 20, 342000} {81, 860000, 915000, 000, 000, 20, 176000, 100},
{82, 832000, 862000, 000, 000, 20, 166400, 100},
{83, 703000, 748000, 000, 000, 20, 140600, 100},
{84, 1920000, 1980000, 000, 000, 20, 384000, 100},
{86, 1710000, 1785000, 000, 000, 20, 342000, 100},
{257,26500000,29500000,26500000,29500000, 1,2054166, 60},
{257,26500000,29500000,26500000,29500000, 2,2054167, 120},
{258,24250000,27500000,24250000,27500000, 1,2016667, 60},
{258,24250000,27500000,24250000,27500000, 2,2016667, 120},
{260,37000000,40000000,37000000,40000000, 1,2229166, 60},
{260,37000000,40000000,37000000,40000000, 2,2229167, 120},
{261,27500000,28350000,27500000,28350000, 1,2070833, 60},
{261,27500000,28350000,27500000,28350000, 2,2070833, 120}
}; };
#define NR_BANDTABLE_SIZE (sizeof(nr_bandtable)/sizeof(nr_bandentry_t)) #define NR_BANDTABLE_SIZE (sizeof(nr_bandtable)/sizeof(nr_bandentry_t))
...@@ -226,16 +238,22 @@ uint16_t config_bandwidth(int mu, int nb_rb, int nr_band) ...@@ -226,16 +238,22 @@ uint16_t config_bandwidth(int mu, int nb_rb, int nr_band)
uint32_t to_nrarfcn(int nr_bandP, uint32_t to_nrarfcn(int nr_bandP,
uint64_t dl_CarrierFreq, uint64_t dl_CarrierFreq,
uint8_t scs_index,
uint32_t bw) uint32_t bw)
{ {
uint64_t dl_CarrierFreq_by_1k = dl_CarrierFreq / 1000; uint64_t dl_CarrierFreq_by_1k = dl_CarrierFreq / 1000;
int bw_kHz = bw / 1000; int bw_kHz = bw / 1000;
int scs_khz = 15<<scs_index;
int i; int i;
uint32_t nrarfcn, delta_arfcn;
LOG_I(MAC,"Searching for nr band %d DL Carrier frequency %llu bw %u\n",nr_bandP,(long long unsigned int)dl_CarrierFreq,bw); LOG_I(MAC,"Searching for nr band %d DL Carrier frequency %llu bw %u\n",nr_bandP,(long long unsigned int)dl_CarrierFreq,bw);
AssertFatal(nr_bandP < 86, "nr_band %d > 86\n", nr_bandP); AssertFatal(nr_bandP < 261, "nr_band %d > 260\n", nr_bandP);
for (i = 0; i < 30 && nr_bandtable[i].band != nr_bandP; i++); for (i = 0; i < NR_BANDTABLE_SIZE && nr_bandtable[i].band != nr_bandP; i++);
// selection of correct Deltaf raster according to SCS
if ( (nr_bandtable[i].deltaf_raster != 100) && (nr_bandtable[i].deltaf_raster != scs_khz))
i++;
AssertFatal(dl_CarrierFreq_by_1k >= nr_bandtable[i].dl_min, AssertFatal(dl_CarrierFreq_by_1k >= nr_bandtable[i].dl_min,
"Band %d, bw %u : DL carrier frequency %llu kHz < %llu\n", "Band %d, bw %u : DL carrier frequency %llu kHz < %llu\n",
...@@ -246,37 +264,57 @@ uint32_t to_nrarfcn(int nr_bandP, ...@@ -246,37 +264,57 @@ uint32_t to_nrarfcn(int nr_bandP,
nr_bandP, (long long unsigned int)dl_CarrierFreq,bw, (long long unsigned int)dl_CarrierFreq_by_1k, nr_bandP, (long long unsigned int)dl_CarrierFreq,bw, (long long unsigned int)dl_CarrierFreq_by_1k,
(long long unsigned int)(nr_bandtable[i].dl_max - bw_kHz)); (long long unsigned int)(nr_bandtable[i].dl_max - bw_kHz));
int deltaFglobal; int deltaFglobal = 60;
if (dl_CarrierFreq < 3e9) deltaFglobal = 5; if (dl_CarrierFreq < 3e9) deltaFglobal = 15;
else deltaFglobal = 15; if (dl_CarrierFreq < 24.25e9) deltaFglobal = 5;
// This is equation before Table 5.4.2.1-1 in 38101-1-f30 // This is equation before Table 5.4.2.1-1 in 38101-1-f30
// F_REF=F_REF_Offs + deltaF_Global(N_REF-NREF_REF_Offs) // F_REF=F_REF_Offs + deltaF_Global(N_REF-NREF_REF_Offs)
return (((dl_CarrierFreq_by_1k - nr_bandtable[i].dl_min)/deltaFglobal) + nrarfcn = (((dl_CarrierFreq_by_1k - nr_bandtable[i].dl_min)/deltaFglobal)+nr_bandtable[i].N_OFFs_DL);
nr_bandtable[i].N_OFFs_DL);
delta_arfcn = nrarfcn - nr_bandtable[i].N_OFFs_DL;
if(delta_arfcn%(nr_bandtable[i].step_size)!=0)
AssertFatal(1==0,"dl_CarrierFreq %lu corresponds to %u which is not on the raster for step size %lu",
dl_CarrierFreq,nrarfcn,nr_bandtable[i].step_size);
return nrarfcn;
} }
uint64_t from_nrarfcn(int nr_bandP, uint64_t from_nrarfcn(int nr_bandP,
uint8_t scs_index,
uint32_t dl_nrarfcn) uint32_t dl_nrarfcn)
{ {
int i; int i;
int deltaFglobal; int deltaFglobal = 5;
int scs_khz = 15<<scs_index;
if (nr_bandP < 77 || nr_bandP > 79) deltaFglobal = 5; uint32_t delta_arfcn;
else deltaFglobal = 15;
if (dl_nrarfcn > 599999 && dl_nrarfcn < 2016667)
deltaFglobal = 15;
if (dl_nrarfcn > 2016666 && dl_nrarfcn < 3279166)
deltaFglobal = 60;
AssertFatal(nr_bandP < 87, "nr_band %d > 86\n", nr_bandP); AssertFatal(nr_bandP < 261, "nr_band %d > 260\n", nr_bandP);
for (i = 0; i < 31 && nr_bandtable[i].band != nr_bandP; i++); for (i = 0; i < NR_BANDTABLE_SIZE && nr_bandtable[i].band != nr_bandP; i++);
AssertFatal(dl_nrarfcn>=nr_bandtable[i].N_OFFs_DL,"dl_nrarfcn %u < N_OFFs_DL %llu\n",dl_nrarfcn, (long long unsigned int)nr_bandtable[i].N_OFFs_DL); AssertFatal(dl_nrarfcn>=nr_bandtable[i].N_OFFs_DL,"dl_nrarfcn %u < N_OFFs_DL %llu\n",dl_nrarfcn, (long long unsigned int)nr_bandtable[i].N_OFFs_DL);
// selection of correct Deltaf raster according to SCS
if ( (nr_bandtable[i].deltaf_raster != 100) && (nr_bandtable[i].deltaf_raster != scs_khz))
i++;
delta_arfcn = dl_nrarfcn - nr_bandtable[i].N_OFFs_DL;
if(delta_arfcn%(nr_bandtable[i].step_size)!=0)
AssertFatal(1==0,"dl_nrarfcn %u is not on the raster for step size %lu",dl_nrarfcn,nr_bandtable[i].step_size);
LOG_I(PHY,"Computing dl_frequency (pointA %llu => %llu (dlmin %llu, nr_bandtable[%d].N_OFFs_DL %llu))\n", LOG_I(PHY,"Computing dl_frequency (pointA %llu => %llu (dlmin %llu, nr_bandtable[%d].N_OFFs_DL %llu))\n",
(unsigned long long)dl_nrarfcn, (unsigned long long)dl_nrarfcn,
(unsigned long long)(1000*(nr_bandtable[i].dl_min + (dl_nrarfcn - nr_bandtable[i].N_OFFs_DL) * deltaFglobal)), (unsigned long long)(1000*(nr_bandtable[i].dl_min + (dl_nrarfcn - nr_bandtable[i].N_OFFs_DL) * deltaFglobal)),
(unsigned long long)nr_bandtable[i].dl_min, (unsigned long long)nr_bandtable[i].dl_min,
i, i,
(unsigned long long)nr_bandtable[i].N_OFFs_DL); (unsigned long long)nr_bandtable[i].N_OFFs_DL);
return 1000*(nr_bandtable[i].dl_min + (dl_nrarfcn - nr_bandtable[i].N_OFFs_DL) * deltaFglobal); return 1000*(nr_bandtable[i].dl_min + (dl_nrarfcn - nr_bandtable[i].N_OFFs_DL) * deltaFglobal);
} }
...@@ -694,9 +732,9 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i ...@@ -694,9 +732,9 @@ int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,i
AssertFatal(NrOfSymbols>3,"Illegal NrOfSymbols %d for len2 DMRS\n",NrOfSymbols); AssertFatal(NrOfSymbols>3,"Illegal NrOfSymbols %d for len2 DMRS\n",NrOfSymbols);
if (NrOfSymbols < 10) return(1<<l0); if (NrOfSymbols < 10) return(1<<l0);
if (NrOfSymbols < 13 && *dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0) return(1<<l0); if (NrOfSymbols < 13 && *dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0) return(1<<l0);
if (NrOfSymbols < 13 && *dmrs_config->dmrs_AdditionalPosition!=NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0) return(1<<l0 || 1<<8); if (NrOfSymbols < 13 && *dmrs_config->dmrs_AdditionalPosition!=NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0) return(1<<l0 | 1<<8);
if (*dmrs_config->dmrs_AdditionalPosition!=NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0) return(1<<l0); if (*dmrs_config->dmrs_AdditionalPosition!=NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0) return(1<<l0);
if (*dmrs_config->dmrs_AdditionalPosition!=NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos1) return(1<<l0 || 1<<10); if (*dmrs_config->dmrs_AdditionalPosition!=NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos1) return(1<<l0 | 1<<10);
} }
} }
else if (pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB && else if (pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB &&
......
...@@ -34,9 +34,9 @@ ...@@ -34,9 +34,9 @@
uint16_t config_bandwidth(int mu, int nb_rb, int nr_band); uint16_t config_bandwidth(int mu, int nb_rb, int nr_band);
uint64_t from_nrarfcn(int nr_bandP, uint32_t dl_nrarfcn); uint64_t from_nrarfcn(int nr_bandP, uint8_t scs_index, uint32_t dl_nrarfcn);
uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint32_t bw); uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint8_t scs_index, uint32_t bw);
int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols); int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols);
......
...@@ -155,8 +155,7 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info){ ...@@ -155,8 +155,7 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
LOG_D(MAC,">>>NR_IF_Module i=%d, dl_info->dci_ind->number_of_dcis=%d\n",i,dl_info->dci_ind->number_of_dcis); LOG_D(MAC,">>>NR_IF_Module i=%d, dl_info->dci_ind->number_of_dcis=%d\n",i,dl_info->dci_ind->number_of_dcis);
// fapi_nr_dci_pdu_rel15_t *dci = &dl_info->dci_ind->dci_list[i].dci; // fapi_nr_dci_pdu_rel15_t *dci = &dl_info->dci_ind->dci_list[i].dci;
ret_mask |= (handle_dci( ret_mask |= (handle_dci(dl_info->module_id,
dl_info->module_id,
dl_info->cc_id, dl_info->cc_id,
dl_info->gNB_index, dl_info->gNB_index,
dl_info->dci_ind->dci_list+i)<< FAPI_NR_DCI_IND); dl_info->dci_ind->dci_list+i)<< FAPI_NR_DCI_IND);
......
...@@ -259,7 +259,6 @@ static void init_NR_SI(gNB_RRC_INST *rrc) { ...@@ -259,7 +259,6 @@ static void init_NR_SI(gNB_RRC_INST *rrc) {
char openair_rrc_gNB_configuration(const module_id_t gnb_mod_idP, gNB_RrcConfigurationReq *configuration) { char openair_rrc_gNB_configuration(const module_id_t gnb_mod_idP, gNB_RrcConfigurationReq *configuration) {
protocol_ctxt_t ctxt; protocol_ctxt_t ctxt;
int CC_id;
gNB_RRC_INST *rrc=RC.nrrrc[gnb_mod_idP]; gNB_RRC_INST *rrc=RC.nrrrc[gnb_mod_idP];
...@@ -284,7 +283,7 @@ char openair_rrc_gNB_configuration(const module_id_t gnb_mod_idP, gNB_RrcConfigu ...@@ -284,7 +283,7 @@ char openair_rrc_gNB_configuration(const module_id_t gnb_mod_idP, gNB_RrcConfigu
rrc->carrier.Srb0.Active = 0; rrc->carrier.Srb0.Active = 0;
uid_linear_allocator_init(&rrc->uid_allocator); nr_uid_linear_allocator_init(&rrc->uid_allocator);
RB_INIT(&rrc->rrc_ue_head); RB_INIT(&rrc->rrc_ue_head);
rrc->initial_id2_s1ap_ids = hashtable_create (NUMBER_OF_UE_MAX * 2, NULL, NULL); rrc->initial_id2_s1ap_ids = hashtable_create (NUMBER_OF_UE_MAX * 2, NULL, NULL);
rrc->s1ap_id2_s1ap_ids = hashtable_create (NUMBER_OF_UE_MAX * 2, NULL, NULL); rrc->s1ap_id2_s1ap_ids = hashtable_create (NUMBER_OF_UE_MAX * 2, NULL, NULL);
......
...@@ -169,13 +169,13 @@ rrc_gNB_get_ue_context( ...@@ -169,13 +169,13 @@ rrc_gNB_get_ue_context(
} }
} }
rrc_gNB_free_mem_UE_context( void rrc_gNB_free_mem_UE_context(
const protocol_ctxt_t *const ctxt_pP, const protocol_ctxt_t *const ctxt_pP,
struct rrc_gNB_ue_context_s *const ue_context_pP struct rrc_gNB_ue_context_s *const ue_context_pP
) )
//----------------------------------------------------------------------------- //-----------------------------------------------------------------------------
{ {
int i;
LOG_T(RRC, LOG_T(RRC,
PROTOCOL_RRC_CTXT_UE_FMT" Clearing UE context 0x%p (free internal structs)\n", PROTOCOL_RRC_CTXT_UE_FMT" Clearing UE context 0x%p (free internal structs)\n",
PROTOCOL_RRC_CTXT_UE_ARGS(ctxt_pP), PROTOCOL_RRC_CTXT_UE_ARGS(ctxt_pP),
......
...@@ -53,7 +53,7 @@ int parse_CG_ConfigInfo(gNB_RRC_INST *rrc, NR_CG_ConfigInfo_t *CG_ConfigInfo) { ...@@ -53,7 +53,7 @@ int parse_CG_ConfigInfo(gNB_RRC_INST *rrc, NR_CG_ConfigInfo_t *CG_ConfigInfo) {
cg_ConfigInfo->ue_CapabilityInfo->buf, cg_ConfigInfo->ue_CapabilityInfo->buf,
cg_ConfigInfo->ue_CapabilityInfo->size, 0, 0); cg_ConfigInfo->ue_CapabilityInfo->size, 0, 0);
if ((dec_rval.code != RC_OK) && (dec_rval.consumed == 0)) { if ((dec_rval.code != RC_OK) && (dec_rval.consumed == 0)) {
AssertFatal(1==0,"[InterNode] Failed to decode NR_UE_CapabilityRAT_ContainerList (%zu bits), size of OCTET_STRING %d\n", AssertFatal(1==0,"[InterNode] Failed to decode NR_UE_CapabilityRAT_ContainerList (%zu bits), size of OCTET_STRING %lu\n",
dec_rval.consumed, cg_ConfigInfo->ue_CapabilityInfo->size); dec_rval.consumed, cg_ConfigInfo->ue_CapabilityInfo->size);
} }
rrc_parse_ue_capabilities(rrc,UE_CapabilityRAT_ContainerList); rrc_parse_ue_capabilities(rrc,UE_CapabilityRAT_ContainerList);
......
...@@ -86,13 +86,13 @@ void rrc_parse_ue_capabilities(gNB_RRC_INST *rrc,LTE_UE_CapabilityRAT_ContainerL ...@@ -86,13 +86,13 @@ void rrc_parse_ue_capabilities(gNB_RRC_INST *rrc,LTE_UE_CapabilityRAT_ContainerL
// dump ue_capabilities // dump ue_capabilities
// if ( LOG_DEBUGFLAG(DEBUG_ASN1) ) { if ( LOG_DEBUGFLAG(DEBUG_ASN1) ) {
xer_fprint(stdout, &asn_DEF_NR_UE_NR_Capability, ue_context_p->ue_context.UE_Capability_nr); xer_fprint(stdout, &asn_DEF_NR_UE_NR_Capability, ue_context_p->ue_context.UE_Capability_nr);
// } }
// if ( LOG_DEBUGFLAG(DEBUG_ASN1) ) { if ( LOG_DEBUGFLAG(DEBUG_ASN1) ) {
xer_fprint(stdout, &asn_DEF_NR_UE_MRDC_Capability, ue_context_p->ue_context.UE_Capability_MRDC); xer_fprint(stdout, &asn_DEF_NR_UE_MRDC_Capability, ue_context_p->ue_context.UE_Capability_MRDC);
// } }
rrc_add_nsa_user(rrc,ue_context_p); rrc_add_nsa_user(rrc,ue_context_p);
} }
......
Active_gNBs = ( "gNB-Eurecom-5GNRBox");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
cell_type = "CELL_MACRO_GNB";
gNB_name = "gNB-Eurecom-5GNRBox";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({mcc = 208; mnc = 93; mnc_length = 2;});
tr_s_preference = "local_mac"
////////// Physical parameters:
ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts = 1;
servingCellConfigCommon = (
{
#spCellConfigCommon
physCellId = 0;
# downlinkConfigCommon
#frequencyInfoDL
# this is pointA + 23 PRBs@120kHz SCS (same as initial BWP)
absoluteFrequencySSB = 2077643;
dl_frequencyBand = 257;
# this is 27.900 GHz
dl_absoluteFrequencyPointA = 2077499;
#scs-SpecificCarrierList
dl_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing = 3;
dl_carrierBandwidth = 32;
#initialDownlinkBWP
#genericParameters
# this is RBstart=0,L=50 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 8525;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 3;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=2,L=3
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 257;
#scs-SpecificCarrierList
ul_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing = 3;
ul_carrierBandwidth = 32;
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 8525;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 3;
#rach-ConfigCommon
#rach-ConfigGeneric
prach_ConfigurationIndex = 98;
#prach_msg1_FDM
#0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM = 0;
prach_msg1_FrequencyStart = 0;
zeroCorrelationZoneConfig = 13;
preambleReceivedTargetPower = -118;
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax = 6;
#powerRampingStep
# 0=dB0,1=dB2,2=dB4,3=dB6
powerRampingStep = 1;
#ra_ReponseWindow
#1,2,4,8,10,20,40,80
ra_ResponseWindow = 4;
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#0=oneeighth,1=onefourth,2=half,3=one,4=two,5=four,6=eight,7=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3;
#oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15;
#ra_ContentionResolutionTimer
#(0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer = 7;
rsrp_ThresholdSSB = 19;
#prach-RootSequenceIndex_PR
#0 = 839, 1 = 139
prach_RootSequenceIndex_PR = 1;
prach_RootSequenceIndex = 1;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
#
msg1_SubcarrierSpacing = 1,
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2;
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 2;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
# pucch-ConfigCommon setup :
# pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping = 0;
hoppingId = 40;
p0_nominal = -90;
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 3;
ssb_PositionsInBurst_Bitmap = 1;
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 1;
# dmrs_TypeA_position
# 0 = pos2, 1 = pos3
dmrs_TypeA_Position = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing = 3;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = 3;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 6;
nrofDownlinkSlots = 30;
nrofDownlinkSymbols = 0;
nrofUplinkSlots = 10;
nrofUplinkSymbols = 0;
ssPBCH_BlockPower = 10;
}
);
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// MME parameters:
mme_ip_address = ( { ipv4 = "192.168.12.26";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
GNB_INTERFACE_NAME_FOR_S1_MME = "eth0";
GNB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.111/24";
GNB_INTERFACE_NAME_FOR_S1U = "eth0";
GNB_IPV4_ADDRESS_FOR_S1U = "192.168.12.111/24";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
}
);
RUs = (
{
local_rf = "yes"
nb_tx = 1;
nb_rx = 1;
att_tx = 0;
att_rx = 0;
bands = [7];
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
sdr_addrs = "type=x300";
if_freq = 3000000000;
}
);
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
);
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
};
Active_gNBs = ( "gNB-Eurecom-5GNRBox");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
cell_type = "CELL_MACRO_GNB";
gNB_name = "gNB-Eurecom-5GNRBox";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({mcc = 208; mnc = 93; mnc_length = 2;});
tr_s_preference = "local_mac"
////////// Physical parameters:
ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts = 1;
servingCellConfigCommon = (
{
#spCellConfigCommon
physCellId = 0;
# downlinkConfigCommon
#frequencyInfoDL
# this is pointA + 23 PRBs@120kHz SCS (same as initial BWP)
absoluteFrequencySSB = 2078051;
dl_frequencyBand = 257;
# this is 27.900 GHz
dl_absoluteFrequencyPointA = 2077499;
#scs-SpecificCarrierList
dl_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing = 3;
dl_carrierBandwidth = 66;
#initialDownlinkBWP
#genericParameters
# this is RBstart=0,L=50 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 13475;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 3;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=2,L=3
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 0;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 257;
#scs-SpecificCarrierList
ul_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing = 3;
ul_carrierBandwidth = 66;
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 13475;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 3;
#rach-ConfigCommon
#rach-ConfigGeneric
prach_ConfigurationIndex = 98;
#prach_msg1_FDM
#0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM = 0;
prach_msg1_FrequencyStart = 0;
zeroCorrelationZoneConfig = 13;
preambleReceivedTargetPower = -118;
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax = 6;
#powerRampingStep
# 0=dB0,1=dB2,2=dB4,3=dB6
powerRampingStep = 1;
#ra_ReponseWindow
#1,2,4,8,10,20,40,80
ra_ResponseWindow = 4;
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#0=oneeighth,1=onefourth,2=half,3=one,4=two,5=four,6=eight,7=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3;
#oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15;
#ra_ContentionResolutionTimer
#(0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer = 7;
rsrp_ThresholdSSB = 19;
#prach-RootSequenceIndex_PR
#0 = 839, 1 = 139
prach_RootSequenceIndex_PR = 1;
prach_RootSequenceIndex = 1;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
#
msg1_SubcarrierSpacing = 1,
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2;
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 2;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
# pucch-ConfigCommon setup :
# pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping = 0;
hoppingId = 40;
p0_nominal = -90;
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 3;
ssb_PositionsInBurst_Bitmap = 1;
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 2;
# dmrs_TypeA_position
# 0 = pos2, 1 = pos3
dmrs_TypeA_Position = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing = 3;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = 1;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 6;
nrofDownlinkSlots = 30;
nrofDownlinkSymbols = 0;
nrofUplinkSlots = 10;
nrofUplinkSymbols = 0;
ssPBCH_BlockPower = 10;
}
);
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// MME parameters:
mme_ip_address = ( { ipv4 = "192.168.12.26";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
GNB_INTERFACE_NAME_FOR_S1_MME = "eth0";
GNB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.111/24";
GNB_INTERFACE_NAME_FOR_S1U = "eth0";
GNB_IPV4_ADDRESS_FOR_S1U = "192.168.12.111/24";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
}
);
RUs = (
{
local_rf = "yes"
nb_tx = 1
nb_rx = 1
att_tx = 0
att_rx = 0;
bands = [7];
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
sdr_addrs = "type=n300";
}
);
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
);
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
};
Active_gNBs = ( "gNB-Eurecom-5GNRBox");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
cell_type = "CELL_MACRO_GNB";
gNB_name = "gNB-Eurecom-5GNRBox";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({mcc = 208; mnc = 93; mnc_length = 2;});
tr_s_preference = "local_mac"
////////// Physical parameters:
component_carriers = (
{
node_function = "3GPP_gNODEB";
node_timing = "synch_to_ext_device";
node_synch_ref = 0;
frame_type = "TDD";
DL_prefix_type = "NORMAL";
UL_prefix_type = "NORMAL";
eutra_band = 78;
downlink_frequency = 3510000000L;
uplink_frequency_offset = -120000000;
Nid_cell = 0;
N_RB_DL = 217;
nb_antenna_ports = 1;
nb_antennas_tx = 1;
nb_antennas_rx = 1;
tx_gain = 90;
rx_gain = 125;
MIB_subCarrierSpacingCommon = 30;
MIB_ssb_SubcarrierOffset = 0;
MIB_dmrs_TypeA_Position = 2;
pdcch_ConfigSIB1 = 0;
SIB1_frequencyOffsetSSB = "khz5";
SIB1_ssb_PeriodicityServingCell = 5;
SIB1_ss_PBCH_BlockPower = -60;
absoluteFrequencySSB = 0;
DL_FreqBandIndicatorNR = 15;
DL_absoluteFrequencyPointA = 15;
DL_offsetToCarrier = 15;
DL_SCS_SubcarrierSpacing = "kHz30";
DL_SCS_SpecificCarrier_k0 = 0;
DL_carrierBandwidth = 15;
DL_locationAndBandwidth = 15;
DL_BWP_SubcarrierSpacing = "kHz30";
DL_BWP_prefix_type = "NORMAL";
UL_FreqBandIndicatorNR = 15;
UL_absoluteFrequencyPointA = 13;
UL_additionalSpectrumEmission = 3;
UL_p_Max = -1;
UL_frequencyShift7p5khz = "TRUE";
UL_offsetToCarrier = 10;
UL_SCS_SubcarrierSpacing = "kHz30";
UL_SCS_SpecificCarrier_k0 = 0;
UL_carrierBandwidth = 15;
UL_locationAndBandwidth = 15;
UL_BWP_SubcarrierSpacing = "kHz30";
UL_BWP_prefix_type = "NORMAL";
UL_timeAlignmentTimerCommon = "infinity";
ServingCellConfigCommon_n_TimingAdvanceOffset = "n0"
ServingCellConfigCommon_ssb_PositionsInBurst_PR = 0x03;
ServingCellConfigCommon_ssb_periodicityServingCell = 10;
ServingCellConfigCommon_dmrs_TypeA_Position = 2;
NIA_SubcarrierSpacing = "kHz15";
ServingCellConfigCommon_ss_PBCH_BlockPower = -60;
referenceSubcarrierSpacing = "kHz15";
dl_UL_TransmissionPeriodicity = "ms0p5";
nrofDownlinkSlots = 10;
nrofDownlinkSymbols = 10;
nrofUplinkSlots = 10;
nrofUplinkSymbols = 10;
rach_totalNumberOfRA_Preambles = 63;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_choice = "oneEighth";
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_oneEighth = 4;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_oneFourth = 8;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_oneHalf = 16;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_one = 24;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_two = 32;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_four = 8;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_eight = 4;
rach_ssb_perRACH_OccasionAndCB_PreamblesPerSSB_sixteen = 2;
rach_groupBconfigured = "ENABLE";
rach_ra_Msg3SizeGroupA = 56;
rach_messagePowerOffsetGroupB = "dB0";
rach_numberOfRA_PreamblesGroupA = 32;
rach_ra_ContentionResolutionTimer = 8;
rsrp_ThresholdSSB = 64;
rsrp_ThresholdSSB_SUL = 64;
prach_RootSequenceIndex_choice = "l839";
prach_RootSequenceIndex_l839 = 0;
prach_RootSequenceIndex_l139 = 0;
prach_msg1_SubcarrierSpacing = "kHz30";
restrictedSetConfig = "unrestrictedSet";
msg3_transformPrecoding = "ENABLE";
prach_ConfigurationIndex = 10;
prach_msg1_FDM = "one";
prach_msg1_FrequencyStart = 10;
zeroCorrelationZoneConfig = 10;
preambleReceivedTargetPower = -150;
preambleTransMax = 6;
powerRampingStep = "dB0";
ra_ResponseWindow = 8;
groupHoppingEnabledTransformPrecoding = "ENABLE";
msg3_DeltaPreamble = 0;
p0_NominalWithGrant = 0;
PUSCH_TimeDomainResourceAllocation_k2 = 0;
PUSCH_TimeDomainResourceAllocation_mappingType = "typeA";
PUSCH_TimeDomainResourceAllocation_startSymbolAndLength = 0;
pucch_ResourceCommon = 0;
pucch_GroupHopping = "neither";
hoppingId = 0;
p0_nominal = -30;
PDSCH_TimeDomainResourceAllocation_k0 = 2;
PDSCH_TimeDomainResourceAllocation_mappingType = "typeA";
PDSCH_TimeDomainResourceAllocation_startSymbolAndLength = 0;
rateMatchPatternId = 0;
RateMatchPattern_patternType = "bitmaps";
symbolsInResourceBlock = "oneSlot";
periodicityAndPattern = 2;
RateMatchPattern_controlResourceSet = 5;
RateMatchPattern_subcarrierSpacing = "kHz30";
RateMatchPattern_mode = "dynamic";
controlResourceSetZero = 0;
searchSpaceZero = 0;
searchSpaceSIB1 = 10;
searchSpaceOtherSystemInformation = 10;
pagingSearchSpace = 10;
ra_SearchSpace = 10;
PDCCH_common_controlResourceSetId = 5;
PDCCH_common_ControlResourceSet_duration = 2;
PDCCH_cce_REG_MappingType = "nonInterleaved";
PDCCH_reg_BundleSize = 3;
PDCCH_interleaverSize = 3;
PDCCH_shiftIndex = 10;
PDCCH_precoderGranularity = "sameAsREG-bundle";
PDCCH_TCI_StateId = 32;
tci_PresentInDCI = "ENABLE";
PDCCH_DMRS_ScramblingID = 0;
SearchSpaceId = 10;
commonSearchSpaces_controlResourceSetId = 5;
SearchSpace_monitoringSlotPeriodicityAndOffset_choice = "sl1";
SearchSpace_monitoringSlotPeriodicityAndOffset_value = 0;
SearchSpace_duration = 2;
SearchSpace_nrofCandidates_aggregationLevel1 = 0;
SearchSpace_nrofCandidates_aggregationLevel2 = 0;
SearchSpace_nrofCandidates_aggregationLevel4 = 0;
SearchSpace_nrofCandidates_aggregationLevel8 = 0;
SearchSpace_nrofCandidates_aggregationLevel16 = 0;
SearchSpace_searchSpaceType = "common";
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel1 = 1;
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel2 = 1;
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel4 = 1;
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel8 = 1;
Common_dci_Format2_0_nrofCandidates_SFI_aggregationLevel16 = 1;
Common_dci_Format2_3_monitoringPeriodicity = 1;
Common_dci_Format2_3_nrofPDCCH_Candidates = 1;
ue_Specific__dci_Formats = "formats0-0-And-1-0";
RateMatchPatternLTE_CRS_carrierFreqDL = 6;
RateMatchPatternLTE_CRS_carrierBandwidthDL = 6;
RateMatchPatternLTE_CRS_nrofCRS_Ports = 1;
RateMatchPatternLTE_CRS_v_Shift = 0;
RateMatchPatternLTE_CRS_radioframeAllocationPeriod = 1;
RateMatchPatternLTE_CRS_radioframeAllocationOffset = 0;
RateMatchPatternLTE_CRS_subframeAllocation_choice = "oneFrame";
}
);
srb1_parameters :
{
# timer_poll_retransmit = (ms) [5, 10, 15, 20,... 250, 300, 350, ... 500]
timer_poll_retransmit = 80;
# timer_reordering = (ms) [0,5, ... 100, 110, 120, ... ,200]
timer_reordering = 35;
# timer_reordering = (ms) [0,5, ... 250, 300, 350, ... ,500]
timer_status_prohibit = 0;
# poll_pdu = [4, 8, 16, 32 , 64, 128, 256, infinity(>10000)]
poll_pdu = 4;
# poll_byte = (kB) [25,50,75,100,125,250,375,500,750,1000,1250,1500,2000,3000,infinity(>10000)]
poll_byte = 99999;
# max_retx_threshold = [1, 2, 3, 4 , 6, 8, 16, 32]
max_retx_threshold = 4;
}
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// MME parameters:
mme_ip_address = ( { ipv4 = "192.168.12.26";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
GNB_INTERFACE_NAME_FOR_S1_MME = "eth0";
GNB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.111/24";
GNB_INTERFACE_NAME_FOR_S1U = "eth0";
GNB_IPV4_ADDRESS_FOR_S1U = "192.168.12.111/24";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
}
);
RUs = (
{
local_rf = "yes"
nb_tx = 2
nb_rx = 1
att_tx = 0
att_rx = 0;
bands = [7];
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
sdr_addrs = "addr=192.168.10.2";
# beamforming weights for static beams each of them is a int32 composed by two int16 representing imaginary and real part of the weight
# weights are input in an array, starting with the weights associated to first logical beam for all nb_tx , than the weights for 2nd logical beam and so on
# the list size is (nb_tx) X (number of logical beams)
bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
}
);
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
);
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
};
...@@ -113,7 +113,7 @@ uint16_t runtime_phy_tx[29][6]; // SISO [MCS 0-28][RBs 0-5 : 6, 15, 25, 50, 75, ...@@ -113,7 +113,7 @@ uint16_t runtime_phy_tx[29][6]; // SISO [MCS 0-28][RBs 0-5 : 6, 15, 25, 50, 75,
volatile int oai_exit = 0; volatile int oai_exit = 0;
uint32_t downlink_frequency[MAX_NUM_CCs][4]; uint64_t downlink_frequency[MAX_NUM_CCs][4];
int32_t uplink_frequency_offset[MAX_NUM_CCs][4]; int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
int UE_scan = 1; int UE_scan = 1;
......
...@@ -189,7 +189,7 @@ ...@@ -189,7 +189,7 @@
{"clock", CONFIG_HLP_CLK, 0, uptr:&CLOCK_SOURCE, defintval:0, TYPE_UINT, 0}, \ {"clock", CONFIG_HLP_CLK, 0, uptr:&CLOCK_SOURCE, defintval:0, TYPE_UINT, 0}, \
{"wait-for-sync", NULL, PARAMFLAG_BOOL, iptr:&WAIT_FOR_SYNC, defintval:0, TYPE_INT, 0}, \ {"wait-for-sync", NULL, PARAMFLAG_BOOL, iptr:&WAIT_FOR_SYNC, defintval:0, TYPE_INT, 0}, \
{"single-thread-enable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&SINGLE_THREAD_FLAG, defintval:0, TYPE_INT, 0}, \ {"single-thread-enable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&SINGLE_THREAD_FLAG, defintval:0, TYPE_INT, 0}, \
{"C" , CONFIG_HLP_DLF, 0, uptr:&(downlink_frequency[0][0]), defuintval:2680000000, TYPE_UINT, 0}, \ {"C" , CONFIG_HLP_DLF, 0, u64ptr:&(downlink_frequency[0][0]), defuintval:2680000000, TYPE_UINT64, 0}, \
{"a" , CONFIG_HLP_CHOFF, 0, iptr:&CHAIN_OFFSET, defintval:0, TYPE_INT, 0}, \ {"a" , CONFIG_HLP_CHOFF, 0, iptr:&CHAIN_OFFSET, defintval:0, TYPE_INT, 0}, \
{"d" , CONFIG_HLP_SOFTS, PARAMFLAG_BOOL, uptr:(uint32_t *)&do_forms, defintval:0, TYPE_INT8, 0}, \ {"d" , CONFIG_HLP_SOFTS, PARAMFLAG_BOOL, uptr:(uint32_t *)&do_forms, defintval:0, TYPE_INT8, 0}, \
{"q" , CONFIG_HLP_STMON, PARAMFLAG_BOOL, iptr:&opp_enabled, defintval:0, TYPE_INT, 0}, \ {"q" , CONFIG_HLP_STMON, PARAMFLAG_BOOL, iptr:&opp_enabled, defintval:0, TYPE_INT, 0}, \
...@@ -264,7 +264,7 @@ extern pthread_cond_t sync_cond; ...@@ -264,7 +264,7 @@ extern pthread_cond_t sync_cond;
extern pthread_mutex_t sync_mutex; extern pthread_mutex_t sync_mutex;
extern int sync_var; extern int sync_var;
extern uint32_t downlink_frequency[MAX_NUM_CCs][4]; extern uint64_t downlink_frequency[MAX_NUM_CCs][4];
extern int32_t uplink_frequency_offset[MAX_NUM_CCs][4]; extern int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
extern int rx_input_level_dBm; extern int rx_input_level_dBm;
......
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