Commit 1e3de798 authored by Robert Schmidt's avatar Robert Schmidt

Merge remote-tracking branch 'origin/NR_UE_BWP_reworking_continuation' into integration_2023_w09

parents 5b13d71e 605efb5e
...@@ -87,6 +87,7 @@ typedef struct { ...@@ -87,6 +87,7 @@ typedef struct {
typedef struct { typedef struct {
uint16_t rnti; uint16_t rnti;
uint8_t dci_format; uint8_t dci_format;
uint8_t coreset_type;
int ss_type; int ss_type;
// n_CCE index of first CCE for PDCCH reception // n_CCE index of first CCE for PDCCH reception
int n_CCE; int n_CCE;
......
...@@ -935,6 +935,7 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue, ...@@ -935,6 +935,7 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
dci_ind->dci_list[dci_ind->number_of_dcis].N_CCE = L; dci_ind->dci_list[dci_ind->number_of_dcis].N_CCE = L;
dci_ind->dci_list[dci_ind->number_of_dcis].dci_format = rel15->dci_format_options[k]; dci_ind->dci_list[dci_ind->number_of_dcis].dci_format = rel15->dci_format_options[k];
dci_ind->dci_list[dci_ind->number_of_dcis].ss_type = rel15->dci_type_options[k]; dci_ind->dci_list[dci_ind->number_of_dcis].ss_type = rel15->dci_type_options[k];
dci_ind->dci_list[dci_ind->number_of_dcis].coreset_type = rel15->coreset.CoreSetType;
int n_rb, rb_offset; int n_rb, rb_offset;
get_coreset_rballoc(rel15->coreset.frequency_domain_resource, &n_rb, &rb_offset); get_coreset_rballoc(rel15->coreset.frequency_domain_resource, &n_rb, &rb_offset);
dci_ind->dci_list[dci_ind->number_of_dcis].cset_start = rel15->BWPStart + rb_offset; dci_ind->dci_list[dci_ind->number_of_dcis].cset_start = rel15->BWPStart + rb_offset;
......
...@@ -879,7 +879,6 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, ...@@ -879,7 +879,6 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
const double N_TA_max = Ta_max * bw_scaling * tc_factor; const double N_TA_max = Ta_max * bw_scaling * tc_factor;
NR_UE_MAC_INST_t *mac = get_mac_inst(0); NR_UE_MAC_INST_t *mac = get_mac_inst(0);
NR_BWP_Id_t dl_bwp = mac->current_DL_BWP.bwp_id;
NR_BWP_Id_t ul_bwp = mac->current_UL_BWP.bwp_id; NR_BWP_Id_t ul_bwp = mac->current_UL_BWP.bwp_id;
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL; NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL;
...@@ -908,17 +907,8 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue, ...@@ -908,17 +907,8 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
} }
long mapping_type_ul = pusch_TimeDomainAllocationList ? pusch_TimeDomainAllocationList->list.array[0]->mappingType : NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA; long mapping_type_ul = pusch_TimeDomainAllocationList ? pusch_TimeDomainAllocationList->list.array[0]->mappingType : NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA;
NR_PDSCH_Config_t *pdsch_Config = NULL; NR_PDSCH_Config_t *pdsch_Config = mac->current_DL_BWP.pdsch_Config;
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL; NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = mac->current_DL_BWP.tdaList_Common;
if(dl_bwp){
pdsch_Config = (mac->DLbwp[dl_bwp-1] && mac->DLbwp[dl_bwp-1]->bwp_Dedicated->pdsch_Config->choice.setup) ? mac->DLbwp[dl_bwp-1]->bwp_Dedicated->pdsch_Config->choice.setup : NULL;
if (mac->DLbwp[dl_bwp-1] && mac->DLbwp[dl_bwp-1]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = pdsch_Config->pdsch_TimeDomainAllocationList->choice.setup;
else if (mac->DLbwp[dl_bwp-1] && mac->DLbwp[dl_bwp-1]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = mac->DLbwp[dl_bwp-1]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
}
else if (mac->scc_SIB && mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup)
pdsch_TimeDomainAllocationList = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
long mapping_type_dl = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[0]->mappingType : NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA; long mapping_type_dl = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[0]->mappingType : NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA;
NR_DMRS_DownlinkConfig_t *NR_DMRS_dlconfig = NULL; NR_DMRS_DownlinkConfig_t *NR_DMRS_dlconfig = NULL;
......
...@@ -256,9 +256,10 @@ void nr_dlsim_preprocessor(module_id_t module_id, ...@@ -256,9 +256,10 @@ void nr_dlsim_preprocessor(module_id_t module_id,
* configuration */ * configuration */
current_BWP->mcsTableIdx = g_mcsTableIdx; current_BWP->mcsTableIdx = g_mcsTableIdx;
sched_pdsch->time_domain_allocation = get_dl_tda(RC.nrmac[module_id], scc, slot); sched_pdsch->time_domain_allocation = get_dl_tda(RC.nrmac[module_id], scc, slot);
AssertFatal(sched_pdsch->time_domain_allocation>=0,"Unable to find PDSCH time domain allocation in list\n"); AssertFatal(sched_pdsch->time_domain_allocation >= 0,"Unable to find PDSCH time domain allocation in list\n");
sched_pdsch->tda_info = nr_get_pdsch_tda_info(current_BWP, sched_pdsch->time_domain_allocation); sched_pdsch->tda_info = get_dl_tda_info(current_BWP, sched_ctrl->search_space->searchSpaceType->present, sched_pdsch->time_domain_allocation,
NR_MIB__dmrs_TypeA_Position_pos2, 1, NR_RNTI_C, sched_ctrl->coreset->controlResourceSetId, false);
sched_pdsch->dmrs_parms = get_dl_dmrs_params(scc, sched_pdsch->dmrs_parms = get_dl_dmrs_params(scc,
current_BWP, current_BWP,
......
...@@ -574,9 +574,10 @@ typedef struct NR_UE_DL_BWP { ...@@ -574,9 +574,10 @@ typedef struct NR_UE_DL_BWP {
uint16_t BWPStart; uint16_t BWPStart;
uint16_t initial_BWPSize; uint16_t initial_BWPSize;
uint16_t initial_BWPStart; uint16_t initial_BWPStart;
NR_PDSCH_TimeDomainResourceAllocationList_t *tdaList; NR_PDSCH_TimeDomainResourceAllocationList_t *tdaList_Common;
NR_PDSCH_Config_t *pdsch_Config; NR_PDSCH_Config_t *pdsch_Config;
NR_PDSCH_ServingCellConfig_t *pdsch_servingcellconfig; NR_PDSCH_ServingCellConfig_t *pdsch_servingcellconfig;
long *pdsch_HARQ_ACK_Codebook;
uint8_t mcsTableIdx; uint8_t mcsTableIdx;
nr_dci_format_t dci_format; nr_dci_format_t dci_format;
} NR_UE_DL_BWP_t; } NR_UE_DL_BWP_t;
...@@ -590,18 +591,40 @@ typedef struct NR_UE_UL_BWP { ...@@ -590,18 +591,40 @@ typedef struct NR_UE_UL_BWP {
uint16_t BWPStart; uint16_t BWPStart;
uint16_t initial_BWPSize; uint16_t initial_BWPSize;
uint16_t initial_BWPStart; uint16_t initial_BWPStart;
NR_RACH_ConfigCommon_t *rach_ConfigCommon;
NR_PUSCH_ServingCellConfig_t *pusch_servingcellconfig; NR_PUSCH_ServingCellConfig_t *pusch_servingcellconfig;
NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList; NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList_Common;
NR_ConfiguredGrantConfig_t *configuredGrantConfig;
NR_PUSCH_Config_t *pusch_Config; NR_PUSCH_Config_t *pusch_Config;
NR_PUCCH_Config_t *pucch_Config; NR_PUCCH_Config_t *pucch_Config;
NR_PUCCH_ConfigCommon_t *pucch_ConfigCommon; NR_PUCCH_ConfigCommon_t *pucch_ConfigCommon;
long *harq_ACK_SpatialBundlingPUCCH;
NR_CSI_MeasConfig_t *csi_MeasConfig; NR_CSI_MeasConfig_t *csi_MeasConfig;
NR_SRS_Config_t *srs_Config; NR_SRS_Config_t *srs_Config;
long *msg3_DeltaPreamble;
uint8_t transform_precoding; uint8_t transform_precoding;
uint8_t mcs_table; uint8_t mcs_table;
nr_dci_format_t dci_format; nr_dci_format_t dci_format;
int max_fb_time; int max_fb_time;
} NR_UE_UL_BWP_t; } NR_UE_UL_BWP_t;
typedef enum {
defaultA = 0,
defaultB = 1,
defaultC = 2
} default_table_type_t;
typedef enum {
typeA = 0,
typeB = 1
} mappingType_t;
typedef struct NR_tda_info {
mappingType_t mapping_type;
int startSymbolIndex;
int nrOfSymbols;
long k2;
} NR_tda_info_t;
#endif /*__LAYER2_MAC_H__ */ #endif /*__LAYER2_MAC_H__ */
...@@ -419,79 +419,230 @@ const char table_38211_6_3_1_5_5[22][4][2] = { ...@@ -419,79 +419,230 @@ const char table_38211_6_3_1_5_5[22][4][2] = {
{{'1', '1'}, {'o', 'o'}, {'j', 'o'}, {'1', 'n'}} // tpmi 21 {{'1', '1'}, {'o', 'o'}, {'j', 'o'}, {'1', 'n'}} // tpmi 21
}; };
void get_info_from_tda_tables(int default_abc, // Default PUSCH time domain resource allocation tables from 38.214
int tda, const uint8_t table_6_1_2_1_1_2[16][4] = {
int dmrs_TypeA_Position, {0, 0, 0, 14}, // row index 1
int normal_CP, {0, 0, 0, 12}, // row index 2
bool *is_mapping_typeA, {0, 0, 0, 10}, // row index 3
int *startSymbolIndex, {1, 0, 2, 10}, // row index 4
int *nrOfSymbols) { {1, 0, 4, 10}, // row index 5
{1, 0, 4, 8}, // row index 6
{1, 0, 4, 6}, // row index 7
{0, 1, 0, 14}, // row index 8
{0, 1, 0, 12}, // row index 9
{0, 1, 0, 10}, // row index 10
{0, 2, 0, 14}, // row index 11
{0, 2, 0, 12}, // row index 12
{0, 2, 0, 10}, // row index 13
{1, 0, 8, 6}, // row index 14
{0, 3, 0, 14}, // row index 15
{0, 3, 0, 10} // row index 16
};
const uint8_t table_6_1_2_1_1_3[16][4] = {
{0, 0, 0, 8}, // row index 1
{0, 0, 0, 12}, // row index 2
{0, 0, 0, 10}, // row index 3
{1, 0, 2, 10}, // row index 4
{1, 0, 4, 4}, // row index 5
{1, 0, 4, 8}, // row index 6
{1, 0, 4, 6}, // row index 7
{0, 1, 0, 8}, // row index 8
{0, 1, 0, 12}, // row index 9
{0, 1, 0, 10}, // row index 10
{0, 2, 0, 6}, // row index 11
{0, 2, 0, 12}, // row index 12
{0, 2, 0, 10}, // row index 13
{1, 0, 8, 4}, // row index 14
{0, 3, 0, 8}, // row index 15
{0, 3, 0, 10} // row index 16
};
NR_tda_info_t get_ul_tda_info(const NR_UE_UL_BWP_t *ul_bwp, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type, int tda_index)
{
NR_tda_info_t tda_info = {0};
NR_PUSCH_TimeDomainResourceAllocationList_t *tdalist = get_ul_tdalist(ul_bwp, controlResourceSetId, ss_type, rnti_type);
// Definition of value j in Table 6.1.2.1.1-4 of 38.214
int scs = ul_bwp->scs;
AssertFatal(scs >= 0 && scs < 5, "Subcarrier spacing indicatior %d invalid value\n", scs);
int j = scs == 0 ? 1 : scs;
if (tdalist) {
AssertFatal(tda_index < tdalist->list.count, "TDA index from DCI %d exceeds TDA list array size %d\n", tda_index, tdalist->list.count);
NR_PUSCH_TimeDomainResourceAllocation_t *tda = tdalist->list.array[tda_index];
tda_info.mapping_type = tda->mappingType;
// As described in 38.331, when the field is absent the UE applies the value 1 when PUSCH SCS is 15/30KHz
// 2 when PUSCH SCS is 60KHz and 3 when PUSCH SCS is 120KHz. This equates to the parameter j.
tda_info.k2 = tda->k2 ? *tda->k2 : j;
int S, L;
SLIV2SL(tda->startSymbolAndLength, &S, &L);
tda_info.startSymbolIndex = S;
tda_info.nrOfSymbols = L;
} else {
bool normal_CP = ul_bwp->cyclicprefix ? false : true;
if (normal_CP) {
tda_info.mapping_type = table_6_1_2_1_1_2[tda_index][0];
tda_info.k2 = table_6_1_2_1_1_2[tda_index][1] + j;
tda_info.startSymbolIndex = table_6_1_2_1_1_2[tda_index][2];
tda_info.nrOfSymbols = table_6_1_2_1_1_2[tda_index][3];
} else {
tda_info.mapping_type = table_6_1_2_1_1_3[tda_index][0];
tda_info.k2 = table_6_1_2_1_1_3[tda_index][1] + j;
tda_info.startSymbolIndex = table_6_1_2_1_1_3[tda_index][2];
tda_info.nrOfSymbols = table_6_1_2_1_1_3[tda_index][3];
}
}
return tda_info;
}
NR_tda_info_t get_info_from_tda_tables(default_table_type_t table_type,
int tda,
int dmrs_TypeA_Position,
int normal_CP)
{
NR_tda_info_t tda_info = {0};
bool is_mapping_typeA;
int k0 = 0; int k0 = 0;
switch(default_abc){ switch(table_type){
case 1: case defaultA:
if (normal_CP){ if (normal_CP){
if (dmrs_TypeA_Position){ if (dmrs_TypeA_Position){
*is_mapping_typeA = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[tda][0]; is_mapping_typeA = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[tda][0];
k0 = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[tda][1]; k0 = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[tda][1];
*startSymbolIndex = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[tda][2]; tda_info.startSymbolIndex = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[tda][2];
*nrOfSymbols = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[tda][3]; tda_info.nrOfSymbols = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[tda][3];
} }
else{ else{
*is_mapping_typeA = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[tda][0]; is_mapping_typeA = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[tda][0];
k0 = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[tda][1]; k0 = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[tda][1];
*startSymbolIndex = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[tda][2]; tda_info.startSymbolIndex = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[tda][2];
*nrOfSymbols = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[tda][3]; tda_info.nrOfSymbols = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[tda][3];
} }
} }
else{ else{
if (dmrs_TypeA_Position){ if (dmrs_TypeA_Position){
*is_mapping_typeA = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos3[tda][0]; is_mapping_typeA = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos3[tda][0];
k0 = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos3[tda][1]; k0 = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos3[tda][1];
*startSymbolIndex = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos3[tda][2]; tda_info.startSymbolIndex = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos3[tda][2];
*nrOfSymbols = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos3[tda][3]; tda_info.nrOfSymbols = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos3[tda][3];
} }
else{ else{
*is_mapping_typeA = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos2[tda][0]; is_mapping_typeA = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos2[tda][0];
k0 = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos2[tda][1]; k0 = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos2[tda][1];
*startSymbolIndex = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos2[tda][2]; tda_info.startSymbolIndex = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos2[tda][2];
*nrOfSymbols = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos2[tda][3]; tda_info.nrOfSymbols = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP_dmrs_typeA_pos2[tda][3];
} }
} }
break; break;
case 2: case defaultB:
if (dmrs_TypeA_Position){ if (dmrs_TypeA_Position){
*is_mapping_typeA = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos3[tda][0]; is_mapping_typeA = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos3[tda][0];
k0 = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos3[tda][1]; k0 = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos3[tda][1];
*startSymbolIndex = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos3[tda][2]; tda_info.startSymbolIndex = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos3[tda][2];
*nrOfSymbols = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos3[tda][3]; tda_info.nrOfSymbols = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos3[tda][3];
} }
else{ else{
*is_mapping_typeA = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos2[tda][0]; is_mapping_typeA = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos2[tda][0];
k0 = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos2[tda][1]; k0 = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos2[tda][1];
*startSymbolIndex = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos2[tda][2]; tda_info.startSymbolIndex = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos2[tda][2];
*nrOfSymbols = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos2[tda][3]; tda_info.nrOfSymbols = table_5_1_2_1_1_4_time_dom_res_alloc_B_dmrs_typeA_pos2[tda][3];
} }
break; break;
case 3: case defaultC:
if (dmrs_TypeA_Position){ if (dmrs_TypeA_Position){
*is_mapping_typeA = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos3[tda][0]; is_mapping_typeA = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos3[tda][0];
k0 = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos3[tda][1]; k0 = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos3[tda][1];
*startSymbolIndex = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos3[tda][2]; tda_info.startSymbolIndex = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos3[tda][2];
*nrOfSymbols = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos3[tda][3]; tda_info.nrOfSymbols = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos3[tda][3];
} }
else{ else{
*is_mapping_typeA = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos2[tda][0]; is_mapping_typeA = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos2[tda][0];
k0 = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos2[tda][1]; k0 = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos2[tda][1];
*startSymbolIndex = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos2[tda][2]; tda_info.startSymbolIndex = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos2[tda][2];
*nrOfSymbols = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos2[tda][3]; tda_info.nrOfSymbols = table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos2[tda][3];
} }
break; break;
default: default:
AssertFatal(1==0,"Invalid default time domaing allocation type\n"); AssertFatal(1 == 0, "Invalid default time domaing allocation type\n");
}
AssertFatal(k0 == 0, "Only k0 = 0 is supported\n");
tda_info.mapping_type = is_mapping_typeA ? typeA : typeB;
return tda_info;
}
default_table_type_t get_default_table_type(int mux_pattern)
{
switch (mux_pattern) {
case 1:
return defaultA;
case 2:
return defaultB;
case 3:
return defaultC;
default :
AssertFatal(1 == 0, "Invalid multiplexing type %d\n", mux_pattern);
} }
AssertFatal(k0==0,"Only k0 = 0 is supported\n");
} }
NR_tda_info_t set_tda_info_from_list(NR_PDSCH_TimeDomainResourceAllocationList_t *tdalist, int tda_index)
{
NR_tda_info_t tda_info = {0};
AssertFatal(tda_index < tdalist->list.count, "TDA index from DCI %d exceeds TDA list array size %d\n", tda_index, tdalist->list.count);
NR_PDSCH_TimeDomainResourceAllocation_t *tda = tdalist->list.array[tda_index];
tda_info.mapping_type = tda->mappingType;
int S, L;
SLIV2SL(tda->startSymbolAndLength, &S, &L);
tda_info.startSymbolIndex = S;
tda_info.nrOfSymbols = L;
return tda_info;
}
NR_tda_info_t get_dl_tda_info(const NR_UE_DL_BWP_t *dl_BWP, int ss_type, int tda_index, int dmrs_typeA_pos,
int mux_pattern, nr_rnti_type_t rnti_type, int coresetid, bool sib1)
{
NR_tda_info_t tda_info;
bool normal_CP = dl_BWP->cyclicprefix ? false : true;
// implements Table 5.1.2.1.1-1 of 38.214
NR_PDSCH_TimeDomainResourceAllocationList_t *tdalist = get_dl_tdalist(dl_BWP, coresetid, ss_type, rnti_type);
switch (rnti_type) {
case NR_RNTI_SI:
if(sib1) {
default_table_type_t table_type = get_default_table_type(mux_pattern);
tda_info = get_info_from_tda_tables(table_type, tda_index, dmrs_typeA_pos, normal_CP);
}
else {
if(tdalist)
tda_info = set_tda_info_from_list(tdalist, tda_index);
else {
default_table_type_t table_type = get_default_table_type(mux_pattern);
tda_info = get_info_from_tda_tables(table_type, tda_index, dmrs_typeA_pos, normal_CP);
}
}
break;
case NR_RNTI_P:
if(tdalist)
tda_info = set_tda_info_from_list(tdalist, tda_index);
else {
default_table_type_t table_type = get_default_table_type(mux_pattern);
tda_info = get_info_from_tda_tables(table_type, tda_index, dmrs_typeA_pos, normal_CP);
}
break;
case NR_RNTI_C:
case NR_RNTI_CS:
case NR_RNTI_MCS_C:
case NR_RNTI_RA:
case NR_RNTI_TC:
if(tdalist)
tda_info = set_tda_info_from_list(tdalist, tda_index);
else
tda_info = get_info_from_tda_tables(defaultA, tda_index, dmrs_typeA_pos, normal_CP);
break;
default :
AssertFatal(1 == 0, "Invalid RNTI type\n");
}
return tda_info;
}
const char *prachfmt[]={"0","1","2","3", "A1","A2","A3","B1","B4","C0","C2","A1/B1","A2/B2","A3/B3"}; const char *prachfmt[]={"0","1","2","3", "A1","A2","A3","B1","B4","C0","C2","A1/B1","A2/B2","A3/B3"};
uint16_t get_NCS(uint8_t index, uint16_t format0, uint8_t restricted_set_config) { uint16_t get_NCS(uint8_t index, uint16_t format0, uint8_t restricted_set_config) {
...@@ -2701,38 +2852,15 @@ uint16_t get_nr_srs_offset(NR_SRS_PeriodicityAndOffset_t periodicityAndOffset) { ...@@ -2701,38 +2852,15 @@ uint16_t get_nr_srs_offset(NR_SRS_PeriodicityAndOffset_t periodicityAndOffset) {
// Set the transform precoding status according to 6.1.3 of 3GPP TS 38.214 version 16.3.0 Release 16: // Set the transform precoding status according to 6.1.3 of 3GPP TS 38.214 version 16.3.0 Release 16:
// - "UE procedure for applying transform precoding on PUSCH" // - "UE procedure for applying transform precoding on PUSCH"
uint8_t get_transformPrecoding(const NR_BWP_UplinkCommon_t *initialUplinkBWP, uint8_t get_transformPrecoding(const NR_UE_UL_BWP_t *current_UL_BWP, nr_dci_format_t dci_format, uint8_t configuredGrant)
const NR_PUSCH_Config_t *pusch_config, {
const NR_BWP_UplinkDedicated_t *ubwp, if (configuredGrant && current_UL_BWP->configuredGrantConfig && current_UL_BWP->configuredGrantConfig->transformPrecoder)
uint8_t *dci_format, return *current_UL_BWP->configuredGrantConfig->transformPrecoder;
int rnti_type,
uint8_t configuredGrant){
if (configuredGrant) {
if (ubwp->configuredGrantConfig) {
if (ubwp->configuredGrantConfig->choice.setup->transformPrecoder) {
return *ubwp->configuredGrantConfig->choice.setup->transformPrecoder;
}
}
}
if (rnti_type != NR_RNTI_RA && rnti_type != NR_RNTI_TC) {
if (*dci_format != NR_UL_DCI_FORMAT_0_0) {
if (pusch_config && pusch_config->transformPrecoder != NULL) {
return *pusch_config->transformPrecoder;
}
}
}
if (initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder == NULL) {
return 1; // Transformprecoding disabled
} else {
LOG_D(PHY, "MAC_COMMON: Transform Precodig enabled through msg3_transformPrecoder\n");
return 0; // Enabled
}
LOG_E(MAC, "In %s: could not fetch transform precoder status...\n", __FUNCTION__); if (dci_format == NR_UL_DCI_FORMAT_0_1 && current_UL_BWP && current_UL_BWP->pusch_Config && current_UL_BWP->pusch_Config->transformPrecoder)
return -1; return *current_UL_BWP->pusch_Config->transformPrecoder;
else
return current_UL_BWP->rach_ConfigCommon->msg3_transformPrecoder ? 0 : 1;
} }
uint8_t get_pusch_nb_antenna_ports(NR_PUSCH_Config_t *pusch_Config, uint8_t get_pusch_nb_antenna_ports(NR_PUSCH_Config_t *pusch_Config,
...@@ -3130,6 +3258,27 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config, ...@@ -3130,6 +3258,27 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config,
return nbits; return nbits;
} }
NR_PDSCH_TimeDomainResourceAllocationList_t *get_dl_tdalist(const NR_UE_DL_BWP_t *DL_BWP, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type)
{
if (!DL_BWP)
return NULL;
// see table 5.1.2.1.1-1 in 38.214
if ((rnti_type == NR_RNTI_CS || rnti_type == NR_RNTI_C || rnti_type == NR_RNTI_MCS_C) && !(ss_type == NR_SearchSpace__searchSpaceType_PR_common && controlResourceSetId == 0)
&& (DL_BWP->pdsch_Config && DL_BWP->pdsch_Config->pdsch_TimeDomainAllocationList))
return DL_BWP->pdsch_Config->pdsch_TimeDomainAllocationList->choice.setup;
else
return DL_BWP->tdaList_Common;
}
NR_PUSCH_TimeDomainResourceAllocationList_t *get_ul_tdalist(const NR_UE_UL_BWP_t *UL_BWP, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type)
{
if ((rnti_type == NR_RNTI_CS || rnti_type == NR_RNTI_C || rnti_type == NR_RNTI_MCS_C) && !(ss_type == NR_SearchSpace__searchSpaceType_PR_common && controlResourceSetId == 0)
&& (UL_BWP->pusch_Config && UL_BWP->pusch_Config->pusch_TimeDomainAllocationList))
return UL_BWP->pusch_Config->pusch_TimeDomainAllocationList->choice.setup;
else
return UL_BWP->tdaList_Common;
}
uint16_t get_rb_bwp_dci(nr_dci_format_t format, uint16_t get_rb_bwp_dci(nr_dci_format_t format,
int ss_type, int ss_type,
uint16_t cset0_bwp_size, uint16_t cset0_bwp_size,
...@@ -3155,15 +3304,13 @@ uint16_t get_rb_bwp_dci(nr_dci_format_t format, ...@@ -3155,15 +3304,13 @@ uint16_t get_rb_bwp_dci(nr_dci_format_t format,
return N_RB; return N_RB;
} }
uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
const NR_BWP_UplinkCommon_t *initialUplinkBWP,
const NR_UE_DL_BWP_t *DL_BWP,
const NR_UE_UL_BWP_t *UL_BWP, const NR_UE_UL_BWP_t *UL_BWP,
const NR_CellGroupConfig_t *cg, const NR_CellGroupConfig_t *cg,
dci_pdu_rel15_t *dci_pdu, dci_pdu_rel15_t *dci_pdu,
nr_dci_format_t format, nr_dci_format_t format,
nr_rnti_type_t rnti_type, nr_rnti_type_t rnti_type,
int controlResourceSetId, NR_ControlResourceSet_t *coreset,
int bwp_id, int bwp_id,
int ss_type, int ss_type,
uint16_t cset0_bwp_size, uint16_t cset0_bwp_size,
...@@ -3175,43 +3322,10 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, ...@@ -3175,43 +3322,10 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
long rbg_size_config; long rbg_size_config;
int num_entries = 0; int num_entries = 0;
NR_UplinkConfig_t *uplinkConfig = NULL; NR_PDSCH_Config_t *pdsch_Config = DL_BWP ? DL_BWP->pdsch_Config : NULL;
if (cg && cg->spCellConfig && cg->spCellConfig->spCellConfigDedicated) { NR_PUSCH_Config_t *pusch_Config = UL_BWP ? UL_BWP->pusch_Config : NULL;
uplinkConfig = cg->spCellConfig->spCellConfigDedicated->uplinkConfig; NR_PUCCH_Config_t *pucch_Config = UL_BWP ? UL_BWP->pucch_Config : NULL;
} NR_SRS_Config_t *srs_config = UL_BWP ? UL_BWP->srs_Config : NULL;
const NR_BWP_DownlinkDedicated_t *bwpd = NULL;
const NR_BWP_UplinkDedicated_t *ubwpd = NULL;
const NR_BWP_DownlinkCommon_t *bwpc = NULL;
const NR_BWP_UplinkCommon_t *ubwpc = NULL;
NR_PDSCH_Config_t *pdsch_Config = NULL;
NR_PUSCH_Config_t *pusch_Config = NULL;
NR_PUCCH_Config_t *pucch_Config = NULL;
NR_PDCCH_Config_t *pdcch_Config = NULL;
NR_SRS_Config_t *srs_config = NULL;
if(bwp_id > 0) {
AssertFatal(cg!=NULL,"Cellgroup is null and bwp_id!=0");
bwpd = cg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1]->bwp_Dedicated;
bwpc = cg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1]->bwp_Common;
ubwpd = uplinkConfig ? uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_id-1]->bwp_Dedicated : NULL;
ubwpc = uplinkConfig ? uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_id-1]->bwp_Common : NULL;
pdsch_Config = (bwpd->pdsch_Config) ? bwpd->pdsch_Config->choice.setup : NULL;
pdcch_Config = (bwpd->pdcch_Config) ? bwpd->pdcch_Config->choice.setup : NULL;
pucch_Config = (ubwpd->pucch_Config) ? ubwpd->pucch_Config->choice.setup : NULL;
pusch_Config = (ubwpd->pusch_Config) ? ubwpd->pusch_Config->choice.setup : NULL;
srs_config = (ubwpd->srs_Config) ? ubwpd->srs_Config->choice.setup : NULL;
} else if (cg) {
bwpc = initialDownlinkBWP;
ubwpc = initialUplinkBWP;
bwpd = cg->spCellConfig && cg->spCellConfig->spCellConfigDedicated ?
cg->spCellConfig->spCellConfigDedicated->initialDownlinkBWP : NULL;
ubwpd = uplinkConfig ? uplinkConfig->initialUplinkBWP : NULL;
pdsch_Config = (bwpd && bwpd->pdsch_Config) ? bwpd->pdsch_Config->choice.setup : NULL;
pdcch_Config = (bwpd && bwpd->pdcch_Config) ? bwpd->pdcch_Config->choice.setup : NULL;
pucch_Config = (ubwpd && ubwpd->pucch_Config) ? ubwpd->pucch_Config->choice.setup : NULL;
pusch_Config = (ubwpd && ubwpd->pusch_Config) ? ubwpd->pusch_Config->choice.setup : NULL;
srs_config = (ubwpd && ubwpd->srs_Config) ? ubwpd->srs_Config->choice.setup: NULL;
}
uint16_t N_RB = cset0_bwp_size; uint16_t N_RB = cset0_bwp_size;
if (DL_BWP) if (DL_BWP)
...@@ -3223,7 +3337,6 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, ...@@ -3223,7 +3337,6 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
UL_BWP->initial_BWPSize, UL_BWP->initial_BWPSize,
DL_BWP->initial_BWPSize); DL_BWP->initial_BWPSize);
int n_ul_bwp = 1,n_dl_bwp = 1;
switch(format) { switch(format) {
case NR_UL_DCI_FORMAT_0_0: case NR_UL_DCI_FORMAT_0_0:
/// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20 /// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20
...@@ -3253,14 +3366,11 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, ...@@ -3253,14 +3366,11 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
size += dci_pdu->ul_sul_indicator.nbits; size += dci_pdu->ul_sul_indicator.nbits;
} }
// BWP Indicator // BWP Indicator
n_ul_bwp = 0; if (UL_BWP->n_ul_bwp < 2)
if (cg->spCellConfig->spCellConfigDedicated->uplinkConfig && dci_pdu->bwp_indicator.nbits = UL_BWP->n_ul_bwp;
cg->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList)
n_ul_bwp = cg->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.count;
if (n_ul_bwp < 2)
dci_pdu->bwp_indicator.nbits = n_ul_bwp;
else else
dci_pdu->bwp_indicator.nbits = 2; dci_pdu->bwp_indicator.nbits = 2;
LOG_D(NR_MAC, "BWP indicator nbits %d, num UL BWPs %d\n", dci_pdu->bwp_indicator.nbits, UL_BWP->n_ul_bwp);
size += dci_pdu->bwp_indicator.nbits; size += dci_pdu->bwp_indicator.nbits;
// Freq domain assignment // Freq domain assignment
if (pusch_Config) { if (pusch_Config) {
...@@ -3278,19 +3388,13 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, ...@@ -3278,19 +3388,13 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
} }
else else
dci_pdu->frequency_domain_assignment.nbits = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)); dci_pdu->frequency_domain_assignment.nbits = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1));
LOG_D(NR_MAC,"PUSCH Frequency Domain Assignment nbits %d, N_RB %d\n",dci_pdu->frequency_domain_assignment.nbits,N_RB); LOG_D(NR_MAC, "PUSCH Frequency Domain Assignment nbits %d, N_RB %d\n", dci_pdu->frequency_domain_assignment.nbits, N_RB);
size += dci_pdu->frequency_domain_assignment.nbits; size += dci_pdu->frequency_domain_assignment.nbits;
// Time domain assignment // Time domain assignment
if (pusch_Config==NULL || pusch_Config->pusch_TimeDomainAllocationList==NULL) { NR_PUSCH_TimeDomainResourceAllocationList_t *tdalistul = get_ul_tdalist(UL_BWP, coreset->controlResourceSetId, ss_type, rnti_type);
if (ubwpc->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList==NULL) num_entries = tdalistul ? tdalistul->list.count : 16; // 16 in default table
num_entries = 16; // num of entries in default table
else
num_entries = ubwpc->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.count;
}
else
num_entries = pusch_Config->pusch_TimeDomainAllocationList->choice.setup->list.count;
dci_pdu->time_domain_assignment.nbits = (int)ceil(log2(num_entries)); dci_pdu->time_domain_assignment.nbits = (int)ceil(log2(num_entries));
LOG_D(NR_MAC,"PUSCH Time Domain Allocation nbits %d, pusch_Config %p\n",dci_pdu->time_domain_assignment.nbits,pusch_Config); LOG_D(NR_MAC, "PUSCH Time Domain Allocation nbits %d, pusch_Config %p\n", dci_pdu->time_domain_assignment.nbits, pusch_Config);
size += dci_pdu->time_domain_assignment.nbits; size += dci_pdu->time_domain_assignment.nbits;
// Frequency Hopping flag // Frequency Hopping flag
if (pusch_Config && if (pusch_Config &&
...@@ -3300,21 +3404,19 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, ...@@ -3300,21 +3404,19 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
size += 1; size += 1;
} }
// 1st DAI // 1st DAI
if (cg->physicalCellGroupConfig && cg->physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook == NR_PhysicalCellGroupConfig__pdsch_HARQ_ACK_Codebook_dynamic) if (DL_BWP->pdsch_HARQ_ACK_Codebook && *DL_BWP->pdsch_HARQ_ACK_Codebook == NR_PhysicalCellGroupConfig__pdsch_HARQ_ACK_Codebook_dynamic)
dci_pdu->dai[0].nbits = 2; dci_pdu->dai[0].nbits = 2;
else else
dci_pdu->dai[0].nbits = 1; dci_pdu->dai[0].nbits = 1;
size += dci_pdu->dai[0].nbits; size += dci_pdu->dai[0].nbits;
LOG_D(NR_MAC, "DAI1 nbits %d\n", dci_pdu->dai[0].nbits); LOG_D(NR_MAC, "DAI1 nbits %d\n", dci_pdu->dai[0].nbits);
// 2nd DAI // 2nd DAI
if (cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig && cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup if (DL_BWP->pdsch_servingcellconfig && DL_BWP->pdsch_servingcellconfig->codeBlockGroupTransmission != NULL) {
&& cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission != NULL) { // TODO not sure about that
dci_pdu->dai[1].nbits = 2; dci_pdu->dai[1].nbits = 2;
size += dci_pdu->dai[1].nbits; size += dci_pdu->dai[1].nbits;
} }
// SRS resource indicator // SRS resource indicator
NR_PUSCH_ServingCellConfig_t *pusch_servingcellconfig = uplinkConfig && uplinkConfig->pusch_ServingCellConfig ? uplinkConfig->pusch_ServingCellConfig->choice.setup : NULL; dci_pdu->srs_resource_indicator.nbits = compute_srs_resource_indicator(UL_BWP->pusch_servingcellconfig, pusch_Config, srs_config, NULL, NULL);
dci_pdu->srs_resource_indicator.nbits = compute_srs_resource_indicator(pusch_servingcellconfig, pusch_Config, srs_config, NULL, NULL);
size += dci_pdu->srs_resource_indicator.nbits; size += dci_pdu->srs_resource_indicator.nbits;
LOG_D(NR_MAC, "dci_pdu->srs_resource_indicator.nbits %d\n", dci_pdu->srs_resource_indicator.nbits); LOG_D(NR_MAC, "dci_pdu->srs_resource_indicator.nbits %d\n", dci_pdu->srs_resource_indicator.nbits);
// Precoding info and number of layers // Precoding info and number of layers
...@@ -3322,7 +3424,7 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, ...@@ -3322,7 +3424,7 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
size += dci_pdu->precoding_information.nbits; size += dci_pdu->precoding_information.nbits;
LOG_D(NR_MAC, "dci_pdu->precoding_informaiton.nbits=%d\n", dci_pdu->precoding_information.nbits); LOG_D(NR_MAC, "dci_pdu->precoding_informaiton.nbits=%d\n", dci_pdu->precoding_information.nbits);
// Antenna ports // Antenna ports
long transformPrecoder = get_transformPrecoding(initialUplinkBWP, pusch_Config, ubwpd, (uint8_t *)&format, rnti_type, 0); long transformPrecoder = get_transformPrecoding(UL_BWP, format, 0);
NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig = NULL; NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig = NULL;
int xa = 0; int xa = 0;
int xb = 0; int xb = 0;
...@@ -3348,16 +3450,15 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, ...@@ -3348,16 +3450,15 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
dci_pdu->srs_request.nbits = 3; dci_pdu->srs_request.nbits = 3;
size += dci_pdu->srs_request.nbits; size += dci_pdu->srs_request.nbits;
// CSI request // CSI request
if (cg->spCellConfig->spCellConfigDedicated->csi_MeasConfig != NULL) { if (UL_BWP->csi_MeasConfig != NULL) {
if (cg->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup->reportTriggerSize != NULL) { if (UL_BWP->csi_MeasConfig->reportTriggerSize != NULL) {
dci_pdu->csi_request.nbits = *cg->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup->reportTriggerSize; dci_pdu->csi_request.nbits = *UL_BWP->csi_MeasConfig->reportTriggerSize;
size += dci_pdu->csi_request.nbits; size += dci_pdu->csi_request.nbits;
} }
} }
// CBGTI // CBGTI
if (cg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig && if (UL_BWP->pusch_servingcellconfig && UL_BWP->pusch_servingcellconfig->codeBlockGroupTransmission != NULL) {
cg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup->codeBlockGroupTransmission != NULL) { int num = UL_BWP->pusch_servingcellconfig->codeBlockGroupTransmission->choice.setup->maxCodeBlockGroupsPerTransportBlock;
int num = cg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup->codeBlockGroupTransmission->choice.setup->maxCodeBlockGroupsPerTransportBlock;
dci_pdu->cbgti.nbits = 2 + (num<<1); dci_pdu->cbgti.nbits = 2 + (num<<1);
size += dci_pdu->cbgti.nbits; size += dci_pdu->cbgti.nbits;
} }
...@@ -3403,7 +3504,7 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, ...@@ -3403,7 +3504,7 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
break; break;
case NR_DL_DCI_FORMAT_1_1: case NR_DL_DCI_FORMAT_1_1:
LOG_D(NR_MAC,"DCI_FORMAT 1_1 : pdsch_Config %p, pucch_Config %p\n",pdsch_Config,pucch_Config); LOG_D(NR_MAC, "DCI_FORMAT 1_1 : pdsch_Config %p, pucch_Config %p\n", pdsch_Config, pucch_Config);
// General note: 0 bits condition is ignored as default nbits is 0. // General note: 0 bits condition is ignored as default nbits is 0.
// Format identifier // Format identifier
size = 1; size = 1;
...@@ -3414,11 +3515,8 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, ...@@ -3414,11 +3515,8 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
} }
// BWP Indicator // BWP Indicator
n_dl_bwp = 0; if (DL_BWP->n_dl_bwp < 2)
if (cg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList) dci_pdu->bwp_indicator.nbits = DL_BWP->n_dl_bwp;
n_dl_bwp = cg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count;
if (n_dl_bwp < 2)
dci_pdu->bwp_indicator.nbits = n_dl_bwp;
else else
dci_pdu->bwp_indicator.nbits = 2; dci_pdu->bwp_indicator.nbits = 2;
size += dci_pdu->bwp_indicator.nbits; size += dci_pdu->bwp_indicator.nbits;
...@@ -3435,15 +3533,8 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, ...@@ -3435,15 +3533,8 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
dci_pdu->frequency_domain_assignment.nbits = ((int)ceil(log2((N_RB * (N_RB + 1)) >> 1)) > numRBG) ? (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)) + 1 : numRBG + 1; dci_pdu->frequency_domain_assignment.nbits = ((int)ceil(log2((N_RB * (N_RB + 1)) >> 1)) > numRBG) ? (int)ceil(log2((N_RB * (N_RB + 1)) >> 1)) + 1 : numRBG + 1;
size += dci_pdu->frequency_domain_assignment.nbits; size += dci_pdu->frequency_domain_assignment.nbits;
LOG_D(NR_MAC,"dci_pdu->frequency_domain_assignment.nbits %d (N_RB %d)\n",dci_pdu->frequency_domain_assignment.nbits,N_RB); LOG_D(NR_MAC,"dci_pdu->frequency_domain_assignment.nbits %d (N_RB %d)\n",dci_pdu->frequency_domain_assignment.nbits,N_RB);
// Time domain assignment (see table 5.1.2.1.1-1 in 38.214 NR_PDSCH_TimeDomainResourceAllocationList_t *tdalist = get_dl_tdalist(DL_BWP, coreset->controlResourceSetId, ss_type, rnti_type);
if (pdsch_Config == NULL || pdsch_Config->pdsch_TimeDomainAllocationList==NULL) { num_entries = tdalist ? tdalist->list.count : 16; // 16 in default table
if (bwpc->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList==NULL)
num_entries = 16; // num of entries in default table
else
num_entries = bwpc->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count;
}
else
num_entries = pdsch_Config->pdsch_TimeDomainAllocationList->choice.setup->list.count;
dci_pdu->time_domain_assignment.nbits = (int)ceil(log2(num_entries)); dci_pdu->time_domain_assignment.nbits = (int)ceil(log2(num_entries));
LOG_D(NR_MAC,"pdsch tda.nbits= %d\n",dci_pdu->time_domain_assignment.nbits); LOG_D(NR_MAC,"pdsch tda.nbits= %d\n",dci_pdu->time_domain_assignment.nbits);
size += dci_pdu->time_domain_assignment.nbits; size += dci_pdu->time_domain_assignment.nbits;
...@@ -3485,8 +3576,7 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, ...@@ -3485,8 +3576,7 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
// HARQ PID // HARQ PID
size += 4; size += 4;
// DAI // DAI
if (cg->physicalCellGroupConfig && if (DL_BWP->pdsch_HARQ_ACK_Codebook && *DL_BWP->pdsch_HARQ_ACK_Codebook == NR_PhysicalCellGroupConfig__pdsch_HARQ_ACK_Codebook_dynamic) { // FIXME in case of more than one serving cell
cg->physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook == NR_PhysicalCellGroupConfig__pdsch_HARQ_ACK_Codebook_dynamic) { // FIXME in case of more than one serving cell
dci_pdu->dai[0].nbits = 2; dci_pdu->dai[0].nbits = 2;
size += dci_pdu->dai[0].nbits; size += dci_pdu->dai[0].nbits;
} }
...@@ -3508,15 +3598,9 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, ...@@ -3508,15 +3598,9 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
size += dci_pdu->antenna_ports.nbits; size += dci_pdu->antenna_ports.nbits;
LOG_D(NR_MAC,"dci_pdu->antenna_ports.nbits %d\n",dci_pdu->antenna_ports.nbits); LOG_D(NR_MAC,"dci_pdu->antenna_ports.nbits %d\n",dci_pdu->antenna_ports.nbits);
// Tx Config Indication // Tx Config Indication
for (int i = 0; i < pdcch_Config->controlResourceSetToAddModList->list.count; i++) { if (coreset->tci_PresentInDCI != NULL) {
if (pdcch_Config->controlResourceSetToAddModList->list.array[i]->controlResourceSetId == controlResourceSetId) { dci_pdu->transmission_configuration_indication.nbits = 3;
long *isTciEnable = pdcch_Config->controlResourceSetToAddModList->list.array[i]->tci_PresentInDCI; size += dci_pdu->transmission_configuration_indication.nbits;
if (isTciEnable != NULL) {
dci_pdu->transmission_configuration_indication.nbits = 3;
size += dci_pdu->transmission_configuration_indication.nbits;
}
break;
}
} }
// SRS request // SRS request
if (cg->spCellConfig->spCellConfigDedicated->supplementaryUplink==NULL) if (cg->spCellConfig->spCellConfigDedicated->supplementaryUplink==NULL)
...@@ -3525,16 +3609,14 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, ...@@ -3525,16 +3609,14 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
dci_pdu->srs_request.nbits = 3; dci_pdu->srs_request.nbits = 3;
size += dci_pdu->srs_request.nbits; size += dci_pdu->srs_request.nbits;
// CBGTI // CBGTI
if (cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig && if (DL_BWP->pdsch_servingcellconfig && DL_BWP->pdsch_servingcellconfig->codeBlockGroupTransmission != NULL) {
cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup && uint8_t maxCBGperTB = (DL_BWP->pdsch_servingcellconfig->codeBlockGroupTransmission->choice.setup->maxCodeBlockGroupsPerTransportBlock + 1) * 2;
cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission != NULL) {
uint8_t maxCBGperTB = (cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission->choice.setup->maxCodeBlockGroupsPerTransportBlock + 1) * 2;
long *maxCWperDCI_rrc = pdsch_Config->maxNrofCodeWordsScheduledByDCI; long *maxCWperDCI_rrc = pdsch_Config->maxNrofCodeWordsScheduledByDCI;
uint8_t maxCW = (maxCWperDCI_rrc == NULL) ? 1 : *maxCWperDCI_rrc; uint8_t maxCW = (maxCWperDCI_rrc == NULL) ? 1 : *maxCWperDCI_rrc;
dci_pdu->cbgti.nbits = maxCBGperTB * maxCW; dci_pdu->cbgti.nbits = maxCBGperTB * maxCW;
size += dci_pdu->cbgti.nbits; size += dci_pdu->cbgti.nbits;
// CBGFI // CBGFI
if (cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission->choice.setup->codeBlockGroupFlushIndicator) { if (DL_BWP->pdsch_servingcellconfig->codeBlockGroupTransmission->choice.setup->codeBlockGroupFlushIndicator) {
dci_pdu->cbgfi.nbits = 1; dci_pdu->cbgfi.nbits = 1;
size += dci_pdu->cbgfi.nbits; size += dci_pdu->cbgfi.nbits;
} }
......
...@@ -51,11 +51,6 @@ typedef enum { ...@@ -51,11 +51,6 @@ typedef enum {
pusch_len2 = 2 pusch_len2 = 2
} pusch_maxLength_t; } pusch_maxLength_t;
typedef enum {
typeA = 0,
typeB = 1
} mappingType_t;
uint32_t get_Y(const NR_SearchSpace_t *ss, int slot, rnti_t rnti); uint32_t get_Y(const NR_SearchSpace_t *ss, int slot, rnti_t rnti);
uint8_t get_BG(uint32_t A, uint16_t R); uint8_t get_BG(uint32_t A, uint16_t R);
...@@ -89,15 +84,22 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config, ...@@ -89,15 +84,22 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config,
const uint8_t *nrOfLayers, const uint8_t *nrOfLayers,
uint32_t *val); uint32_t *val);
uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP, NR_PDSCH_TimeDomainResourceAllocationList_t *get_dl_tdalist(const NR_UE_DL_BWP_t *DL_BWP, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type);
const NR_BWP_UplinkCommon_t *initialUplinkBWP,
const NR_UE_DL_BWP_t *DL_BWP, NR_PUSCH_TimeDomainResourceAllocationList_t *get_ul_tdalist(const NR_UE_UL_BWP_t *UL_BWP, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type);
NR_tda_info_t get_ul_tda_info(const NR_UE_UL_BWP_t *ul_bwp, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type, int tda_index);
NR_tda_info_t get_dl_tda_info(const NR_UE_DL_BWP_t *dl_BWP, int ss_type, int tda_index, int dmrs_typeA_pos,
int mux_pattern, nr_rnti_type_t rnti_type, int coresetid, bool sib1);
uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
const NR_UE_UL_BWP_t *UL_BWP, const NR_UE_UL_BWP_t *UL_BWP,
const NR_CellGroupConfig_t *cg, const NR_CellGroupConfig_t *cg,
dci_pdu_rel15_t *dci_pdu, dci_pdu_rel15_t *dci_pdu,
nr_dci_format_t format, nr_dci_format_t format,
nr_rnti_type_t rnti_type, nr_rnti_type_t rnti_type,
int controlResourceSetId, NR_ControlResourceSet_t *coreset,
int bwp_id, int bwp_id,
int ss_type, int ss_type,
uint16_t cset0_bwp_size, uint16_t cset0_bwp_size,
...@@ -220,13 +222,12 @@ void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PD ...@@ -220,13 +222,12 @@ void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PD
uint16_t get_ssb_start_symbol(const long band, NR_SubcarrierSpacing_t scs, int i_ssb); uint16_t get_ssb_start_symbol(const long band, NR_SubcarrierSpacing_t scs, int i_ssb);
void get_info_from_tda_tables(int default_abc, NR_tda_info_t get_info_from_tda_tables(default_table_type_t table_type,
int tda, int tda,
int dmrs_TypeA_Position, int dmrs_TypeA_Position,
int normal_CP, int normal_CP);
bool *is_mapping_typeA,
int *startSymbolIndex, default_table_type_t get_default_table_type(int mux_pattern);
int *nrOfSymbols);
void fill_coresetZero(NR_ControlResourceSet_t *coreset0, NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config); void fill_coresetZero(NR_ControlResourceSet_t *coreset0, NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config);
void fill_searchSpaceZero(NR_SearchSpace_t *ss0, NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config); void fill_searchSpaceZero(NR_SearchSpace_t *ss0, NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config);
...@@ -273,12 +274,7 @@ bool set_ul_ptrs_values(NR_PTRS_UplinkConfig_t *ul_ptrs_config, ...@@ -273,12 +274,7 @@ bool set_ul_ptrs_values(NR_PTRS_UplinkConfig_t *ul_ptrs_config,
@param rnti_type rnti type @param rnti_type rnti type
@param configuredGrant indicates whether a configured grant was received or not @param configuredGrant indicates whether a configured grant was received or not
@returns transformPrecoding value */ @returns transformPrecoding value */
uint8_t get_transformPrecoding(const NR_BWP_UplinkCommon_t *initialUplinkBWP, uint8_t get_transformPrecoding(const NR_UE_UL_BWP_t *current_UL_BWP, nr_dci_format_t dci_format, uint8_t configuredGrant);
const NR_PUSCH_Config_t *pusch_config,
const NR_BWP_UplinkDedicated_t *ubwp,
uint8_t *dci_format,
int rnti_type,
uint8_t configuredGrant);
void nr_mac_gNB_rrc_ul_failure(const module_id_t Mod_instP, void nr_mac_gNB_rrc_ul_failure(const module_id_t Mod_instP,
const int CC_idP, const int CC_idP,
......
...@@ -547,27 +547,68 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac, ...@@ -547,27 +547,68 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac,
NR_UE_UL_BWP_t *UL_BWP = &mac->current_UL_BWP; NR_UE_UL_BWP_t *UL_BWP = &mac->current_UL_BWP;
NR_BWP_t dl_genericParameters = {0}; NR_BWP_t dl_genericParameters = {0};
NR_BWP_t ul_genericParameters = {0}; NR_BWP_t ul_genericParameters = {0};
NR_BWP_DownlinkCommon_t *bwp_dlcommon = NULL;
NR_BWP_UplinkCommon_t *bwp_ulcommon = NULL;
DL_BWP->n_dl_bwp = 0;
UL_BWP->n_ul_bwp = 0;
if(scc) { if(scc) {
DL_BWP->bwp_id = 0; DL_BWP->bwp_id = 0;
UL_BWP->bwp_id = 0; UL_BWP->bwp_id = 0;
dl_genericParameters = scc->downlinkConfigCommon.initialDownlinkBWP.genericParameters; bwp_dlcommon = &scc->downlinkConfigCommon.initialDownlinkBWP;
bwp_ulcommon = &scc->uplinkConfigCommon->initialUplinkBWP;
dl_genericParameters = bwp_dlcommon->genericParameters;
if(scc->uplinkConfigCommon) if(scc->uplinkConfigCommon)
ul_genericParameters = scc->uplinkConfigCommon->initialUplinkBWP.genericParameters; ul_genericParameters = scc->uplinkConfigCommon->initialUplinkBWP.genericParameters;
else else
ul_genericParameters = scc->downlinkConfigCommon.initialDownlinkBWP.genericParameters; ul_genericParameters = bwp_dlcommon->genericParameters;
DL_BWP->pdsch_Config = NULL;
if (bwp_dlcommon->pdsch_ConfigCommon)
DL_BWP->tdaList_Common = bwp_dlcommon->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
if (bwp_ulcommon->pusch_ConfigCommon) {
UL_BWP->tdaList_Common = bwp_ulcommon->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
UL_BWP->msg3_DeltaPreamble = bwp_ulcommon->pusch_ConfigCommon->choice.setup->msg3_DeltaPreamble;
}
if (bwp_ulcommon->pucch_ConfigCommon)
UL_BWP->pucch_ConfigCommon = bwp_ulcommon->pucch_ConfigCommon->choice.setup;
if (bwp_ulcommon->rach_ConfigCommon)
UL_BWP->rach_ConfigCommon = bwp_ulcommon->rach_ConfigCommon->choice.setup;
} }
if(cell_group_config) { if(cell_group_config) {
if (cell_group_config->physicalCellGroupConfig) {
DL_BWP->pdsch_HARQ_ACK_Codebook = &cell_group_config->physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook;
UL_BWP->harq_ACK_SpatialBundlingPUCCH = cell_group_config->physicalCellGroupConfig->harq_ACK_SpatialBundlingPUCCH;
}
if (cell_group_config->spCellConfig && if (cell_group_config->spCellConfig &&
cell_group_config->spCellConfig->spCellConfigDedicated) { cell_group_config->spCellConfig->spCellConfigDedicated) {
struct NR_ServingCellConfig *spCellConfigDedicated = cell_group_config->spCellConfig->spCellConfigDedicated; struct NR_ServingCellConfig *spCellConfigDedicated = cell_group_config->spCellConfig->spCellConfigDedicated;
UL_BWP->csi_MeasConfig = spCellConfigDedicated->csi_MeasConfig ? spCellConfigDedicated->csi_MeasConfig->choice.setup : NULL;
UL_BWP->pusch_servingcellconfig =
spCellConfigDedicated->uplinkConfig && spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig ? spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup : NULL;
DL_BWP->pdsch_servingcellconfig = spCellConfigDedicated->pdsch_ServingCellConfig ? spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup : NULL;
if (spCellConfigDedicated->firstActiveDownlinkBWP_Id) if (spCellConfigDedicated->firstActiveDownlinkBWP_Id)
DL_BWP->bwp_id = *spCellConfigDedicated->firstActiveDownlinkBWP_Id; DL_BWP->bwp_id = *spCellConfigDedicated->firstActiveDownlinkBWP_Id;
if (spCellConfigDedicated->uplinkConfig->firstActiveUplinkBWP_Id) if (spCellConfigDedicated->uplinkConfig->firstActiveUplinkBWP_Id)
UL_BWP->bwp_id = *spCellConfigDedicated->uplinkConfig->firstActiveUplinkBWP_Id; UL_BWP->bwp_id = *spCellConfigDedicated->uplinkConfig->firstActiveUplinkBWP_Id;
if (mac->scc) {
bwp_dlcommon = mac->scc->downlinkConfigCommon->initialDownlinkBWP;
bwp_ulcommon = mac->scc->uplinkConfigCommon->initialUplinkBWP;
}
else if (mac->scc_SIB) {
bwp_dlcommon = &mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP;
bwp_ulcommon = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP;
}
else
AssertFatal(false, "Either SCC or SCC SIB should be non-NULL\n");
NR_BWP_Downlink_t *bwp_downlink = NULL; NR_BWP_Downlink_t *bwp_downlink = NULL;
const struct NR_ServingCellConfig__downlinkBWP_ToAddModList *bwpList = spCellConfigDedicated->downlinkBWP_ToAddModList; const struct NR_ServingCellConfig__downlinkBWP_ToAddModList *bwpList = spCellConfigDedicated->downlinkBWP_ToAddModList;
if (bwpList)
DL_BWP->n_dl_bwp = bwpList->list.count;
if (bwpList && DL_BWP->bwp_id > 0) { if (bwpList && DL_BWP->bwp_id > 0) {
for (int i = 0; i < bwpList->list.count; i++) { for (int i = 0; i < bwpList->list.count; i++) {
bwp_downlink = bwpList->list.array[i]; bwp_downlink = bwpList->list.array[i];
...@@ -576,17 +617,21 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac, ...@@ -576,17 +617,21 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac,
} }
AssertFatal(bwp_downlink != NULL,"Couldn't find DLBWP corresponding to BWP ID %ld\n", DL_BWP->bwp_id); AssertFatal(bwp_downlink != NULL,"Couldn't find DLBWP corresponding to BWP ID %ld\n", DL_BWP->bwp_id);
dl_genericParameters = bwp_downlink->bwp_Common->genericParameters; dl_genericParameters = bwp_downlink->bwp_Common->genericParameters;
DL_BWP->pdsch_Config = bwp_downlink->bwp_Dedicated->pdsch_Config->choice.setup;
DL_BWP->tdaList_Common = bwp_downlink->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
} }
else { else {
if(mac->scc) { dl_genericParameters = bwp_dlcommon->genericParameters;
dl_genericParameters = mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters; DL_BWP->pdsch_Config = spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup;
} DL_BWP->tdaList_Common = bwp_dlcommon->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
if(mac->scc_SIB) {
dl_genericParameters = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters;
}
} }
UL_BWP->msg3_DeltaPreamble = bwp_ulcommon->pusch_ConfigCommon->choice.setup->msg3_DeltaPreamble;
NR_BWP_Uplink_t *bwp_uplink = NULL; NR_BWP_Uplink_t *bwp_uplink = NULL;
const struct NR_UplinkConfig__uplinkBWP_ToAddModList *ubwpList = spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList; const struct NR_UplinkConfig__uplinkBWP_ToAddModList *ubwpList = spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList;
if (ubwpList)
UL_BWP->n_ul_bwp = ubwpList->list.count;
if (ubwpList && UL_BWP->bwp_id > 0) { if (ubwpList && UL_BWP->bwp_id > 0) {
for (int i = 0; i < ubwpList->list.count; i++) { for (int i = 0; i < ubwpList->list.count; i++) {
bwp_uplink = ubwpList->list.array[i]; bwp_uplink = ubwpList->list.array[i];
...@@ -595,14 +640,26 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac, ...@@ -595,14 +640,26 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac,
} }
AssertFatal(bwp_uplink != NULL,"Couldn't find ULBWP corresponding to BWP ID %ld\n",UL_BWP->bwp_id); AssertFatal(bwp_uplink != NULL,"Couldn't find ULBWP corresponding to BWP ID %ld\n",UL_BWP->bwp_id);
ul_genericParameters = bwp_uplink->bwp_Common->genericParameters; ul_genericParameters = bwp_uplink->bwp_Common->genericParameters;
UL_BWP->tdaList_Common = bwp_uplink->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
UL_BWP->pusch_Config = bwp_uplink->bwp_Dedicated->pusch_Config->choice.setup;
UL_BWP->pucch_Config = bwp_uplink->bwp_Dedicated->pucch_Config->choice.setup;
UL_BWP->srs_Config = bwp_uplink->bwp_Dedicated->srs_Config->choice.setup;
UL_BWP->configuredGrantConfig = bwp_uplink->bwp_Dedicated->configuredGrantConfig ? bwp_uplink->bwp_Dedicated->configuredGrantConfig->choice.setup : NULL;
if (bwp_uplink->bwp_Common->pucch_ConfigCommon)
UL_BWP->pucch_ConfigCommon = bwp_uplink->bwp_Common->pucch_ConfigCommon->choice.setup;
if (bwp_uplink->bwp_Common->rach_ConfigCommon)
UL_BWP->rach_ConfigCommon = bwp_uplink->bwp_Common->rach_ConfigCommon->choice.setup;
} }
else { else {
if(mac->scc) { UL_BWP->tdaList_Common = bwp_ulcommon->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
ul_genericParameters = mac->scc->uplinkConfigCommon->initialUplinkBWP->genericParameters; UL_BWP->pusch_Config = spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pusch_Config->choice.setup;
} UL_BWP->pucch_Config = spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup;
if(mac->scc_SIB) { UL_BWP->srs_Config = spCellConfigDedicated->uplinkConfig->initialUplinkBWP->srs_Config->choice.setup;
ul_genericParameters = mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters; UL_BWP->configuredGrantConfig =
} spCellConfigDedicated->uplinkConfig->initialUplinkBWP->configuredGrantConfig ? spCellConfigDedicated->uplinkConfig->initialUplinkBWP->configuredGrantConfig->choice.setup : NULL;
ul_genericParameters = bwp_ulcommon->genericParameters;
if (bwp_ulcommon->rach_ConfigCommon)
UL_BWP->rach_ConfigCommon = bwp_ulcommon->rach_ConfigCommon->choice.setup;
} }
} }
else else
......
...@@ -251,29 +251,8 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t ...@@ -251,29 +251,8 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl_config, frame_t frame, int slot); void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl_config, frame_t frame, int slot);
void get_bwp_info(NR_UE_MAC_INST_t *mac,
int dl_bwp_id,
int ul_bwp_id,
NR_BWP_DownlinkDedicated_t **bwpd,
NR_BWP_DownlinkCommon_t **bwpc,
NR_BWP_UplinkDedicated_t **ubwpd,
NR_BWP_UplinkCommon_t **ubwpc);
NR_BWP_DownlinkCommon_t *get_bwp_downlink_common(NR_UE_MAC_INST_t *mac, NR_BWP_Id_t dl_bwp_id); NR_BWP_DownlinkCommon_t *get_bwp_downlink_common(NR_UE_MAC_INST_t *mac, NR_BWP_Id_t dl_bwp_id);
NR_PUSCH_TimeDomainResourceAllocationList_t *choose_ul_tda_list(const NR_PUSCH_Config_t *pusch_Config,NR_PUSCH_ConfigCommon_t *pusch_ConfigCommon);
NR_PDSCH_TimeDomainResourceAllocationList_t *choose_dl_tda_list(NR_PDSCH_Config_t *pdsch_Config,NR_PDSCH_ConfigCommon_t *pdsch_ConfigCommon);
int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList,
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList,
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu,
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
int *mappingtype,
uint8_t time_domain_ind,
int default_abc,
bool use_default);
uint8_t nr_ue_get_sdu(module_id_t module_idP, uint8_t nr_ue_get_sdu(module_id_t module_idP,
int cc_id, int cc_id,
frame_t frameP, frame_t frameP,
...@@ -475,7 +454,7 @@ int16_t compute_nr_SSB_PL(NR_UE_MAC_INST_t *mac, short ssb_rsrp_dBm); ...@@ -475,7 +454,7 @@ int16_t compute_nr_SSB_PL(NR_UE_MAC_INST_t *mac, short ssb_rsrp_dBm);
// - in which ULSCH should be scheduled. K2 is configured in RRC configuration. // - in which ULSCH should be scheduled. K2 is configured in RRC configuration.
// PUSCH Msg3 scheduler: // PUSCH Msg3 scheduler:
// - scheduled by RAR UL grant according to 8.3 of TS 38.213 // - scheduled by RAR UL grant according to 8.3 of TS 38.213
int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac, uint8_t is_Msg3, frame_t current_frame, int current_slot, frame_t *frame_tx, int *slot_tx, uint8_t tda_id); int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac, uint8_t is_Msg3, frame_t current_frame, int current_slot, frame_t *frame_tx, int *slot_tx, long k2);
int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti); int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti);
...@@ -487,11 +466,6 @@ int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti); ...@@ -487,11 +466,6 @@ int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti);
// - 6.1.4.2 of TS 38.214 // - 6.1.4.2 of TS 38.214
// - 6.4.1.1.1 of TS 38.211 // - 6.4.1.1.1 of TS 38.211
// - 6.3.1.7 of 38.211 // - 6.3.1.7 of 38.211
int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, NR_tda_info_t *tda_info, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci, RAR_grant_t *rar_grant, uint16_t rnti, uint8_t *dci_format);
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu,
dci_pdu_rel15_t *dci,
RAR_grant_t *rar_grant,
uint16_t rnti,
uint8_t *dci_format);
#endif #endif
/** @}*/ /** @}*/
...@@ -138,8 +138,8 @@ void init_RA(module_id_t mod_id, ...@@ -138,8 +138,8 @@ void init_RA(module_id_t mod_id,
NR_PRACH_RESOURCES_t *prach_resources, NR_PRACH_RESOURCES_t *prach_resources,
NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon, NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon,
NR_RACH_ConfigGeneric_t *rach_ConfigGeneric, NR_RACH_ConfigGeneric_t *rach_ConfigGeneric,
NR_RACH_ConfigDedicated_t *rach_ConfigDedicated) { NR_RACH_ConfigDedicated_t *rach_ConfigDedicated)
{
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
RA_config_t *ra = &mac->ra; RA_config_t *ra = &mac->ra;
...@@ -278,16 +278,13 @@ void init_RA(module_id_t mod_id, ...@@ -278,16 +278,13 @@ void init_RA(module_id_t mod_id,
} }
} }
/* TS 38.321 subclause 7.3 - return DELTA_PREAMBLE values in dB */ /* TS 38.321 subclause 7.3 - return DELTA_PREAMBLE values in dB */
int8_t nr_get_DELTA_PREAMBLE(module_id_t mod_id, int CC_id, uint16_t prach_format){ int8_t nr_get_DELTA_PREAMBLE(module_id_t mod_id, int CC_id, uint16_t prach_format)
{
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon = (mac->scc!=NULL) ? NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon = mac->current_UL_BWP.rach_ConfigCommon;
mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup:
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup;
NR_SubcarrierSpacing_t scs = *nr_rach_ConfigCommon->msg1_SubcarrierSpacing; NR_SubcarrierSpacing_t scs = *nr_rach_ConfigCommon->msg1_SubcarrierSpacing;
int prach_sequence_length = (mac->scc!=NULL)?(mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.present - 1) : (mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.present-1); int prach_sequence_length = nr_rach_ConfigCommon->prach_RootSequenceIndex.present - 1;
uint8_t prachConfigIndex, mu; uint8_t prachConfigIndex, mu;
AssertFatal(CC_id == 0, "Transmission on secondary CCs is not supported yet\n"); AssertFatal(CC_id == 0, "Transmission on secondary CCs is not supported yet\n");
...@@ -385,13 +382,13 @@ int8_t nr_get_DELTA_PREAMBLE(module_id_t mod_id, int CC_id, uint16_t prach_forma ...@@ -385,13 +382,13 @@ int8_t nr_get_DELTA_PREAMBLE(module_id_t mod_id, int CC_id, uint16_t prach_forma
// - RA_PREAMBLE_POWER_RAMPING_STEP dB // - RA_PREAMBLE_POWER_RAMPING_STEP dB
// - POWER_OFFSET_2STEP_RA dB // - POWER_OFFSET_2STEP_RA dB
// returns receivedTargerPower in dBm // returns receivedTargerPower in dBm
int nr_get_Po_NOMINAL_PUSCH(NR_PRACH_RESOURCES_t *prach_resources, module_id_t mod_id, uint8_t CC_id){ int nr_get_Po_NOMINAL_PUSCH(NR_PRACH_RESOURCES_t *prach_resources, module_id_t mod_id, uint8_t CC_id)
{
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
int8_t receivedTargerPower; int8_t receivedTargerPower;
int8_t delta_preamble; int8_t delta_preamble;
NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon = (mac->scc != NULL) ? mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup: mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup; NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon = mac->current_UL_BWP.rach_ConfigCommon;
long preambleReceivedTargetPower = nr_rach_ConfigCommon->rach_ConfigGeneric.preambleReceivedTargetPower; long preambleReceivedTargetPower = nr_rach_ConfigCommon->rach_ConfigGeneric.preambleReceivedTargetPower;
delta_preamble = nr_get_DELTA_PREAMBLE(mod_id, CC_id, prach_resources->prach_format); delta_preamble = nr_get_DELTA_PREAMBLE(mod_id, CC_id, prach_resources->prach_format);
...@@ -402,8 +399,8 @@ int nr_get_Po_NOMINAL_PUSCH(NR_PRACH_RESOURCES_t *prach_resources, module_id_t m ...@@ -402,8 +399,8 @@ int nr_get_Po_NOMINAL_PUSCH(NR_PRACH_RESOURCES_t *prach_resources, module_id_t m
return receivedTargerPower; return receivedTargerPower;
} }
void ssb_rach_config(RA_config_t *ra, NR_PRACH_RESOURCES_t *prach_resources, NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon){ void ssb_rach_config(RA_config_t *ra, NR_PRACH_RESOURCES_t *prach_resources, NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon)
{
// Determine the SSB to RACH mapping ratio // Determine the SSB to RACH mapping ratio
// ======================================= // =======================================
...@@ -489,14 +486,11 @@ void ra_preambles_config(NR_PRACH_RESOURCES_t *prach_resources, NR_UE_MAC_INST_t ...@@ -489,14 +486,11 @@ void ra_preambles_config(NR_PRACH_RESOURCES_t *prach_resources, NR_UE_MAC_INST_t
unsigned short int *seed = (unsigned short int*)&tmp; unsigned short int *seed = (unsigned short int*)&tmp;
RA_config_t *ra = &mac->ra; RA_config_t *ra = &mac->ra;
NR_RACH_ConfigCommon_t *setup; NR_RACH_ConfigCommon_t *setup = mac->current_UL_BWP.rach_ConfigCommon;
if (mac->scc) setup = mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup;
else setup = mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup;
NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &setup->rach_ConfigGeneric; NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &setup->rach_ConfigGeneric;
NR_BWP_UplinkCommon_t *initialUplinkBWP = (mac->scc) ? mac->scc->uplinkConfigCommon->initialUplinkBWP : &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP; if (mac->current_UL_BWP.msg3_DeltaPreamble) {
if (initialUplinkBWP->pusch_ConfigCommon->choice.setup->msg3_DeltaPreamble){ deltaPreamble_Msg3 = (*mac->current_UL_BWP.msg3_DeltaPreamble) * 2; // dB
deltaPreamble_Msg3 = (*initialUplinkBWP->pusch_ConfigCommon->choice.setup->msg3_DeltaPreamble) * 2; // dB
LOG_D(MAC, "In %s: deltaPreamble_Msg3 set to %ld\n", __FUNCTION__, deltaPreamble_Msg3); LOG_D(MAC, "In %s: deltaPreamble_Msg3 set to %ld\n", __FUNCTION__, deltaPreamble_Msg3);
} }
...@@ -661,9 +655,7 @@ void nr_get_prach_resources(module_id_t mod_id, ...@@ -661,9 +655,7 @@ void nr_get_prach_resources(module_id_t mod_id,
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
RA_config_t *ra = &mac->ra; RA_config_t *ra = &mac->ra;
NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon = (mac->scc)? NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon = mac->current_UL_BWP.rach_ConfigCommon;
mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup :
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup;
LOG_D(MAC, "In %s: getting PRACH resources frame (first_Msg3 %d)\n", __FUNCTION__, ra->first_Msg3); LOG_D(MAC, "In %s: getting PRACH resources frame (first_Msg3 %d)\n", __FUNCTION__, ra->first_Msg3);
...@@ -701,12 +693,8 @@ void nr_Msg3_transmitted(module_id_t mod_id, uint8_t CC_id, frame_t frameP, slot ...@@ -701,12 +693,8 @@ void nr_Msg3_transmitted(module_id_t mod_id, uint8_t CC_id, frame_t frameP, slot
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
RA_config_t *ra = &mac->ra; RA_config_t *ra = &mac->ra;
NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon = (mac->scc) ? NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon = mac->current_UL_BWP.rach_ConfigCommon;
mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup: long mu = mac->current_UL_BWP.scs;
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup;
long mu = (mac->scc) ?
mac->scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing :
mac->scc_SIB->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
int subframes_per_slot = nr_slots_per_frame[mu]/10; int subframes_per_slot = nr_slots_per_frame[mu]/10;
// start contention resolution timer (cnt in slots) // start contention resolution timer (cnt in slots)
...@@ -934,9 +922,7 @@ void nr_get_RA_window(NR_UE_MAC_INST_t *mac){ ...@@ -934,9 +922,7 @@ void nr_get_RA_window(NR_UE_MAC_INST_t *mac){
uint8_t mu, ra_ResponseWindow; uint8_t mu, ra_ResponseWindow;
RA_config_t *ra = &mac->ra; RA_config_t *ra = &mac->ra;
NR_RACH_ConfigCommon_t *setup; NR_RACH_ConfigCommon_t *setup = mac->current_UL_BWP.rach_ConfigCommon;
if (mac->scc) setup = mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup;
else setup = mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup;
AssertFatal(&setup->rach_ConfigGeneric != NULL, "In %s: FATAL! rach_ConfigGeneric is NULL...\n", __FUNCTION__); AssertFatal(&setup->rach_ConfigGeneric != NULL, "In %s: FATAL! rach_ConfigGeneric is NULL...\n", __FUNCTION__);
NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &setup->rach_ConfigGeneric; NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &setup->rach_ConfigGeneric;
long scs = (mac->scc) ? long scs = (mac->scc) ?
......
...@@ -93,20 +93,9 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t ...@@ -93,20 +93,9 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
uint16_t monitoringSymbolsWithinSlot = 0; uint16_t monitoringSymbolsWithinSlot = 0;
int sps = 0; int sps = 0;
AssertFatal(mac->scc == NULL || mac->scc_SIB == NULL, "both scc and scc_SIB cannot be non-null\n");
NR_UE_DL_BWP_t *current_DL_BWP = &mac->current_DL_BWP; NR_UE_DL_BWP_t *current_DL_BWP = &mac->current_DL_BWP;
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP; NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
NR_BWP_Id_t dl_bwp_id = current_DL_BWP ? current_DL_BWP->bwp_id : 0; NR_BWP_Id_t dl_bwp_id = current_DL_BWP ? current_DL_BWP->bwp_id : 0;
NR_ServingCellConfigCommon_t *scc = mac->scc;
NR_ServingCellConfigCommonSIB_t *scc_SIB = mac->scc_SIB;
NR_BWP_DownlinkCommon_t *initialDownlinkBWP=NULL;
NR_BWP_UplinkCommon_t *initialUplinkBWP=NULL;
if (scc!=NULL || scc_SIB != NULL) {
initialDownlinkBWP = scc!=NULL ? scc->downlinkConfigCommon->initialDownlinkBWP : &scc_SIB->downlinkConfigCommon.initialDownlinkBWP;
initialUplinkBWP = scc!=NULL ? scc->uplinkConfigCommon->initialUplinkBWP : &scc_SIB->uplinkConfigCommon->initialUplinkBWP;
}
NR_SearchSpace_t *ss; NR_SearchSpace_t *ss;
NR_ControlResourceSet_t *coreset; NR_ControlResourceSet_t *coreset;
...@@ -173,24 +162,24 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t ...@@ -173,24 +162,24 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
// computing alternative size for padding // computing alternative size for padding
dci_pdu_rel15_t temp_pdu; dci_pdu_rel15_t temp_pdu;
if(dci_format == NR_DL_DCI_FORMAT_1_0) if(dci_format == NR_DL_DCI_FORMAT_1_0)
alt_size = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, alt_size =
current_DL_BWP, current_UL_BWP, nr_dci_size(current_DL_BWP, current_UL_BWP, mac->cg, &temp_pdu, NR_UL_DCI_FORMAT_0_0, rnti_type, coreset, dl_bwp_id, ss->searchSpaceType->present, mac->type0_PDCCH_CSS_config.num_rbs, 0);
mac->cg, &temp_pdu,
NR_UL_DCI_FORMAT_0_0, rnti_type, coreset_id, dl_bwp_id,
ss->searchSpaceType->present, mac->type0_PDCCH_CSS_config.num_rbs, 0);
if(dci_format == NR_UL_DCI_FORMAT_0_0) if(dci_format == NR_UL_DCI_FORMAT_0_0)
alt_size = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, alt_size =
current_DL_BWP, current_UL_BWP, nr_dci_size(current_DL_BWP, current_UL_BWP, mac->cg, &temp_pdu, NR_DL_DCI_FORMAT_1_0, rnti_type, coreset, dl_bwp_id, ss->searchSpaceType->present, mac->type0_PDCCH_CSS_config.num_rbs, 0);
mac->cg, &temp_pdu,
NR_DL_DCI_FORMAT_1_0, rnti_type, coreset_id, dl_bwp_id,
ss->searchSpaceType->present, mac->type0_PDCCH_CSS_config.num_rbs, 0);
} }
rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, rel15->dci_length_options[i] = nr_dci_size(current_DL_BWP,
current_DL_BWP, current_UL_BWP, current_UL_BWP,
mac->cg, &mac->def_dci_pdu_rel15[dci_format], mac->cg,
dci_format, NR_RNTI_TC, coreset_id, dl_bwp_id, &mac->def_dci_pdu_rel15[dci_format],
ss->searchSpaceType->present, mac->type0_PDCCH_CSS_config.num_rbs, alt_size); dci_format,
NR_RNTI_TC,
coreset,
dl_bwp_id,
ss->searchSpaceType->present,
mac->type0_PDCCH_CSS_config.num_rbs,
alt_size);
rel15->BWPStart = coreset_id == 0 ? mac->type0_PDCCH_CSS_config.cset_start_rb : current_DL_BWP->BWPStart; rel15->BWPStart = coreset_id == 0 ? mac->type0_PDCCH_CSS_config.cset_start_rb : current_DL_BWP->BWPStart;
rel15->BWPSize = coreset_id == 0 ? mac->type0_PDCCH_CSS_config.num_rbs : current_DL_BWP->BWPSize; rel15->BWPSize = coreset_id == 0 ? mac->type0_PDCCH_CSS_config.num_rbs : current_DL_BWP->BWPSize;
......
...@@ -180,51 +180,6 @@ void nr_ue_init_mac(module_id_t module_idP) { ...@@ -180,51 +180,6 @@ void nr_ue_init_mac(module_id_t module_idP) {
} }
} }
void get_bwp_info(NR_UE_MAC_INST_t *mac,
int dl_bwp_id,
int ul_bwp_id,
NR_BWP_DownlinkDedicated_t **bwpd,
NR_BWP_DownlinkCommon_t **bwpc,
NR_BWP_UplinkDedicated_t **ubwpd,
NR_BWP_UplinkCommon_t **ubwpc) {
if (dl_bwp_id > 0) {
AssertFatal(mac->DLbwp[dl_bwp_id-1]!=NULL,"mac->DLbwp[%d] is null, shouldn't be\n", (int)dl_bwp_id-1);
*bwpd = mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated;
} else {
if (mac->cg &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->initialDownlinkBWP)
*bwpd = mac->cg->spCellConfig->spCellConfigDedicated->initialDownlinkBWP;
}
*bwpc = get_bwp_downlink_common(mac, dl_bwp_id);
AssertFatal(*bwpc!=NULL,"bwpc shouldn't be null\n");
if (ul_bwp_id > 0) {
AssertFatal(mac->ULbwp[ul_bwp_id-1]!=NULL,"mac->ULbwp[%d] is null, shouldn't be\n",
ul_bwp_id-1);
*ubwpd = mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated;
if (mac->ULbwp[ul_bwp_id-1]->bwp_Common) *ubwpc = mac->ULbwp[ul_bwp_id-1]->bwp_Common;
else if (mac->scc) *ubwpc = mac->scc->uplinkConfigCommon->initialUplinkBWP;
else if (mac->scc_SIB) *ubwpc = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP;
AssertFatal(*bwpc!=NULL,"bwpc shouldn't be null\n");
}
else {
if (mac->cg &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP)
*ubwpd = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP;
if (mac->scc) *ubwpc = mac->scc->uplinkConfigCommon->initialUplinkBWP;
else if (mac->scc_SIB) *ubwpc = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP;
AssertFatal(*ubwpc!=NULL,"ubwpc shouldn't be null\n");
}
}
NR_BWP_DownlinkCommon_t *get_bwp_downlink_common(NR_UE_MAC_INST_t *mac, NR_BWP_Id_t dl_bwp_id) { NR_BWP_DownlinkCommon_t *get_bwp_downlink_common(NR_UE_MAC_INST_t *mac, NR_BWP_Id_t dl_bwp_id) {
NR_BWP_DownlinkCommon_t *bwp_Common = NULL; NR_BWP_DownlinkCommon_t *bwp_Common = NULL;
if (dl_bwp_id > 0 && mac->cg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList) { if (dl_bwp_id > 0 && mac->cg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList) {
...@@ -237,33 +192,8 @@ NR_BWP_DownlinkCommon_t *get_bwp_downlink_common(NR_UE_MAC_INST_t *mac, NR_BWP_I ...@@ -237,33 +192,8 @@ NR_BWP_DownlinkCommon_t *get_bwp_downlink_common(NR_UE_MAC_INST_t *mac, NR_BWP_I
return bwp_Common; return bwp_Common;
} }
NR_PDSCH_TimeDomainResourceAllocationList_t *choose_dl_tda_list(NR_PDSCH_Config_t *pdsch_Config,NR_PDSCH_ConfigCommon_t *pdsch_ConfigCommon) { int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti)
{
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList=NULL;
if (pdsch_Config &&
pdsch_Config->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = pdsch_Config->pdsch_TimeDomainAllocationList->choice.setup;
else if (pdsch_ConfigCommon->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = pdsch_ConfigCommon->pdsch_TimeDomainAllocationList;
return(pdsch_TimeDomainAllocationList);
}
NR_PUSCH_TimeDomainResourceAllocationList_t *choose_ul_tda_list(const NR_PUSCH_Config_t *pusch_Config,NR_PUSCH_ConfigCommon_t *pusch_ConfigCommon) {
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList=NULL;
if (pusch_Config &&
pusch_Config->pusch_TimeDomainAllocationList)
pusch_TimeDomainAllocationList = pusch_Config->pusch_TimeDomainAllocationList->choice.setup;
else if (pusch_ConfigCommon->pusch_TimeDomainAllocationList)
pusch_TimeDomainAllocationList = pusch_ConfigCommon->pusch_TimeDomainAllocationList;
return(pusch_TimeDomainAllocationList);
}
int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti){
RA_config_t *ra = &mac->ra; RA_config_t *ra = &mac->ra;
int rnti_type; int rnti_type;
...@@ -481,138 +411,6 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p ...@@ -481,138 +411,6 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p
return 0; return 0;
} }
int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList,
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList,
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu,
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
int *mapping_type,
uint8_t time_domain_ind,
int default_abc,
bool use_default){
int dmrs_typeA_pos = (mac->scc != NULL) ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position;
// uint8_t k_offset=0;
int sliv_S=0;
int sliv_L=0;
uint8_t mu_pusch = 1;
// definition table j Table 6.1.2.1.1-4
uint8_t j = (mu_pusch==3)?3:(mu_pusch==2)?2:1;
uint8_t table_6_1_2_1_1_2_time_dom_res_alloc_A[16][3]={ // for PUSCH from TS 38.214 subclause 6.1.2.1.1
{j, 0,14}, // row index 1
{j, 0,12}, // row index 2
{j, 0,10}, // row index 3
{j, 2,10}, // row index 4
{j, 4,10}, // row index 5
{j, 4,8}, // row index 6
{j, 4,6}, // row index 7
{j+1,0,14}, // row index 8
{j+1,0,12}, // row index 9
{j+1,0,10}, // row index 10
{j+2,0,14}, // row index 11
{j+2,0,12}, // row index 12
{j+2,0,10}, // row index 13
{j, 8,6}, // row index 14
{j+3,0,14}, // row index 15
{j+3,0,10} // row index 16
};
/*uint8_t table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[16][3]={ // for PUSCH from TS 38.214 subclause 6.1.2.1.1
{j, 0,8}, // row index 1
{j, 0,12}, // row index 2
{j, 0,10}, // row index 3
{j, 2,10}, // row index 4
{j, 4,4}, // row index 5
{j, 4,8}, // row index 6
{j, 4,6}, // row index 7
{j+1,0,8}, // row index 8
{j+1,0,12}, // row index 9
{j+1,0,10}, // row index 10
{j+2,0,6}, // row index 11
{j+2,0,12}, // row index 12
{j+2,0,10}, // row index 13
{j, 8,4}, // row index 14
{j+3,0,8}, // row index 15
{j+3,0,10} // row index 16
};*/
/*
* TS 38.214 subclause 5.1.2.1 Resource allocation in time domain (downlink)
*/
if(dlsch_config_pdu != NULL){
if (pdsch_TimeDomainAllocationList && use_default==false) {
if (time_domain_ind >= pdsch_TimeDomainAllocationList->list.count) {
LOG_E(MAC, "time_domain_ind %d >= pdsch->TimeDomainAllocationList->list.count %d\n",
time_domain_ind, pdsch_TimeDomainAllocationList->list.count);
dlsch_config_pdu->start_symbol = 0;
dlsch_config_pdu->number_symbols = 0;
return -1;
}
int startSymbolAndLength = pdsch_TimeDomainAllocationList->list.array[time_domain_ind]->startSymbolAndLength;
int S,L;
SLIV2SL(startSymbolAndLength,&S,&L);
dlsch_config_pdu->start_symbol=S;
dlsch_config_pdu->number_symbols=L;
LOG_D(MAC,"SLIV = %i\n", startSymbolAndLength);
LOG_D(MAC,"start_symbol = %i\n", dlsch_config_pdu->start_symbol);
LOG_D(MAC,"number_symbols = %i\n", dlsch_config_pdu->number_symbols);
}
else {// Default configuration from tables
bool is_typeA;
get_info_from_tda_tables(default_abc,
time_domain_ind,
dmrs_typeA_pos,
1, // normal CP
&is_typeA,
&sliv_S,
&sliv_L);
*mapping_type = is_typeA? typeA : typeB;
dlsch_config_pdu->number_symbols = sliv_L;
dlsch_config_pdu->start_symbol = sliv_S;
}
} /*
* TS 38.214 subclause 6.1.2.1 Resource allocation in time domain (uplink)
*/
if(pusch_config_pdu != NULL){
if (pusch_TimeDomainAllocationList && use_default==false) {
if (time_domain_ind >= pusch_TimeDomainAllocationList->list.count) {
LOG_E(NR_MAC, "time_domain_ind %d >= pusch->TimeDomainAllocationList->list.count %d\n",
time_domain_ind, pusch_TimeDomainAllocationList->list.count);
pusch_config_pdu->start_symbol_index=0;
pusch_config_pdu->nr_of_symbols=0;
return -1;
}
LOG_D(NR_MAC,"Filling Time-Domain Allocation from pusch_TimeDomainAllocationList\n");
int startSymbolAndLength = pusch_TimeDomainAllocationList->list.array[time_domain_ind]->startSymbolAndLength;
int S,L;
SLIV2SL(startSymbolAndLength,&S,&L);
pusch_config_pdu->start_symbol_index=S;
pusch_config_pdu->nr_of_symbols=L;
}
else {
LOG_D(NR_MAC,"Filling Time-Domain Allocation from tables\n");
// k_offset = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][0];
sliv_S = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][1];
sliv_L = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][2];
// k_offset = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][0];
// sliv_S = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][1];
// sliv_L = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][2];
pusch_config_pdu->nr_of_symbols = sliv_L;
pusch_config_pdu->start_symbol_index = sliv_S;
}
LOG_D(NR_MAC,"start_symbol = %i\n", pusch_config_pdu->start_symbol_index);
LOG_D(NR_MAC,"number_symbols = %i\n", pusch_config_pdu->nr_of_symbols);
}
return 0;
}
int nr_ue_process_dci_indication_pdu(module_id_t module_id,int cc_id, int gNB_index, frame_t frame, int slot, fapi_nr_dci_indication_pdu_t *dci) { int nr_ue_process_dci_indication_pdu(module_id_t module_id,int cc_id, int gNB_index, frame_t frame, int slot, fapi_nr_dci_indication_pdu_t *dci) {
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
...@@ -634,6 +432,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -634,6 +432,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
uint16_t rnti = dci_ind->rnti; uint16_t rnti = dci_ind->rnti;
uint8_t dci_format = dci_ind->dci_format; uint8_t dci_format = dci_ind->dci_format;
int coreset_type = dci_ind->coreset_type == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG; // 0 for coreset0, 1 otherwise
int ret = 0; int ret = 0;
int pucch_res_set_cnt = 0, valid = 0; int pucch_res_set_cnt = 0, valid = 0;
frame_t frame_tx = 0; frame_t frame_tx = 0;
...@@ -645,11 +444,11 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -645,11 +444,11 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
uint8_t is_Msg3 = 0; uint8_t is_Msg3 = 0;
NR_UE_DL_BWP_t *current_DL_BWP = &mac->current_DL_BWP; NR_UE_DL_BWP_t *current_DL_BWP = &mac->current_DL_BWP;
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP; NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
NR_BWP_Id_t dl_bwp_id = current_DL_BWP->bwp_id; int mux_pattern = 1;
NR_BWP_Id_t ul_bwp_id = current_UL_BWP->bwp_id;
int default_abc = 1;
LOG_D(MAC, "In %s: Processing received DCI format %s\n", __FUNCTION__, dci_formats[dci_format]); LOG_D(MAC, "In %s: Processing received DCI format %s\n", __FUNCTION__, dci_formats[dci_format]);
NR_tda_info_t tda_info = {0};
NR_PUCCH_Config_t *pucch_Config = current_UL_BWP->pucch_Config;
switch(dci_format){ switch(dci_format){
case NR_UL_DCI_FORMAT_0_0: { case NR_UL_DCI_FORMAT_0_0: {
...@@ -674,7 +473,11 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -674,7 +473,11 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
// - SUL_IND_0_0 // - SUL_IND_0_0
// Schedule PUSCH // Schedule PUSCH
ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, dci->time_domain_assignment.val); tda_info = get_ul_tda_info(current_UL_BWP, coreset_type, dci_ind->ss_type, get_rnti_type(mac, rnti), dci->time_domain_assignment.val);
if (tda_info.nrOfSymbols == 0)
ret = -1;
else
ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, tda_info.k2);
if (ret != -1){ if (ret != -1){
...@@ -693,9 +496,9 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -693,9 +496,9 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
pthread_mutex_unlock(&ul_config->mutex_ul_config); pthread_mutex_unlock(&ul_config->mutex_ul_config);
// Config PUSCH PDU // Config PUSCH PDU
ret = nr_config_pusch_pdu(mac, pusch_config_pdu, dci, NULL, rnti, &dci_format); ret = nr_config_pusch_pdu(mac, &tda_info, pusch_config_pdu, dci, NULL, rnti, &dci_format);
} } else
LOG_E(MAC, "Cannot schedule PUSCH\n");
break; break;
} }
...@@ -734,7 +537,11 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -734,7 +537,11 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
// - SRS_RESOURCE_IND // - SRS_RESOURCE_IND
// Schedule PUSCH // Schedule PUSCH
ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, dci->time_domain_assignment.val); tda_info = get_ul_tda_info(current_UL_BWP, coreset_type, dci_ind->ss_type, get_rnti_type(mac, rnti), dci->time_domain_assignment.val);
if (tda_info.nrOfSymbols == 0)
ret = -1;
else
ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, tda_info.k2);
if (ret != -1){ if (ret != -1){
...@@ -755,8 +562,9 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -755,8 +562,9 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
pthread_mutex_unlock(&ul_config->mutex_ul_config); pthread_mutex_unlock(&ul_config->mutex_ul_config);
// Config PUSCH PDU // Config PUSCH PDU
ret = nr_config_pusch_pdu(mac, pusch_config_pdu, dci, NULL, rnti, &dci_format); ret = nr_config_pusch_pdu(mac, &tda_info, pusch_config_pdu, dci, NULL, rnti, &dci_format);
} else AssertFatal(1==0,"Cannot schedule PUSCH\n"); } else
LOG_E(MAC, "Cannot schedule PUSCH\n");
break; break;
} }
...@@ -815,8 +623,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -815,8 +623,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti; dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti;
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_0 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15; fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_0 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
NR_PDSCH_Config_t *pdsch_config= (dl_bwp_id>0 && mac->DLbwp[dl_bwp_id-1]) ? mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup : NULL; NR_PDSCH_Config_t *pdsch_config = current_DL_BWP ? current_DL_BWP->pdsch_Config : NULL;
int is_common=0; int is_common = 0;
if (dci_ind->ss_type == NR_SearchSpace__searchSpaceType_PR_common) { if (dci_ind->ss_type == NR_SearchSpace__searchSpaceType_PR_common) {
dlsch_config_pdu_1_0->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs ? mac->type0_PDCCH_CSS_config.num_rbs : current_DL_BWP->initial_BWPSize; dlsch_config_pdu_1_0->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs ? mac->type0_PDCCH_CSS_config.num_rbs : current_DL_BWP->initial_BWPSize;
dlsch_config_pdu_1_0->BWPStart = dci_ind->cset_start; dlsch_config_pdu_1_0->BWPStart = dci_ind->cset_start;
...@@ -827,7 +635,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -827,7 +635,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
} }
if(rnti == SI_RNTI) { if(rnti == SI_RNTI) {
NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config = mac->type0_PDCCH_CSS_config; NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config = mac->type0_PDCCH_CSS_config;
default_abc = type0_PDCCH_CSS_config.type0_pdcch_ss_mux_pattern; mux_pattern = type0_PDCCH_CSS_config.type0_pdcch_ss_mux_pattern;
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH; dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH;
dlsch_config_pdu_1_0->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon; dlsch_config_pdu_1_0->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
if (pdsch_config) pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = NULL; // For PDSCH with mapping type A, the UE shall assume dmrs-AdditionalPosition='pos2' if (pdsch_config) pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = NULL; // For PDSCH with mapping type A, the UE shall assume dmrs-AdditionalPosition='pos2'
...@@ -838,17 +646,10 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -838,17 +646,10 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
} else { } else {
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
} }
if( (ra->RA_window_cnt >= 0 && rnti == ra->ra_rnti) || (rnti == ra->t_crnti) ) { if ((ra->RA_window_cnt >= 0 && rnti == ra->ra_rnti) || (rnti == ra->t_crnti)) {
if (mac->scc == NULL) { // use coreset0 if (mac->scc == NULL) // use coreset0
is_common=1; is_common = 1;
} }
if (!get_softmodem_params()->sa) { // NSA mode is not using the Initial BWP
pdsch_config = mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup;
}
} else if (dl_bwp_id>0 && mac->DLbwp[dl_bwp_id-1]) {
pdsch_config = mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup;
} else if (mac->scc)
pdsch_config = NULL;
} }
/* IDENTIFIER_DCI_FORMATS */ /* IDENTIFIER_DCI_FORMATS */
...@@ -858,36 +659,18 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -858,36 +659,18 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
return -1; return -1;
} }
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL;
if (dl_bwp_id>0 &&
mac->DLbwp[dl_bwp_id-1] &&
mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated &&
mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config &&
mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList->choice.setup;
else if (dl_bwp_id>0 && mac->DLbwp[dl_bwp_id-1] && mac->DLbwp[dl_bwp_id-1]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = mac->DLbwp[dl_bwp_id-1]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
else if (mac->scc_SIB && mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup)
pdsch_TimeDomainAllocationList = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
int mappingtype;
/* TIME_DOM_RESOURCE_ASSIGNMENT */ /* TIME_DOM_RESOURCE_ASSIGNMENT */
if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,pdsch_TimeDomainAllocationList, int dmrs_typeA_pos = (mac->scc != NULL) ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position;
NULL,dlsch_config_pdu_1_0,&mappingtype, // TODO need to differentiate SI_RNTI between SIB1 and other SIB
dci->time_domain_assignment.val, NR_tda_info_t tda_info = get_dl_tda_info(current_DL_BWP, dci_ind->ss_type, dci->time_domain_assignment.val,
default_abc,rnti==SI_RNTI) < 0) { dmrs_typeA_pos, mux_pattern, get_rnti_type(mac, rnti), coreset_type, rnti == SI_RNTI);
LOG_W(MAC, "[%d.%d] Invalid time_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot);
return -1; dlsch_config_pdu_1_0->number_symbols = tda_info.nrOfSymbols;
} dlsch_config_pdu_1_0->start_symbol = tda_info.startSymbolIndex;
if(pdsch_TimeDomainAllocationList && rnti!=SI_RNTI)
mappingtype = pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType;
struct NR_DMRS_DownlinkConfig *dl_dmrs_config = NULL; struct NR_DMRS_DownlinkConfig *dl_dmrs_config = NULL;
if(dl_bwp_id>0 && mac->DLbwp[dl_bwp_id-1] != NULL) if (pdsch_config)
dl_dmrs_config = (mappingtype == typeA) ? dl_dmrs_config = (tda_info.mapping_type == typeA) ? pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup : pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup;
mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup :
mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup;
dlsch_config_pdu_1_0->nscid = 0; dlsch_config_pdu_1_0->nscid = 0;
if(dl_dmrs_config && dl_dmrs_config->scramblingID0) if(dl_dmrs_config && dl_dmrs_config->scramblingID0)
...@@ -901,7 +684,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -901,7 +684,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
(get_softmodem_params()->nsa) ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position, (get_softmodem_params()->nsa) ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position,
dlsch_config_pdu_1_0->number_symbols, dlsch_config_pdu_1_0->number_symbols,
dlsch_config_pdu_1_0->start_symbol, dlsch_config_pdu_1_0->start_symbol,
mappingtype, tda_info.mapping_type,
1); 1);
dlsch_config_pdu_1_0->dmrsConfigType = (dl_dmrs_config != NULL) ? dlsch_config_pdu_1_0->dmrsConfigType = (dl_dmrs_config != NULL) ?
...@@ -971,36 +754,16 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -971,36 +754,16 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
if (dci->tpc == 3) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 3; if (dci->tpc == 3) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 3;
// Sanity check for pucch_resource_indicator value received to check for false DCI. // Sanity check for pucch_resource_indicator value received to check for false DCI.
valid = 0; valid = 0;
if (ul_bwp_id > 0 && if (pucch_Config && pucch_Config->resourceSetToAddModList) {
mac->ULbwp[ul_bwp_id-1] && pucch_res_set_cnt = pucch_Config->resourceSetToAddModList->list.count;
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated &&
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pucch_Config &&
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup&&
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList) {
pucch_res_set_cnt = mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.count;
for (int id = 0; id < pucch_res_set_cnt; id++) { for (int id = 0; id < pucch_res_set_cnt; id++) {
if (dci->pucch_resource_indicator < mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[id]->resourceList.list.count) { if (dci->pucch_resource_indicator < pucch_Config->resourceSetToAddModList->list.array[id]->resourceList.list.count) {
valid = 1;
break;
}
}
}
else if (mac->cg &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList){
pucch_res_set_cnt = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList->list.count;
for (int id = 0; id < pucch_res_set_cnt; id++) {
if (dci->pucch_resource_indicator < mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList->list.array[id]->resourceList.list.count) {
valid = 1; valid = 1;
break; break;
} }
} }
} else valid=1; } else
valid = 1;
if (!valid) { if (!valid) {
LOG_W(MAC, "[%d.%d] pucch_resource_indicator value %d is out of bounds. Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dci->pucch_resource_indicator); LOG_W(MAC, "[%d.%d] pucch_resource_indicator value %d is out of bounds. Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dci->pucch_resource_indicator);
return -1; return -1;
...@@ -1084,16 +847,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -1084,16 +847,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
LOG_W(NR_MAC,"[%d.%d] bwp_indicator %d > NR_MAX_NUM_BWP Possibly due to false DCI. Ignoring DCI!\n", frame, slot,dci->bwp_indicator.val); LOG_W(NR_MAC,"[%d.%d] bwp_indicator %d > NR_MAX_NUM_BWP Possibly due to false DCI. Ignoring DCI!\n", frame, slot,dci->bwp_indicator.val);
return -1; return -1;
} }
NR_BWP_Id_t dl_bwp_id = mac->current_DL_BWP.bwp_id; NR_PDSCH_Config_t *pdsch_Config = current_DL_BWP->pdsch_Config;
NR_BWP_Id_t ul_bwp_id = mac->current_UL_BWP.bwp_id;
NR_PDSCH_Config_t *pdsch_Config=NULL;
NR_BWP_DownlinkDedicated_t *bwpd=NULL;
NR_BWP_DownlinkCommon_t *bwpc=NULL;
NR_BWP_UplinkDedicated_t *ubwpd=NULL;
NR_BWP_UplinkCommon_t *ubwpc=NULL;
get_bwp_info(mac,dl_bwp_id,ul_bwp_id,&bwpd,&bwpc,&ubwpd,&ubwpc);
pdsch_Config = bwpd->pdsch_Config->choice.setup;
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH; dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti; dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti;
...@@ -1113,18 +868,14 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -1113,18 +868,14 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
return -1; return -1;
} }
/* TIME_DOM_RESOURCE_ASSIGNMENT */ /* TIME_DOM_RESOURCE_ASSIGNMENT */
int mappingtype; int dmrs_typeA_pos = (mac->scc != NULL) ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position;
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = choose_dl_tda_list(pdsch_Config,bwpc->pdsch_ConfigCommon->choice.setup); NR_tda_info_t tda_info = get_dl_tda_info(current_DL_BWP, dci_ind->ss_type, dci->time_domain_assignment.val,
if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,pdsch_TimeDomainAllocationList, dmrs_typeA_pos, mux_pattern, get_rnti_type(mac, rnti), coreset_type, false);
NULL,dlsch_config_pdu_1_1,&mappingtype,
dci->time_domain_assignment.val,0,false) < 0) { dlsch_config_pdu_1_1->number_symbols = tda_info.nrOfSymbols;
LOG_W(MAC, "[%d.%d] Invalid time_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot); dlsch_config_pdu_1_1->start_symbol = tda_info.startSymbolIndex;
return -1;
}
if(pdsch_TimeDomainAllocationList)
mappingtype = pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType;
struct NR_DMRS_DownlinkConfig *dl_dmrs_config = (mappingtype == typeA) ? struct NR_DMRS_DownlinkConfig *dl_dmrs_config = (tda_info.mapping_type == typeA) ?
pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup : pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup :
pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup; pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup;
...@@ -1194,9 +945,9 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -1194,9 +945,9 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
// Sanity check for pucch_resource_indicator value received to check for false DCI. // Sanity check for pucch_resource_indicator value received to check for false DCI.
valid = 0; valid = 0;
pucch_res_set_cnt = ubwpd->pucch_Config->choice.setup->resourceSetToAddModList->list.count; pucch_res_set_cnt = pucch_Config->resourceSetToAddModList->list.count;
for (int id = 0; id < pucch_res_set_cnt; id++) { for (int id = 0; id < pucch_res_set_cnt; id++) {
if (dci->pucch_resource_indicator < ubwpd->pucch_Config->choice.setup->resourceSetToAddModList->list.array[id]->resourceList.list.count) { if (dci->pucch_resource_indicator < pucch_Config->resourceSetToAddModList->list.array[id]->resourceList.list.count) {
valid = 1; valid = 1;
break; break;
} }
...@@ -1311,7 +1062,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -1311,7 +1062,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
mac->scc? mac->scc->dmrs_TypeA_Position:mac->mib->dmrs_TypeA_Position, mac->scc? mac->scc->dmrs_TypeA_Position:mac->mib->dmrs_TypeA_Position,
dlsch_config_pdu_1_1->number_symbols, dlsch_config_pdu_1_1->number_symbols,
dlsch_config_pdu_1_1->start_symbol, dlsch_config_pdu_1_1->start_symbol,
mappingtype, tda_info.mapping_type,
dlsch_config_pdu_1_1->n_front_load_symb); dlsch_config_pdu_1_1->n_front_load_symb);
/* TCI */ /* TCI */
...@@ -1332,8 +1083,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -1332,8 +1083,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
/* PDSCH_TO_HARQ_FEEDBACK_TIME_IND */ /* PDSCH_TO_HARQ_FEEDBACK_TIME_IND */
// according to TS 38.213 Table 9.2.3-1 // according to TS 38.213 Table 9.2.3-1
uint8_t feedback_ti = uint8_t feedback_ti = pucch_Config->dl_DataToUL_ACK->list.array[dci->pdsch_to_harq_feedback_timing_indicator.val][0];
ubwpd->pucch_Config->choice.setup->dl_DataToUL_ACK->list.array[dci->pdsch_to_harq_feedback_timing_indicator.val][0];
AssertFatal(feedback_ti>=DURATION_RX_TO_TX,"PDSCH to HARQ feedback time (%d) cannot be less than DURATION_RX_TO_TX (%d). Min feedback time set in config file (min_rxtxtime).\n", AssertFatal(feedback_ti>=DURATION_RX_TO_TX,"PDSCH to HARQ feedback time (%d) cannot be less than DURATION_RX_TO_TX (%d). Min feedback time set in config file (min_rxtxtime).\n",
feedback_ti,DURATION_RX_TO_TX); feedback_ti,DURATION_RX_TO_TX);
...@@ -1374,7 +1124,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -1374,7 +1124,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
nb_rb_oh, 0, Nl); nb_rb_oh, 0, Nl);
// TBS_LBRM according to section 5.4.2.1 of 38.212 // TBS_LBRM according to section 5.4.2.1 of 38.212
long *maxMIMO_Layers = mac->cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->ext1->maxMIMO_Layers; long *maxMIMO_Layers = current_DL_BWP->pdsch_servingcellconfig->ext1->maxMIMO_Layers;
AssertFatal (maxMIMO_Layers != NULL,"Option with max MIMO layers not configured is not supported\n"); AssertFatal (maxMIMO_Layers != NULL,"Option with max MIMO layers not configured is not supported\n");
int nl_tbslbrm = *maxMIMO_Layers < 4 ? *maxMIMO_Layers : 4; int nl_tbslbrm = *maxMIMO_Layers < 4 ? *maxMIMO_Layers : 4;
int bw_tbslbrm = get_dlbw_tbslbrm(current_DL_BWP->initial_BWPSize, mac->cg); int bw_tbslbrm = get_dlbw_tbslbrm(current_DL_BWP->initial_BWPSize, mac->cg);
...@@ -1414,25 +1164,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -1414,25 +1164,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
break; break;
} }
if(rnti == SI_RNTI){
// }else if(rnti == mac->ra_rnti){
}else if(rnti == P_RNTI){
}else{ // c-rnti
/// check if this is pdcch order
//dci->random_access_preamble_index;
//dci->ss_pbch_index;
//dci->prach_mask_index;
/// else normal DL-SCH grant
}
return ret; return ret;
} }
int8_t nr_ue_process_csirs_measurements(module_id_t module_id, int8_t nr_ue_process_csirs_measurements(module_id_t module_id,
...@@ -1496,7 +1228,7 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, ...@@ -1496,7 +1228,7 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac,
int O_CRC = 0; //FIXME int O_CRC = 0; //FIXME
uint16_t O_uci = O_CSI + O_ACK; uint16_t O_uci = O_CSI + O_ACK;
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP; NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
NR_BWP_Id_t bwp_id = current_UL_BWP->bwp_id; NR_UE_DL_BWP_t *current_DL_BWP = &mac->current_DL_BWP;
NR_PUCCH_FormatConfig_t *pucchfmt; NR_PUCCH_FormatConfig_t *pucchfmt;
long *pusch_id = NULL; long *pusch_id = NULL;
long *id0 = NULL; long *id0 = NULL;
...@@ -1512,10 +1244,10 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, ...@@ -1512,10 +1244,10 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac,
// only for ack/nack // only for ack/nack
if (pucch->initial_pucch_id > -1 && if (pucch->initial_pucch_id > -1 &&
pucch->pucch_resource == NULL) { pucch->pucch_resource == NULL) {
int pucch_resourcecommon = *current_UL_BWP->pucch_ConfigCommon->pucch_ResourceCommon;
pucch_pdu->format_type = initial_pucch_resource[pucch->initial_pucch_id].format; pucch_pdu->format_type = initial_pucch_resource[pucch_resourcecommon].format;
pucch_pdu->start_symbol_index = initial_pucch_resource[pucch->initial_pucch_id].startingSymbolIndex; pucch_pdu->start_symbol_index = initial_pucch_resource[pucch_resourcecommon].startingSymbolIndex;
pucch_pdu->nr_of_symbols = initial_pucch_resource[pucch->initial_pucch_id].nrofSymbols; pucch_pdu->nr_of_symbols = initial_pucch_resource[pucch_resourcecommon].nrofSymbols;
pucch_pdu->bwp_size = current_UL_BWP->BWPSize; pucch_pdu->bwp_size = current_UL_BWP->BWPSize;
pucch_pdu->bwp_start = current_UL_BWP->BWPStart; pucch_pdu->bwp_start = current_UL_BWP->BWPStart;
...@@ -1523,19 +1255,20 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, ...@@ -1523,19 +1255,20 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac,
pucch_pdu->prb_size = 1; // format 0 or 1 pucch_pdu->prb_size = 1; // format 0 or 1
int RB_BWP_offset; int RB_BWP_offset;
if (pucch->initial_pucch_id == 15) if (pucch->initial_pucch_id == 15)
RB_BWP_offset = pucch_pdu->bwp_size>>2; RB_BWP_offset = pucch_pdu->bwp_size >> 2;
else else
RB_BWP_offset = initial_pucch_resource[pucch->initial_pucch_id].PRB_offset; RB_BWP_offset = initial_pucch_resource[pucch_resourcecommon].PRB_offset;
int N_CS = initial_pucch_resource[pucch->initial_pucch_id].nb_CS_indexes; int N_CS = initial_pucch_resource[pucch_resourcecommon].nb_CS_indexes;
pucch_pdu->prb_start = RB_BWP_offset + (pucch->initial_pucch_id/N_CS);
if (pucch->initial_pucch_id>>3 == 0) { if (pucch->initial_pucch_id >> 3 == 0) {
pucch_pdu->second_hop_prb = pucch_pdu->bwp_size - 1 - RB_BWP_offset - (pucch->initial_pucch_id/N_CS); pucch_pdu->prb_start = RB_BWP_offset + (pucch->initial_pucch_id / N_CS);
pucch_pdu->initial_cyclic_shift = initial_pucch_resource[pucch->initial_pucch_id].initial_CS_indexes[pucch->initial_pucch_id%N_CS]; pucch_pdu->second_hop_prb = pucch_pdu->bwp_size - 1 - RB_BWP_offset - (pucch->initial_pucch_id / N_CS);
} pucch_pdu->initial_cyclic_shift = initial_pucch_resource[pucch_resourcecommon].initial_CS_indexes[pucch->initial_pucch_id % N_CS];
else { } else {
pucch_pdu->second_hop_prb = pucch_pdu->bwp_size - 1 - RB_BWP_offset - ((pucch->initial_pucch_id - 8)/N_CS); pucch_pdu->prb_start = pucch_pdu->bwp_size - 1 - RB_BWP_offset - ((pucch->initial_pucch_id - 8) / N_CS);
pucch_pdu->initial_cyclic_shift = initial_pucch_resource[pucch->initial_pucch_id].initial_CS_indexes[(pucch->initial_pucch_id - 8)%N_CS]; pucch_pdu->second_hop_prb = RB_BWP_offset + ((pucch->initial_pucch_id - 8) / N_CS);
pucch_pdu->initial_cyclic_shift = initial_pucch_resource[pucch_resourcecommon].initial_CS_indexes[(pucch->initial_pucch_id - 8) % N_CS];
} }
pucch_pdu->freq_hop_flag = 1; pucch_pdu->freq_hop_flag = 1;
pucch_pdu->time_domain_occ_idx = 0; pucch_pdu->time_domain_occ_idx = 0;
...@@ -1551,48 +1284,25 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, ...@@ -1551,48 +1284,25 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac,
NR_PUCCH_Resource_t *pucchres = pucch->pucch_resource; NR_PUCCH_Resource_t *pucchres = pucch->pucch_resource;
if (mac->cg && if (current_UL_BWP->harq_ACK_SpatialBundlingPUCCH != NULL || *current_DL_BWP->pdsch_HARQ_ACK_Codebook != 1) {
mac->cg->physicalCellGroupConfig &&
(mac->cg->physicalCellGroupConfig->harq_ACK_SpatialBundlingPUCCH != NULL ||
mac->cg->physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook != 1)) {
LOG_E(MAC,"PUCCH Unsupported cell group configuration\n"); LOG_E(MAC,"PUCCH Unsupported cell group configuration\n");
return; return;
} } else if (current_DL_BWP && current_DL_BWP->pdsch_servingcellconfig && current_DL_BWP->pdsch_servingcellconfig->codeBlockGroupTransmission != NULL) {
else if (mac->cg &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup &&
mac->cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission != NULL) {
LOG_E(MAC,"PUCCH Unsupported code block group for serving cell config\n"); LOG_E(MAC,"PUCCH Unsupported code block group for serving cell config\n");
return; return;
} }
NR_PUCCH_Config_t *pucch_Config;
if (bwp_id>0 && NR_PUSCH_Config_t *pusch_Config = current_UL_BWP ? current_UL_BWP->pusch_Config : NULL;
mac->ULbwp[bwp_id-1] && if (pusch_Config) {
mac->ULbwp[bwp_id-1]->bwp_Dedicated &&
mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config &&
mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup) {
NR_PUSCH_Config_t *pusch_Config = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup;
pusch_id = pusch_Config->dataScramblingIdentityPUSCH; pusch_id = pusch_Config->dataScramblingIdentityPUSCH;
if (pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA != NULL) if (pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA != NULL)
id0 = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup->transformPrecodingDisabled->scramblingID0; id0 = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup->transformPrecodingDisabled->scramblingID0;
else if (pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB != NULL) else if (pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB != NULL)
id0 = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->transformPrecodingDisabled->scramblingID0; id0 = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->transformPrecodingDisabled->scramblingID0;
else *id0 = mac->physCellId;
pucch_Config = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup;
} }
else if (bwp_id==0 &&
mac->cg && NR_PUCCH_Config_t *pucch_Config = current_UL_BWP->pucch_Config;
mac->cg->spCellConfig && AssertFatal(pucch_Config, "no pucch_Config\n");
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) {
pucch_Config = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup;
}
else AssertFatal(1==0,"no pucch_Config\n");
pucch_pdu->bwp_size = current_UL_BWP->BWPSize; pucch_pdu->bwp_size = current_UL_BWP->BWPSize;
pucch_pdu->bwp_start = current_UL_BWP->BWPStart; pucch_pdu->bwp_start = current_UL_BWP->BWPStart;
...@@ -1642,8 +1352,8 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, ...@@ -1642,8 +1352,8 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac,
pucch_pdu->n_bit = O_uci+O_SR; pucch_pdu->n_bit = O_uci+O_SR;
pucch_pdu->nr_of_symbols = pucchres->format.choice.format2->nrofSymbols; pucch_pdu->nr_of_symbols = pucchres->format.choice.format2->nrofSymbols;
pucch_pdu->start_symbol_index = pucchres->format.choice.format2->startingSymbolIndex; pucch_pdu->start_symbol_index = pucchres->format.choice.format2->startingSymbolIndex;
pucch_pdu->data_scrambling_id = pusch_id!= NULL ? *pusch_id : mac->physCellId; pucch_pdu->data_scrambling_id = pusch_id != NULL ? *pusch_id : mac->physCellId;
pucch_pdu->dmrs_scrambling_id = id0!= NULL ? *id0 : mac->physCellId; pucch_pdu->dmrs_scrambling_id = id0 != NULL ? *id0 : mac->physCellId;
pucch_pdu->prb_size = compute_pucch_prb_size(2,pucchres->format.choice.format2->nrofPRBs, pucch_pdu->prb_size = compute_pucch_prb_size(2,pucchres->format.choice.format2->nrofPRBs,
O_uci+O_SR,O_CSI,pucch_Config->format2->choice.setup->maxCodeRate, O_uci+O_SR,O_CSI,pucch_Config->format2->choice.setup->maxCodeRate,
2,pucchres->format.choice.format2->nrofSymbols,8); 2,pucchres->format.choice.format2->nrofSymbols,8);
...@@ -1653,7 +1363,7 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, ...@@ -1653,7 +1363,7 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac,
pucch_pdu->n_bit = O_uci+O_SR; pucch_pdu->n_bit = O_uci+O_SR;
pucch_pdu->nr_of_symbols = pucchres->format.choice.format3->nrofSymbols; pucch_pdu->nr_of_symbols = pucchres->format.choice.format3->nrofSymbols;
pucch_pdu->start_symbol_index = pucchres->format.choice.format3->startingSymbolIndex; pucch_pdu->start_symbol_index = pucchres->format.choice.format3->startingSymbolIndex;
pucch_pdu->data_scrambling_id = pusch_id!= NULL ? *pusch_id : mac->physCellId; pucch_pdu->data_scrambling_id = pusch_id != NULL ? *pusch_id : mac->physCellId;
if (pucch_Config->format3 == NULL) { if (pucch_Config->format3 == NULL) {
pucch_pdu->pi_2bpsk = 0; pucch_pdu->pi_2bpsk = 0;
pucch_pdu->add_dmrs_flag = 0; pucch_pdu->add_dmrs_flag = 0;
...@@ -1712,14 +1422,8 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac, ...@@ -1712,14 +1422,8 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac,
} }
else AssertFatal(1==0,"problem with pucch configuration\n"); else AssertFatal(1==0,"problem with pucch configuration\n");
NR_PUCCH_ConfigCommon_t *pucch_ConfigCommon; NR_PUCCH_ConfigCommon_t *pucch_ConfigCommon = current_UL_BWP->pucch_ConfigCommon;
if (bwp_id>0 &&
mac->ULbwp[bwp_id-1] &&
mac->ULbwp[bwp_id-1]->bwp_Common &&
mac->ULbwp[bwp_id-1]->bwp_Common->pucch_ConfigCommon)
pucch_ConfigCommon = mac->ULbwp[bwp_id-1]->bwp_Common->pucch_ConfigCommon->choice.setup;
else if (mac->scc) pucch_ConfigCommon = mac->scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup;
else pucch_ConfigCommon = mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pucch_ConfigCommon->choice.setup;
if (pucch_ConfigCommon->hoppingId != NULL) if (pucch_ConfigCommon->hoppingId != NULL)
pucch_pdu->hopping_id = *pucch_ConfigCommon->hoppingId; pucch_pdu->hopping_id = *pucch_ConfigCommon->hoppingId;
else else
...@@ -1759,11 +1463,9 @@ int16_t get_pucch_tx_power_ue(NR_UE_MAC_INST_t *mac, ...@@ -1759,11 +1463,9 @@ int16_t get_pucch_tx_power_ue(NR_UE_MAC_INST_t *mac,
int subframe_number, int subframe_number,
int O_ACK, int O_SR, int O_ACK, int O_SR,
int O_CSI, int O_CRC) { int O_CSI, int O_CRC) {
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
int PUCCH_POWER_DEFAULT = 0; int PUCCH_POWER_DEFAULT = 0;
int16_t P_O_NOMINAL_PUCCH; int16_t P_O_NOMINAL_PUCCH = *current_UL_BWP->pucch_ConfigCommon->p0_nominal;
if (mac->scc) P_O_NOMINAL_PUCCH = *mac->scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->p0_nominal;
else P_O_NOMINAL_PUCCH = *mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pucch_ConfigCommon->choice.setup->p0_nominal;
struct NR_PUCCH_PowerControl *power_config = pucch_Config->pucch_PowerControl; struct NR_PUCCH_PowerControl *power_config = pucch_Config->pucch_PowerControl;
...@@ -1907,7 +1609,7 @@ int get_deltatf(uint16_t nb_of_prbs, ...@@ -1907,7 +1609,7 @@ int get_deltatf(uint16_t nb_of_prbs,
int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, int uci_size) { int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, int uci_size) {
int pucch_resource_set_id = 0; int pucch_resource_set_id = 0;
NR_BWP_Id_t bwp_id = mac->current_DL_BWP.bwp_id; NR_PUCCH_Config_t *pucch_Config = mac->current_UL_BWP.pucch_Config;
//long *pucch_max_pl_bits = NULL; //long *pucch_max_pl_bits = NULL;
...@@ -1920,23 +1622,7 @@ int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, int uci_size) { ...@@ -1920,23 +1622,7 @@ int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, int uci_size) {
*/ */
/* look for the first resource set which supports uci_size number of bits for payload */ /* look for the first resource set which supports uci_size number of bits for payload */
while (pucch_resource_set_id < MAX_NB_OF_PUCCH_RESOURCE_SETS) { while (pucch_resource_set_id < MAX_NB_OF_PUCCH_RESOURCE_SETS) {
if ((bwp_id>0 && if (pucch_Config && pucch_Config->resourceSetToAddModList && pucch_Config->resourceSetToAddModList->list.array[pucch_resource_set_id] != NULL) {
mac->ULbwp[bwp_id-1] &&
mac->ULbwp[bwp_id-1]->bwp_Dedicated &&
mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config &&
mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup &&
mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList &&
mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[pucch_resource_set_id] != NULL) ||
(bwp_id==0 &&
mac->cg &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList->list.array[pucch_resource_set_id] != NULL)) {
// PUCCH with format0 can be up to 3 bits (2 ack/nacks + 1 sr is 3 max bits) // PUCCH with format0 can be up to 3 bits (2 ack/nacks + 1 sr is 3 max bits)
if (uci_size <= 3) { if (uci_size <= 3) {
pucch_resource_set_id = 0; pucch_resource_set_id = 0;
...@@ -1975,34 +1661,12 @@ int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, int uci_size) { ...@@ -1975,34 +1661,12 @@ int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, int uci_size) {
* *
*********************************************************************/ *********************************************************************/
void select_pucch_resource(NR_UE_MAC_INST_t *mac, void select_pucch_resource(NR_UE_MAC_INST_t *mac, PUCCH_sched_t *pucch)
PUCCH_sched_t *pucch) { {
NR_PUCCH_ResourceId_t *current_resource_id = NULL; NR_PUCCH_ResourceId_t *current_resource_id = NULL;
NR_BWP_Id_t bwp_id = mac->current_UL_BWP.bwp_id; NR_PUCCH_Config_t *pucch_Config = mac->current_UL_BWP.pucch_Config;
int n_list; int n_list;
if (pucch->is_common == 1 || !pucch_Config || !pucch_Config->resourceSetToAddModList || pucch_Config->resourceSetToAddModList->list.array[0] == NULL) {
if (pucch->is_common == 1 ||
(bwp_id == 0 &&
mac->cg == NULL) ||
(bwp_id == 0 &&
mac->cg &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList->list.array[0] == NULL) ||
(mac->ULbwp[bwp_id-1] &&
mac->ULbwp[bwp_id-1]->bwp_Dedicated &&
mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config &&
mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup &&
mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList &&
mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[0] == NULL)
){
/* see TS 38.213 9.2.1 PUCCH Resource Sets */ /* see TS 38.213 9.2.1 PUCCH Resource Sets */
int delta_PRI = pucch->resource_indicator; int delta_PRI = pucch->resource_indicator;
int n_CCE_0 = pucch->n_CCE; int n_CCE_0 = pucch->n_CCE;
...@@ -2013,21 +1677,9 @@ void select_pucch_resource(NR_UE_MAC_INST_t *mac, ...@@ -2013,21 +1677,9 @@ void select_pucch_resource(NR_UE_MAC_INST_t *mac,
int r_PUCCH = ((2 * n_CCE_0)/N_CCE_0) + (2 * delta_PRI); int r_PUCCH = ((2 * n_CCE_0)/N_CCE_0) + (2 * delta_PRI);
pucch->initial_pucch_id = r_PUCCH; pucch->initial_pucch_id = r_PUCCH;
pucch->pucch_resource = NULL; pucch->pucch_resource = NULL;
} } else {
else { struct NR_PUCCH_Config__resourceSetToAddModList *resourceSetToAddModList = pucch_Config->resourceSetToAddModList;
struct NR_PUCCH_Config__resourceSetToAddModList *resourceSetToAddModList = NULL; struct NR_PUCCH_Config__resourceToAddModList *resourceToAddModList = pucch_Config->resourceToAddModList;
struct NR_PUCCH_Config__resourceToAddModList *resourceToAddModList = NULL;
if (bwp_id > 0 && mac->ULbwp[bwp_id-1]) {
AssertFatal(mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList!=NULL,
"mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList is null\n");
resourceSetToAddModList = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList;
resourceToAddModList = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceToAddModList;
}
else if (bwp_id == 0 && mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList!=NULL) {
resourceSetToAddModList = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceSetToAddModList;
resourceToAddModList = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->resourceToAddModList;
}
n_list = resourceSetToAddModList->list.count; n_list = resourceSetToAddModList->list.count;
if (pucch->resource_set_id > n_list) { if (pucch->resource_set_id > n_list) {
LOG_E(MAC,"Invalid PUCCH resource set id %d\n",pucch->resource_set_id); LOG_E(MAC,"Invalid PUCCH resource set id %d\n",pucch->resource_set_id);
...@@ -2107,19 +1759,8 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, ...@@ -2107,19 +1759,8 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac,
NR_UE_DL_BWP_t *current_DL_BWP = &mac->current_DL_BWP; NR_UE_DL_BWP_t *current_DL_BWP = &mac->current_DL_BWP;
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP; NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
NR_BWP_Id_t dl_bwp_id = current_DL_BWP->bwp_id;
NR_BWP_Id_t ul_bwp_id = current_UL_BWP->bwp_id; if (current_DL_BWP && current_DL_BWP->pdsch_Config && current_DL_BWP->pdsch_Config->maxNrofCodeWordsScheduledByDCI && current_DL_BWP->pdsch_Config->maxNrofCodeWordsScheduledByDCI[0] == 2) {
NR_BWP_DownlinkDedicated_t *bwpd=NULL;
NR_BWP_DownlinkCommon_t *bwpc=NULL;
NR_BWP_UplinkDedicated_t *ubwpd=NULL;
NR_BWP_UplinkCommon_t *ubwpc=NULL;
get_bwp_info(mac,dl_bwp_id,ul_bwp_id,&bwpd,&bwpc,&ubwpd,&ubwpc);
if (bwpd &&
bwpd->pdsch_Config &&
bwpd->pdsch_Config->choice.setup &&
bwpd->pdsch_Config->choice.setup->maxNrofCodeWordsScheduledByDCI &&
bwpd->pdsch_Config->choice.setup->maxNrofCodeWordsScheduledByDCI[0] == 2) {
two_transport_blocks = true; two_transport_blocks = true;
number_of_code_word = 2; number_of_code_word = 2;
} }
...@@ -2144,8 +1785,7 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, ...@@ -2144,8 +1785,7 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac,
sched_frame = (sched_frame + 1) % 1024; sched_frame = (sched_frame + 1) % 1024;
} }
AssertFatal(sched_slot < slots_per_frame, "sched_slot was calculated incorrect %d\n", sched_slot); AssertFatal(sched_slot < slots_per_frame, "sched_slot was calculated incorrect %d\n", sched_slot);
LOG_D(PHY,"HARQ pid %d is active for %d.%d (dl_slot %d, feedback_to_ul %d, is_common %d\n", LOG_D(PHY, "HARQ pid %d is active for %d.%d (dl_slot %d, feedback_to_ul %d\n", dl_harq_pid, sched_frame, sched_slot, current_harq->dl_slot, current_harq->feedback_to_ul);
dl_harq_pid, sched_frame,sched_slot,current_harq->dl_slot,current_harq->feedback_to_ul,current_harq->is_common);
/* check if current tx slot should transmit downlink acknowlegment */ /* check if current tx slot should transmit downlink acknowlegment */
if (sched_frame == frame && sched_slot == slot) { if (sched_frame == frame && sched_slot == slot) {
if (get_softmodem_params()->emulate_l1) { if (get_softmodem_params()->emulate_l1) {
...@@ -2209,10 +1849,8 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac, ...@@ -2209,10 +1849,8 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac,
U_DAI_c = number_harq_feedback/number_of_code_word; U_DAI_c = number_harq_feedback/number_of_code_word;
N_m_c_rx = number_harq_feedback; N_m_c_rx = number_harq_feedback;
int N_SPS_c = 0; /* FFS TODO_NR multicells and SPS are not supported at the moment */ int N_SPS_c = 0; /* FFS TODO_NR multicells and SPS are not supported at the moment */
if (mac->cg != NULL && if (current_UL_BWP->harq_ACK_SpatialBundlingPUCCH != NULL) {
mac->cg->physicalCellGroupConfig != NULL && int N_TB_max_DL = current_DL_BWP->pdsch_Config->maxNrofCodeWordsScheduledByDCI[0];
mac->cg->physicalCellGroupConfig->harq_ACK_SpatialBundlingPUCCH != NULL) {
int N_TB_max_DL = bwpd->pdsch_Config->choice.setup->maxNrofCodeWordsScheduledByDCI[0];
pucch->n_HARQ_ACK = (((V_DAI_m_DL - U_DAI_c)%4) * N_TB_max_DL) + N_m_c_rx + N_SPS_c; pucch->n_HARQ_ACK = (((V_DAI_m_DL - U_DAI_c)%4) * N_TB_max_DL) + N_m_c_rx + N_SPS_c;
LOG_D(MAC, "PUCCH power n(%d) = ( V(%d) - U(%d) )mod4 * N_TB(%d) + N(%d) \n", pucch->n_HARQ_ACK, V_DAI_m_DL, U_DAI_c, N_TB_max_DL, N_m_c_rx); LOG_D(MAC, "PUCCH power n(%d) = ( V(%d) - U(%d) )mod4 * N_TB(%d) + N(%d) \n", pucch->n_HARQ_ACK, V_DAI_m_DL, U_DAI_c, N_TB_max_DL, N_m_c_rx);
} }
...@@ -2305,28 +1943,10 @@ bool trigger_periodic_scheduling_request(NR_UE_MAC_INST_t *mac, ...@@ -2305,28 +1943,10 @@ bool trigger_periodic_scheduling_request(NR_UE_MAC_INST_t *mac,
int slot) { int slot) {
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP; NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
NR_BWP_Id_t bwp_id = current_UL_BWP->bwp_id; NR_PUCCH_Config_t *pucch_Config = current_UL_BWP->pucch_Config;
NR_PUCCH_Config_t *pucch_Config = NULL;
const int n_slots_frame = nr_slots_per_frame[current_UL_BWP->scs]; const int n_slots_frame = nr_slots_per_frame[current_UL_BWP->scs];
if (bwp_id>0 &&
mac->ULbwp[bwp_id-1] &&
mac->ULbwp[bwp_id-1]->bwp_Dedicated &&
mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config &&
mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup) {
pucch_Config = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup;
}
else if (bwp_id==0 &&
mac->cg &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) {
pucch_Config = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup;
}
if(!pucch_Config || if(!pucch_Config ||
!pucch_Config->schedulingRequestResourceToAddModList || !pucch_Config->schedulingRequestResourceToAddModList ||
pucch_Config->schedulingRequestResourceToAddModList->list.count==0) pucch_Config->schedulingRequestResourceToAddModList->list.count==0)
...@@ -2419,15 +2039,11 @@ uint8_t nr_get_csi_measurements(NR_UE_MAC_INST_t *mac, ...@@ -2419,15 +2039,11 @@ uint8_t nr_get_csi_measurements(NR_UE_MAC_INST_t *mac,
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP; NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
NR_BWP_Id_t bwp_id = current_UL_BWP->bwp_id; NR_BWP_Id_t bwp_id = current_UL_BWP->bwp_id;
NR_PUCCH_Config_t *pucch_Config = NULL; NR_PUCCH_Config_t *pucch_Config = current_UL_BWP->pucch_Config;
int csi_bits = 0; int csi_bits = 0;
if(mac->cg && if (current_UL_BWP->csi_MeasConfig) {
mac->cg->spCellConfig && NR_CSI_MeasConfig_t *csi_measconfig = current_UL_BWP->csi_MeasConfig;
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->csi_MeasConfig) {
NR_CSI_MeasConfig_t *csi_measconfig = mac->cg->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup;
for (int csi_report_id = 0; csi_report_id < csi_measconfig->csi_ReportConfigToAddModList->list.count; csi_report_id++){ for (int csi_report_id = 0; csi_report_id < csi_measconfig->csi_ReportConfigToAddModList->list.count; csi_report_id++){
NR_CSI_ReportConfig_t *csirep = csi_measconfig->csi_ReportConfigToAddModList->list.array[csi_report_id]; NR_CSI_ReportConfig_t *csirep = csi_measconfig->csi_ReportConfigToAddModList->list.array[csi_report_id];
...@@ -2441,21 +2057,6 @@ uint8_t nr_get_csi_measurements(NR_UE_MAC_INST_t *mac, ...@@ -2441,21 +2057,6 @@ uint8_t nr_get_csi_measurements(NR_UE_MAC_INST_t *mac,
int period, offset; int period, offset;
csi_period_offset(csirep, NULL, &period, &offset); csi_period_offset(csirep, NULL, &period, &offset);
if (bwp_id>0 &&
mac->ULbwp[bwp_id-1] &&
mac->ULbwp[bwp_id-1]->bwp_Dedicated &&
mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config &&
mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup) {
pucch_Config = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup;
}
else if (bwp_id==0 &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) {
pucch_Config = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup;
}
const int n_slots_frame = nr_slots_per_frame[current_UL_BWP->scs]; const int n_slots_frame = nr_slots_per_frame[current_UL_BWP->scs];
if (((n_slots_frame*frame + slot - offset)%period) == 0 && pucch_Config) { if (((n_slots_frame*frame + slot - offset)%period) == 0 && pucch_Config) {
LOG_D(NR_MAC, "Preparing CSI report in frame %d slot %d CSI report ID %d\n", frame, slot, csi_report_id); LOG_D(NR_MAC, "Preparing CSI report in frame %d slot %d CSI report ID %d\n", frame, slot, csi_report_id);
...@@ -4074,7 +3675,13 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t ...@@ -4074,7 +3675,13 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t
#endif #endif
// Schedule Msg3 // Schedule Msg3
ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, rar_grant.Msg3_t_alloc); NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
NR_tda_info_t tda_info = get_ul_tda_info(current_UL_BWP, *ra->ss->controlResourceSetId, ra->ss->searchSpaceType->present, NR_RNTI_RA, rar_grant.Msg3_t_alloc);
if (tda_info.nrOfSymbols == 0) {
LOG_E(MAC, "Cannot schedule Msg3. Something wrong in TDA information\n");
return -1;
}
ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, tda_info.k2);
if (ret != -1){ if (ret != -1){
...@@ -4102,7 +3709,7 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t ...@@ -4102,7 +3709,7 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t
pthread_mutex_unlock(&ul_config->mutex_ul_config); pthread_mutex_unlock(&ul_config->mutex_ul_config);
// Config Msg3 PDU // Config Msg3 PDU
nr_config_pusch_pdu(mac, pusch_config_pdu, NULL, &rar_grant, rnti, NULL); nr_config_pusch_pdu(mac, &tda_info, pusch_config_pdu, NULL, &rar_grant, rnti, NULL);
} }
} else { } else {
......
...@@ -100,49 +100,6 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response, ...@@ -100,49 +100,6 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response,
} }
/*
* This function returns the slot offset K2 corresponding to a given time domain
* indication value from RRC configuration.
*/
long get_k2(NR_UE_MAC_INST_t *mac, uint8_t time_domain_ind) {
long k2 = -1;
NR_BWP_Id_t ul_bwp_id = mac->current_UL_BWP.bwp_id;
// Get K2 from RRC configuration
NR_PUSCH_Config_t *pusch_config= ul_bwp_id > 0 && mac->ULbwp[ul_bwp_id-1] ? mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup : NULL;
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL;
if (pusch_config && pusch_config->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = pusch_config->pusch_TimeDomainAllocationList->choice.setup;
}
else if (ul_bwp_id > 0 &&
mac->ULbwp[ul_bwp_id-1] &&
mac->ULbwp[ul_bwp_id-1]->bwp_Common&&
mac->ULbwp[ul_bwp_id-1]->bwp_Common->pusch_ConfigCommon&&
mac->ULbwp[ul_bwp_id-1]->bwp_Common->pusch_ConfigCommon->choice.setup &&
mac->ULbwp[ul_bwp_id-1]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac->ULbwp[ul_bwp_id-1]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
}
else if (mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList)
pusch_TimeDomainAllocationList=mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
else AssertFatal(1==0,"need to fall back to default PUSCH time-domain allocations\n");
if (pusch_TimeDomainAllocationList) {
if (time_domain_ind >= pusch_TimeDomainAllocationList->list.count) {
LOG_E(NR_MAC, "time_domain_ind %d >= pusch->TimeDomainAllocationList->list.count %d\n",
time_domain_ind, pusch_TimeDomainAllocationList->list.count);
return -1;
}
k2 = *pusch_TimeDomainAllocationList->list.array[time_domain_ind]->k2;
}
AssertFatal(k2 >= DURATION_RX_TO_TX,
"Slot offset K2 (%ld) cannot be less than DURATION_RX_TO_TX (%d). K2 set according to min_rxtxtime in config file.\n",
k2,DURATION_RX_TO_TX);
LOG_D(NR_MAC, "get_k2(): k2 is %ld\n", k2);
return k2;
}
/* /*
* This function returns the UL config corresponding to a given UL slot * This function returns the UL config corresponding to a given UL slot
* from MAC instance . * from MAC instance .
...@@ -179,37 +136,13 @@ fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int sl ...@@ -179,37 +136,13 @@ fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int sl
return &mac->ul_config_request[index]; return &mac->ul_config_request[index];
} }
void ul_layers_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci) { void ul_layers_config(NR_UE_MAC_INST_t *mac, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci, nr_dci_format_t dci_format)
{
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
NR_SRS_Config_t *srs_config = current_UL_BWP->srs_Config;
NR_PUSCH_Config_t *pusch_Config = current_UL_BWP->pusch_Config;
NR_ServingCellConfigCommon_t *scc = mac->scc; long transformPrecoder = get_transformPrecoding(current_UL_BWP, dci_format, 0);
NR_BWP_Id_t ul_bwp_id = mac->current_UL_BWP.bwp_id;
NR_BWP_UplinkDedicated_t *ubwpd=NULL;
NR_SRS_Config_t *srs_config = NULL;
if (mac->cg &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP) {
ubwpd = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP;
srs_config = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->srs_Config->choice.setup;
}
NR_PUSCH_Config_t *pusch_Config = ul_bwp_id > 0 && mac->ULbwp[ul_bwp_id-1] ?
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup :
(ubwpd?
ubwpd->pusch_Config->choice.setup:
NULL);
long transformPrecoder;
if (pusch_Config && pusch_Config->transformPrecoder)
transformPrecoder = *pusch_Config->transformPrecoder;
else {
if(scc && scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder)
transformPrecoder = NR_PUSCH_Config__transformPrecoder_enabled;
else
transformPrecoder = NR_PUSCH_Config__transformPrecoder_disabled;
}
pusch_config_pdu->transform_precoding = transformPrecoder; pusch_config_pdu->transform_precoding = transformPrecoder;
/* PRECOD_NBR_LAYERS */ /* PRECOD_NBR_LAYERS */
...@@ -336,33 +269,14 @@ void ul_layers_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_con ...@@ -336,33 +269,14 @@ void ul_layers_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_con
} }
// todo: this function shall be reviewed completely because of the many comments left by the author // todo: this function shall be reviewed completely because of the many comments left by the author
void ul_ports_config(NR_UE_MAC_INST_t *mac, int *n_front_load_symb, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci) { void ul_ports_config(NR_UE_MAC_INST_t *mac, int *n_front_load_symb, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci, nr_dci_format_t dci_format)
{
uint8_t rank = pusch_config_pdu->nrOfLayers; uint8_t rank = pusch_config_pdu->nrOfLayers;
NR_BWP_Id_t ul_bwp_id = mac->current_UL_BWP.bwp_id; NR_PUSCH_Config_t *pusch_Config = mac->current_UL_BWP.pusch_Config;
NR_ServingCellConfigCommon_t *scc = mac->scc;
NR_BWP_UplinkDedicated_t *ubwpd=NULL;
if (mac->cg &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP)
ubwpd = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP;
NR_PUSCH_Config_t *pusch_Config = ul_bwp_id > 0 && mac->ULbwp[ul_bwp_id-1] ? mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup : (ubwpd?ubwpd->pusch_Config->choice.setup:NULL);
AssertFatal(pusch_Config!=NULL,"pusch_Config shouldn't be null\n"); AssertFatal(pusch_Config!=NULL,"pusch_Config shouldn't be null\n");
long transformPrecoder; long transformPrecoder = get_transformPrecoding(&mac->current_UL_BWP, dci_format, 0);
if (pusch_Config->transformPrecoder)
transformPrecoder = *pusch_Config->transformPrecoder;
else {
if(scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder)
transformPrecoder = NR_PUSCH_Config__transformPrecoder_enabled;
else
transformPrecoder = NR_PUSCH_Config__transformPrecoder_disabled;
}
long *max_length = NULL; long *max_length = NULL;
long *dmrs_type = NULL; long *dmrs_type = NULL;
LOG_D(NR_MAC,"transformPrecoder %s\n",transformPrecoder==NR_PUSCH_Config__transformPrecoder_disabled?"disabled":"enabled"); LOG_D(NR_MAC,"transformPrecoder %s\n",transformPrecoder==NR_PUSCH_Config__transformPrecoder_disabled?"disabled":"enabled");
...@@ -535,18 +449,11 @@ void ul_ports_config(NR_UE_MAC_INST_t *mac, int *n_front_load_symb, nfapi_nr_ue_ ...@@ -535,18 +449,11 @@ void ul_ports_config(NR_UE_MAC_INST_t *mac, int *n_front_load_symb, nfapi_nr_ue_
// - 6.1.4.2 of TS 38.214 // - 6.1.4.2 of TS 38.214
// - 6.4.1.1.1 of TS 38.211 // - 6.4.1.1.1 of TS 38.211
// - 6.3.1.7 of 38.211 // - 6.3.1.7 of 38.211
int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, NR_tda_info_t *tda_info, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci, RAR_grant_t *rar_grant, uint16_t rnti, uint8_t *dci_format)
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu,
dci_pdu_rel15_t *dci,
RAR_grant_t *rar_grant,
uint16_t rnti,
uint8_t *dci_format)
{ {
int f_alloc; int f_alloc;
int mask; int mask;
int StartSymbolIndex;
int NrOfSymbols;
uint8_t nb_dmrs_re_per_rb; uint8_t nb_dmrs_re_per_rb;
uint16_t l_prime_mask = 0; uint16_t l_prime_mask = 0;
...@@ -555,7 +462,6 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, ...@@ -555,7 +462,6 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
int rnti_type = get_rnti_type(mac, rnti); int rnti_type = get_rnti_type(mac, rnti);
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP; NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
NR_BWP_Id_t ul_bwp_id = current_UL_BWP->bwp_id;
// Common configuration // Common configuration
pusch_config_pdu->dmrs_config_type = pusch_dmrs_type1; pusch_config_pdu->dmrs_config_type = pusch_dmrs_type1;
...@@ -563,36 +469,14 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, ...@@ -563,36 +469,14 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->nrOfLayers = 1; pusch_config_pdu->nrOfLayers = 1;
pusch_config_pdu->Tpmi = 0; pusch_config_pdu->Tpmi = 0;
pusch_config_pdu->rnti = rnti; pusch_config_pdu->rnti = rnti;
NR_BWP_UplinkCommon_t *initialUplinkBWP;
if (mac->scc) initialUplinkBWP = mac->scc->uplinkConfigCommon->initialUplinkBWP;
else initialUplinkBWP = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP;
pusch_dmrs_AdditionalPosition_t add_pos = pusch_dmrs_pos2; pusch_dmrs_AdditionalPosition_t add_pos = pusch_dmrs_pos2;
int dmrslength = 1; int dmrslength = 1;
NR_PUSCH_Config_t *pusch_Config = current_UL_BWP->pusch_Config;
if (rar_grant) { if (rar_grant) {
// Note: for Msg3 or MsgA PUSCH transmission the N_PRB_oh is always set to 0 // Note: for Msg3 or MsgA PUSCH transmission the N_PRB_oh is always set to 0
NR_BWP_Uplink_t *ubwp = ul_bwp_id > 0 ? mac->ULbwp[ul_bwp_id - 1] : NULL;
NR_BWP_UplinkDedicated_t *ibwp;
int startSymbolAndLength,mappingtype;
NR_PUSCH_Config_t *pusch_Config=NULL;
if (mac->cg && ubwp &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP) {
ibwp = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP;
pusch_Config = ibwp->pusch_Config->choice.setup;
startSymbolAndLength = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[rar_grant->Msg3_t_alloc]->startSymbolAndLength;
mappingtype = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[rar_grant->Msg3_t_alloc]->mappingType;
}
else {
startSymbolAndLength = initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[rar_grant->Msg3_t_alloc]->startSymbolAndLength;
mappingtype = initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[rar_grant->Msg3_t_alloc]->mappingType;
}
int ibwp_start = current_UL_BWP->initial_BWPStart; int ibwp_start = current_UL_BWP->initial_BWPStart;
int ibwp_size = current_UL_BWP->initial_BWPSize; int ibwp_size = current_UL_BWP->initial_BWPSize;
int abwp_start = current_UL_BWP->BWPStart; int abwp_start = current_UL_BWP->BWPStart;
...@@ -623,14 +507,14 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, ...@@ -623,14 +507,14 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
//pusch_config_pdu->rb_start += ibwp_start - abwp_start; //pusch_config_pdu->rb_start += ibwp_start - abwp_start;
// Time domain allocation // Time domain allocation
SLIV2SL(startSymbolAndLength, &StartSymbolIndex, &NrOfSymbols); pusch_config_pdu->start_symbol_index = tda_info->startSymbolIndex;
pusch_config_pdu->start_symbol_index = StartSymbolIndex; pusch_config_pdu->nr_of_symbols = tda_info->nrOfSymbols;
pusch_config_pdu->nr_of_symbols = NrOfSymbols;
l_prime_mask = get_l_prime(NrOfSymbols, mappingtype, add_pos, dmrslength, StartSymbolIndex, mac->scc ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position); l_prime_mask =
LOG_D(NR_MAC, "MSG3 start_sym:%d NR Symb:%d mappingtype:%d, DMRS_MASK:%x\n", pusch_config_pdu->start_symbol_index, pusch_config_pdu->nr_of_symbols, mappingtype, l_prime_mask); get_l_prime(tda_info->nrOfSymbols, tda_info->mapping_type, add_pos, dmrslength, tda_info->startSymbolIndex, mac->scc ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position);
LOG_D(NR_MAC, "MSG3 start_sym:%d NR Symb:%d mappingtype:%d, DMRS_MASK:%x\n", pusch_config_pdu->start_symbol_index, pusch_config_pdu->nr_of_symbols, tda_info->mapping_type, l_prime_mask);
#ifdef DEBUG_MSG3 #ifdef DEBUG_MSG3
LOG_D(NR_MAC, "In %s BWP assignment (BWP (start %d, size %d) \n", __FUNCTION__, pusch_config_pdu->bwp_start, pusch_config_pdu->bwp_size); LOG_D(NR_MAC, "In %s BWP assignment (BWP (start %d, size %d) \n", __FUNCTION__, pusch_config_pdu->bwp_start, pusch_config_pdu->bwp_size);
#endif #endif
...@@ -648,10 +532,10 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, ...@@ -648,10 +532,10 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->scid = 0; pusch_config_pdu->scid = 0;
// Transform precoding according to 6.1.3 UE procedure for applying transform precoding on PUSCH in 38.214 // Transform precoding according to 6.1.3 UE procedure for applying transform precoding on PUSCH in 38.214
pusch_config_pdu->transform_precoding = get_transformPrecoding(initialUplinkBWP, pusch_Config, NULL, NULL, NR_RNTI_TC, 0); // TBR fix rnti and take out pusch_config_pdu->transform_precoding = get_transformPrecoding(current_UL_BWP, NR_UL_DCI_FORMAT_0_0, 0); // as if it was DCI 0_0
// Resource allocation in frequency domain according to 6.1.2.2 in TS 38.214 // Resource allocation in frequency domain according to 6.1.2.2 in TS 38.214
pusch_config_pdu->resource_alloc = (mac->cg) ? pusch_Config->resourceAllocation : 1; pusch_config_pdu->resource_alloc = 1;
//// Completing PUSCH PDU //// Completing PUSCH PDU
pusch_config_pdu->mcs_table = 0; pusch_config_pdu->mcs_table = 0;
...@@ -669,13 +553,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, ...@@ -669,13 +553,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->tbslbrm = 0; pusch_config_pdu->tbslbrm = 0;
} else if (dci) { } else if (dci) {
NR_BWP_Id_t dl_bwp_id = mac->current_DL_BWP.bwp_id;
NR_BWP_Id_t ul_bwp_id = mac->current_UL_BWP.bwp_id; NR_BWP_Id_t ul_bwp_id = mac->current_UL_BWP.bwp_id;
NR_BWP_DownlinkDedicated_t *bwpd=NULL;
NR_BWP_DownlinkCommon_t *bwpc=NULL;
NR_BWP_UplinkDedicated_t *ubwpd=NULL;
NR_BWP_UplinkCommon_t *ubwpc=NULL;
get_bwp_info(mac,dl_bwp_id,ul_bwp_id,&bwpd,&bwpc,&ubwpd,&ubwpc);
int target_ss; int target_ss;
bool valid_ptrs_setup = 0; bool valid_ptrs_setup = 0;
...@@ -683,8 +561,6 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, ...@@ -683,8 +561,6 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->bwp_start = current_UL_BWP->BWPStart; pusch_config_pdu->bwp_start = current_UL_BWP->BWPStart;
pusch_config_pdu->bwp_size = current_UL_BWP->BWPSize; pusch_config_pdu->bwp_size = current_UL_BWP->BWPSize;
const NR_PUSCH_Config_t *pusch_Config = ubwpd? ubwpd->pusch_Config->choice.setup : NULL;
// Basic sanity check for MCS value to check for a false or erroneous DCI // Basic sanity check for MCS value to check for a false or erroneous DCI
if (dci->mcs > 28) { if (dci->mcs > 28) {
LOG_W(NR_MAC, "MCS value %d out of bounds! Possibly due to false DCI. Ignoring DCI!\n", dci->mcs); LOG_W(NR_MAC, "MCS value %d out of bounds! Possibly due to false DCI. Ignoring DCI!\n", dci->mcs);
...@@ -693,7 +569,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, ...@@ -693,7 +569,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
/* Transform precoding */ /* Transform precoding */
if (rnti_type != NR_RNTI_CS || (rnti_type == NR_RNTI_CS && dci->ndi == 1)) { if (rnti_type != NR_RNTI_CS || (rnti_type == NR_RNTI_CS && dci->ndi == 1)) {
pusch_config_pdu->transform_precoding = get_transformPrecoding(initialUplinkBWP, pusch_Config, NULL, dci_format, rnti_type, 0); pusch_config_pdu->transform_precoding = get_transformPrecoding(current_UL_BWP, *dci_format, 0);
} }
/*DCI format-related configuration*/ /*DCI format-related configuration*/
...@@ -703,11 +579,9 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, ...@@ -703,11 +579,9 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
} else if (*dci_format == NR_UL_DCI_FORMAT_0_1) { } else if (*dci_format == NR_UL_DCI_FORMAT_0_1) {
get_bwp_info(mac,dl_bwp_id,ul_bwp_id,&bwpd,&bwpc,&ubwpd,&ubwpc);
target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
ul_layers_config(mac, pusch_config_pdu, dci); ul_layers_config(mac, pusch_config_pdu, dci, *dci_format);
ul_ports_config(mac, &dmrslength, pusch_config_pdu, dci); ul_ports_config(mac, &dmrslength, pusch_config_pdu, dci, *dci_format);
} else { } else {
...@@ -716,10 +590,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, ...@@ -716,10 +590,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
} }
NR_PUSCH_ConfigCommon_t *pusch_ConfigCommon = ubwpc->pusch_ConfigCommon->choice.setup; int mappingtype = tda_info->mapping_type;
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = choose_ul_tda_list(pusch_Config,pusch_ConfigCommon);
int mappingtype = pusch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType;
NR_DMRS_UplinkConfig_t *NR_DMRS_ulconfig = NULL; NR_DMRS_UplinkConfig_t *NR_DMRS_ulconfig = NULL;
if(pusch_Config) { if(pusch_Config) {
...@@ -774,10 +645,9 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, ...@@ -774,10 +645,9 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
if (nr_ue_process_dci_freq_dom_resource_assignment(pusch_config_pdu, NULL, current_UL_BWP->BWPSize, 0, dci->frequency_domain_assignment.val) < 0){ if (nr_ue_process_dci_freq_dom_resource_assignment(pusch_config_pdu, NULL, current_UL_BWP->BWPSize, 0, dci->frequency_domain_assignment.val) < 0){
return -1; return -1;
} }
/* TIME_DOM_RESOURCE_ASSIGNMENT */
if (nr_ue_process_dci_time_dom_resource_assignment(mac, pusch_TimeDomainAllocationList, NULL, pusch_config_pdu, NULL, NULL, dci->time_domain_assignment.val,0,false) < 0) { pusch_config_pdu->start_symbol_index = tda_info->startSymbolIndex;
return -1; pusch_config_pdu->nr_of_symbols = tda_info->nrOfSymbols;
}
/* FREQ_HOPPING_FLAG */ /* FREQ_HOPPING_FLAG */
if ((pusch_Config!=NULL) && (pusch_Config->frequencyHopping!=NULL) && (pusch_Config->resourceAllocation != NR_PUSCH_Config__resourceAllocation_resourceAllocationType0)){ if ((pusch_Config!=NULL) && (pusch_Config->frequencyHopping!=NULL) && (pusch_Config->resourceAllocation != NR_PUSCH_Config__resourceAllocation_resourceAllocationType0)){
...@@ -837,23 +707,13 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, ...@@ -837,23 +707,13 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
} }
// Num PRB Overhead from PUSCH-ServingCellConfig // Num PRB Overhead from PUSCH-ServingCellConfig
if (mac->cg && if (current_UL_BWP->pusch_servingcellconfig && current_UL_BWP->pusch_servingcellconfig->xOverhead)
mac->cg->spCellConfig && N_PRB_oh = *current_UL_BWP->pusch_servingcellconfig->xOverhead;
mac->cg->spCellConfig->spCellConfigDedicated && else
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig && N_PRB_oh = 0;
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup->xOverhead) if (current_UL_BWP->pusch_servingcellconfig && current_UL_BWP->pusch_servingcellconfig->rateMatching) {
N_PRB_oh = *mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup->xOverhead; long *maxMIMO_Layers = current_UL_BWP->pusch_servingcellconfig->ext1->maxMIMO_Layers;
else N_PRB_oh = 0;
if (mac->cg &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup->rateMatching) {
long *maxMIMO_Layers = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1->maxMIMO_Layers;
if (!maxMIMO_Layers) if (!maxMIMO_Layers)
maxMIMO_Layers = pusch_Config ? pusch_Config->maxRank : NULL; maxMIMO_Layers = pusch_Config ? pusch_Config->maxRank : NULL;
AssertFatal (maxMIMO_Layers != NULL,"Option with max MIMO layers not configured is not supported\n"); AssertFatal (maxMIMO_Layers != NULL,"Option with max MIMO layers not configured is not supported\n");
...@@ -861,33 +721,30 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, ...@@ -861,33 +721,30 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->tbslbrm = nr_compute_tbslbrm(pusch_config_pdu->mcs_table, pusch_config_pdu->tbslbrm = nr_compute_tbslbrm(pusch_config_pdu->mcs_table,
bw_tbslbrm, bw_tbslbrm,
*maxMIMO_Layers); *maxMIMO_Layers);
} } else
else
pusch_config_pdu->tbslbrm = 0; pusch_config_pdu->tbslbrm = 0;
/* PTRS */ /* PTRS */
if (ul_bwp_id > 0 && if (pusch_Config && pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB && pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS) {
mac->ULbwp[ul_bwp_id-1] &&
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated &&
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pusch_Config &&
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup &&
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB &&
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS) {
if (pusch_config_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_disabled) { if (pusch_config_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_disabled) {
nfapi_nr_ue_ptrs_ports_t ptrs_ports_list; nfapi_nr_ue_ptrs_ports_t ptrs_ports_list;
pusch_config_pdu->pusch_ptrs.ptrs_ports_list = &ptrs_ports_list; pusch_config_pdu->pusch_ptrs.ptrs_ports_list = &ptrs_ports_list;
valid_ptrs_setup = set_ul_ptrs_values(mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup, valid_ptrs_setup = set_ul_ptrs_values(pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup,
pusch_config_pdu->rb_size, pusch_config_pdu->mcs_index, pusch_config_pdu->mcs_table, pusch_config_pdu->rb_size,
&pusch_config_pdu->pusch_ptrs.ptrs_freq_density,&pusch_config_pdu->pusch_ptrs.ptrs_time_density, pusch_config_pdu->mcs_index,
&pusch_config_pdu->pusch_ptrs.ptrs_ports_list->ptrs_re_offset,&pusch_config_pdu->pusch_ptrs.num_ptrs_ports, pusch_config_pdu->mcs_table,
&pusch_config_pdu->pusch_ptrs.ul_ptrs_power, pusch_config_pdu->nr_of_symbols); &pusch_config_pdu->pusch_ptrs.ptrs_freq_density,
&pusch_config_pdu->pusch_ptrs.ptrs_time_density,
&pusch_config_pdu->pusch_ptrs.ptrs_ports_list->ptrs_re_offset,
&pusch_config_pdu->pusch_ptrs.num_ptrs_ports,
&pusch_config_pdu->pusch_ptrs.ul_ptrs_power,
pusch_config_pdu->nr_of_symbols);
if(valid_ptrs_setup==true) { if(valid_ptrs_setup==true) {
pusch_config_pdu->pdu_bit_map |= PUSCH_PDU_BITMAP_PUSCH_PTRS; pusch_config_pdu->pdu_bit_map |= PUSCH_PDU_BITMAP_PUSCH_PTRS;
} }
LOG_D(NR_MAC, "UL PTRS values: PTRS time den: %d, PTRS freq den: %d\n", pusch_config_pdu->pusch_ptrs.ptrs_time_density, pusch_config_pdu->pusch_ptrs.ptrs_freq_density); LOG_D(NR_MAC, "UL PTRS values: PTRS time den: %d, PTRS freq den: %d\n", pusch_config_pdu->pusch_ptrs.ptrs_time_density, pusch_config_pdu->pusch_ptrs.ptrs_freq_density);
} }
} }
} }
LOG_D(NR_MAC, "In %s: received UL grant (rb_start %d, rb_size %d, start_symbol_index %d, nr_of_symbols %d) for RNTI type %s \n", LOG_D(NR_MAC, "In %s: received UL grant (rb_start %d, rb_size %d, start_symbol_index %d, nr_of_symbols %d) for RNTI type %s \n",
...@@ -937,21 +794,8 @@ bool nr_ue_periodic_srs_scheduling(module_id_t mod_id, frame_t frame, slot_t slo ...@@ -937,21 +794,8 @@ bool nr_ue_periodic_srs_scheduling(module_id_t mod_id, frame_t frame, slot_t slo
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id); NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP; NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
NR_BWP_Id_t ul_bwp_id = current_UL_BWP->bwp_id;
NR_SRS_Config_t *srs_config = NULL; NR_SRS_Config_t *srs_config = current_UL_BWP->srs_Config;
if (ul_bwp_id > 0 && mac->ULbwp[ul_bwp_id-1]) {
if (mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated &&
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->srs_Config) {
srs_config = mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->srs_Config->choice.setup;
}
} else if (mac->cg &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP) {
srs_config = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->srs_Config->choice.setup;
}
if (!srs_config) { if (!srs_config) {
return false; return false;
...@@ -1559,30 +1403,25 @@ int nr_get_sf_retxBSRTimer(uint8_t sf_offset) { ...@@ -1559,30 +1403,25 @@ int nr_get_sf_retxBSRTimer(uint8_t sf_offset) {
// PUSCH Msg3 scheduler: // PUSCH Msg3 scheduler:
// - scheduled by RAR UL grant according to 8.3 of TS 38.213 // - scheduled by RAR UL grant according to 8.3 of TS 38.213
// Note: Msg3 tx in the uplink symbols of mixed slot // Note: Msg3 tx in the uplink symbols of mixed slot
int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac, int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac, uint8_t is_Msg3, frame_t current_frame, int current_slot, frame_t *frame_tx, int *slot_tx, long k2)
uint8_t is_Msg3, {
frame_t current_frame, AssertFatal(k2 >= DURATION_RX_TO_TX,
int current_slot, "Slot offset K2 (%ld) cannot be less than DURATION_RX_TO_TX (%d). Please set min_rxtxtime at least to %d in gNB config file or gNBs.[0].min_rxtxtime=%d via command line.\n",
frame_t *frame_tx, k2,
int *slot_tx, DURATION_RX_TO_TX,
uint8_t tda_id){ DURATION_RX_TO_TX,
DURATION_RX_TO_TX);
int delta = 0; int delta = 0;
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP; NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
NR_BWP_Id_t ul_bwp_id = current_UL_BWP->bwp_id;
// Get the numerology to calculate the Tx frame and slot // Get the numerology to calculate the Tx frame and slot
int mu = current_UL_BWP->scs; int mu = current_UL_BWP->scs;
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = ul_bwp_id > 0 && mac->ULbwp[ul_bwp_id-1] ?
mac->ULbwp[ul_bwp_id-1]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList:
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
// k2 as per 3GPP TS 38.214 version 15.9.0 Release 15 ch 6.1.2.1.1 // k2 as per 3GPP TS 38.214 version 15.9.0 Release 15 ch 6.1.2.1.1
// PUSCH time domain resource allocation is higher layer configured from uschTimeDomainAllocationList in either pusch-ConfigCommon // PUSCH time domain resource allocation is higher layer configured from uschTimeDomainAllocationList in either pusch-ConfigCommon
int k2;
if (is_Msg3) { if (is_Msg3) {
k2 = *pusch_TimeDomainAllocationList->list.array[tda_id]->k2;
switch (mu) { switch (mu) {
case 0: case 0:
...@@ -1599,9 +1438,12 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac, ...@@ -1599,9 +1438,12 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac,
break; break;
} }
AssertFatal((k2+delta) >= DURATION_RX_TO_TX, AssertFatal((k2 + delta) >= DURATION_RX_TO_TX,
"Slot offset (%d) for Msg3 cannot be less than DURATION_RX_TO_TX (%d)\n", "Slot offset (%ld) for Msg3 cannot be less than DURATION_RX_TO_TX (%d). Please set min_rxtxtime at least to %d in gNB config file or gNBs.[0].min_rxtxtime=%d via command line.\n",
k2+delta,DURATION_RX_TO_TX); k2,
DURATION_RX_TO_TX,
DURATION_RX_TO_TX,
DURATION_RX_TO_TX);
*slot_tx = (current_slot + k2 + delta) % nr_slots_per_frame[mu]; *slot_tx = (current_slot + k2 + delta) % nr_slots_per_frame[mu];
if (current_slot + k2 + delta > nr_slots_per_frame[mu]){ if (current_slot + k2 + delta > nr_slots_per_frame[mu]){
...@@ -1612,10 +1454,8 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac, ...@@ -1612,10 +1454,8 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac,
} else { } else {
// Get slot offset K2 which will be used to calculate TX slot
k2 = get_k2(mac, tda_id);
if (k2 < 0) { // This can happen when a false DCI is received if (k2 < 0) { // This can happen when a false DCI is received
LOG_W(PHY,"%d.%d. Received k2 %d, tda_id %d\n",current_frame,current_slot,k2,tda_id); LOG_W(PHY, "%d.%d. Received k2 %ld\n", current_frame, current_slot, k2);
return -1; return -1;
} }
...@@ -1625,10 +1465,9 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac, ...@@ -1625,10 +1465,9 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac,
} }
LOG_D(NR_MAC, "In %s: currently at [%d.%d] UL transmission in [%d.%d] (k2 %d delta %d)\n", __FUNCTION__, current_frame, current_slot, *frame_tx, *slot_tx, k2, delta); LOG_D(NR_MAC, "[%04d.%02d] UL transmission in [%04d.%02d] (k2 %ld delta %d)\n", current_frame, current_slot, *frame_tx, *slot_tx, k2, delta);
return 0; return 0;
} }
// Build the list of all the valid RACH occasions in the maximum association pattern period according to the PRACH config // Build the list of all the valid RACH occasions in the maximum association pattern period according to the PRACH config
...@@ -1649,7 +1488,7 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) { ...@@ -1649,7 +1488,7 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) {
uint8_t format2 = 0xff; uint8_t format2 = 0xff;
int nb_fdm; int nb_fdm;
uint8_t config_index, mu; uint8_t config_index;
int msg1_FDM; int msg1_FDM;
uint8_t prach_conf_period_idx; uint8_t prach_conf_period_idx;
...@@ -1657,20 +1496,16 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) { ...@@ -1657,20 +1496,16 @@ static void build_ro_list(NR_UE_MAC_INST_t *mac) {
uint8_t prach_conf_period_frame_idx; uint8_t prach_conf_period_frame_idx;
int64_t *prach_config_info_p; int64_t *prach_config_info_p;
NR_RACH_ConfigCommon_t *setup = (mac->scc) ? NR_RACH_ConfigCommon_t *setup = mac->current_UL_BWP.rach_ConfigCommon;
mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup:
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup;
NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &setup->rach_ConfigGeneric; NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &setup->rach_ConfigGeneric;
config_index = rach_ConfigGeneric->prach_ConfigurationIndex; config_index = rach_ConfigGeneric->prach_ConfigurationIndex;
if (setup->msg1_SubcarrierSpacing) { int mu;
if (setup->msg1_SubcarrierSpacing)
mu = *setup->msg1_SubcarrierSpacing; mu = *setup->msg1_SubcarrierSpacing;
} else if(mac->scc) { else
mu = mac->scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing; mu = mac->current_UL_BWP.scs;
} else {
mu = get_softmodem_params()->numerology;
}
msg1_FDM = rach_ConfigGeneric->msg1_FDM; msg1_FDM = rach_ConfigGeneric->msg1_FDM;
...@@ -1905,9 +1740,7 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) { ...@@ -1905,9 +1740,7 @@ static void map_ssb_to_ro(NR_UE_MAC_INST_t *mac) {
// Map SSBs to PRACH occasions // Map SSBs to PRACH occasions
// =========================== // ===========================
// WIP: Assumption: No PRACH occasion is rejected because of a conflict with SSBs or TDD_UL_DL_ConfigurationCommon schedule // WIP: Assumption: No PRACH occasion is rejected because of a conflict with SSBs or TDD_UL_DL_ConfigurationCommon schedule
NR_RACH_ConfigCommon_t *setup = (mac->scc) ? NR_RACH_ConfigCommon_t *setup = mac->current_UL_BWP.rach_ConfigCommon;
mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup:
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup;
NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR ssb_perRACH_config = setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present; NR_RACH_ConfigCommon__ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR ssb_perRACH_config = setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present;
bool multiple_ssb_per_ro; // true if more than one or exactly one SSB per RACH occasion, false if more than one RO per SSB bool multiple_ssb_per_ro; // true if more than one or exactly one SSB per RACH occasion, false if more than one RO per SSB
...@@ -2317,27 +2150,7 @@ void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, vo ...@@ -2317,27 +2150,7 @@ void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, vo
// ACKNACK // ACKNACK
O_ACK = get_downlink_ack(mac, frameP, slotP, &pucch); O_ACK = get_downlink_ack(mac, frameP, slotP, &pucch);
NR_BWP_Id_t bwp_id = mac->current_UL_BWP.bwp_id; NR_PUCCH_Config_t *pucch_Config = mac->current_UL_BWP.pucch_Config;
NR_PUCCH_Config_t *pucch_Config = NULL;
if (bwp_id>0 &&
mac->ULbwp[bwp_id-1] &&
mac->ULbwp[bwp_id-1]->bwp_Dedicated &&
mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config &&
mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup) {
pucch_Config = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup;
}
else if (bwp_id==0 &&
mac->cg &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) {
pucch_Config = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup;
}
// if multiplexing of HARQ and CSI is not possible, transmit only HARQ bits // if multiplexing of HARQ and CSI is not possible, transmit only HARQ bits
if ((O_ACK != 0) && (O_CSI != 0) && if ((O_ACK != 0) && (O_CSI != 0) &&
...@@ -2377,7 +2190,6 @@ void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, vo ...@@ -2377,7 +2190,6 @@ void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, vo
&pucch, &pucch,
pucch_pdu, pucch_pdu,
O_SR, O_ACK, O_CSI); O_SR, O_ACK, O_CSI);
LOG_D(NR_MAC, "Configuring pucch, is_common = %d\n", pucch.is_common);
nr_scheduled_response_t scheduled_response; nr_scheduled_response_t scheduled_response;
fill_scheduled_response(&scheduled_response, NULL, ul_config, NULL, module_idP, 0 /*TBR fix*/, frameP, slotP, phy_data); fill_scheduled_response(&scheduled_response, NULL, ul_config, NULL, module_idP, 0 /*TBR fix*/, frameP, slotP, phy_data);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL) if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL)
...@@ -2391,13 +2203,12 @@ void nr_schedule_csi_for_im(NR_UE_MAC_INST_t *mac, int frame, int slot) { ...@@ -2391,13 +2203,12 @@ void nr_schedule_csi_for_im(NR_UE_MAC_INST_t *mac, int frame, int slot) {
if (mac->ra.ra_state != RA_SUCCEEDED && get_softmodem_params()->phy_test == 0) if (mac->ra.ra_state != RA_SUCCEEDED && get_softmodem_params()->phy_test == 0)
return; return;
NR_CellGroupConfig_t *CellGroup = mac->cg; NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
if (!CellGroup || !CellGroup->spCellConfig || !CellGroup->spCellConfig->spCellConfigDedicated || if (!current_UL_BWP->csi_MeasConfig)
!CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig)
return; return;
NR_CSI_MeasConfig_t *csi_measconfig = CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup; NR_CSI_MeasConfig_t *csi_measconfig = current_UL_BWP->csi_MeasConfig;
if (csi_measconfig->csi_IM_ResourceToAddModList == NULL) if (csi_measconfig->csi_IM_ResourceToAddModList == NULL)
return; return;
...@@ -2449,13 +2260,12 @@ void nr_schedule_csirs_reception(NR_UE_MAC_INST_t *mac, int frame, int slot) { ...@@ -2449,13 +2260,12 @@ void nr_schedule_csirs_reception(NR_UE_MAC_INST_t *mac, int frame, int slot) {
if (mac->ra.ra_state != RA_SUCCEEDED && get_softmodem_params()->phy_test == 0) if (mac->ra.ra_state != RA_SUCCEEDED && get_softmodem_params()->phy_test == 0)
return; return;
NR_CellGroupConfig_t *CellGroup = mac->cg; NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
if (!CellGroup || !CellGroup->spCellConfig || !CellGroup->spCellConfig->spCellConfigDedicated || if (!current_UL_BWP->csi_MeasConfig)
!CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig)
return; return;
NR_CSI_MeasConfig_t *csi_measconfig = CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup; NR_CSI_MeasConfig_t *csi_measconfig = current_UL_BWP->csi_MeasConfig;
if (csi_measconfig->nzp_CSI_RS_ResourceToAddModList == NULL) if (csi_measconfig->nzp_CSI_RS_ResourceToAddModList == NULL)
return; return;
...@@ -2636,9 +2446,7 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s ...@@ -2636,9 +2446,7 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s
NR_ServingCellConfigCommon_t *scc = mac->scc; NR_ServingCellConfigCommon_t *scc = mac->scc;
NR_ServingCellConfigCommonSIB_t *scc_SIB = mac->scc_SIB; NR_ServingCellConfigCommonSIB_t *scc_SIB = mac->scc_SIB;
NR_RACH_ConfigCommon_t *setup; NR_RACH_ConfigCommon_t *setup = mac->current_UL_BWP.rach_ConfigCommon;
if (scc!=NULL) setup = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup;
else setup = scc_SIB->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup;
NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &setup->rach_ConfigGeneric; NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &setup->rach_ConfigGeneric;
NR_TDD_UL_DL_ConfigCommon_t *tdd_config = scc==NULL ? scc_SIB->tdd_UL_DL_ConfigurationCommon : scc->tdd_UL_DL_ConfigurationCommon; NR_TDD_UL_DL_ConfigCommon_t *tdd_config = scc==NULL ? scc_SIB->tdd_UL_DL_ConfigurationCommon : scc->tdd_UL_DL_ConfigurationCommon;
......
...@@ -700,7 +700,7 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t ...@@ -700,7 +700,7 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
NR_UE_UL_BWP_t *ul_bwp = &ra->UL_BWP; NR_UE_UL_BWP_t *ul_bwp = &ra->UL_BWP;
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = ul_bwp->tdaList; NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = ul_bwp->tdaList_Common;
int mu = ul_bwp->scs; int mu = ul_bwp->scs;
uint8_t K2 = *pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->k2; uint8_t K2 = *pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->k2;
const int sched_frame = frame + (slot + K2 >= nr_slots_per_frame[mu]); const int sched_frame = frame + (slot + K2 >= nr_slots_per_frame[mu]);
...@@ -888,7 +888,7 @@ void nr_get_Msg3alloc(module_id_t module_id, ...@@ -888,7 +888,7 @@ void nr_get_Msg3alloc(module_id_t module_id,
int Msg3maxsymb = 14, Msg3start = 0; int Msg3maxsymb = 14, Msg3start = 0;
ra->Msg3_tda_id = 16; // initialization to a value above limit ra->Msg3_tda_id = 16; // initialization to a value above limit
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = ul_bwp->tdaList; NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = ul_bwp->tdaList_Common;
const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL; const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
const int n_slots_frame = nr_slots_per_frame[mu]; const int n_slots_frame = nr_slots_per_frame[mu];
...@@ -1109,8 +1109,8 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t ...@@ -1109,8 +1109,8 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t
const int ibwp_size = ul_bwp->initial_BWPSize; const int ibwp_size = ul_bwp->initial_BWPSize;
const int scs = ul_bwp->scs; const int scs = ul_bwp->scs;
const int fh = (ul_bwp->pusch_Config && ul_bwp->pusch_Config->frequencyHopping) ? 1 : 0; const int fh = (ul_bwp->pusch_Config && ul_bwp->pusch_Config->frequencyHopping) ? 1 : 0;
const int startSymbolAndLength = ul_bwp->tdaList->list.array[ra->Msg3_tda_id]->startSymbolAndLength; const int startSymbolAndLength = ul_bwp->tdaList_Common->list.array[ra->Msg3_tda_id]->startSymbolAndLength;
const int mappingtype = ul_bwp->tdaList->list.array[ra->Msg3_tda_id]->mappingType; const int mappingtype = ul_bwp->tdaList_Common->list.array[ra->Msg3_tda_id]->mappingType;
LOG_D(NR_MAC, "Frame %d, Slot %d Adding Msg3 UL Config Request for (%d,%d) : (%d,%d,%d) for rnti: %d\n", LOG_D(NR_MAC, "Frame %d, Slot %d Adding Msg3 UL Config Request for (%d,%d) : (%d,%d,%d) for rnti: %d\n",
frameP, frameP,
...@@ -1162,14 +1162,14 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra ...@@ -1162,14 +1162,14 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
BWPSize = type0_PDCCH_CSS_config->num_rbs; BWPSize = type0_PDCCH_CSS_config->num_rbs;
} }
NR_ControlResourceSet_t *coreset = ra->coreset;
AssertFatal(coreset != NULL,"Coreset cannot be null for RA-Msg2\n");
const int coresetid = coreset->controlResourceSetId;
// Calculate number of symbols // Calculate number of symbols
int time_domain_assignment = get_dl_tda(nr_mac, scc, slotP); int time_domain_assignment = get_dl_tda(nr_mac, scc, slotP);
NR_tda_info_t tda_info = nr_get_pdsch_tda_info(dl_bwp, int mux_pattern = type0_PDCCH_CSS_config ? type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern : 1;
time_domain_assignment); NR_tda_info_t tda_info = get_dl_tda_info(dl_bwp, ss->searchSpaceType->present, time_domain_assignment,
scc->dmrs_TypeA_Position, mux_pattern, NR_RNTI_RA, coresetid, false);
NR_ControlResourceSet_t *coreset = ra->coreset;
AssertFatal(coreset!=NULL,"Coreset cannot be null for RA-Msg2\n");
uint16_t *vrb_map = cc[CC_id].vrb_map; uint16_t *vrb_map = cc[CC_id].vrb_map;
for (int i = 0; (i < rbSize) && (rbStart <= (BWPSize - rbSize)); i++) { for (int i = 0; (i < rbSize) && (rbStart <= (BWPSize - rbSize)); i++) {
...@@ -1209,7 +1209,6 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra ...@@ -1209,7 +1209,6 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
// look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it. This is especially // look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it. This is especially
// important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them // important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them
const int coresetid = coreset->controlResourceSetId;
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][coresetid]; nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][coresetid];
if (!pdcch_pdu_rel15) { if (!pdcch_pdu_rel15) {
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs]; nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
...@@ -1481,7 +1480,10 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra ...@@ -1481,7 +1480,10 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
} }
uint8_t time_domain_assignment = get_dl_tda(nr_mac, scc, slotP); uint8_t time_domain_assignment = get_dl_tda(nr_mac, scc, slotP);
NR_tda_info_t msg4_tda = nr_get_pdsch_tda_info(dl_bwp, time_domain_assignment); int mux_pattern = type0_PDCCH_CSS_config ? type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern : 1;
NR_tda_info_t msg4_tda = get_dl_tda_info(dl_bwp, ss->searchSpaceType->present, time_domain_assignment,
scc->dmrs_TypeA_Position, mux_pattern, NR_RNTI_TC, coreset->controlResourceSetId, false);
NR_pdsch_dmrs_t dmrs_info = get_dl_dmrs_params(scc, NR_pdsch_dmrs_t dmrs_info = get_dl_dmrs_params(scc,
dl_bwp, dl_bwp,
&msg4_tda, &msg4_tda,
......
...@@ -569,23 +569,11 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) ...@@ -569,23 +569,11 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
for (int k=0;k<sib1_sdu_length;k++) for (int k=0;k<sib1_sdu_length;k++)
LOG_D(NR_MAC,"byte %d : %x\n",k,((uint8_t*)sib1_payload)[k]); LOG_D(NR_MAC,"byte %d : %x\n",k,((uint8_t*)sib1_payload)[k]);
int startSymbolIndex = 0; default_table_type_t table_type = get_default_table_type(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern);
int nrOfSymbols = 0; // assuming normal CP
bool is_typeA; NR_tda_info_t tda_info = get_info_from_tda_tables(table_type, time_domain_allocation, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, true);
get_info_from_tda_tables(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern, AssertFatal((tda_info.startSymbolIndex + tda_info.nrOfSymbols) < 14, "SIB1 TDA %d would cause overlap with CSI-RS. Please select a different SIB1 TDA.\n", time_domain_allocation);
time_domain_allocation,
gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position,
1, &is_typeA,
&startSymbolIndex, &nrOfSymbols);
AssertFatal((startSymbolIndex+nrOfSymbols)<14,"SIB1 TDA %d would cause overlap with CSI-RS. Please select a different SIB1 TDA.\n",time_domain_allocation);
NR_tda_info_t tda_info = {
.mapping_type = is_typeA ? typeA : typeB,
.startSymbolIndex = startSymbolIndex,
.nrOfSymbols = nrOfSymbols
};
NR_pdsch_dmrs_t dmrs_parms = get_dl_dmrs_params(scc, NR_pdsch_dmrs_t dmrs_parms = get_dl_dmrs_params(scc,
NULL, NULL,
...@@ -603,7 +591,7 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) ...@@ -603,7 +591,7 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body; nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body;
int pdu_index = gNB_mac->pdu_index[0]++; int pdu_index = gNB_mac->pdu_index[0]++;
nr_fill_nfapi_dl_sib1_pdu(module_idP, dl_req, pdu_index, type0_PDCCH_CSS_config, TBS, startSymbolIndex, nrOfSymbols); nr_fill_nfapi_dl_sib1_pdu(module_idP, dl_req, pdu_index, type0_PDCCH_CSS_config, TBS, tda_info.startSymbolIndex, tda_info.nrOfSymbols);
const int ntx_req = gNB_mac->TX_req[CC_id].Number_of_PDUs; const int ntx_req = gNB_mac->TX_req[CC_id].Number_of_PDUs;
nfapi_nr_pdu_t *tx_req = &gNB_mac->TX_req[CC_id].pdu_list[ntx_req]; nfapi_nr_pdu_t *tx_req = &gNB_mac->TX_req[CC_id].pdu_list[ntx_req];
......
...@@ -411,7 +411,9 @@ bool allocate_dl_retransmission(module_id_t module_id, ...@@ -411,7 +411,9 @@ bool allocate_dl_retransmission(module_id_t module_id,
/* Check first whether the old TDA can be reused /* Check first whether the old TDA can be reused
* this helps allocate retransmission when TDA changes (e.g. new nrOfSymbols > old nrOfSymbols) */ * this helps allocate retransmission when TDA changes (e.g. new nrOfSymbols > old nrOfSymbols) */
NR_tda_info_t temp_tda = nr_get_pdsch_tda_info(dl_bwp, tda); NR_tda_info_t temp_tda = get_dl_tda_info(dl_bwp, sched_ctrl->search_space->searchSpaceType->present, tda,
scc->dmrs_TypeA_Position, 1, NR_RNTI_C, coresetid, false);
bool reuse_old_tda = (retInfo->tda_info.startSymbolIndex == temp_tda.startSymbolIndex) && (retInfo->tda_info.nrOfSymbols <= temp_tda.nrOfSymbols); bool reuse_old_tda = (retInfo->tda_info.startSymbolIndex == temp_tda.startSymbolIndex) && (retInfo->tda_info.nrOfSymbols <= temp_tda.nrOfSymbols);
LOG_D(NR_MAC, "[UE %x] %s old TDA, %s number of layers\n", LOG_D(NR_MAC, "[UE %x] %s old TDA, %s number of layers\n",
UE->rnti, UE->rnti,
...@@ -729,7 +731,9 @@ void pf_dl(module_id_t module_id, ...@@ -729,7 +731,9 @@ void pf_dl(module_id_t module_id,
sched_pdsch->time_domain_allocation = get_dl_tda(mac, scc, slot); sched_pdsch->time_domain_allocation = get_dl_tda(mac, scc, slot);
AssertFatal(sched_pdsch->time_domain_allocation>=0,"Unable to find PDSCH time domain allocation in list\n"); AssertFatal(sched_pdsch->time_domain_allocation>=0,"Unable to find PDSCH time domain allocation in list\n");
sched_pdsch->tda_info = nr_get_pdsch_tda_info(dl_bwp, sched_pdsch->time_domain_allocation); sched_pdsch->tda_info = get_dl_tda_info(dl_bwp, sched_ctrl->search_space->searchSpaceType->present, sched_pdsch->time_domain_allocation,
scc->dmrs_TypeA_Position, 1, NR_RNTI_C, coresetid, false);
NR_tda_info_t *tda_info = &sched_pdsch->tda_info; NR_tda_info_t *tda_info = &sched_pdsch->tda_info;
const uint16_t slbitmap = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols); const uint16_t slbitmap = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
...@@ -798,13 +802,12 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t ...@@ -798,13 +802,12 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
NR_UE_DL_BWP_t *current_BWP = &UE->current_DL_BWP; NR_UE_DL_BWP_t *current_BWP = &UE->current_DL_BWP;
const int tda = get_dl_tda(RC.nrmac[module_id], scc, slot); const int tda = get_dl_tda(RC.nrmac[module_id], scc, slot);
int startSymbolIndex, nrOfSymbols; int startSymbolIndex, nrOfSymbols;
const struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = current_BWP->tdaList; const int coresetid = sched_ctrl->coreset->controlResourceSetId;
const struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = get_dl_tdalist(current_BWP, coresetid, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C);
AssertFatal(tda < tdaList->list.count, "time_domain_allocation %d>=%d\n", tda, tdaList->list.count); AssertFatal(tda < tdaList->list.count, "time_domain_allocation %d>=%d\n", tda, tdaList->list.count);
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength; const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols); SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
const int coresetid = sched_ctrl->coreset->controlResourceSetId;
const uint16_t bwpSize = coresetid == 0 ? RC.nrmac[module_id]->cset0_bwp_size : current_BWP->BWPSize; const uint16_t bwpSize = coresetid == 0 ? RC.nrmac[module_id]->cset0_bwp_size : current_BWP->BWPSize;
const uint16_t BWPStart = coresetid == 0 ? RC.nrmac[module_id]->cset0_bwp_start : current_BWP->BWPStart; const uint16_t BWPStart = coresetid == 0 ? RC.nrmac[module_id]->cset0_bwp_start : current_BWP->BWPStart;
......
...@@ -59,7 +59,9 @@ void nr_preprocessor_phytest(module_id_t module_id, ...@@ -59,7 +59,9 @@ void nr_preprocessor_phytest(module_id_t module_id,
const int CC_id = 0; const int CC_id = 0;
const int tda = get_dl_tda(RC.nrmac[module_id], scc, slot); const int tda = get_dl_tda(RC.nrmac[module_id], scc, slot);
NR_tda_info_t tda_info = nr_get_pdsch_tda_info(dl_bwp, tda); NR_tda_info_t tda_info = get_dl_tda_info(dl_bwp, sched_ctrl->search_space->searchSpaceType->present, tda,
scc->dmrs_TypeA_Position, 1, NR_RNTI_C, sched_ctrl->coreset->controlResourceSetId, false);
sched_ctrl->sched_pdsch.tda_info = tda_info; sched_ctrl->sched_pdsch.tda_info = tda_info;
sched_ctrl->sched_pdsch.time_domain_allocation = tda; sched_ctrl->sched_pdsch.time_domain_allocation = tda;
...@@ -205,7 +207,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ ...@@ -205,7 +207,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
NR_UE_UL_BWP_t *ul_bwp = &UE->current_UL_BWP; NR_UE_UL_BWP_t *ul_bwp = &UE->current_UL_BWP;
const int mu = ul_bwp->scs; const int mu = ul_bwp->scs;
const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList = ul_bwp->tdaList; NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList = get_ul_tdalist(ul_bwp, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C);
const int temp_tda = get_ul_tda(nr_mac, scc, frame, slot); const int temp_tda = get_ul_tda(nr_mac, scc, frame, slot);
if (temp_tda < 0) if (temp_tda < 0)
return false; return false;
...@@ -213,7 +215,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ ...@@ -213,7 +215,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
"time domain assignment %d >= %d\n", "time domain assignment %d >= %d\n",
temp_tda, temp_tda,
tdaList->list.count); tdaList->list.count);
int K2 = get_K2(ul_bwp->tdaList, temp_tda, mu); int K2 = get_K2(tdaList, temp_tda, mu);
const int sched_frame = frame + (slot + K2 >= nr_slots_per_frame[mu]); const int sched_frame = frame + (slot + K2 >= nr_slots_per_frame[mu]);
const int sched_slot = (slot + K2) % nr_slots_per_frame[mu]; const int sched_slot = (slot + K2) % nr_slots_per_frame[mu];
const int tda = get_ul_tda(nr_mac, scc, sched_frame, sched_slot); const int tda = get_ul_tda(nr_mac, scc, sched_frame, sched_slot);
...@@ -240,7 +242,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_ ...@@ -240,7 +242,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
else else
rbSize = target_ul_bw; rbSize = target_ul_bw;
NR_tda_info_t tda_info = nr_get_pusch_tda_info(ul_bwp, tda); NR_tda_info_t tda_info = get_ul_tda_info(ul_bwp, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C, tda);
sched_ctrl->sched_pusch.tda_info = tda_info; sched_ctrl->sched_pusch.tda_info = tda_info;
uint16_t *vrb_map_UL = uint16_t *vrb_map_UL =
......
...@@ -563,30 +563,6 @@ bool nr_find_nb_rb(uint16_t Qm, ...@@ -563,30 +563,6 @@ bool nr_find_nb_rb(uint16_t Qm,
return *tbs >= bytes && *nb_rb <= nb_rb_max; return *tbs >= bytes && *nb_rb <= nb_rb_max;
} }
NR_tda_info_t nr_get_pdsch_tda_info(const NR_UE_DL_BWP_t *dl_bwp,
const int tda) {
NR_tda_info_t tda_info = {0};
NR_PDSCH_TimeDomainResourceAllocationList_t *tdaList = dl_bwp->tdaList;
AssertFatal(tda < tdaList->list.count, "time_domain_allocation %d>=%d\n", tda, tdaList->list.count);
tda_info.mapping_type = tdaList->list.array[tda]->mappingType;
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, &tda_info.startSymbolIndex, &tda_info.nrOfSymbols);
return tda_info;
}
NR_tda_info_t nr_get_pusch_tda_info(const NR_UE_UL_BWP_t *ul_bwp,
const int tda) {
NR_tda_info_t tda_info = {0};
NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList = ul_bwp->tdaList;
AssertFatal(tda < tdaList->list.count, "time_domain_allocation %d>=%d\n", tda, tdaList->list.count);
tda_info.mapping_type = tdaList->list.array[tda]->mappingType;
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, &tda_info.startSymbolIndex, &tda_info.nrOfSymbols);
return tda_info;
}
NR_pusch_dmrs_t get_ul_dmrs_params(const NR_ServingCellConfigCommon_t *scc, NR_pusch_dmrs_t get_ul_dmrs_params(const NR_ServingCellConfigCommon_t *scc,
const NR_UE_UL_BWP_t *ul_bwp, const NR_UE_UL_BWP_t *ul_bwp,
const NR_tda_info_t *tda_info, const NR_tda_info_t *tda_info,
...@@ -1078,12 +1054,8 @@ void set_r_pucch_parms(int rsetindex, ...@@ -1078,12 +1054,8 @@ void set_r_pucch_parms(int rsetindex,
*start_symbol_index = default_pucch_firstsymb[rsetindex]; *start_symbol_index = default_pucch_firstsymb[rsetindex];
} }
void prepare_dci(const NR_CellGroupConfig_t *CellGroup, void prepare_dci(const NR_CellGroupConfig_t *CellGroup, const NR_UE_DL_BWP_t *current_BWP, const NR_ControlResourceSet_t *coreset, dci_pdu_rel15_t *dci_pdu_rel15, nr_dci_format_t format)
const NR_UE_DL_BWP_t *current_BWP, {
const NR_ControlResourceSet_t *coreset,
dci_pdu_rel15_t *dci_pdu_rel15,
nr_dci_format_t format) {
AssertFatal(CellGroup!=NULL,"CellGroup shouldn't be null here\n"); AssertFatal(CellGroup!=NULL,"CellGroup shouldn't be null here\n");
const NR_PDSCH_Config_t *pdsch_Config = current_BWP ? current_BWP->pdsch_Config : NULL; const NR_PDSCH_Config_t *pdsch_Config = current_BWP ? current_BWP->pdsch_Config : NULL;
...@@ -1157,7 +1129,6 @@ void prepare_dci(const NR_CellGroupConfig_t *CellGroup, ...@@ -1157,7 +1129,6 @@ void prepare_dci(const NR_CellGroupConfig_t *CellGroup,
} }
} }
void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc, void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
const NR_CellGroupConfig_t *CellGroup, const NR_CellGroupConfig_t *CellGroup,
const NR_UE_DL_BWP_t *current_DL_BWP, const NR_UE_DL_BWP_t *current_DL_BWP,
...@@ -1177,7 +1148,6 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc, ...@@ -1177,7 +1148,6 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
*dci_pdu = 0; *dci_pdu = 0;
uint16_t alt_size = 0; uint16_t alt_size = 0;
uint16_t N_RB; uint16_t N_RB;
const int controlResourceSetId = *ss->controlResourceSetId;
if(current_DL_BWP) { if(current_DL_BWP) {
N_RB = get_rb_bwp_dci(dci_format, N_RB = get_rb_bwp_dci(dci_format,
ss->searchSpaceType->present, ss->searchSpaceType->present,
...@@ -1190,28 +1160,16 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc, ...@@ -1190,28 +1160,16 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
// computing alternative size for padding // computing alternative size for padding
dci_pdu_rel15_t temp_pdu; dci_pdu_rel15_t temp_pdu;
if(dci_format == NR_DL_DCI_FORMAT_1_0) if(dci_format == NR_DL_DCI_FORMAT_1_0)
alt_size = nr_dci_size(scc->downlinkConfigCommon->initialDownlinkBWP, alt_size = nr_dci_size(current_DL_BWP, current_UL_BWP, CellGroup, &temp_pdu, NR_UL_DCI_FORMAT_0_0, rnti_type, coreset, bwp_id, ss->searchSpaceType->present, cset0_bwp_size, 0);
scc->uplinkConfigCommon->initialUplinkBWP,
current_DL_BWP, current_UL_BWP,
CellGroup, &temp_pdu, NR_UL_DCI_FORMAT_0_0, rnti_type,
controlResourceSetId, bwp_id, ss->searchSpaceType->present, cset0_bwp_size, 0);
if(dci_format == NR_UL_DCI_FORMAT_0_0) if(dci_format == NR_UL_DCI_FORMAT_0_0)
alt_size = nr_dci_size(scc->downlinkConfigCommon->initialDownlinkBWP, alt_size = nr_dci_size(current_DL_BWP, current_UL_BWP, CellGroup, &temp_pdu, NR_DL_DCI_FORMAT_1_0, rnti_type, coreset, bwp_id, ss->searchSpaceType->present, cset0_bwp_size, 0);
scc->uplinkConfigCommon->initialUplinkBWP,
current_DL_BWP, current_UL_BWP,
CellGroup, &temp_pdu, NR_DL_DCI_FORMAT_1_0, rnti_type,
controlResourceSetId, bwp_id, ss->searchSpaceType->present, cset0_bwp_size, 0);
} }
else else
N_RB = cset0_bwp_size; N_RB = cset0_bwp_size;
int dci_size = nr_dci_size(scc->downlinkConfigCommon->initialDownlinkBWP, int dci_size = nr_dci_size(current_DL_BWP, current_UL_BWP, CellGroup, dci_pdu_rel15, dci_format, rnti_type, coreset, bwp_id, ss->searchSpaceType->present, cset0_bwp_size, alt_size);
scc->uplinkConfigCommon->initialUplinkBWP,
current_DL_BWP, current_UL_BWP,
CellGroup, dci_pdu_rel15, dci_format, rnti_type, controlResourceSetId,
bwp_id, ss->searchSpaceType->present, cset0_bwp_size, alt_size);
pdcch_dci_pdu->PayloadSizeBits = dci_size; pdcch_dci_pdu->PayloadSizeBits = dci_size;
AssertFatal(dci_size <= 64, "DCI sizes above 64 bits not yet supported"); AssertFatal(dci_size <= 64, "DCI sizes above 64 bits not yet supported");
if (dci_format == NR_DL_DCI_FORMAT_1_1 || dci_format == NR_UL_DCI_FORMAT_0_1) if (dci_format == NR_DL_DCI_FORMAT_1_1 || dci_format == NR_UL_DCI_FORMAT_0_1)
...@@ -2087,13 +2045,17 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac, ...@@ -2087,13 +2045,17 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
NR_BWP_Uplink_t *ul_bwp = NULL; NR_BWP_Uplink_t *ul_bwp = NULL;
NR_BWP_DownlinkDedicated_t *bwpd = NULL; NR_BWP_DownlinkDedicated_t *bwpd = NULL;
NR_BWP_UplinkDedicated_t *ubwpd = NULL; NR_BWP_UplinkDedicated_t *ubwpd = NULL;
DL_BWP->n_dl_bwp = 1; // number of additional BWPs (excluding initial BWP)
UL_BWP->n_ul_bwp = 1; DL_BWP->n_dl_bwp = 0;
UL_BWP->n_ul_bwp = 0;
int old_dl_bwp_id = DL_BWP->bwp_id; int old_dl_bwp_id = DL_BWP->bwp_id;
int old_ul_bwp_id = UL_BWP->bwp_id; int old_ul_bwp_id = UL_BWP->bwp_id;
int target_ss; int target_ss;
if (CellGroup && CellGroup->physicalCellGroupConfig)
DL_BWP->pdsch_HARQ_ACK_Codebook = &CellGroup->physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook;
if (CellGroup && if (CellGroup &&
CellGroup->spCellConfig && CellGroup->spCellConfig &&
CellGroup->spCellConfig->spCellConfigDedicated) { CellGroup->spCellConfig->spCellConfigDedicated) {
...@@ -2102,6 +2064,7 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac, ...@@ -2102,6 +2064,7 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
DL_BWP->pdsch_servingcellconfig = servingCellConfig->pdsch_ServingCellConfig ? servingCellConfig->pdsch_ServingCellConfig->choice.setup : NULL; DL_BWP->pdsch_servingcellconfig = servingCellConfig->pdsch_ServingCellConfig ? servingCellConfig->pdsch_ServingCellConfig->choice.setup : NULL;
UL_BWP->pusch_servingcellconfig = servingCellConfig->uplinkConfig && servingCellConfig->uplinkConfig->pusch_ServingCellConfig ? UL_BWP->pusch_servingcellconfig = servingCellConfig->uplinkConfig && servingCellConfig->uplinkConfig->pusch_ServingCellConfig ?
servingCellConfig->uplinkConfig->pusch_ServingCellConfig->choice.setup : NULL; servingCellConfig->uplinkConfig->pusch_ServingCellConfig->choice.setup : NULL;
target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific; target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
if(UE && UE->Msg3_dcch_dtch) { if(UE && UE->Msg3_dcch_dtch) {
...@@ -2167,6 +2130,7 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac, ...@@ -2167,6 +2130,7 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
ubwpd = servingCellConfig->uplinkConfig->initialUplinkBWP; ubwpd = servingCellConfig->uplinkConfig->initialUplinkBWP;
DL_BWP->pdsch_Config = bwpd->pdsch_Config->choice.setup; DL_BWP->pdsch_Config = bwpd->pdsch_Config->choice.setup;
UL_BWP->configuredGrantConfig = ubwpd->configuredGrantConfig ? ubwpd->configuredGrantConfig->choice.setup : NULL;
UL_BWP->pusch_Config = ubwpd->pusch_Config->choice.setup; UL_BWP->pusch_Config = ubwpd->pusch_Config->choice.setup;
UL_BWP->pucch_Config = ubwpd->pucch_Config->choice.setup; UL_BWP->pucch_Config = ubwpd->pucch_Config->choice.setup;
UL_BWP->srs_Config = ubwpd->srs_Config->choice.setup; UL_BWP->srs_Config = ubwpd->srs_Config->choice.setup;
...@@ -2180,6 +2144,7 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac, ...@@ -2180,6 +2144,7 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
UL_BWP->pusch_Config = NULL; UL_BWP->pusch_Config = NULL;
UL_BWP->pucch_Config = NULL; UL_BWP->pucch_Config = NULL;
UL_BWP->csi_MeasConfig = NULL; UL_BWP->csi_MeasConfig = NULL;
UL_BWP->configuredGrantConfig = NULL;
} }
if (old_dl_bwp_id != DL_BWP->bwp_id) if (old_dl_bwp_id != DL_BWP->bwp_id)
...@@ -2189,14 +2154,14 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac, ...@@ -2189,14 +2154,14 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
// TDA lists // TDA lists
if (DL_BWP->bwp_id>0) if (DL_BWP->bwp_id>0)
DL_BWP->tdaList = dl_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; DL_BWP->tdaList_Common = dl_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
else else
DL_BWP->tdaList = scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList; DL_BWP->tdaList_Common = scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
if(UL_BWP->bwp_id>0) if(UL_BWP->bwp_id>0)
UL_BWP->tdaList = ul_bwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; UL_BWP->tdaList_Common = ul_bwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
else else
UL_BWP->tdaList = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList; UL_BWP->tdaList_Common = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
// setting generic parameters // setting generic parameters
NR_BWP_t dl_genericParameters = (DL_BWP->bwp_id > 0 && dl_bwp) ? NR_BWP_t dl_genericParameters = (DL_BWP->bwp_id > 0 && dl_bwp) ?
...@@ -2226,10 +2191,13 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac, ...@@ -2226,10 +2191,13 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
else else
UL_BWP->transform_precoding = *UL_BWP->pusch_Config->transformPrecoder; UL_BWP->transform_precoding = *UL_BWP->pusch_Config->transformPrecoder;
if(UL_BWP->bwp_id>0) if (UL_BWP->bwp_id > 0) {
UL_BWP->pucch_ConfigCommon = ul_bwp->bwp_Common->pucch_ConfigCommon->choice.setup; UL_BWP->pucch_ConfigCommon = ul_bwp->bwp_Common->pucch_ConfigCommon->choice.setup;
else UL_BWP->rach_ConfigCommon = ul_bwp->bwp_Common->rach_ConfigCommon->choice.setup;
} else {
UL_BWP->pucch_ConfigCommon = scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup; UL_BWP->pucch_ConfigCommon = scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup;
UL_BWP->rach_ConfigCommon = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup;
}
if(UE) { if(UE) {
......
...@@ -274,11 +274,12 @@ void nr_schedule_srs(int module_id, frame_t frame, int slot) ...@@ -274,11 +274,12 @@ void nr_schedule_srs(int module_id, frame_t frame, int slot)
continue; continue;
} }
const int num_tda = current_BWP->tdaList->list.count; NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList = get_ul_tdalist(current_BWP, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C);
const int num_tda = tdaList->list.count;
int max_k2 = 0; int max_k2 = 0;
// avoid last one in the list (for msg3) // avoid last one in the list (for msg3)
for (int i = 0; i < num_tda - 1; i++) { for (int i = 0; i < num_tda - 1; i++) {
int k2 = get_K2(current_BWP->tdaList, i, current_BWP->scs); int k2 = get_K2(tdaList, i, current_BWP->scs);
max_k2 = k2 > max_k2 ? k2 : max_k2; max_k2 = k2 > max_k2 ? k2 : max_k2;
} }
......
...@@ -1015,14 +1015,10 @@ void handle_nr_uci_pucch_2_3_4(module_id_t mod_id, ...@@ -1015,14 +1015,10 @@ void handle_nr_uci_pucch_2_3_4(module_id_t mod_id,
} }
} }
void set_pucch_allocation(const NR_PUCCH_Config_t *pucch_Config, void set_pucch_allocation(const NR_UE_UL_BWP_t *ul_bwp, const int r_pucch, const int bwp_size, NR_sched_pucch_t *pucch)
const NR_ServingCellConfigCommon_t *scc,
const int r_pucch,
const int bwp_size,
NR_sched_pucch_t *pucch)
{ {
if(r_pucch<0){ if(r_pucch<0){
const NR_PUCCH_Resource_t *resource = pucch_Config->resourceToAddModList->list.array[0]; const NR_PUCCH_Resource_t *resource = ul_bwp->pucch_Config->resourceToAddModList->list.array[0];
DevAssert(resource->format.present == NR_PUCCH_Resource__format_PR_format0); DevAssert(resource->format.present == NR_PUCCH_Resource__format_PR_format0);
pucch->second_hop_prb = resource->secondHopPRB!= NULL ? *resource->secondHopPRB : 0; pucch->second_hop_prb = resource->secondHopPRB!= NULL ? *resource->secondHopPRB : 0;
pucch->nr_of_symb = resource->format.choice.format0->nrofSymbols; pucch->nr_of_symb = resource->format.choice.format0->nrofSymbols;
...@@ -1030,7 +1026,7 @@ void set_pucch_allocation(const NR_PUCCH_Config_t *pucch_Config, ...@@ -1030,7 +1026,7 @@ void set_pucch_allocation(const NR_PUCCH_Config_t *pucch_Config,
pucch->prb_start = resource->startingPRB; pucch->prb_start = resource->startingPRB;
} }
else{ else{
int rsetindex = *scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->pucch_ResourceCommon; int rsetindex = *ul_bwp->pucch_ConfigCommon->pucch_ResourceCommon;
set_r_pucch_parms(rsetindex, set_r_pucch_parms(rsetindex,
r_pucch, r_pucch,
bwp_size, bwp_size,
...@@ -1155,7 +1151,7 @@ int nr_acknack_scheduling(gNB_MAC_INST *mac, ...@@ -1155,7 +1151,7 @@ int nr_acknack_scheduling(gNB_MAC_INST *mac,
} }
else { // unoccupied occasion else { // unoccupied occasion
// checking if in ul_slot the resources potentially to be assigned to this PUCCH are available // checking if in ul_slot the resources potentially to be assigned to this PUCCH are available
set_pucch_allocation(pucch_Config, scc, r_pucch, bwp_size, curr_pucch); set_pucch_allocation(ul_bwp, r_pucch, bwp_size, curr_pucch);
uint16_t *vrb_map_UL = &mac->common_channels[CC_id].vrb_map_UL[pucch_slot * MAX_BWP_SIZE]; uint16_t *vrb_map_UL = &mac->common_channels[CC_id].vrb_map_UL[pucch_slot * MAX_BWP_SIZE];
bool ret = test_pucch0_vrb_occupation(curr_pucch, bool ret = test_pucch0_vrb_occupation(curr_pucch,
vrb_map_UL, vrb_map_UL,
...@@ -1249,7 +1245,7 @@ void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t SFN, sub_frame_t slot) ...@@ -1249,7 +1245,7 @@ void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t SFN, sub_frame_t slot)
uint16_t *vrb_map_UL = &nrmac->common_channels[CC_id].vrb_map_UL[slot * MAX_BWP_SIZE]; uint16_t *vrb_map_UL = &nrmac->common_channels[CC_id].vrb_map_UL[slot * MAX_BWP_SIZE];
const int bwp_start = ul_bwp->BWPStart; const int bwp_start = ul_bwp->BWPStart;
const int bwp_size = ul_bwp->BWPSize; const int bwp_size = ul_bwp->BWPSize;
set_pucch_allocation(pucch_Config, scc, -1, bwp_size, curr_pucch); set_pucch_allocation(ul_bwp, -1, bwp_size, curr_pucch);
bool ret = test_pucch0_vrb_occupation(curr_pucch, bool ret = test_pucch0_vrb_occupation(curr_pucch,
vrb_map_UL, vrb_map_UL,
bwp_start, bwp_start,
......
...@@ -1424,13 +1424,14 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac, ...@@ -1424,13 +1424,14 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac,
const int CC_id = 0; const int CC_id = 0;
NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl; NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
NR_sched_pusch_t *retInfo = &sched_ctrl->ul_harq_processes[harq_pid].sched_pusch; NR_sched_pusch_t *retInfo = &sched_ctrl->ul_harq_processes[harq_pid].sched_pusch;
NR_UE_UL_BWP_t *ul_bwp = &UE->current_UL_BWP;
int rbStart = 0; // wrt BWP start int rbStart = 0; // wrt BWP start
const uint16_t bwpSize = UE->current_UL_BWP.BWPSize; const uint16_t bwpSize = ul_bwp->BWPSize;
const uint8_t nrOfLayers = retInfo->nrOfLayers; const uint8_t nrOfLayers = retInfo->nrOfLayers;
LOG_D(NR_MAC,"retInfo->time_domain_allocation = %d, tda = %d\n", retInfo->time_domain_allocation, tda); LOG_D(NR_MAC,"retInfo->time_domain_allocation = %d, tda = %d\n", retInfo->time_domain_allocation, tda);
LOG_D(NR_MAC,"tbs %d\n",retInfo->tb_size); LOG_D(NR_MAC,"tbs %d\n",retInfo->tb_size);
NR_tda_info_t tda_info = nr_get_pusch_tda_info(&UE->current_UL_BWP, tda); NR_tda_info_t tda_info = get_ul_tda_info(ul_bwp, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C, tda);
bool reuse_old_tda = (retInfo->tda_info.startSymbolIndex == tda_info.startSymbolIndex) && (retInfo->tda_info.nrOfSymbols <= tda_info.nrOfSymbols); bool reuse_old_tda = (retInfo->tda_info.startSymbolIndex == tda_info.startSymbolIndex) && (retInfo->tda_info.nrOfSymbols <= tda_info.nrOfSymbols);
if (reuse_old_tda && nrOfLayers == retInfo->nrOfLayers) { if (reuse_old_tda && nrOfLayers == retInfo->nrOfLayers) {
/* Check the resource is enough for retransmission */ /* Check the resource is enough for retransmission */
...@@ -1450,7 +1451,7 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac, ...@@ -1450,7 +1451,7 @@ static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac,
LOG_D(NR_MAC, "%s(): retransmission keeping TDA %d and TBS %d\n", __func__, tda, retInfo->tb_size); LOG_D(NR_MAC, "%s(): retransmission keeping TDA %d and TBS %d\n", __func__, tda, retInfo->tb_size);
} else { } else {
NR_pusch_dmrs_t dmrs_info = get_ul_dmrs_params(scc, NR_pusch_dmrs_t dmrs_info = get_ul_dmrs_params(scc,
&UE->current_UL_BWP, ul_bwp,
&tda_info, &tda_info,
nrOfLayers); nrOfLayers);
/* the retransmission will use a different time domain allocation, check /* the retransmission will use a different time domain allocation, check
...@@ -1666,7 +1667,7 @@ void pf_ul(module_id_t module_id, ...@@ -1666,7 +1667,7 @@ void pf_ul(module_id_t module_id,
sched_pusch->nrOfLayers = sched_ctrl->srs_feedback.ul_ri + 1; sched_pusch->nrOfLayers = sched_ctrl->srs_feedback.ul_ri + 1;
sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_pusch->frame, sched_pusch->slot); sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_pusch->frame, sched_pusch->slot);
sched_pusch->tda_info = nr_get_pusch_tda_info(current_BWP, sched_pusch->time_domain_allocation); sched_pusch->tda_info = get_ul_tda_info(current_BWP, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C, sched_pusch->time_domain_allocation);
sched_pusch->dmrs_info = get_ul_dmrs_params(scc, sched_pusch->dmrs_info = get_ul_dmrs_params(scc,
current_BWP, current_BWP,
&sched_pusch->tda_info, &sched_pusch->tda_info,
...@@ -1766,7 +1767,7 @@ void pf_ul(module_id_t module_id, ...@@ -1766,7 +1767,7 @@ void pf_ul(module_id_t module_id,
sched_pusch->nrOfLayers = sched_ctrl->srs_feedback.ul_ri + 1; sched_pusch->nrOfLayers = sched_ctrl->srs_feedback.ul_ri + 1;
sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_pusch->frame, sched_pusch->slot); sched_pusch->time_domain_allocation = get_ul_tda(nrmac, scc, sched_pusch->frame, sched_pusch->slot);
sched_pusch->tda_info = nr_get_pusch_tda_info(current_BWP, sched_pusch->time_domain_allocation); sched_pusch->tda_info = get_ul_tda_info(current_BWP, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C, sched_pusch->time_domain_allocation);
sched_pusch->dmrs_info = get_ul_dmrs_params(scc, sched_pusch->dmrs_info = get_ul_dmrs_params(scc,
current_BWP, current_BWP,
&sched_pusch->tda_info, &sched_pusch->tda_info,
...@@ -1868,13 +1869,14 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t ...@@ -1868,13 +1869,14 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
NR_UE_UL_BWP_t *current_BWP = &nr_mac->UE_info.list[0]->current_UL_BWP; NR_UE_UL_BWP_t *current_BWP = &nr_mac->UE_info.list[0]->current_UL_BWP;
int mu = current_BWP->scs; int mu = current_BWP->scs;
const int temp_tda = get_ul_tda(nr_mac, scc, frame, slot); const int temp_tda = get_ul_tda(nr_mac, scc, frame, slot);
int K2 = get_K2(current_BWP->tdaList, temp_tda, mu); NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList = get_ul_tdalist(current_BWP, sched_ctrl->coreset->controlResourceSetId, sched_ctrl->search_space->searchSpaceType->present, NR_RNTI_C);
int K2 = get_K2(tdaList, temp_tda, mu);
const int sched_frame = (frame + (slot + K2 >= nr_slots_per_frame[mu])) & 1023; const int sched_frame = (frame + (slot + K2 >= nr_slots_per_frame[mu])) & 1023;
const int sched_slot = (slot + K2) % nr_slots_per_frame[mu]; const int sched_slot = (slot + K2) % nr_slots_per_frame[mu];
const int tda = get_ul_tda(nr_mac, scc, sched_frame, sched_slot); const int tda = get_ul_tda(nr_mac, scc, sched_frame, sched_slot);
if (tda < 0) if (tda < 0)
return false; return false;
DevAssert(K2 == get_K2(current_BWP->tdaList, tda, mu)); DevAssert(K2 == get_K2(tdaList, tda, mu));
if (!is_xlsch_in_slot(nr_mac->ulsch_slot_bitmap[sched_slot / 64], sched_slot)) if (!is_xlsch_in_slot(nr_mac->ulsch_slot_bitmap[sched_slot / 64], sched_slot))
return false; return false;
...@@ -1883,9 +1885,9 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t ...@@ -1883,9 +1885,9 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
sched_ctrl->sched_pusch.frame = sched_frame; sched_ctrl->sched_pusch.frame = sched_frame;
UE_iterator(nr_mac->UE_info.list, UE2) { UE_iterator(nr_mac->UE_info.list, UE2) {
NR_UE_sched_ctrl_t *sched_ctrl = &UE2->UE_sched_ctrl; NR_UE_sched_ctrl_t *sched_ctrl = &UE2->UE_sched_ctrl;
AssertFatal(K2 == get_K2(current_BWP->tdaList, tda, mu), AssertFatal(K2 == get_K2(tdaList, tda, mu),
"Different K2, %d(UE%d) != %ld(UE%04x)\n", "Different K2, %d(UE%d) != %ld(UE%04x)\n",
K2, 0, get_K2(current_BWP->tdaList, tda, mu), UE2->rnti); K2, 0, get_K2(tdaList, tda, mu), UE2->rnti);
sched_ctrl->sched_pusch.slot = sched_slot; sched_ctrl->sched_pusch.slot = sched_slot;
sched_ctrl->sched_pusch.frame = sched_frame; sched_ctrl->sched_pusch.frame = sched_frame;
} }
...@@ -1893,13 +1895,12 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t ...@@ -1893,13 +1895,12 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
/* Change vrb_map_UL to rballoc_mask: check which symbols per RB (in /* Change vrb_map_UL to rballoc_mask: check which symbols per RB (in
* vrb_map_UL) overlap with the "default" tda and exclude those RBs. * vrb_map_UL) overlap with the "default" tda and exclude those RBs.
* Calculate largest contiguous RBs */ * Calculate largest contiguous RBs */
uint16_t *vrb_map_UL = uint16_t *vrb_map_UL = &RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[sched_slot * MAX_BWP_SIZE];
&RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[sched_slot * MAX_BWP_SIZE];
const uint16_t bwpSize = current_BWP->BWPSize; const uint16_t bwpSize = current_BWP->BWPSize;
const uint16_t bwpStart = current_BWP->BWPStart; const uint16_t bwpStart = current_BWP->BWPStart;
const int startSymbolAndLength = current_BWP->tdaList->list.array[tda]->startSymbolAndLength; const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
int startSymbolIndex, nrOfSymbols; int startSymbolIndex, nrOfSymbols;
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols); SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
const uint16_t symb = SL_to_bitmap(startSymbolIndex, nrOfSymbols); const uint16_t symb = SL_to_bitmap(startSymbolIndex, nrOfSymbols);
......
...@@ -277,11 +277,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc, ...@@ -277,11 +277,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
NR_ControlResourceSet_t *coreset, NR_ControlResourceSet_t *coreset,
uint16_t cset0_bwp_size); uint16_t cset0_bwp_size);
void prepare_dci(const NR_CellGroupConfig_t *CellGroup, void prepare_dci(const NR_CellGroupConfig_t *CellGroup, const NR_UE_DL_BWP_t *current_BWP, const NR_ControlResourceSet_t *coreset, dci_pdu_rel15_t *dci_pdu_rel15, nr_dci_format_t format);
const NR_UE_DL_BWP_t *dl_bwp,
const NR_ControlResourceSet_t *coreset,
dci_pdu_rel15_t *dci_pdu_rel15,
nr_dci_format_t format);
void set_r_pucch_parms(int rsetindex, void set_r_pucch_parms(int rsetindex,
int r_pucch, int r_pucch,
...@@ -307,12 +303,6 @@ long get_K2(NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList, ...@@ -307,12 +303,6 @@ long get_K2(NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList,
int time_domain_assignment, int time_domain_assignment,
int mu); int mu);
NR_tda_info_t nr_get_pdsch_tda_info(const NR_UE_DL_BWP_t *dl_bwp,
const int tda);
NR_tda_info_t nr_get_pusch_tda_info(const NR_UE_UL_BWP_t *ul_bwp,
const int tda);
NR_pusch_dmrs_t get_ul_dmrs_params(const NR_ServingCellConfigCommon_t *scc, NR_pusch_dmrs_t get_ul_dmrs_params(const NR_ServingCellConfigCommon_t *scc,
const NR_UE_UL_BWP_t *ul_bwp, const NR_UE_UL_BWP_t *ul_bwp,
const NR_tda_info_t *tda_info, const NR_tda_info_t *tda_info,
......
...@@ -334,12 +334,6 @@ typedef struct NR_sched_pucch { ...@@ -334,12 +334,6 @@ typedef struct NR_sched_pucch {
int start_symb; int start_symb;
} NR_sched_pucch_t; } NR_sched_pucch_t;
typedef struct NR_tda_info {
mappingType_t mapping_type;
int startSymbolIndex;
int nrOfSymbols;
} NR_tda_info_t;
typedef struct NR_pusch_dmrs { typedef struct NR_pusch_dmrs {
uint8_t N_PRB_DMRS; uint8_t N_PRB_DMRS;
uint8_t num_dmrs_symb; uint8_t num_dmrs_symb;
......
...@@ -667,6 +667,7 @@ static void fill_dci_from_dl_config(nr_downlink_indication_t*dl_ind, fapi_nr_dl_ ...@@ -667,6 +667,7 @@ static void fill_dci_from_dl_config(nr_downlink_indication_t*dl_ind, fapi_nr_dl_
if (rel15_dci->dci_length_options[j] == dl_ind->dci_ind->dci_list[k].payloadSize) { if (rel15_dci->dci_length_options[j] == dl_ind->dci_ind->dci_list[k].payloadSize) {
dl_ind->dci_ind->dci_list[k].dci_format = rel15_dci->dci_format_options[j]; dl_ind->dci_ind->dci_list[k].dci_format = rel15_dci->dci_format_options[j];
dl_ind->dci_ind->dci_list[k].ss_type = rel15_dci->dci_type_options[j]; dl_ind->dci_ind->dci_list[k].ss_type = rel15_dci->dci_type_options[j];
dl_ind->dci_ind->dci_list[k].coreset_type = rel15_dci->coreset.CoreSetType;
LOG_D(NR_PHY, "format assigned dl_ind->dci_ind->dci_list[k].dci_format %d\n", LOG_D(NR_PHY, "format assigned dl_ind->dci_ind->dci_list[k].dci_format %d\n",
dl_ind->dci_ind->dci_list[k].dci_format); dl_ind->dci_ind->dci_list[k].dci_format);
} }
......
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