Commit 4dbf6709 authored by lfq's avatar lfq

add amp log

parent d610c9a0
...@@ -81,6 +81,18 @@ unsigned char offset_mumimo_llr_drange[29][3]={{8,8,8},{7,7,7},{7,7,7},{7,7,7},{ ...@@ -81,6 +81,18 @@ unsigned char offset_mumimo_llr_drange[29][3]={{8,8,8},{7,7,7},{7,7,7},{7,7,7},{
#define print_ints(s,x) printf("%s = %d %d %d %d\n",s,(x)[0],(x)[1],(x)[2],(x)[3]) #define print_ints(s,x) printf("%s = %d %d %d %d\n",s,(x)[0],(x)[1],(x)[2],(x)[3])
#define print_shorts(s,x) printf("%s = [%d+j*%d, %d+j*%d, %d+j*%d, %d+j*%d]\n",s,(x)[0],(x)[1],(x)[2],(x)[3],(x)[4],(x)[5],(x)[6],(x)[7]) #define print_shorts(s,x) printf("%s = [%d+j*%d, %d+j*%d, %d+j*%d, %d+j*%d]\n",s,(x)[0],(x)[1],(x)[2],(x)[3],(x)[4],(x)[5],(x)[6],(x)[7])
unsigned int cal_amp(int16_t *dataIn, int len)
{
int i;
unsigned int sumA = 0;
for(i=0;i<len;i++)
{
sumA += abs(dataIn[i]);
}
sumA = sumA/len;
return sumA;
}
/* compute H_h_H matrix inversion up to 4x4 matrices */ /* compute H_h_H matrix inversion up to 4x4 matrices */
uint8_t nr_zero_forcing_rx(uint32_t rx_size_symbol, uint8_t nr_zero_forcing_rx(uint32_t rx_size_symbol,
unsigned char n_rx, unsigned char n_rx,
...@@ -406,10 +418,10 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, ...@@ -406,10 +418,10 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
//--------------------- RBs extraction --------------------- //--------------------- RBs extraction ---------------------
//---------------------------------------------------------- //----------------------------------------------------------
const int n_rx = frame_parms->nb_antennas_rx; const int n_rx = frame_parms->nb_antennas_rx;
__attribute__((aligned(32))) c16_t rxdataF_ext[nbRx][rx_size_symbol];
start_meas(&ue->generic_stat_bis[slot]); start_meas(&ue->generic_stat_bis[slot]);
{ {
__attribute__((aligned(32))) c16_t rxdataF_ext[nbRx][rx_size_symbol];
memset(rxdataF_ext, 0, sizeof(rxdataF_ext)); memset(rxdataF_ext, 0, sizeof(rxdataF_ext));
nr_dlsch_extract_rbs(ue->frame_parms.samples_per_slot_wCP, nr_dlsch_extract_rbs(ue->frame_parms.samples_per_slot_wCP,
...@@ -444,6 +456,14 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, ...@@ -444,6 +456,14 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
//---------------------------------------------------------- //----------------------------------------------------------
//--------------------- Channel Scaling -------------------- //--------------------- Channel Scaling --------------------
//---------------------------------------------------------- //----------------------------------------------------------
if ((pilots == 0) && (dlsch[0].rnti_type == _SI_RNTI_))
{
unsigned int pdsch_amp;
pdsch_amp = cal_amp((int16_t *)&rxdataF_ext[0][0 ], nb_rb_pdsch * 12);
LOG_I(PHY, "frame %d %d, SIB symbol %d pdsch_amp %u, rb %d\n", frame, nr_slot_rx, symbol, pdsch_amp, nb_rb_pdsch);
}
start_meas(&ue->generic_stat_bis[slot]); start_meas(&ue->generic_stat_bis[slot]);
nr_dlsch_scale_channel(rx_size_symbol, dl_ch_estimates_ext, frame_parms, nl, n_rx, symbol, pilots, nb_re_pdsch, nb_rb_pdsch); nr_dlsch_scale_channel(rx_size_symbol, dl_ch_estimates_ext, frame_parms, nl, n_rx, symbol, pilots, nb_re_pdsch, nb_rb_pdsch);
stop_meas(&ue->generic_stat_bis[slot]); stop_meas(&ue->generic_stat_bis[slot]);
...@@ -533,6 +553,8 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue, ...@@ -533,6 +553,8 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
nr_zero_forcing_rx( nr_zero_forcing_rx(
rx_size_symbol, n_rx, nl, rxdataF_comp, dl_ch_mag, dl_ch_magb, dl_ch_magr, dl_ch_estimates_ext, nb_rb_pdsch, dlsch[0].dlsch_config.qamModOrder, *log2_maxh, symbol, nb_re_pdsch); rx_size_symbol, n_rx, nl, rxdataF_comp, dl_ch_mag, dl_ch_magb, dl_ch_magr, dl_ch_estimates_ext, nb_rb_pdsch, dlsch[0].dlsch_config.qamModOrder, *log2_maxh, symbol, nb_re_pdsch);
} }
stop_meas(&ue->generic_stat_bis[slot]); stop_meas(&ue->generic_stat_bis[slot]);
if (cpumeas(CPUMEAS_GETSTATE)) if (cpumeas(CPUMEAS_GETSTATE))
......
...@@ -940,6 +940,7 @@ bool nr_ue_periodic_srs_scheduling(module_id_t mod_id, frame_t frame, slot_t slo ...@@ -940,6 +940,7 @@ bool nr_ue_periodic_srs_scheduling(module_id_t mod_id, frame_t frame, slot_t slo
fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slot, 0); fapi_nr_ul_config_request_t *ul_config = get_ul_config_request(mac, slot, 0);
fapi_nr_ul_config_srs_pdu *srs_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].srs_config_pdu; fapi_nr_ul_config_srs_pdu *srs_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].srs_config_pdu;
LOG_I(PHY, "frame %d, %d, n_slots_frame %d, period %d, offset %d\n", frame, slot, n_slots_frame, period, offset);
configure_srs_pdu(mac, srs_resource, srs_config_pdu, period, offset); configure_srs_pdu(mac, srs_resource, srs_config_pdu, period, offset);
fill_ul_config(ul_config, frame, slot, FAPI_NR_UL_CONFIG_TYPE_SRS); fill_ul_config(ul_config, frame, slot, FAPI_NR_UL_CONFIG_TYPE_SRS);
......
Active_gNBs = ( "gNB-OAI");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
gNB_name = "gNB-OAI";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 100;
plmn_list = ({ mcc = 466; mnc = 92; mnc_length = 2; snssaiList = ({ sst = 1 }) });
nr_cellid = 12345678L;
////////// Physical parameters:
sib1_tda = 15;
min_rxtxtime = 6;
do_CSIRS = 0;
do_SRS = 0;
pdcch_ConfigSIB1 = (
{
controlResourceSetZero = 2;
searchSpaceZero = 0;
}
);
servingCellConfigCommon = (
{
#spCellConfigCommon
physCellId = 0;
# downlinkConfigCommon
#frequencyInfoDL
# this is 3600 MHz + 12 PRBs@30kHz SCS (same as initial BWP)
absoluteFrequencySSB = 512910;
dl_frequencyBand = 41;
# this is 3600 MHz
dl_absoluteFrequencyPointA = 503190;
#scs-SpecificCarrierList
dl_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing = 1;
dl_carrierBandwidth = 273;
#initialDownlinkBWP
#genericParameters
# this is RBstart=27,L=48 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 31624;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 2;
initialDLBWPsearchSpaceZero = 0;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 41;
#scs-SpecificCarrierList
ul_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing = 1;
ul_carrierBandwidth = 273;
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 31624;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
#rach-ConfigCommon
#rach-ConfigGeneric
prach_ConfigurationIndex = 98;
#prach_msg1_FDM
#0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM = 0;
prach_msg1_FrequencyStart = 0;
zeroCorrelationZoneConfig = 13;
preambleReceivedTargetPower = -96;
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax = 6;
#powerRampingStep
# 0=dB0,1=dB2,2=dB4,3=dB6
powerRampingStep = 1;
#ra_ReponseWindow
#1,2,4,8,10,20,40,80
ra_ResponseWindow = 4;
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4;
#oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 14;
#ra_ContentionResolutionTimer
#(0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer = 7;
rsrp_ThresholdSSB = 19;
#prach-RootSequenceIndex_PR
#1 = 839, 2 = 139
prach_RootSequenceIndex_PR = 2;
prach_RootSequenceIndex = 1;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
#
msg1_SubcarrierSpacing = 1,
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
# pucch-ConfigCommon setup :
# pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping = 0;
hoppingId = 40;
p0_nominal = -90;
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 2;
ssb_PositionsInBurst_Bitmap = 1;
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 2;
# dmrs_TypeA_position
# 0 = pos2, 1 = pos3
dmrs_TypeA_Position = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing = 1;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = 1;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 6;
nrofDownlinkSlots = 7;
nrofDownlinkSymbols = 6;
nrofUplinkSlots = 2;
nrofUplinkSymbols = 4;
ssPBCH_BlockPower = -25;
}
);
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// AMF parameters:
amf_ip_address = ( { ipv4 = "192.168.199.193";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
GNB_INTERFACE_NAME_FOR_NG_AMF = "enp3s0";
GNB_IPV4_ADDRESS_FOR_NG_AMF = "192.168.199.101";
GNB_INTERFACE_NAME_FOR_NGU = "enp3s0";
GNB_IPV4_ADDRESS_FOR_NGU = "192.168.199.101";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 150;
pucch_TargetSNRx10 = 200;
ulsch_max_frame_inactivity = 1;
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
pusch_proc_threads = 8;
prach_dtx_threshold = 120;
pucch0_dtx_threshold = 150;
ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0
}
);
RUs = (
{
local_rf = "yes"
nb_tx = 1
nb_rx = 1
att_tx = 0;
att_rx = 0;
bands = [78];
max_pdschReferenceSignalPower = -27;
max_rxgain = 25;
sf_extension = 0;
eNB_instances = [0];
#beamforming 1x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
sdr_addrs = "dev=pciex:0,auxdac1=340";
clock_src = "internal";
}
);
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
);
rfsimulator :
{
serveraddr = "server";
serverport = "4043";
options = (); #("saviq"); or/and "chanmod"
modelname = "AWGN";
IQfile = "/tmp/rfsimulator.iqs";
};
security = {
# preferred ciphering algorithms
# the first one of the list that an UE supports in chosen
# valid values: nea0, nea1, nea2, nea3
ciphering_algorithms = ( "nea0" );
# preferred integrity algorithms
# the first one of the list that an UE supports in chosen
# valid values: nia0, nia1, nia2, nia3
integrity_algorithms = ( "nia2", "nia0" );
# setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter
# what 'ciphering_algorithms' configures; same thing for 'drb_integrity'
drb_ciphering = "yes";
drb_integrity = "no";
};
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
ngap_log_level ="debug";
ngap_log_verbosity ="medium";
};
...@@ -267,7 +267,7 @@ RUs = ( ...@@ -267,7 +267,7 @@ RUs = (
##beamforming 1x2 matrix: 1 layer x 2 antennas ##beamforming 1x2 matrix: 1 layer x 2 antennas
#bf_weights = [0x00007fff, 0x0000]; #bf_weights = [0x00007fff, 0x0000];
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000]; bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
sdr_addrs = "dev=pciex:0,auxdac1=340"; sdr_addrs = "dev=pciex:0,auxdac1=1511";
clock_src = "internal"; clock_src = "internal";
} }
......
...@@ -215,7 +215,7 @@ RUs = ( ...@@ -215,7 +215,7 @@ RUs = (
local_rf = "yes" local_rf = "yes"
nb_tx = 1 nb_tx = 1
nb_rx = 1 nb_rx = 1
att_tx = 85 att_tx = 85;
att_rx = 0; att_rx = 0;
bands = [78]; bands = [78];
max_pdschReferenceSignalPower = -27; max_pdschReferenceSignalPower = -27;
...@@ -224,7 +224,7 @@ RUs = ( ...@@ -224,7 +224,7 @@ RUs = (
eNB_instances = [0]; eNB_instances = [0];
#beamforming 1x4 matrix: #beamforming 1x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000]; bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
sdr_addrs = "dev=pciex:0,auxdac1=340"; sdr_addrs = "dev=pciex:0,auxdac1=1511";
clock_src = "internal"; clock_src = "internal";
} }
); );
......
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