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zzha zzha
OpenXG-RAN
Commits
55a39eb2
Commit
55a39eb2
authored
8 years ago
by
Raymond Knopp
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initial version for testing with nFAPI interfaces. Still lots of debugging traces.
parent
d2249d5c
Branches unavailable
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v2.1.0
v2.0.0
v1.2.2
v1.2.1
v1.2.0
v1.1.1
v1.1.0
v1.0.3
v1.0.2
v1.0.1
v1.0.0
setparam
osa-etsi-ws-ue
osa-etsi-ws-try2
osa-etsi-ws-try1
osa-etsi-ws-gNB
oai_nr_sync
nr-ip-over-lte
nr-ip-over-lte-v.1.5
nr-ip-over-lte-v.1.4
nr-ip-over-lte-v.1.3
nr-ip-over-lte-v.1.2
nr-ip-over-lte-v.1.1
nr-ip-over-lte-v.1.0
flexran-eol
develop-nr-pdcch
develop-nr-2020w03
develop-nr-2020w02
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develop-nr-2019w50
develop-nr-2019w48
develop-nr-2019w47
develop-nr-2019w45
develop-nr-2019w43
develop-nr-2019w42
develop-nr-2019w40
develop-nr-2019w28
develop-nr-2019w23
benetel_phase_rotation
benetel_gnb_rel_2.0
benetel_gnb_rel_1.0
benetel_enb_rel_2.0
benetel_enb_rel_1.0
No related merge requests found
Changes
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5 changed files
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28 additions
and
293 deletions
+28
-293
openair1/PHY/LTE_TRANSPORT/dci_tools.c
openair1/PHY/LTE_TRANSPORT/dci_tools.c
+9
-1
openair1/SCHED/phy_procedures_lte_eNb.c
openair1/SCHED/phy_procedures_lte_eNb.c
+4
-284
openair2/LAYER2/MAC/eNB_scheduler_RA.c
openair2/LAYER2/MAC/eNB_scheduler_RA.c
+1
-2
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
+13
-6
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
+1
-0
No files found.
openair1/PHY/LTE_TRANSPORT/dci_tools.c
View file @
55a39eb2
...
@@ -1224,7 +1224,7 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
...
@@ -1224,7 +1224,7 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_
}
}
LOG_I
(
PHY
,
"DCI: Set harq_ids[%d] to %d
\n
"
,
subframe
,
rel8
->
harq_process
);
LOG_I
(
PHY
,
"DCI: Set harq_ids[%d] to %d
(%p)
\n
"
,
subframe
,
rel8
->
harq_process
,
dlsch0
);
dlsch0
->
harq_ids
[
subframe
]
=
rel8
->
harq_process
;
dlsch0
->
harq_ids
[
subframe
]
=
rel8
->
harq_process
;
...
@@ -2275,6 +2275,7 @@ void fill_dci0(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,
...
@@ -2275,6 +2275,7 @@ void fill_dci0(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,
((
DCI0_1_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
rballoc
=
rballoc
;
((
DCI0_1_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
rballoc
=
rballoc
;
// hopping = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->hopping;
// hopping = ((DCI0_1_5MHz_TDD_1_6_t *)dci_pdu)->hopping;
((
DCI0_1_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
type
=
0
;
((
DCI0_1_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
type
=
0
;
dci_alloc
->
dci_length
=
sizeof_DCI0_1_5MHz_TDD_1_6_t
;
}
else
{
}
else
{
((
DCI0_1_5MHz_FDD_t
*
)
dci_pdu
)
->
cqi_req
=
cqi_req
;
((
DCI0_1_5MHz_FDD_t
*
)
dci_pdu
)
->
cqi_req
=
cqi_req
;
((
DCI0_1_5MHz_FDD_t
*
)
dci_pdu
)
->
cshift
=
cshift
;
((
DCI0_1_5MHz_FDD_t
*
)
dci_pdu
)
->
cshift
=
cshift
;
...
@@ -2284,6 +2285,7 @@ void fill_dci0(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,
...
@@ -2284,6 +2285,7 @@ void fill_dci0(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,
((
DCI0_1_5MHz_FDD_t
*
)
dci_pdu
)
->
rballoc
=
rballoc
;
((
DCI0_1_5MHz_FDD_t
*
)
dci_pdu
)
->
rballoc
=
rballoc
;
// hopping = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->hopping;
// hopping = ((DCI0_1_5MHz_FDD_t *)dci_pdu)->hopping;
((
DCI0_1_5MHz_FDD_t
*
)
dci_pdu
)
->
type
=
0
;
((
DCI0_1_5MHz_FDD_t
*
)
dci_pdu
)
->
type
=
0
;
dci_alloc
->
dci_length
=
sizeof_DCI0_1_5MHz_FDD_t
;
}
}
break
;
break
;
...
@@ -2299,6 +2301,7 @@ void fill_dci0(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,
...
@@ -2299,6 +2301,7 @@ void fill_dci0(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,
((
DCI0_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
rballoc
=
rballoc
;
((
DCI0_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
rballoc
=
rballoc
;
// hopping = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->hopping;
// hopping = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->hopping;
((
DCI0_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
type
=
0
;
((
DCI0_5MHz_TDD_1_6_t
*
)
dci_pdu
)
->
type
=
0
;
dci_alloc
->
dci_length
=
sizeof_DCI0_5MHz_TDD_1_6_t
;
}
else
{
}
else
{
((
DCI0_5MHz_FDD_t
*
)
dci_pdu
)
->
cqi_req
=
cqi_req
;
((
DCI0_5MHz_FDD_t
*
)
dci_pdu
)
->
cqi_req
=
cqi_req
;
((
DCI0_5MHz_FDD_t
*
)
dci_pdu
)
->
cshift
=
cshift
;
((
DCI0_5MHz_FDD_t
*
)
dci_pdu
)
->
cshift
=
cshift
;
...
@@ -2308,6 +2311,7 @@ void fill_dci0(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,
...
@@ -2308,6 +2311,7 @@ void fill_dci0(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,
((
DCI0_5MHz_FDD_t
*
)
dci_pdu
)
->
rballoc
=
rballoc
;
((
DCI0_5MHz_FDD_t
*
)
dci_pdu
)
->
rballoc
=
rballoc
;
// hopping = ((DCI0_5MHz_FDD_t *)dci_pdu)->hopping;
// hopping = ((DCI0_5MHz_FDD_t *)dci_pdu)->hopping;
((
DCI0_5MHz_FDD_t
*
)
dci_pdu
)
->
type
=
0
;
((
DCI0_5MHz_FDD_t
*
)
dci_pdu
)
->
type
=
0
;
dci_alloc
->
dci_length
=
sizeof_DCI0_5MHz_FDD_t
;
}
}
break
;
break
;
...
@@ -2323,6 +2327,7 @@ void fill_dci0(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,
...
@@ -2323,6 +2327,7 @@ void fill_dci0(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,
((
DCI0_10MHz_TDD_1_6_t
*
)
dci_pdu
)
->
rballoc
=
rballoc
;
((
DCI0_10MHz_TDD_1_6_t
*
)
dci_pdu
)
->
rballoc
=
rballoc
;
// hopping = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->hopping;
// hopping = ((DCI0_10MHz_TDD_1_6_t *)dci_pdu)->hopping;
((
DCI0_10MHz_TDD_1_6_t
*
)
dci_pdu
)
->
type
=
0
;
((
DCI0_10MHz_TDD_1_6_t
*
)
dci_pdu
)
->
type
=
0
;
dci_alloc
->
dci_length
=
sizeof_DCI0_10MHz_TDD_1_6_t
;
}
else
{
}
else
{
((
DCI0_10MHz_FDD_t
*
)
dci_pdu
)
->
cqi_req
=
cqi_req
;
((
DCI0_10MHz_FDD_t
*
)
dci_pdu
)
->
cqi_req
=
cqi_req
;
((
DCI0_10MHz_FDD_t
*
)
dci_pdu
)
->
cshift
=
cshift
;
((
DCI0_10MHz_FDD_t
*
)
dci_pdu
)
->
cshift
=
cshift
;
...
@@ -2332,6 +2337,7 @@ void fill_dci0(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,
...
@@ -2332,6 +2337,7 @@ void fill_dci0(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,
((
DCI0_10MHz_FDD_t
*
)
dci_pdu
)
->
rballoc
=
rballoc
;
((
DCI0_10MHz_FDD_t
*
)
dci_pdu
)
->
rballoc
=
rballoc
;
// hopping = ((DCI0_10MHz_FDD_t *)dci_pdu)->hopping;
// hopping = ((DCI0_10MHz_FDD_t *)dci_pdu)->hopping;
((
DCI0_10MHz_FDD_t
*
)
dci_pdu
)
->
type
=
0
;
((
DCI0_10MHz_FDD_t
*
)
dci_pdu
)
->
type
=
0
;
dci_alloc
->
dci_length
=
sizeof_DCI0_10MHz_FDD_t
;
}
}
break
;
break
;
...
@@ -2347,6 +2353,7 @@ void fill_dci0(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,
...
@@ -2347,6 +2353,7 @@ void fill_dci0(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,
((
DCI0_20MHz_TDD_1_6_t
*
)
dci_pdu
)
->
rballoc
=
rballoc
;
((
DCI0_20MHz_TDD_1_6_t
*
)
dci_pdu
)
->
rballoc
=
rballoc
;
// hopping = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->hopping;
// hopping = ((DCI0_20MHz_TDD_1_6_t *)dci_pdu)->hopping;
((
DCI0_20MHz_TDD_1_6_t
*
)
dci_pdu
)
->
type
=
0
;
((
DCI0_20MHz_TDD_1_6_t
*
)
dci_pdu
)
->
type
=
0
;
dci_alloc
->
dci_length
=
sizeof_DCI0_20MHz_TDD_1_6_t
;
}
else
{
}
else
{
((
DCI0_20MHz_FDD_t
*
)
dci_pdu
)
->
cqi_req
=
cqi_req
;
((
DCI0_20MHz_FDD_t
*
)
dci_pdu
)
->
cqi_req
=
cqi_req
;
((
DCI0_20MHz_FDD_t
*
)
dci_pdu
)
->
cshift
=
cshift
;
((
DCI0_20MHz_FDD_t
*
)
dci_pdu
)
->
cshift
=
cshift
;
...
@@ -2356,6 +2363,7 @@ void fill_dci0(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,
...
@@ -2356,6 +2363,7 @@ void fill_dci0(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,
((
DCI0_20MHz_FDD_t
*
)
dci_pdu
)
->
rballoc
=
rballoc
;
((
DCI0_20MHz_FDD_t
*
)
dci_pdu
)
->
rballoc
=
rballoc
;
// hopping = ((DCI0_20MHz_FDD_t *)dci_pdu)->hopping;
// hopping = ((DCI0_20MHz_FDD_t *)dci_pdu)->hopping;
((
DCI0_20MHz_FDD_t
*
)
dci_pdu
)
->
type
=
0
;
((
DCI0_20MHz_FDD_t
*
)
dci_pdu
)
->
type
=
0
;
dci_alloc
->
dci_length
=
sizeof_DCI0_20MHz_FDD_t
;
}
}
//printf("eNB: rb_alloc (20 MHz dci) %d\n",rballoc);
//printf("eNB: rb_alloc (20 MHz dci) %d\n",rballoc);
...
...
This diff is collapsed.
Click to expand it.
openair1/SCHED/phy_procedures_lte_eNb.c
View file @
55a39eb2
...
@@ -329,7 +329,7 @@ void pdsch_procedures(PHY_VARS_eNB *eNB,
...
@@ -329,7 +329,7 @@ void pdsch_procedures(PHY_VARS_eNB *eNB,
int
input_buffer_length
=
dlsch_harq
->
TBS
/
8
;
int
input_buffer_length
=
dlsch_harq
->
TBS
/
8
;
LTE_DL_FRAME_PARMS
*
fp
=&
eNB
->
frame_parms
;
LTE_DL_FRAME_PARMS
*
fp
=&
eNB
->
frame_parms
;
if
(
frame
<
20
)
{
if
(
frame
<
20
0
)
{
LOG_I
(
PHY
,
LOG_I
(
PHY
,
"[eNB %"
PRIu8
"][PDSCH %"
PRIx16
"/%"
PRIu8
"] Frame %d, subframe %d: Generating PDSCH/DLSCH with input size = %"
PRIu16
", pdsch_start %d, G %d, nb_rb %"
PRIu16
", rb0 %x, rb1 %x, TBS %"
PRIu16
", pmi_alloc %"
PRIx64
", rv %"
PRIu8
" (round %"
PRIu8
")
\n
"
,
"[eNB %"
PRIu8
"][PDSCH %"
PRIx16
"/%"
PRIu8
"] Frame %d, subframe %d: Generating PDSCH/DLSCH with input size = %"
PRIu16
", pdsch_start %d, G %d, nb_rb %"
PRIu16
", rb0 %x, rb1 %x, TBS %"
PRIu16
", pmi_alloc %"
PRIx64
", rv %"
PRIu8
" (round %"
PRIu8
")
\n
"
,
...
@@ -1283,286 +1283,6 @@ void phy_procedures_eNB_TX(PHY_VARS_eNB *eNB,
...
@@ -1283,286 +1283,6 @@ void phy_procedures_eNB_TX(PHY_VARS_eNB *eNB,
}
}
void
process_HARQ_feedback
(
uint8_t
UE_id
,
PHY_VARS_eNB
*
eNB
,
eNB_rxtx_proc_t
*
proc
,
uint8_t
pusch_flag
,
uint8_t
*
pucch_payload
,
uint8_t
pucch_sel
,
uint8_t
SR_payload
)
{
LTE_DL_FRAME_PARMS
*
fp
=&
eNB
->
frame_parms
;
uint8_t
dl_harq_pid
[
8
],
dlsch_ACK
[
8
],
dl_subframe
;
LTE_eNB_DLSCH_t
*
dlsch
=
eNB
->
dlsch
[(
uint32_t
)
UE_id
][
0
];
LTE_eNB_UE_stats
*
ue_stats
=
&
eNB
->
UE_stats
[(
uint32_t
)
UE_id
];
LTE_DL_eNB_HARQ_t
*
dlsch_harq_proc
;
uint8_t
subframe_m4
,
M
,
m
;
int
mp
;
int
all_ACKed
=
1
,
nb_alloc
=
0
,
nb_ACK
=
0
;
int
frame
=
proc
->
frame_rx
;
int
subframe
=
proc
->
subframe_rx
;
int
harq_pid
=
subframe2harq_pid
(
fp
,
frame
,
subframe
);
nfapi_harq_indication_pdu_t
*
pdu
;
if
(
fp
->
frame_type
==
FDD
)
{
//FDD
subframe_m4
=
(
subframe
<
4
)
?
subframe
+
6
:
subframe
-
4
;
dl_harq_pid
[
0
]
=
dlsch
->
harq_ids
[
subframe_m4
];
M
=
1
;
if
(
pusch_flag
==
1
)
{
dlsch_ACK
[
0
]
=
eNB
->
ulsch
[(
uint8_t
)
UE_id
]
->
harq_processes
[
harq_pid
]
->
o_ACK
[
0
];
if
(
dlsch
->
subframe_tx
[
subframe_m4
]
==
1
)
LOG_D
(
PHY
,
"[eNB %d] Frame %d: Received ACK/NAK %d on PUSCH for subframe %d
\n
"
,
eNB
->
Mod_id
,
frame
,
dlsch_ACK
[
0
],
subframe_m4
);
}
else
{
dlsch_ACK
[
0
]
=
pucch_payload
[
0
];
LOG_D
(
PHY
,
"[eNB %d] Frame %d: Received ACK/NAK %d on PUCCH for subframe %d
\n
"
,
eNB
->
Mod_id
,
frame
,
dlsch_ACK
[
0
],
subframe_m4
);
/*
if (dlsch_ACK[0]==0)
AssertFatal(0,"Exiting on NAK on PUCCH\n");
*/
}
// fill ACK/NAK Indication
pdu
=
&
eNB
->
UL_INFO
.
harq_ind
.
harq_pdu_list
[
eNB
->
UL_INFO
.
harq_ind
.
number_of_harqs
];
eNB
->
UL_INFO
.
harq_ind
.
number_of_harqs
++
;
#if defined(MESSAGE_CHART_GENERATOR_PHY)
MSC_LOG_RX_MESSAGE
(
MSC_PHY_ENB
,
MSC_PHY_UE
,
NULL
,
0
,
"%05u:%02u %s received %s rnti %x harq id %u tx SF %u"
,
frame
,
subframe
,
(
pusch_flag
==
1
)
?
"PUSCH"
:
"PUCCH"
,
(
dlsch_ACK
[
0
])
?
"ACK"
:
"NACK"
,
dlsch
->
rnti
,
dl_harq_pid
[
0
],
subframe_m4
);
#endif
}
else
{
// TDD Handle M=1,2 cases only
M
=
ul_ACK_subframe2_M
(
fp
,
subframe
);
// Now derive ACK information for TDD
if
(
pusch_flag
==
1
)
{
// Do PUSCH ACK/NAK first
// detect missing DAI
//FK: this code is just a guess
//RK: not exactly, yes if scheduled from PHICH (i.e. no DCI format 0)
// otherwise, it depends on how many of the PDSCH in the set are scheduled, we can leave it like this,
// but we have to adapt the code below. For example, if only one out of 2 are scheduled, only 1 bit o_ACK is used
dlsch_ACK
[
0
]
=
eNB
->
ulsch
[(
uint8_t
)
UE_id
]
->
harq_processes
[
harq_pid
]
->
o_ACK
[
0
];
dlsch_ACK
[
1
]
=
(
eNB
->
pucch_config_dedicated
[
UE_id
].
tdd_AckNackFeedbackMode
==
bundling
)
?
eNB
->
ulsch
[(
uint8_t
)
UE_id
]
->
harq_processes
[
harq_pid
]
->
o_ACK
[
0
]
:
eNB
->
ulsch
[(
uint8_t
)
UE_id
]
->
harq_processes
[
harq_pid
]
->
o_ACK
[
1
];
}
else
{
// PUCCH ACK/NAK
if
((
SR_payload
==
1
)
&&
(
pucch_sel
!=
2
))
{
// decode Table 7.3 if multiplexing and SR=1
nb_ACK
=
0
;
if
(
M
==
2
)
{
if
((
pucch_payload
[
0
]
==
1
)
&&
(
pucch_payload
[
1
]
==
1
))
// b[0],b[1]
nb_ACK
=
1
;
else
if
((
pucch_payload
[
0
]
==
1
)
&&
(
pucch_payload
[
1
]
==
0
))
nb_ACK
=
2
;
}
else
if
(
M
==
3
)
{
if
((
pucch_payload
[
0
]
==
1
)
&&
(
pucch_payload
[
1
]
==
1
))
nb_ACK
=
1
;
else
if
((
pucch_payload
[
0
]
==
1
)
&&
(
pucch_payload
[
1
]
==
0
))
nb_ACK
=
2
;
else
if
((
pucch_payload
[
0
]
==
0
)
&&
(
pucch_payload
[
1
]
==
1
))
nb_ACK
=
3
;
}
}
else
if
(
pucch_sel
==
2
)
{
// bundling or M=1
dlsch_ACK
[
0
]
=
pucch_payload
[
0
];
dlsch_ACK
[
1
]
=
pucch_payload
[
0
];
}
else
{
// multiplexing with no SR, this is table 10.1
if
(
M
==
1
)
dlsch_ACK
[
0
]
=
pucch_payload
[
0
];
else
if
(
M
==
2
)
{
if
(((
pucch_sel
==
1
)
&&
(
pucch_payload
[
0
]
==
1
)
&&
(
pucch_payload
[
1
]
==
1
))
||
((
pucch_sel
==
0
)
&&
(
pucch_payload
[
0
]
==
0
)
&&
(
pucch_payload
[
1
]
==
1
)))
dlsch_ACK
[
0
]
=
1
;
else
dlsch_ACK
[
0
]
=
0
;
if
(((
pucch_sel
==
1
)
&&
(
pucch_payload
[
0
]
==
1
)
&&
(
pucch_payload
[
1
]
==
1
))
||
((
pucch_sel
==
1
)
&&
(
pucch_payload
[
0
]
==
0
)
&&
(
pucch_payload
[
1
]
==
0
)))
dlsch_ACK
[
1
]
=
1
;
else
dlsch_ACK
[
1
]
=
0
;
}
}
}
}
// handle case where positive SR was transmitted with multiplexing
if
((
SR_payload
==
1
)
&&
(
pucch_sel
!=
2
)
&&
(
pusch_flag
==
0
))
{
nb_alloc
=
0
;
for
(
m
=
0
;
m
<
M
;
m
++
)
{
dl_subframe
=
ul_ACK_subframe2_dl_subframe
(
fp
,
subframe
,
m
);
if
(
dlsch
->
subframe_tx
[
dl_subframe
]
==
1
)
nb_alloc
++
;
}
if
(
nb_alloc
==
nb_ACK
)
all_ACKed
=
1
;
else
all_ACKed
=
0
;
}
for
(
m
=
0
,
mp
=-
1
;
m
<
M
;
m
++
)
{
dl_subframe
=
ul_ACK_subframe2_dl_subframe
(
fp
,
subframe
,
m
);
if
(
dlsch
->
subframe_tx
[
dl_subframe
]
==
1
)
{
if
(
pusch_flag
==
1
)
mp
++
;
else
mp
=
m
;
dl_harq_pid
[
m
]
=
dlsch
->
harq_ids
[
dl_subframe
];
harq_pid_updated
[
UE_id
][
dl_harq_pid
[
m
]]
=
1
;
if
((
pucch_sel
!=
2
)
&&
(
pusch_flag
==
0
))
{
// multiplexing
if
((
SR_payload
==
1
)
&&
(
all_ACKed
==
1
))
dlsch_ACK
[
m
]
=
1
;
else
dlsch_ACK
[
m
]
=
0
;
}
if
(
dl_harq_pid
[
m
]
<
dlsch
->
Mdlharq
)
{
dlsch_harq_proc
=
dlsch
->
harq_processes
[
dl_harq_pid
[
m
]];
#ifdef DEBUG_PHY_PROC
LOG_D
(
PHY
,
"[eNB %d][PDSCH %x/%d] subframe %d, status %d, round %d (rv %d, TBS %d)
\n
"
,
eNB
->
Mod_id
,
dlsch
->
rnti
,
dl_harq_pid
[
m
],
dl_subframe
,
dlsch_harq_proc
->
status
,
dlsch_harq_proc
->
round
,
dlsch
->
harq_processes
[
dl_harq_pid
[
m
]]
->
rvidx
,
dlsch
->
harq_processes
[
dl_harq_pid
[
m
]]
->
TBS
);
if
(
dlsch_harq_proc
->
status
==
DISABLED
)
LOG_E
(
PHY
,
"dlsch_harq_proc is disabled?
\n
"
);
#endif
if
((
dl_harq_pid
[
m
]
<
dlsch
->
Mdlharq
)
&&
(
dlsch_harq_proc
->
status
==
ACTIVE
))
{
// dl_harq_pid of DLSCH is still active
if
(
dlsch_ACK
[
mp
]
==
0
)
{
// Received NAK
#ifdef DEBUG_PHY_PROC
LOG_D
(
PHY
,
"[eNB %d][PDSCH %x/%d] M = %d, m= %d, mp=%d NAK Received in round %d, requesting retransmission
\n
"
,
eNB
->
Mod_id
,
dlsch
->
rnti
,
dl_harq_pid
[
m
],
M
,
m
,
mp
,
dlsch_harq_proc
->
round
);
#endif
T
(
T_ENB_PHY_DLSCH_UE_NACK
,
T_INT
(
eNB
->
Mod_id
),
T_INT
(
frame
),
T_INT
(
subframe
),
T_INT
(
UE_id
),
T_INT
(
dlsch
->
rnti
),
T_INT
(
dl_harq_pid
[
m
]));
if
(
dlsch_harq_proc
->
round
==
0
)
ue_stats
->
dlsch_NAK_round0
++
;
ue_stats
->
dlsch_NAK
[
dl_harq_pid
[
m
]][
dlsch_harq_proc
->
round
]
++
;
// then Increment DLSCH round index
dlsch_harq_proc
->
round
++
;
if
(
dlsch_harq_proc
->
round
==
dlsch
->
Mlimit
)
{
// This was the last round for DLSCH so reset round and increment l2_error counter
#ifdef DEBUG_PHY_PROC
LOG_W
(
PHY
,
"[eNB %d][PDSCH %x/%d] DLSCH retransmissions exhausted, dropping packet
\n
"
,
eNB
->
Mod_id
,
dlsch
->
rnti
,
dl_harq_pid
[
m
]);
#endif
#if defined(MESSAGE_CHART_GENERATOR_PHY)
MSC_LOG_EVENT
(
MSC_PHY_ENB
,
"0 HARQ DLSCH Failed RNTI %"
PRIx16
" round %u"
,
dlsch
->
rnti
,
dlsch_harq_proc
->
round
);
#endif
dlsch_harq_proc
->
round
=
0
;
ue_stats
->
dlsch_l2_errors
[
dl_harq_pid
[
m
]]
++
;
dlsch_harq_proc
->
status
=
SCH_IDLE
;
dlsch
->
harq_ids
[
dl_subframe
]
=
dlsch
->
Mdlharq
;
}
}
else
{
#ifdef DEBUG_PHY_PROC
LOG_D
(
PHY
,
"[eNB %d][PDSCH %x/%d] ACK Received in round %d, resetting process
\n
"
,
eNB
->
Mod_id
,
dlsch
->
rnti
,
dl_harq_pid
[
m
],
dlsch_harq_proc
->
round
);
#endif
T
(
T_ENB_PHY_DLSCH_UE_ACK
,
T_INT
(
eNB
->
Mod_id
),
T_INT
(
frame
),
T_INT
(
subframe
),
T_INT
(
UE_id
),
T_INT
(
dlsch
->
rnti
),
T_INT
(
dl_harq_pid
[
m
]));
ue_stats
->
dlsch_ACK
[
dl_harq_pid
[
m
]][
dlsch_harq_proc
->
round
]
++
;
// Received ACK so set round to 0 and set dlsch_harq_pid IDLE
dlsch_harq_proc
->
round
=
0
;
dlsch_harq_proc
->
status
=
SCH_IDLE
;
dlsch
->
harq_ids
[
dl_subframe
]
=
dlsch
->
Mdlharq
;
ue_stats
->
total_TBS
=
ue_stats
->
total_TBS
+
eNB
->
dlsch
[(
uint8_t
)
UE_id
][
0
]
->
harq_processes
[
dl_harq_pid
[
m
]]
->
TBS
;
/*
ue_stats->total_transmitted_bits = ue_stats->total_transmitted_bits +
eNB->dlsch[(uint8_t)UE_id][0]->harq_processes[dl_harq_pid[m]]->TBS;
*/
}
// Do fine-grain rate-adaptation for DLSCH
if
(
ue_stats
->
dlsch_NAK_round0
>
dlsch
->
error_threshold
)
{
if
(
ue_stats
->
dlsch_mcs_offset
==
1
)
ue_stats
->
dlsch_mcs_offset
=
0
;
else
ue_stats
->
dlsch_mcs_offset
=-
1
;
}
#ifdef DEBUG_PHY_PROC
LOG_D
(
PHY
,
"[process_HARQ_feedback] Frame %d Setting round to %d for pid %d (subframe %d)
\n
"
,
frame
,
dlsch_harq_proc
->
round
,
dl_harq_pid
[
m
],
subframe
);
#endif
harq_pid_round
[
UE_id
][
dl_harq_pid
[
m
]]
=
dlsch_harq_proc
->
round
;
// Clear NAK stats and adjust mcs offset
// after measurement window timer expires
if
(
ue_stats
->
dlsch_sliding_cnt
==
dlsch
->
ra_window_size
)
{
if
((
ue_stats
->
dlsch_mcs_offset
==
0
)
&&
(
ue_stats
->
dlsch_NAK_round0
<
2
))
ue_stats
->
dlsch_mcs_offset
=
1
;
if
((
ue_stats
->
dlsch_mcs_offset
==
1
)
&&
(
ue_stats
->
dlsch_NAK_round0
>
2
))
ue_stats
->
dlsch_mcs_offset
=
0
;
if
((
ue_stats
->
dlsch_mcs_offset
==
0
)
&&
(
ue_stats
->
dlsch_NAK_round0
>
2
))
ue_stats
->
dlsch_mcs_offset
=
-
1
;
if
((
ue_stats
->
dlsch_mcs_offset
==
-
1
)
&&
(
ue_stats
->
dlsch_NAK_round0
<
2
))
ue_stats
->
dlsch_mcs_offset
=
0
;
ue_stats
->
dlsch_NAK_round0
=
0
;
ue_stats
->
dlsch_sliding_cnt
=
0
;
}
}
}
}
}
}
void
prach_procedures
(
PHY_VARS_eNB
*
eNB
,
void
prach_procedures
(
PHY_VARS_eNB
*
eNB
,
#ifdef Rel14
#ifdef Rel14
int
br_flag
int
br_flag
...
@@ -2702,8 +2422,8 @@ void fill_ulsch_cqi_indication(PHY_VARS_eNB *eNB,uint16_t frame,uint8_t subframe
...
@@ -2702,8 +2422,8 @@ void fill_ulsch_cqi_indication(PHY_VARS_eNB *eNB,uint16_t frame,uint8_t subframe
void
fill_ulsch_harq_indication
(
PHY_VARS_eNB
*
eNB
,
LTE_UL_eNB_HARQ_t
*
ulsch_harq
,
uint16_t
rnti
,
int
frame
,
int
subframe
,
int
bundling
)
{
void
fill_ulsch_harq_indication
(
PHY_VARS_eNB
*
eNB
,
LTE_UL_eNB_HARQ_t
*
ulsch_harq
,
uint16_t
rnti
,
int
frame
,
int
subframe
,
int
bundling
)
{
int
UE_id
;
int
UE_id
=
find_dlsch
(
rnti
,
eNB
,
SEARCH_EXIST
)
;
AssertFatal
(
UE_id
>=
0
,
"UE_id doesn't exist
\n
"
);
pthread_mutex_lock
(
&
eNB
->
UL_INFO_mutex
);
pthread_mutex_lock
(
&
eNB
->
UL_INFO_mutex
);
nfapi_harq_indication_pdu_t
*
pdu
=
&
eNB
->
UL_INFO
.
harq_ind
.
harq_pdu_list
[
eNB
->
UL_INFO
.
harq_ind
.
number_of_harqs
];
nfapi_harq_indication_pdu_t
*
pdu
=
&
eNB
->
UL_INFO
.
harq_ind
.
harq_pdu_list
[
eNB
->
UL_INFO
.
harq_ind
.
number_of_harqs
];
...
@@ -2756,7 +2476,7 @@ void fill_ulsch_harq_indication(PHY_VARS_eNB *eNB,LTE_UL_eNB_HARQ_t *ulsch_harq,
...
@@ -2756,7 +2476,7 @@ void fill_ulsch_harq_indication(PHY_VARS_eNB *eNB,LTE_UL_eNB_HARQ_t *ulsch_harq,
void
fill_uci_harq_indication
(
PHY_VARS_eNB
*
eNB
,
LTE_eNB_UCI
*
uci
,
int
frame
,
int
subframe
,
uint8_t
*
harq_ack
,
uint8_t
tdd_mapping_mode
,
uint16_t
tdd_multiplexing_mask
)
{
void
fill_uci_harq_indication
(
PHY_VARS_eNB
*
eNB
,
LTE_eNB_UCI
*
uci
,
int
frame
,
int
subframe
,
uint8_t
*
harq_ack
,
uint8_t
tdd_mapping_mode
,
uint16_t
tdd_multiplexing_mask
)
{
int
UE_id
,
i
;
int
UE_id
=
find_dlsch
(
uci
->
rnti
,
eNB
,
SEARCH_EXIST
)
,
i
;
pthread_mutex_lock
(
&
eNB
->
UL_INFO_mutex
);
pthread_mutex_lock
(
&
eNB
->
UL_INFO_mutex
);
...
...
This diff is collapsed.
Click to expand it.
openair2/LAYER2/MAC/eNB_scheduler_RA.c
View file @
55a39eb2
...
@@ -872,7 +872,7 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
...
@@ -872,7 +872,7 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
lcid
=
0
;
lcid
=
0
;
//
set HARQ process 0 round to 0 for this U
E
//
put HARQ process 0 round to IDL
E
if
(
cc
->
tdd_Config
)
harq_pid
=
((
frameP
*
10
)
+
subframeP
)
%
10
;
if
(
cc
->
tdd_Config
)
harq_pid
=
((
frameP
*
10
)
+
subframeP
)
%
10
;
else
harq_pid
=
((
frameP
*
10
)
+
subframeP
)
&
7
;
else
harq_pid
=
((
frameP
*
10
)
+
subframeP
)
&
7
;
UE_list
->
UE_sched_ctrl
[
UE_id
].
round
[
CC_idP
][
harq_pid
]
=
0
;
UE_list
->
UE_sched_ctrl
[
UE_id
].
round
[
CC_idP
][
harq_pid
]
=
0
;
...
@@ -1010,7 +1010,6 @@ void check_Msg4_retransmission(module_id_t module_idP,int CC_idP,frame_t frameP,
...
@@ -1010,7 +1010,6 @@ void check_Msg4_retransmission(module_id_t module_idP,int CC_idP,frame_t frameP,
// check HARQ status and retransmit if necessary
// check HARQ status and retransmit if necessary
// Get candidate harq_pid from PHY
UE_id
=
find_UE_id
(
module_idP
,
RA_template
->
rnti
);
UE_id
=
find_UE_id
(
module_idP
,
RA_template
->
rnti
);
AssertFatal
(
UE_id
>=
0
,
"Can't find UE for t-crnti
\n
"
);
AssertFatal
(
UE_id
>=
0
,
"Can't find UE for t-crnti
\n
"
);
...
...
This diff is collapsed.
Click to expand it.
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
View file @
55a39eb2
...
@@ -648,7 +648,7 @@ schedule_ue_spec(
...
@@ -648,7 +648,7 @@ schedule_ue_spec(
/* process retransmission */
/* process retransmission */
if
(
round
>
0
)
{
if
(
round
!=
8
)
{
// get freq_allocation
// get freq_allocation
nb_rb
=
UE_list
->
UE_template
[
CC_id
][
UE_id
].
nb_rb
[
harq_pid
];
nb_rb
=
UE_list
->
UE_template
[
CC_id
][
UE_id
].
nb_rb
[
harq_pid
];
...
@@ -760,6 +760,8 @@ schedule_ue_spec(
...
@@ -760,6 +760,8 @@ schedule_ue_spec(
0
// number of beamforming vectors, not used here
0
// number of beamforming vectors, not used here
);
);
LOG_I
(
MAC
,
"Filled NFAPI configuration for DCI/DLSCH %d, retransmission round %d
\n
"
,
eNB
->
pdu_index
[
CC_id
],
round
);
eNB
->
pdu_index
[
CC_id
]
++
;
eNB
->
pdu_index
[
CC_id
]
++
;
program_dlsch_acknak
(
module_idP
,
CC_id
,
UE_id
,
frameP
,
subframeP
,
dl_config_pdu
->
dci_dl_pdu
.
dci_dl_pdu_rel8
.
cce_idx
);
program_dlsch_acknak
(
module_idP
,
CC_id
,
UE_id
,
frameP
,
subframeP
,
dl_config_pdu
->
dci_dl_pdu
.
dci_dl_pdu_rel8
.
cce_idx
);
// No TX request for retransmission (check if null request for FAPI)
// No TX request for retransmission (check if null request for FAPI)
...
@@ -1202,16 +1204,19 @@ schedule_ue_spec(
...
@@ -1202,16 +1204,19 @@ schedule_ue_spec(
dl_config_pdu
->
dci_dl_pdu
.
dci_dl_pdu_rel8
.
redundancy_version_2
=
1
;
dl_config_pdu
->
dci_dl_pdu
.
dci_dl_pdu_rel8
.
redundancy_version_2
=
1
;
if
(
cc
[
CC_id
].
tdd_Config
!=
NULL
)
{
//TDD
if
(
cc
[
CC_id
].
tdd_Config
!=
NULL
)
{
//TDD
dl_config_pdu
->
dci_dl_pdu
.
dci_dl_pdu_rel8
.
downlink_assignment_index
=
(
UE_list
->
UE_template
[
CC_id
][
UE_id
].
DAI
-
1
)
&
3
;
dl_config_pdu
->
dci_dl_pdu
.
dci_dl_pdu_rel8
.
downlink_assignment_index
=
(
UE_list
->
UE_template
[
CC_id
][
UE_id
].
DAI
-
1
)
&
3
;
LOG_D
(
MAC
,
"[eNB %d]
Retransmission CC_id %d : harq_pid %d, roun
d %d, dai %d, mcs %d
\n
"
,
LOG_D
(
MAC
,
"[eNB %d]
Initial transmission CC_id %d : harq_pi
d %d, dai %d, mcs %d
\n
"
,
module_idP
,
CC_id
,
harq_pid
,
round
,
module_idP
,
CC_id
,
harq_pid
,
(
UE_list
->
UE_template
[
CC_id
][
UE_id
].
DAI
-
1
),
(
UE_list
->
UE_template
[
CC_id
][
UE_id
].
DAI
-
1
),
mcs
);
mcs
);
}
else
{
}
else
{
LOG_D
(
MAC
,
"[eNB %d]
Retransmission CC_id %d : harq_pid %d, roun
d %d, mcs %d
\n
"
,
LOG_D
(
MAC
,
"[eNB %d]
Initial transmission CC_id %d : harq_pi
d %d, mcs %d
\n
"
,
module_idP
,
CC_id
,
harq_pid
,
round
,
mcs
);
module_idP
,
CC_id
,
harq_pid
,
mcs
);
}
}
if
(
!
CCE_allocation_infeasible
(
module_idP
,
CC_id
,
1
,
subframeP
,
dl_config_pdu
->
dci_dl_pdu
.
dci_dl_pdu_rel8
.
aggregation_level
,
rnti
))
{
if
(
!
CCE_allocation_infeasible
(
module_idP
,
CC_id
,
1
,
subframeP
,
dl_config_pdu
->
dci_dl_pdu
.
dci_dl_pdu_rel8
.
aggregation_level
,
rnti
))
{
ue_sched_ctl
->
round
[
CC_id
][
harq_pid
]
=
0
;
dl_req
->
number_dci
++
;
dl_req
->
number_dci
++
;
dl_req
->
number_pdu
++
;
dl_req
->
number_pdu
++
;
...
@@ -1256,6 +1261,8 @@ schedule_ue_spec(
...
@@ -1256,6 +1261,8 @@ schedule_ue_spec(
&
eNB
->
pdu_index
[
CC_id
],
&
eNB
->
pdu_index
[
CC_id
],
eNB
->
UE_list
.
DLSCH_pdu
[
CC_id
][
0
][(
unsigned
char
)
UE_id
].
payload
[
harq_pid
]);
eNB
->
UE_list
.
DLSCH_pdu
[
CC_id
][
0
][(
unsigned
char
)
UE_id
].
payload
[
harq_pid
]);
LOG_I
(
MAC
,
"Filled NFAPI configuration for DCI/DLSCH/TXREQ %d, new SDU
\n
"
,
eNB
->
pdu_index
[
CC_id
]);
eNB
->
pdu_index
[
CC_id
]
++
;
eNB
->
pdu_index
[
CC_id
]
++
;
program_dlsch_acknak
(
module_idP
,
CC_id
,
UE_id
,
frameP
,
subframeP
,
dl_config_pdu
->
dci_dl_pdu
.
dci_dl_pdu_rel8
.
cce_idx
);
program_dlsch_acknak
(
module_idP
,
CC_id
,
UE_id
,
frameP
,
subframeP
,
dl_config_pdu
->
dci_dl_pdu
.
dci_dl_pdu_rel8
.
cce_idx
);
...
...
This diff is collapsed.
Click to expand it.
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
View file @
55a39eb2
...
@@ -1636,6 +1636,7 @@ int add_new_ue(module_id_t mod_idP, int cc_idP, rnti_t rntiP,int harq_pidP
...
@@ -1636,6 +1636,7 @@ int add_new_ue(module_id_t mod_idP, int cc_idP, rnti_t rntiP,int harq_pidP
for
(
j
=
0
;
j
<
8
;
j
++
)
{
for
(
j
=
0
;
j
<
8
;
j
++
)
{
UE_list
->
UE_template
[
cc_idP
][
UE_id
].
oldNDI
[
j
]
=
(
j
==
0
)
?
1
:
0
;
// 1 because first transmission is with format1A (Msg4) for harq_pid 0
UE_list
->
UE_template
[
cc_idP
][
UE_id
].
oldNDI
[
j
]
=
(
j
==
0
)
?
1
:
0
;
// 1 because first transmission is with format1A (Msg4) for harq_pid 0
UE_list
->
UE_template
[
cc_idP
][
UE_id
].
oldNDI_UL
[
j
]
=
(
j
==
harq_pidP
)
?
0
:
1
;
// 1st transmission is with Msg3;
UE_list
->
UE_template
[
cc_idP
][
UE_id
].
oldNDI_UL
[
j
]
=
(
j
==
harq_pidP
)
?
0
:
1
;
// 1st transmission is with Msg3;
UE_list
->
UE_sched_ctrl
[
UE_id
].
round
[
cc_idP
][
j
]
=
8
;
}
}
eNB_ulsch_info
[
mod_idP
][
cc_idP
][
UE_id
].
status
=
S_UL_WAITING
;
eNB_ulsch_info
[
mod_idP
][
cc_idP
][
UE_id
].
status
=
S_UL_WAITING
;
...
...
This diff is collapsed.
Click to expand it.
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