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ZhouShuya
OpenXG-RAN
Commits
064b7f23
Commit
064b7f23
authored
5 years ago
by
Raymond Knopp
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generation of CCEIndex > 0 in gNodeB and modification of unscrambling procedure for PDCCH in UE RX.
parent
12b38431
dev
1
128-ues
256_QAM_demod
Fix_SA_SIB1
LTE_TRX_on_single_port
NCTU_OpinConnect_LDPC
NR-PHY-MAC-IF-multi-UE
NRPRACH_highSpeed_saankhya
NRUE_usedlschparallel
NR_10MHz
NR_CSI_reporting
NR_DCI_01
NR_DLUL_PF
NR_DLUL_PF_4UL
NR_DLUL_PF_rebased
NR_DL_MIMO
NR_DL_sched_fixes
NR_DL_scheduler
NR_FAPI_beamindex_SSB_RO
NR_FAPI_beamindex_SSB_RO_SEMPROJ
NR_FDD_FIX
NR_FR2_RA
NR_FR2_RRC_SSB
NR_FR2_initsync_fixes
NR_MAC_CE_GlobalEdge
NR_MAC_Multi_Rach_GlobalEdge
NR_MAC_Multi_Rach_GlobalEdge-old
NR_MAC_SSB
NR_MAC_SSB_RO_GlobalEdge
NR_MAC_SSB_RO_UE_IDCC
NR_MAC_SSB_RO_merge
NR_MAC_TCI_UCI_GlobalEdge
NR_MCS_BLER
NR_NGAP
NR_PDCP_noS1
NR_PUCCH_MultiUE
NR_RA_cleanup
NR_RA_updates
NR_RRCConfiguration
NR_RRCConfiguration_FR2
NR_RRCConfiguration_S1U
NR_RRCConfiguration_sync_source
NR_RRCConfiguration_trx_thread
NR_RRC_CP_bugfix
NR_RRC_PDCP
NR_RRC_PRACH_procedures
NR_RRC_PRACH_procedures_todevelop
NR_RRC_X2AP_AMBR_Change_Global_edge
NR_RRC_X2AP_RemoveHardcodings_GlobalEdge
NR_RRC_config_simplified
NR_RRC_harq
NR_RRC_harq_b
NR_RRC_harq_hacks
NR_RRC_harq_newdcipdu
NR_SA_F1AP_5GRECORDS
NR_SA_F1AP_5GRECORDS_lts
NR_SA_F1AP_RFSIMULATOR
NR_SA_F1AP_RFSIMULATOR2
NR_SA_F1AP_RFSIMULATOR2_SRB
NR_SA_F1AP_RFSIMULATOR3
NR_SA_F1AP_RFSIMULATOR3_tmp
NR_SA_F1AP_RFSIMULATOR3_wf
NR_SA_F1AP_RFSIMULATOR_w5GCN
NR_SA_F1AP_dev
NR_SA_NGAP_RRC
NR_SA_NGAP_RRC_wk42
NR_SA_itti_sim_wk48
NR_SA_itti_sim_wk48_hs
NR_SA_itti_sim_wk48_hs1
NR_SA_w5GCN_new_gtpu
NR_SCHED
NR_SCHED_HARQ
NR_SCHED_PDCCH_PUCCH_HARQ
NR_SCHED_PDCCH_PUCCH_HARQ_rebased
NR_SCHED_fixes
NR_SRB_Config
NR_TRX_on_single_port
NR_TRX_on_single_port2
NR_UE_CONFIG_REQ_FIXES
NR_UE_MAC_scheduler
NR_UE_RA_fixes
NR_UE_SA
NR_UE_UL_DCI_improvements
NR_UE_dlsch_bugfix
NR_UE_enable_parallelization
NR_UE_stability_fixes
NR_UL_FAPI_programming
NR_UL_SCFDMA_100MHz
NR_UL_scheduler
NR_UL_scheduler_rebased
NR_UL_scheduling
NR_Wireshark
NR_beam_simulation
NR_cleanup_PUCCH_resources
NR_gNB_SCF_Indication
NR_ipaccess_testing
NR_mac_uci_functions_rework
NR_msg2_phytest
NR_multiplexing_HARQ_CSI_PUCCH
NR_scheduling_CSIRS
NR_scheduling_request
NR_scheduling_request2
NR_scheduling_request3
NR_test_S1U_RRC_PRACH_procedures
NR_ue_dlsch_dmrs_cdm
PBCHNRTCFIX
PUSCH_TA_update
RA_CI_test
RFquality
Saankhya_NRPRACH_HighSpeed
UE_DL_DCI_hotfix
add-dmrs-test
bch-fixes-bitmap
benetel_5g_prach_fix
benetel_config_file_fix
benetel_driver_uldl_pf_merge
benetel_driver_update
benetel_fixes
benetel_phase_rotation
benetel_phase_rotation_old
bsr-fix
bugfix-free-ra-process
bugfix-minor-remove-wrong-log
bugfix-nr-bands
bugfix-nr-ldpc-post-processing
bugfix-nr-ldpc-size-typo
bugfix-nr-pdcp-sn-size
bugfix-nr-rate-matching-assertion
bugfix-nr-t-reordering
bugfix-x2-SgNBAdditionRequest
bugfix_gnb_rt_stats_html
bupt-sa-merge
cce_indexing_fix
cce_indexing_fix2
ci-deploy-asterix
ci-deploy-docker-compose
ci-new-docker-pipeline
ci-rd-july-improvements
ci-reduce-nb-vms
ci-test
ci-ul-iperf-from-trf-container
ci_benetel_test
ci_phytest
ci_quectel_support
ci_test_nsa_fix_quectel_nic
ci_test_ra_fr2
ci_vm_resource_fix
clean-5G-scope-round2
cleanup_softmodem_main
constant_power
debug_branch_init_sync
detached-w16-test
develop
develop-CBRA-v3
develop-CCE
develop-NR_SA_F1AP_5GRECORDS
develop-NR_SA_F1AP_5GRECORDS-hs
develop-NR_SA_F1AP_5GRECORDS-v3
develop-SA-CBRA
develop-SA-CBRA-CUDU
develop-SA-CBRA-Msg5
develop-SA-CBRA-lts
develop-SA-CBRA-ulsch-lts
develop-SA-RA
develop-SnT
develop-oriecpriupdates
develop-sib1
develop-sib1-local
develop-sib1-lts
develop-sib1-update
develop-sib1-update-test1
develop-sib1-update-ue
develop_inria_ci_deployment
develop_inria_ci_deployment_gp
develop_integration_2020_w15
develop_integration_2020_w19
develop_stable
dfts_alternatives
disable_CSI_measrep
dlsch-all-dlslots
dlsch_encode_mthread
dlsch_parallel
docker-improvements-2021-april
docker-no-cache-option
dongzhanyi-zte-develop
dongzhanyi-zte-develop2
enhance-rfsim
episys-merge
episys/nsa_baseline
episys/nsa_development
extend_sharedlibusage2
fapi_for_dmrs_and_ptrs
feature-4g-sched
feature/make-s1-mme-port-configurable
feature/make-s1-mme-port-configurable-with-astyle-fixes
fembms-enb-ue
fft_bench_hotfix
finalize-oaicn-integration
firas
fix-ci-tun
fix-itti-segv
fix-nr-pdcp-timer
fix-nr-rlc-range-nack
fix-physim-deploy
fix-quectel
fix-realtime
fix-softmodem-restart
fix-warnings
fix-x2-without-gnb
fix_NR_DLUL_PF
fix_NR_DLUL_PF_benchmark
fix_coreset_dmrs_idx
fix_do_ra_data
fix_nr_ulsim
fix_pdsch_low_prb
fix_rb_corruption
fix_reestablishment
fix_rfsim_mimo
fix_rrc_x2_ticking
fixes-CE-RLC-PDU-size
fixes-mac-sched-nfapi
fixes-mac-sched-tun
fixes-tun
fixgtpu
flexran-apps
flexran-repair-mme-mgmt
fujitsu_lte_contribution
fujitsu_lte_contribution-128
git-dashboard
gnb-freerun-txru
gnb-n300-fixes
gnb-only-test
gnb-realtime-hotfix
gnb-realtime-quickfix
gnb-threadpool
hack-exit-gnb-when-no-enb-nsa
harq-hotfix
hotfix-minor-remove-nr-rlc-cppcheck-error
hotfix-nr-rlc-tick
hotfix-ocp-executable
hotfix-ue-musim-compilation
improve_nr_modulation
improve_ue_stability
integ-w13-test-rt-issue
integration_2020_wk15
integration_2020_wk40
integration_2020_wk41
integration_2020_wk42_2
integration_2020_wk45
integration_2020_wk45_2
integration_2020_wk46
integration_2020_wk46_2
integration_2020_wk47
integration_2020_wk48
integration_2020_wk48_2
integration_2020_wk49
integration_2020_wk50
integration_2020_wk50_1
integration_2020_wk51
integration_2020_wk51_2
integration_2021_wk02
integration_2021_wk02_wMR988
integration_2021_wk04
integration_2021_wk05
integration_2021_wk06
integration_2021_wk06_MR978
integration_2021_wk06_b
integration_2021_wk06_c
integration_2021_wk08
integration_2021_wk08_2
integration_2021_wk08_MR963
integration_2021_wk09
integration_2021_wk09_b
integration_2021_wk10
integration_2021_wk10_b
integration_2021_wk11
integration_2021_wk12
integration_2021_wk12_b
integration_2021_wk13_a
integration_2021_wk13_b
integration_2021_wk13_b_fix_tdas
integration_2021_wk13_b_fixed
integration_2021_wk13_c
integration_2021_wk14_a
integration_2021_wk15_a
integration_2021_wk16
integration_2021_wk17_a
integration_2021_wk17_b
integration_2021_wk18_a
integration_2021_wk18_b
integration_2021_wk19
integration_w5GC_CBRA_test
inter-RRU-final
inter-RRU-oairu
inter-rru-UE
itti-enhancement
l2-fixes
ldpc-decoder-codegen
ldpc-decoder-codegen2
ldpc-offload
ldpc_short_codeword_fixes
load_gnb
lte-ulsch-bugfix
lte_uplink_improvement
mac-fixes-wk45_2
migrate-cpp-check-container
minor-fix-doc-basic-sim
mosaic5g-oai-ran
mosaic5g-oai-sim
msg4_phy_0303_lfq
multiple_ssb_sib1_bugfix
nasmesh_kernel_5.8
new-gtpu
new_rlc_2020
nfapi-bugfix
nfapi_nr_arch_mod
nfapi_nr_develop
nfapi_nr_develop_new
ngap-dlul
ngap-support
ngap-w48-merge2
ngap-wf
ngap-wf-1120
ngap-wf-1120-srb
ngap-wf-1120-srb-gtp
ngap-wf-1120-srb-gtp-hs
ngap-wf-1120-srb-gtp-hs1
ngap-wf-1120-srb-gtp-hs2
ngap-wf-1120-srb-gtp-yhz
ngap-wf-1203-yunsdr
ngap-wf-liuyu
ngap_lfq_1120
ngap_merge
noCore
nr-bsr-fix
nr-dl-mimo-2layer
nr-dmrs-fixes
nr-mac-pdu-wireshark
nr-mac-remove-ue-list
nr-pdcp-improvements
nr-pdcp-nea2-security
nr-pdcp-nia2-integrity
nr-pdcp-srb-integrity
nr-ra-fix
nr-rlc-am-bugfix-w44
nr-rlc-bugfix-w44
nr-stats-print
nrPBCHTCFix
nrPbchTcFix
nrUE
nrUE-hs
nrUE-upper-layer
nr_bsr
nr_dl_dmrs_type2
nr_dl_pf
nr_dl_pf2
nr_dl_ul_ptrs
nr_fdd_if_fix
nr_polar_decoder_improvement
nr_power_measurement_fixes
nr_prach_fr2
nr_pucch
nr_pucch2
nr_ue_msg3
nr_ue_pdcp_fix
nr_ue_tti_cleanup
nr_ul_pf
nr_ul_scfdma
nrue-multi-thread
nrue_msg2_reception
nsa-ue
nsa_remove_band_hardcodings
oai-sim
oairu
oairu-dockerfile-support
oc-docker-october-improvements
openxg/develop
pdcp-benchmark
physim-build-deploy
physim-deploy-handle-error-cases
polar8
prb_based_dl_channel_estimation
ptrs_rrc_config
pusch-mthread-scaling-fix
pusch-retrans-fix-ue
ra-dl-ul
recursive-cmake
remove_nos1_hack_pdcp
remove_x2_gnb_hardcoding
repair-TA
revert_memcpy
rh-ci-add-ue-parallelization
rh_ci_add_runtime_stats
rh_ci_add_uldlharq_stats
rh_ci_fix_autoterminate
rh_ci_fr1_update
rh_ci_gsheet_rt_monitoring
rh_ci_nsa2jenkins
rh_ci_nsa_test_n310
rh_ci_oc
rh_ci_phy_test_improve
rh_ci_py
rh_ci_ra_fr2
rh_ci_rfsim_ra
rh_ci_test_benetel
rh_ci_test_nsa
rh_ci_test_nsa_wk16
rh_ci_test_nsa_wk17_b
rh_ci_test_nsa_wk17b
rh_ci_ue_parallel
rh_doc_update_3
rh_fr1_newjenkins
rh_fr1_update
rh_gnb_compile_fix
rh_wk50_debug
rlc-v2-bugfix-status-reporting
rlc-v2-tick
rlc_v2_coverity_fixes
rohan_ulsim2RxFix
rrc-enb-phy-testmode
s1-subnormal_rewrite
s1_subnormal
s1_subnormal-robert
s1ap-bugfix-rab_setup
sa-demo
sa-demo-hs
sa-merge-rrc-srb
sa-msg4
sa-msg4-rrc
sa-msg4-rrc-yihz
sa-msg4-rrc-yihz-hs
sa_rrc_yihz
sanitize-address
sanitize-v1
sanitize-v1-tmp
sarma_pvnp_oai
sim-channels
small-bugfixes-w40
small-config-change
small_nr_bugfixes
smallcleanup
split73
t-gnb-tracer
test-panos
test_nsa_gtpu_fix
test_rt-fix_phy-test
testing_2symb_pdcch
testing_with_external_txdata
tp-ota-test
trx_thread_param
ue-csi
ue-dci-false-detection
ue-fixes
ue-fixes-ota
ue-pdsch-pusch-parallel
ue-race-fix
ue_beam_selection
ue_nfapi_mch
ul-freq-iq-samps-to-file
ul_dl_dci_same_slot
ul_harq
ulsch_decode_mthread
ulsim_changes
usrp_fix_adc_shift_and_pps_sync
usrp_stop_cleanly
usrp_x400
wf-sa-rrc
wireshark-T-hack-ueid
wireshark-log-scheduling-requests
wk11-with-phytest
x2-endc-processing
xiangwab
xiangwan
xw2
yihongzheng_srb
zzs
2021.wk14_a
2021.wk13_d
2021.wk13_c
2021.w18_b
2021.w18_a
2021.w17_b
2021.w16
2021.w15
2021.w14
2021.w13_a
2021.w12
2021.w11
2021.w10
2021.w09
2021.w08
2021.w06
2021.w05
2021.w04
2021.w02
2020.w51_2
2020.w51
2020.w50
2020.w49
2020.w48_2
2020.w48
2020.w47
2020.w46_2
2020.w46
2020.w45_2
2020.w45
2020.w44
2020.w42_2
2020.w42
2020.w41
2020.w39
2020.w38
2020.w37
2020.w36
2020.w34
2020.w33
2020.w31
2020.w30
2020.w29
2020.w28
2020.w26
2020.w25
2020.w24
2020.w23
2020.w22
2020.w19
2020.w17
2020.w16
2020.w15
benetel_phase_rotation
benetel_gnb_rel_2.0
benetel_gnb_rel_1.0
benetel_enb_rel_2.0
benetel_enb_rel_1.0
Changes
5
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5 changed files
with
45 additions
and
22 deletions
+45
-22
openair1/PHY/NR_TRANSPORT/nr_dci.c
openair1/PHY/NR_TRANSPORT/nr_dci.c
+5
-4
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
+32
-15
openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
+1
-1
openair1/SIMULATION/NR_PHY/dlsim.c
openair1/SIMULATION/NR_PHY/dlsim.c
+1
-1
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
+6
-1
No files found.
openair1/PHY/NR_TRANSPORT/nr_dci.c
View file @
064b7f23
...
...
@@ -166,7 +166,7 @@ uint8_t nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
int
k
,
l
,
k_prime
,
dci_idx
,
dmrs_idx
;
/*First iteration: single DCI*/
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu_rel15
;
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu_rel15
=
NULL
;
// find coreset descriptor
...
...
@@ -243,8 +243,8 @@ uint8_t nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
printf
(
"Encoded Payload (length:%d dwords):
\n
"
,
encoded_length
>>
5
);
for
(
int
i
=
0
;
i
<
encoded_length
>>
5
;
i
++
)
printf
(
"[%d]->0x%08x
\t
"
,
i
,
encoder_output
[
i
]);
printf
(
"[%d]->0x%08x
\t
"
,
i
,
encoder_output
[
i
]);
printf
(
"
\n
"
);
#endif
/// Scrambling
...
...
@@ -273,9 +273,10 @@ uint8_t nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
/*Reorder REG list for a freq first mapping*/
uint8_t
nb_regs
=
pdcch_pdu_rel15
->
AggregationLevel
[
d
]
*
NR_NB_REG_PER_CCE
;
uint8_t
reg_idx0
=
pdcch_pdu_rel15
->
CceIndex
[
d
]
*
NR_NB_REG_PER_CCE
;
/*Mapping the encoded DCI along with the DMRS */
for
(
int
reg_idx
=
0
;
reg_idx
<
nb_regs
;
reg_idx
++
)
{
for
(
int
reg_idx
=
reg_idx0
;
reg_idx
<
(
nb_regs
+
reg_idx0
)
;
reg_idx
++
)
{
k
=
cset_start_sc
+
(
12
*
reg_idx
/
cset_nsymb
);
if
(
k
>=
frame_parms
.
ofdm_symbol_size
)
...
...
This diff is collapsed.
Click to expand it.
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
View file @
064b7f23
...
...
@@ -150,7 +150,7 @@ void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
for
(
int
i
=
0
;
i
<
9
;
i
++
)
{
z
[
index_z
+
i
]
=
llr
[
index_llr
+
i
];
LOG_D
DD
(
"[reg=%d,bundle_j=%d] z[%d]=(%d,%d) <->
\t
[f_reg=%d,fbundle_j=%d] llr[%d]=(%d,%d)
\n
"
,
LOG_D
(
PHY
,
"[reg=%d,bundle_j=%d] z[%d]=(%d,%d) <->
\t
[f_reg=%d,fbundle_j=%d] llr[%d]=(%d,%d)
\n
"
,
reg
,
bundle_j
,(
index_z
+
i
),
*
(
int16_t
*
)
&
z
[
index_z
+
i
],
*
(
1
+
(
int16_t
*
)
&
z
[
index_z
+
i
]),
f_reg
,
f_bundle_j
,(
index_llr
+
i
),
*
(
int16_t
*
)
&
llr
[
index_llr
+
i
],
*
(
1
+
(
int16_t
*
)
&
llr
[
index_llr
+
i
]));
}
...
...
@@ -678,7 +678,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
int
n_rb
,
rb_offset
;
get_coreset_rballoc
(
rel15
->
coreset
.
frequency_domain_resource
,
&
n_rb
,
&
rb_offset
);
for
(
int
s
=
rel15
->
coreset
.
StartSymbolIndex
;
s
<
(
rel15
->
coreset
.
StartSymbolIndex
+
rel15
->
coreset
.
duration
);
s
++
)
{
LOG_D
D
(
"in nr_pdcch_extract_rbs_single(rxdataF -> rxdataF_ext || dl_ch_estimates -> dl_ch_estimates_ext)
\n
"
);
LOG_D
(
PHY
,
"in nr_pdcch_extract_rbs_single(rxdataF -> rxdataF_ext || dl_ch_estimates -> dl_ch_estimates_ext)
\n
"
);
nr_pdcch_extract_rbs_single
(
common_vars
->
common_vars_rx_data_per_thread
[
ue
->
current_thread_id
[
slot
]].
rxdataF
,
pdcch_vars
->
dl_ch_estimates
,
...
...
@@ -690,8 +690,8 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
n_rb
,
rel15
->
BWPStart
);
LOG_D
D
(
"we enter nr_pdcch_channel_level(avgP=%d) => compute channel level based on ofdm symbol 0, pdcch_vars[eNB_id]->dl_ch_estimates_ext
\n
"
,
*
avgP
);
LOG_D
D
(
"in nr_pdcch_channel_level(dl_ch_estimates_ext -> dl_ch_estimates_ext)
\n
"
);
LOG_D
(
PHY
,
"we enter nr_pdcch_channel_level(avgP=%d) => compute channel level based on ofdm symbol 0, pdcch_vars[eNB_id]->dl_ch_estimates_ext
\n
"
,
*
avgP
);
LOG_D
(
PHY
,
"in nr_pdcch_channel_level(dl_ch_estimates_ext -> dl_ch_estimates_ext)
\n
"
);
// compute channel level based on ofdm symbol 0
nr_pdcch_channel_level
(
pdcch_vars
->
dl_ch_estimates_ext
,
frame_parms
,
...
...
@@ -710,8 +710,8 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
T
(
T_UE_PHY_PDCCH_ENERGY
,
T_INT
(
0
),
T_INT
(
0
),
T_INT
(
frame
%
1024
),
T_INT
(
slot
),
T_INT
(
avgP
[
0
]),
T_INT
(
avgP
[
1
]),
T_INT
(
avgP
[
2
]),
T_INT
(
avgP
[
3
]));
#endif
LOG_D
D
(
"we enter nr_pdcch_channel_compensation(log2_maxh=%d)
\n
"
,
log2_maxh
);
LOG_D
D
(
"in nr_pdcch_channel_compensation(rxdataF_ext x dl_ch_estimates_ext -> rxdataF_comp)
\n
"
);
LOG_D
(
PHY
,
"we enter nr_pdcch_channel_compensation(log2_maxh=%d)
\n
"
,
log2_maxh
);
LOG_D
(
PHY
,
"in nr_pdcch_channel_compensation(rxdataF_ext x dl_ch_estimates_ext -> rxdataF_comp)
\n
"
);
// compute LLRs for ofdm symbol 0 only
nr_pdcch_channel_compensation
(
pdcch_vars
->
rxdataF_ext
,
pdcch_vars
->
dl_ch_estimates_ext
,
...
...
@@ -722,12 +722,12 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
log2_maxh
,
n_rb
);
// log2_maxh+I0_shift
if
(
frame_parms
->
nb_antennas_rx
>
1
)
{
LOG_D
D
(
"we enter nr_pdcch_detection_mrc(frame_parms->nb_antennas_rx=%d)
\n
"
,
frame_parms
->
nb_antennas_rx
);
LOG_D
(
PHY
,
"we enter nr_pdcch_detection_mrc(frame_parms->nb_antennas_rx=%d)
\n
"
,
frame_parms
->
nb_antennas_rx
);
nr_pdcch_detection_mrc
(
frame_parms
,
pdcch_vars
->
rxdataF_comp
,
s
);
}
LOG_D
D
(
"we enter nr_pdcch_llr(for symbol %d), pdcch_vars[eNB_id]->rxdataF_comp ---> pdcch_vars[eNB_id]->llr
\n
"
,
s
);
LOG_D
D
(
"in nr_pdcch_llr(rxdataF_comp -> llr)
\n
"
);
LOG_D
(
PHY
,
"we enter nr_pdcch_llr(for symbol %d), pdcch_vars[eNB_id]->rxdataF_comp ---> pdcch_vars[eNB_id]->llr
\n
"
,
s
);
LOG_D
(
PHY
,
"in nr_pdcch_llr(rxdataF_comp -> llr)
\n
"
);
nr_pdcch_llr
(
frame_parms
,
pdcch_vars
->
rxdataF_comp
,
pdcch_vars
->
llr
,
...
...
@@ -745,7 +745,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
#endif
}
LOG_D
D
(
"we enter nr_pdcch_demapping_deinterleaving()
\n
"
);
LOG_D
(
PHY
,
"we enter nr_pdcch_demapping_deinterleaving()
\n
"
);
nr_pdcch_demapping_deinterleaving
((
uint32_t
*
)
pdcch_vars
->
llr
,
(
uint32_t
*
)
pdcch_vars
->
e_rx
,
frame_parms
,
...
...
@@ -754,6 +754,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
rel15
->
coreset
.
RegBundleSize
,
rel15
->
coreset
.
InterleaverSize
,
rel15
->
coreset
.
ShiftIndex
);
/*
nr_pdcch_unscrambling(rel15->rnti,
frame_parms,
slot,
...
...
@@ -761,8 +762,9 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
rel15->coreset.duration*n_rb*9*2,
// get_nCCE(n_pdcch_symbols, frame_parms, mi) * 72,
rel15->coreset.pdcch_dmrs_scrambling_id);
LOG_DD
(
"we end nr_pdcch_unscrambling()
\n
"
);
LOG_DD
(
"Ending nr_rx_pdcch() function
\n
"
);
*/
LOG_D
(
PHY
,
"we end nr_pdcch_unscrambling()
\n
"
);
LOG_D
(
PHY
,
"Ending nr_rx_pdcch() function
\n
"
);
}
return
(
0
);
...
...
@@ -798,7 +800,7 @@ void pdcch_scrambling(NR_DL_FRAME_PARMS *frame_parms,
#ifdef NR_PDCCH_DCI_RUN
void
nr_pdcch_unscrambling
(
uint16_t
crnti
,
NR_DL_FRAME_PARMS
*
frame_parms
,
uint8_t
slot
,
int16_t
*
z
,
uint32_t
length
,
uint16_t
pdcch_DMRS_scrambling_id
)
{
int16_t
*
z
,
int16_t
*
z2
,
uint32_t
length
,
uint16_t
pdcch_DMRS_scrambling_id
)
{
int
i
;
uint8_t
reset
;
uint32_t
x1
,
x2
,
s
=
0
;
...
...
@@ -818,7 +820,8 @@ void nr_pdcch_unscrambling(uint16_t crnti, NR_DL_FRAME_PARMS *frame_parms, uint8
reset
=
0
;
}
if
(((
s
>>
(
i
%
32
))
&
1
)
==
1
)
z
[
i
]
=
-
z
[
i
];
if
(((
s
>>
(
i
%
32
))
&
1
)
==
1
)
z2
[
i
]
=
-
z
[
i
];
else
z2
[
i
]
=
z
[
i
];
}
}
...
...
@@ -837,15 +840,29 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
rel15
=
&
pdcch_vars
->
pdcch_config
[
i
];
int
dci_length
=
rel15
->
dci_length
;
int16_t
tmp_e
[
16
*
108
];
for
(
int
j
=
0
;
j
<
rel15
->
number_of_candidates
;
j
++
)
{
LOG_D
(
PHY
,
"Trying DCI candidate %d, CCE %d (%d), L %d
\n
"
,
j
,
rel15
->
CCE
[
j
],
rel15
->
CCE
[
j
]
*
9
*
6
*
2
,
rel15
->
L
[
j
]);
int
CCEind
=
rel15
->
CCE
[
j
];
int
L
=
rel15
->
L
[
j
];
uint64_t
dci_estimation
[
2
]
=
{
0
};
const
t_nrPolar_params
*
currentPtrDCI
=
nr_polar_params
(
1
,
dci_length
,
L
,
1
,
&
ue
->
polarList
);
uint16_t
crc
=
polar_decoder_int16
(
&
pdcch_vars
->
e_rx
[
CCEind
*
9
*
6
*
2
],
nr_pdcch_unscrambling
(
rel15
->
rnti
,
&
ue
->
frame_parms
,
slot
,
&
pdcch_vars
->
e_rx
[
CCEind
*
108
],
tmp_e
,
L
*
108
,
// get_nCCE(n_pdcch_symbols, frame_parms, mi) * 72,
rel15
->
coreset
.
pdcch_dmrs_scrambling_id
);
uint16_t
crc
=
polar_decoder_int16
(
tmp_e
,
dci_estimation
,
1
,
currentPtrDCI
);
LOG_D
(
PHY
,
"Decoded crc %x
\n
"
,
crc
);
if
(
crc
==
rel15
->
rnti
)
{
dci_ind
->
SFN
=
frame
;
dci_ind
->
slot
=
slot
;
...
...
This diff is collapsed.
Click to expand it.
openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
View file @
064b7f23
...
...
@@ -1539,7 +1539,7 @@ uint8_t get_num_pdcch_symbols(uint8_t num_dci,DCI_ALLOC_t *dci_alloc,NR_DL_FRAME
void
pdcch_interleaving
(
NR_DL_FRAME_PARMS
*
frame_parms
,
int32_t
**
z
,
int32_t
**
wbar
,
uint8_t
n_symbols_pdcch
,
uint8_t
mi
);
void
nr_pdcch_unscrambling
(
uint16_t
crnti
,
NR_DL_FRAME_PARMS
*
frame_parms
,
uint8_t
slot
,
int16_t
*
z
,
uint32_t
length
,
uint16_t
pdcch_DMRS_scrambling_id
);
int16_t
*
z
,
int16_t
*
z2
,
uint32_t
length
,
uint16_t
pdcch_DMRS_scrambling_id
);
...
...
This diff is collapsed.
Click to expand it.
openair1/SIMULATION/NR_PHY/dlsim.c
View file @
064b7f23
...
...
@@ -524,7 +524,7 @@ int main(int argc, char **argv)
// common configuration
rrc_mac_config_req_gNB
(
0
,
0
,
1
,
scc
,
0
,
0
,
NULL
);
// UE dedicated configuration
rrc_mac_config_req_gNB
(
0
,
0
,
1
,
NULL
,
1
,
4660
/*secondaryCellGroup->spCellConfig->reconfigurationWithSync->newUE_Identity*/
,
secondaryCellGroup
);
rrc_mac_config_req_gNB
(
0
,
0
,
1
,
NULL
,
1
,
secondaryCellGroup
->
spCellConfig
->
reconfigurationWithSync
->
newUE_Identity
,
secondaryCellGroup
);
phy_init_nr_gNB
(
gNB
,
0
,
0
);
N_RB_DL
=
gNB
->
frame_parms
.
N_RB_DL
;
// stub to configure frame_parms
...
...
This diff is collapsed.
Click to expand it.
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
View file @
064b7f23
...
...
@@ -49,9 +49,14 @@ void fill_dci_search_candidates(NR_SearchSpace_t *ss,fapi_nr_dl_config_dci_dl_pd
LOG_D
(
MAC
,
"Filling search candidates for DCI
\n
"
);
rel15
->
number_of_candidates
=
1
;
rel15
->
number_of_candidates
=
3
;
rel15
->
CCE
[
0
]
=
0
;
rel15
->
L
[
0
]
=
4
;
rel15
->
CCE
[
1
]
=
4
;
rel15
->
L
[
1
]
=
4
;
rel15
->
CCE
[
2
]
=
8
;
rel15
->
L
[
2
]
=
4
;
}
void
ue_dci_configuration
(
NR_UE_MAC_INST_t
*
mac
,
fapi_nr_dl_config_request_t
*
dl_config
,
int
frame
,
int
slot
)
{
...
...
This diff is collapsed.
Click to expand it.
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