Commit 318c4e0f authored by Robert Schmidt's avatar Robert Schmidt

Skip DL HARQ feedbacks if the timing does not match

As the precedent commit, this commit deals with the realtime problems
that we currently have on the CI bench.

For DL HARQ feedback, nFAPI does not give us the HARQ process ID.
Instead, we have to figure this out "from timing", i.e., if we trigger
PUCCH reception, we will get a message with HARQ if we instructed the
PHY to do so. If we have real-time problems, it seems (I cannot verify:
don't have real time problems) that we do not get the nFAPI message with
HARQ feedback. Thus, we need to skip the HARQ processes that should have
been processed in the past, which happens in this commit.
parent f23890e0
dev Fix_SA_SIB1 NRPRACH_highSpeed_saankhya NRUE_usedlschparallel NR_10MHz NR_DLUL_PF NR_DLUL_PF_4UL NR_DL_MIMO NR_FAPI_beamindex_SSB_RO NR_FAPI_beamindex_SSB_RO_SEMPROJ NR_FDD_FIX NR_FR2_initsync_fixes NR_MAC_Multi_Rach_GlobalEdge NR_MAC_SSB NR_MAC_TCI_UCI_GlobalEdge NR_MCS_BLER NR_SA_F1AP_5GRECORDS NR_SA_F1AP_5GRECORDS_lts NR_SA_F1AP_RFSIMULATOR3 NR_SA_F1AP_RFSIMULATOR3_tmp NR_SA_F1AP_RFSIMULATOR_w5GCN NR_SA_w5GCN_new_gtpu NR_UE_CONFIG_REQ_FIXES NR_UE_SA NR_cleanup_PUCCH_resources NR_multiplexing_HARQ_CSI_PUCCH NR_scheduling_CSIRS NR_scheduling_request PBCHNRTCFIX RFquality Saankhya_NRPRACH_HighSpeed add-dmrs-test benetel_config_file_fix benetel_driver_update benetel_fixes bsr-fix bugfix-free-ra-process bugfix-nr-t-reordering bugfix_gnb_rt_stats_html ci-new-docker-pipeline ci-reduce-nb-vms ci_benetel_test ci_phytest ci_quectel_support ci_test_nsa_fix_quectel_nic ci_test_ra_fr2 ci_vm_resource_fix detached-w16-test develop develop-CBRA-v3 develop-CCE develop-NR_SA_F1AP_5GRECORDS develop-NR_SA_F1AP_5GRECORDS-hs develop-NR_SA_F1AP_5GRECORDS-v3 develop-SA-CBRA develop-SA-CBRA-CUDU develop-SA-CBRA-Msg5 develop-SA-CBRA-lts develop-SA-CBRA-ulsch-lts develop-SA-RA disable_CSI_measrep docker-improvements-2021-april docker-no-cache-option enhance-rfsim episys-merge episys/nsa_baseline episys/nsa_development fft_bench_hotfix fix-nr-pdcp-timer fix-nr-rlc-range-nack fix-physim-deploy fix-quectel fix-realtime fix-x2-without-gnb fix_NR_DLUL_PF fix_NR_DLUL_PF_benchmark fix_coreset_dmrs_idx fix_nr_ulsim fix_rb_corruption fix_reestablishment fixgtpu git-dashboard gnb-freerun-txru gnb-n300-fixes gnb-realtime-hotfix gnb-realtime-quickfix gnb-threadpool hack-exit-gnb-when-no-enb-nsa integ-w13-test-rt-issue integration_2020_wk15 integration_2021_wk06 integration_2021_wk06_MR978 integration_2021_wk06_b integration_2021_wk06_c integration_2021_wk08 integration_2021_wk08_2 integration_2021_wk08_MR963 integration_2021_wk09 integration_2021_wk09_b integration_2021_wk10 integration_2021_wk10_b integration_2021_wk11 integration_2021_wk12 integration_2021_wk12_b integration_2021_wk13_a integration_2021_wk13_b integration_2021_wk13_b_fix_tdas integration_2021_wk13_b_fixed integration_2021_wk13_c integration_2021_wk14_a integration_2021_wk15_a integration_2021_wk16 integration_2021_wk17_a integration_2021_wk17_b integration_2021_wk18_a integration_2021_wk18_b integration_2021_wk19 integration_w5GC_CBRA_test inter-RRU-final migrate-cpp-check-container msg4_phy_0303_lfq multiple_ssb_sib1_bugfix new-gtpu nfapi_nr_arch_mod nfapi_nr_develop_new nr-bsr-fix nr-dl-mimo-2layer nr-dmrs-fixes nr-pdcp-improvements nr-pdcp-nea2-security nr-pdcp-nia2-integrity nr-pdcp-srb-integrity nr-ra-fix nr-stats-print nrPBCHTCFix nrPbchTcFix nr_power_measurement_fixes nr_ue_pdcp_fix oairu physim-build-deploy physim-deploy-handle-error-cases prb_based_dl_channel_estimation ptrs_rrc_config recursive-cmake rh_ci_add_runtime_stats rh_ci_add_uldlharq_stats rh_ci_gsheet_rt_monitoring rh_ci_nsa2jenkins rh_ci_nsa_test_n310 rh_ci_phy_test_improve rh_ci_test_benetel rh_ci_test_nsa rh_ci_test_nsa_wk16 rh_ci_test_nsa_wk17_b rh_ci_test_nsa_wk17b rohan_ulsim2RxFix s1_subnormal sanitize-address sanitize-v1 sanitize-v1-tmp sarma_pvnp_oai sim-channels small_nr_bugfixes t-gnb-tracer test-panos test_nsa_gtpu_fix test_rt-fix_phy-test ue-dci-false-detection ue-pdsch-pusch-parallel ue-race-fix usrp_stop_cleanly usrp_x400 wf-sa-rrc wk11-with-phytest xw2 2021.wk14_a 2021.wk13_d 2021.wk13_c 2021.w18_b 2021.w18_a 2021.w17_b 2021.w16 2021.w15 2021.w14 2021.w13_a 2021.w12 2021.w11 2021.w10 2021.w09 2021.w08 2021.w06 benetel_gnb_rel_2.0 benetel_gnb_rel_1.0 benetel_enb_rel_2.0 benetel_enb_rel_1.0
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......@@ -336,14 +336,27 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id,
for (int harq_bit = 0; harq_bit < uci_01->harq->num_harq; harq_bit++) {
const uint8_t harq_value = uci_01->harq->harq_list[harq_bit].harq_value;
const uint8_t harq_confidence = uci_01->harq->harq_confidence_level;
const int8_t pid = sched_ctrl->feedback_dl_harq.head;
const int feedback_slot = (slot - 1 + num_slots) % num_slots;
/* In case of realtime problems: we can only identify a HARQ process by
* timing. If the HARQ process's feedback_slot is not the one we
* expected, we assume that processing has been aborted and we need to
* skip this HARQ process, which is what happens in the loop below. If
* you don't experience real-time problems, you might simply revert the
* commit that introduced these changes. */
int8_t pid = sched_ctrl->feedback_dl_harq.head;
DevAssert(pid >= 0);
while (sched_ctrl->harq_processes[pid].feedback_slot != feedback_slot) {
LOG_W(MAC,
"expected feedback slot %d, but found %d instead\n",
sched_ctrl->harq_processes[pid].feedback_slot,
feedback_slot);
remove_front_nr_list(&sched_ctrl->feedback_dl_harq);
handle_dl_harq(mod_id, UE_id, pid, 0);
pid = sched_ctrl->feedback_dl_harq.head;
DevAssert(pid >= 0);
}
remove_front_nr_list(&sched_ctrl->feedback_dl_harq);
NR_UE_harq_t *harq = &sched_ctrl->harq_processes[pid];
const int feedback_slot = (slot - 1 + num_slots) % num_slots;
AssertFatal(harq->feedback_slot == feedback_slot,
"expected feedback slot %d, but found %d instead\n",
harq->feedback_slot, feedback_slot);
DevAssert(harq->is_waiting);
handle_dl_harq(mod_id, UE_id, pid, harq_value == 1 && harq_confidence == 0);
}
......@@ -374,14 +387,28 @@ void handle_nr_uci_pucch_2_3_4(module_id_t mod_id,
// iterate over received harq bits
for (int harq_bit = 0; harq_bit < uci_234->harq.harq_bit_len; harq_bit++) {
const int acknack = ((uci_234->harq.harq_payload[harq_bit >> 3]) >> harq_bit) & 0x01;
const int8_t pid = sched_ctrl->feedback_dl_harq.head;
const int feedback_slot = (slot - 1 + num_slots) % num_slots;
/* In case of realtime problems: we can only identify a HARQ process by
* timing. If the HARQ process's feedback_slot is not the one we
* expected, we assume that processing has been aborted and we need to
* skip this HARQ process, which is what happens in the loop below. If
* you don't experience real-time problems, you might simply revert the
* commit that introduced these changes. */
int8_t pid = sched_ctrl->feedback_dl_harq.head;
DevAssert(pid >= 0);
while (sched_ctrl->harq_processes[pid].feedback_slot != feedback_slot) {
LOG_W(MAC,
"expected feedback slot %d, but found %d instead\n",
sched_ctrl->harq_processes[pid].feedback_slot,
feedback_slot);
remove_front_nr_list(&sched_ctrl->feedback_dl_harq);
handle_dl_harq(mod_id, UE_id, pid, 0);
pid = sched_ctrl->feedback_dl_harq.head;
DevAssert(pid >= 0);
}
remove_front_nr_list(&sched_ctrl->feedback_dl_harq);
NR_UE_harq_t *harq = &sched_ctrl->harq_processes[pid];
const int feedback_slot = (slot - 1 + num_slots) % num_slots;
AssertFatal(harq->feedback_slot == feedback_slot,
"expected feedback slot %d, but found %d instead\n",
harq->feedback_slot, feedback_slot);
DevAssert(harq->is_waiting);
handle_dl_harq(mod_id, UE_id, pid, uci_234->harq.harq_crc != 1 && acknack);
}
}
......
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