Commit 56c66c09 authored by Cedric Roux's avatar Cedric Roux

- Fix: avoid infinite loop on mulitcast read thread if no data to read

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git-svn-id: http://svn.eurecom.fr/openair4G/trunk@4000 818b1a75-f10b-46b9-bf7c-635c3b92a50f
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The OpenAirInterface software is composed of four different parts:
openair1: 3GPP LTE Rel-8 PHY layer + PHY RF simulation
openair2: 3GPP LTE Rel-9 RLC/MAC/PDCP and two RRC implementations
openair3: some networking scripts
openairITS: IEEE 802.11p software modem (all layers)
targets: scripts to compile and lauch different system targets (simulation, emulation and real-time platforms, user-space tools for these platforms (tbd))
see README files in these subdirectories for more information
see also https://twiki.eurecom.fr/twiki/bin/view/OpenAirInterface/WebHome
.
#!/bin/sh
echo "building ctags for openair1 and openair2 ..."
ctags -e -R --exclude=openair3 --exclude=openair1/DOCS --exclude=openair2/DOCS --exclude=openair2/RRC/CELLULAR --exclude=openair2/NAS/DRIVER/CELLULAR --exclude=openair2/SIMULATION --exclude=openairITS
export OPENAIR_HOME=$(pwd)
export OPENAIR1_DIR=$OPENAIR_HOME/openair1
export OPENAIR2_DIR=$OPENAIR_HOME/openair2
export OPENAIR3_DIR=$OPENAIR_HOME/openair3
export OPENAIR_TARGETS=$OPENAIR_HOME/targets
alias oai='cd $OPENAIR_HOME'
alias oai0='cd $OPENAIR0_DIR'
alias oai1='cd $OPENAIR1_DIR'
alias oai2='cd $OPENAIR2_DIR'
alias oai3='cd $OPENAIR3_DIR'
alias oait='cd $OPENAIR_TARGETS'
alias oaiu='cd $OPENAIR2_DIR/UTIL'
alias oais='cd $OPENAIR_TARGETS/SIMU/USER'
alias oaiex='cd $OPENAIR_TARGETS/SIMU/EXAMPLES'
CCC = gcc
KERNEL_MAIN_TYPE=$(shell echo `uname -r | cut -d. -f-2 | tr "." "_"`)
export KERNEL_MAIN_TYPE
SUBVERSION=$(shell echo `grep '^SUBLEVEL =' /usr/src/linux/Makefile | sed -e 's, ,,g' | sed -e 's/SUBLEVEL=//'`)
IS_KERNEL_SUBVERSION_GREATER_THAN_20=$(shell if [ $(SUBVERSION) -ge 20 ] ; then echo true ; fi)
GRPCI_SOFTCONFIG_H=grpci_softconfig.h
GRPCI_SOFTREGS_H=grpci_softregs.h
TOP_DIR = ../../..
OPENAIR1_TOP = ../../..
OPENAIR2_TOP = ../../../../openair2
OPENAIR3_TOP = ../../../../openair3
ifdef RTAI
# Get the RTAI variables
CCC = $(shell rtai-config --cc)
RTAI_SUBVERSION=$(shell rtai-config --version | sed -e 's/^..\(.\).*$$/\1/')
IS_RTAI_SUBVERSION_LESS_THAN_FIVE=$(shell if [ $(RTAI_SUBVERSION) -lt 5 ] ; then echo true ; fi)
EXTRA_CFLAGS = -D__IN_RTAI__ $(shell rtai-config --module-cflags) -ggdb -march=pentium4 -DNODE_RG -DBIGPHYSAREA -DRTAI -DRTAI_ENABLED $(if $(IS_KERNEL_SUBVERSION_GREATER_THAN_20),-mregparm=3 -fno-stack-protector,) -D__KERNEL__ -DMODULE -D_LOOSE_KERNEL_NAMES -DWIDENS_DLC -I/lib/modules/$(shell uname -r)/build/include -I/lib/modules/$(shell uname -r)/build/include/asm/mach-default -include /lib/modules/$(shell uname -r)/build/include/linux/autoconf.h $(if $(IS_RTAI_SUBVERSION_LESS_THAN_FIVE),-DRTAI_ISNT_POSIX,)
endif
GCCVERSION = $(shell gcc --version | grep ^gcc | sed 's/^.* //g')
ifeq "$(GCCVERSION)" "4.4.3"
EXTRA_CFLAGS += -Wno-packed-bitfield-compat
endif
ifeq "$(GCCVERSION)" "4.5.2"
EXTRA_CFLAGS += -Wno-packed-bitfield-compat
endif
EXTRA_CFLAGS += -DKERNEL$(KERNEL_MAIN_TYPE)
#-DOLD_REMAP
# Old for 2.6.20
#EXTRA_CFLAGS += -Wall -Wstrict-prototypes -fno-common -fno-strict-aliasing -pipe -fno-strength-reduce -mmmx -msse -msse2 -falign-loops=2 -falign-jumps=2 -falign-functions=2 -DCPU=686 -DMODULE -D_LOOSE_KERNEL_NAMES -O2
#EXTRA_CFLAGS += -Wall -Wstrict-prototypes -fno-common -fno-strict-aliasing -fno-unit-at-a-time -march=i686 -fno-strength-reduce -fno-exceptions -pipe -mmmx -msse -msse2 -falign-loops=2 -falign-jumps=2 -falign-functions=2 -fno-strict-aliasing -fno-common -ffreestanding -fomit-frame-pointer -nostdinc -DMODULE -D_LOOSE_KERNEL_NAMES -O2
#EXTRA_CFLAGS += -Wstrict-prototypes -fno-common -fno-strict-aliasing -pipe -mpreferred-stack-boundary=4 -freg-struct-return -ffreestanding -maccumulate-outgoing-args -funroll-loops -march=i686 -fomit-frame-pointer -nostdinc -O2
EXTRA_CFLAGS += -fno-common -fno-strict-aliasing -pipe -mpreferred-stack-boundary=4 -freg-struct-return -ffreestanding -maccumulate-outgoing-args -funroll-loops -march=i686 -nostdinc -O2
SSE3PROC = $(shell echo `grep ssse3 /proc/cpuinfo`)
#SSE4PROC = $(shell echo `grep sse4 /proc/cpuinfo`)
CPUFLAGS = -mmmx -msse -msse2 -m32
CPUFLAGS += $(shell if [ -z $(SSE3PROC)]; then echo "" ; else echo "-mssse3"; fi)
#CPUFLAGS += $(shell if [ -z $(SSE4PROC)]; then echo "" ; else echo "-msse4"; fi)
EXTRA_CFLAGS += $(CPUFLAGS)
EXTRA_CFLAGS += -DMAC_CONTEXT -DPHY_CONTEXT -DPC_TARGET -DPC_DSP
ifdef DEBUG_PHY
EXTRA_CFLAGS += -DDEBUG_PHY
endif
ifdef NO_CARD_TEST
EXTRA_CFLAGS += -DNOCARD_TEST
endif
ifeq ($(EMOS),1)
EXTRA_CFLAGS += -DEMOS
endif
ifdef DUALSTREAM
EXTRA_CFLAGS += -DDUALSTREAM
endif
ifdef BIT8_TX
EXTRA_CFLAGS += -DBIT8_TX
endif
ifdef IDROMEL_RF
EXTRA_CFLAGS += -DNB_ANTENNAS_RX=2 -DNB_ANTENNAS_TX=1 -DNB_ANTENNAS_TXRX=2
else
EXTRA_CFLAGS += -DNB_ANTENNAS_RX=2 -DNB_ANTENNAS_TX=2 -DNB_ANTENNAS_TXRX=2
endif
ifdef CBMIMO1
EXTRA_CFLAGS += -DCBMIMO1
endif
ifeq ($(FIRMWARE2010),1)
EXTRA_CFLAGS += -DIFFT_FPGA -DIFFT_FPGA_UE -DOFDMA_ULSCH -DHW_PREFIX_REMOVAL
else
EXTRA_CFLAGS += -DFW2011 -DPUCCH
endif
ifeq ($(OPENAIR_LTE),1)
EXTRA_CFLAGS += -DOPENAIR_LTE
endif
ifeq ($(OPENAIR1),1)
EXTRA_CFLAGS += -DDLSCH_THREAD -DOPENAIR1
endif
ifeq ($(OPENAIR2),1)
EXTRA_CFLAGS += -DOPENAIR2
endif
EXTRA_CFLAGS += -I/usr/include -I/usr/realtime/include
EXTRA_CFLAGS += -I$(OPENAIR1_DIR)
EXTRA_CFLAGS += -DEMIT_ASN_DEBUG=0
include $(OPENAIR1_DIR)/SCHED/Makefile.inc
include $(OPENAIR1_DIR)/PHY/Makefile.inc
#ifeq ($(OPENAIR2),1)
include $(OPENAIR2_DIR)/LAYER2/Makefile.inc
#else
include $(OPENAIR1_DIR)/MAC_INTERFACE/Makefile.inc
#endif
EXTRA_CFLAGS += $(subst $(OPENAIR2_TOP), $(OPENAIR2_DIR), $(L2_incl))
include $(OPENAIR2_DIR)/UTIL/Makefile.inc
EXTRA_CFLAGS += $(subst $(OPENAIR2_TOP), $(OPENAIR2_DIR), $(UTIL_incl))
ccflags-y += $(EXTRA_CFLAGS)
EXTRA_CFLAGS= ""
include $(OPENAIR2_DIR)/RRC/LITE/MESSAGES/Makefile.inc
obj-m += openair_rf.o
# Device driver
openair_rf-objs += $(OPENAIR1_TOP)/ARCH/COMMON/bigphys.o
openair_rf-objs += $(OPENAIR1_TOP)/ARCH/COMMON/reserve_mem.o
#openair_rf-objs += $(OPENAIR1_TOP)/ARCH/COMMON/amp.o
openair_rf-objs += cbmimo1_device.o cbmimo1_rf_cntl.o cbmimo1_init.o cbmimo1_dma.o cbmimo1_get_frame.o cbmimo1_fileops.o fifo_printf.o cbmimo1_proc.o exmimo_fw.o
#openair_rf-objs += cbmimo1_generate_ofdm.o cbmimo1_generate_fs4.o
# MAC Interface
#openair_rf-objs += $(OPENAIR1_TOP)/MAC_INTERFACE/register.o
#openair_rf-objs += $(OPENAIR1_TOP)/MAC_INTERFACE/init.o
# Sched
ifeq ($(FIRMWARE2010),1)
openair_rf-objs += $(OPENAIR1_TOP)/SCHED/sched_lte.o
else
#openair_rf-objs += $(OPENAIR1_TOP)/SCHED/sched_lte_fw2011.o
openair_rf-objs += $(OPENAIR1_TOP)/SCHED/sched_lte_user.o
endif
ifeq ($(OPENAIR1),1)
openair_rf-objs += $(OPENAIR1_TOP)/SCHED/sched_dlsch.o
endif
# Init
openair_rf-objs += $(OPENAIR1_TOP)/PHY/INIT/init_top.o
openair_rf-objs += $(OPENAIR1_TOP)/PHY/INIT/lte_parms.o
# Tools
openair_rf-objs += $(OPENAIR1_TOP)/PHY/TOOLS/memory_routines.o
openair_rf-objs += $(OPENAIR1_TOP)/PHY/TOOLS/fft.o
openair_rf-objs += $(OPENAIR1_TOP)/SIMULATION/TOOLS/taus.o
#include files for MODEM
ifeq ($(OPENAIR1),1)
openair_rf-objs += $(SCHED_OBJS)
openair_rf-objs += $(PHY_OBJS)
endif
#include files for OPENAIR2
ifeq ($(OPENAIR2),1)
openair_rf-objs += $(L2_OBJS)
openair_rf-objs += $(LIST_OBJ)
openair_rf-objs += $(TIMER_OBJ)
openair_rf-objs += $(MEM_OBJ)
else
openair_rf-objs += $(MAC_XFACE_OBJS)
endif
#openair_rf-objs += $(LOG_DIR)/log.o
openair_rf_cbmimo1_softmodem.ko:
(cd $(OPENAIR1_TOP) ; make openair_rf_cbmimo1_softmodem.ko)
oai_user_cbmimo1.ko:
(cd $(OPENAIR1_TOP) ; make oai_user_cbmimo1.ko)
oai_user_exmimo:
(cd $(OPENAIR1_TOP) ; make oai_user_exmimo.ko)
test:
echo $(openair_rf-objs)
echo $(obj-m)
# echo $(CFLAGS)
echo $(ccflags-y) #echo$(EXTRA_CFLAGS)
clean:
rm -f $(openair_rf-objs) $(obj-m)
rm -f openair_rf.mod.c .*.cmd *.o modules.order Module.symvers
rm -rf .tmp_versions/
ultraclean: clean
rm -f *.ko
CCC = gcc
KERNEL_MAIN_TYPE=$(shell echo `uname -r | cut -d. -f-2 | tr "." "_"`)
export KERNEL_MAIN_TYPE
SUBVERSION=$(shell echo `grep '^SUBLEVEL =' /usr/src/linux/Makefile | sed -e 's, ,,g' | sed -e 's/SUBLEVEL=//'`)
IS_KERNEL_SUBVERSION_GREATER_THAN_20=$(shell if [ $(SUBVERSION) -ge 20 ] ; then echo true ; fi)
GRPCI_SOFTCONFIG_H=grpci_softconfig.h
GRPCI_SOFTREGS_H=grpci_softregs.h
TOP_DIR = .
OPENAIR1_TOP = .
OPENAIR2_TOP = ../openair2
OPENAIR3_TOP = ../openair3
ifdef RTAI
# Get the RTAI variables
CCC = $(shell rtai-config --cc)
RTAI_SUBVERSION=$(shell rtai-config --version | sed -e 's/^..\(.\).*$$/\1/')
IS_RTAI_SUBVERSION_LESS_THAN_FIVE=$(shell if [ $(RTAI_SUBVERSION) -lt 5 ] ; then echo true ; fi)
EXTRA_CFLAGS = -D__IN_RTAI__ $(shell rtai-config --module-cflags) -g -march=pentium4 -DNODE_RG -DBIGPHYSAREA -DRTAI -DRTAI_ENABLED $(if $(IS_KERNEL_SUBVERSION_GREATER_THAN_20),-mregparm=3 -fno-stack-protector,) -DHW_PREFIX_REMOVAL -Wall -D__KERNEL__ -DMODULE -D_LOOSE_KERNEL_NAMES -DWIDENS_DLC -I/lib/modules/$(shell uname -r)/build/include -I/lib/modules/$(shell uname -r)/build/include/asm/mach-default -include /lib/modules/$(shell uname -r)/build/include/linux/autoconf.h $(if $(IS_RTAI_SUBVERSION_LESS_THAN_FIVE),-DRTAI_ISNT_POSIX,)
endif
EXTRA_CFLAGS += -DKERNEL$(KERNEL_MAIN_TYPE)
#-DOLD_REMAP
# Old for 2.6.20
#EXTRA_CFLAGS += -Wall -Wstrict-prototypes -fno-common -fno-strict-aliasing -pipe -fno-strength-reduce -mmmx -msse -msse2 -falign-loops=2 -falign-jumps=2 -falign-functions=2 -DCPU=686 -DMODULE -D_LOOSE_KERNEL_NAMES -O2
#EXTRA_CFLAGS += -Wall -Wstrict-prototypes -fno-common -fno-strict-aliasing -fno-unit-at-a-time -march=i686 -fno-strength-reduce -fno-exceptions -pipe -mmmx -msse -msse2 -falign-loops=2 -falign-jumps=2 -falign-functions=2 -fno-strict-aliasing -fno-common -ffreestanding -fomit-frame-pointer -nostdinc -DMODULE -D_LOOSE_KERNEL_NAMES -O2
EXTRA_CFLAGS += -Wall -Wstrict-prototypes -fno-common -fno-strict-aliasing -pipe -mpreferred-stack-boundary=4 -freg-struct-return -ffreestanding -maccumulate-outgoing-args -funroll-loops -march=i686 -fomit-frame-pointer -nostdinc -O2
SSE3PROC = $(shell echo `grep ssse3 /proc/cpuinfo`)
SSE4PROC = $(shell echo `grep sse4 /proc/cpuinfo`)
CPUFLAGS = -mmmx -msse -msse2 -m32
CPUFLAGS += $(shell if [ -z $(SSE3PROC)]; then echo "" ; else echo "-mssse3"; fi)
CPUFLAGS += $(shell if [ -z $(SSE4PROC)]; then echo "" ; else echo "-msse4"; fi)
EXTRA_CFLAGS += $(CPUFLAGS)
EXTRA_CFLAGS += -DMAX_MODULES=1 -DNO_RRM -DMAC_CONTEXT -DPHY_CONTEXT -DPC_TARGET -DPC_DSP -UDLSCH_THREAD -DPHY_ABSTRACTION
ifdef DEBUG_PHY
EXTRA_CFLAGS += -DDEBUG_PHY
endif
ifdef NO_CARD_TEST
EXTRA_CFLAGS += -DNOCARD_TEST
endif
ifeq ($(EMOS),1)
EXTRA_CFLAGS += -DEMOS
endif
ifdef DUALSTREAM
EXTRA_CFLAGS += -DDUALSTREAM
endif
ifndef NO_TXMUX
EXTRA_CFLAGS += -DBIT8_TXMUX -DBIT8_TX
endif
ifdef IDROMEL_RF
EXTRA_CFLAGS += -DNB_ANTENNAS_RX=2 -DNB_ANTENNAS_TX=1 -DNB_ANTENNAS_TXRX=2
else
EXTRA_CFLAGS += -DNB_ANTENNAS_RX=2 -DNB_ANTENNAS_TX=2 -DNB_ANTENNAS_TXRX=2
endif
ifdef CBMIMO1
EXTRA_CFLAGS += -DCBMIMO1
endif
ifeq ($(OPENAIR_LTE),1)
EXTRA_CFLAGS += -DOPENAIR_LTE -DIFFT_FPGA -DIFFT_FPGA_UE -DOFDMA_ULSCH
endif
EXTRA_CFLAGS += -I$(OPENAIR1_DIR) -I$(OPENAIR2_DIR) -I$(OPENAIR2_DIR)/COMMON -I$(OPENAIR2_DIR)/LAYER2/MAC -I$(OPENAIR2_DIR)/LAYER2/PDCP -I$(OPENAIR2_DIR)/LAYER2/RLC -I$(OPENAIR2_DIR)/LAYER2/RLC/AM -I$(OPENAIR2_DIR)/LAYER2/RLC/TM -I$(OPENAIR2_DIR)/LAYER2/RLC/UM_v9.3.0 -I$(OPENAIR2_DIR)/PHY_INTERFACE -I$(OPENAIR2_DIR)/RRC/L2_INTERFACE -I$(OPENAIR2_DIR)/RRC/LITE -I$(OPENAIR2_DIR)/RRC/LITE/MESSAGES -I$(OPENAIR2_DIR)/UTIL/LISTS -I$(OPENAIR2_DIR)/UTIL/LOG -I$(OPENAIR2_DIR)/UTIL/MATH -I$(OPENAIR2_DIR)/UTIL/MEM -I$(OPENAIR2_DIR)/UTIL/TIMER -I/usr/include -I$(OPENAIR3_DIR)/MESH
include $(OPENAIR1_DIR)/SCHED/Makefile.inc
include $(OPENAIR1_DIR)/PHY/Makefile.inc
ifeq ($(OPENAIR2),1)
include $(OPENAIR2_DIR)/LAYER2/Makefile.inc
include $(OPENAIR2_DIR)/RRC/LITE/MESSAGES/Makefile.inc
else
include $(OPENAIR1_DIR)/MAC_INTERFACE/Makefile.inc
endif
obj-m += openair_rf.o
# Device driver
openair_rf-objs += $(OPENAIR1_TOP)/ARCH/COMMON/bigphys.o
openair_rf-objs += $(OPENAIR1_TOP)/ARCH/COMMON/reserve_mem.o
#openair_rf-objs += $(OPENAIR1_TOP)/ARCH/COMMON/amp.o
openair_rf-objs += $(OPENAIR1_TOP)/ARCH/CBMIMO1/DEVICE_DRIVER/cbmimo1_device.o
openair_rf-objs += $(OPENAIR1_TOP)/ARCH/CBMIMO1/DEVICE_DRIVER/cbmimo1_rf_cntl.o
openair_rf-objs += $(OPENAIR1_TOP)/ARCH/CBMIMO1/DEVICE_DRIVER/cbmimo1_init.o
openair_rf-objs += $(OPENAIR1_TOP)/ARCH/CBMIMO1/DEVICE_DRIVER/cbmimo1_dma.o
openair_rf-objs += $(OPENAIR1_TOP)/ARCH/CBMIMO1/DEVICE_DRIVER/cbmimo1_get_frame.o
openair_rf-objs += $(OPENAIR1_TOP)/ARCH/CBMIMO1/DEVICE_DRIVER/cbmimo1_fileops.o
openair_rf-objs += $(OPENAIR1_TOP)/ARCH/CBMIMO1/DEVICE_DRIVER/fifo_printf.o
openair_rf-objs += $(OPENAIR1_TOP)/ARCH/CBMIMO1/DEVICE_DRIVER/cbmimo1_proc.o
#openair_rf-objs += cbmimo1_generate_ofdm.o cbmimo1_generate_fs4.o
# MAC Interface
#openair_rf-objs += $(OPENAIR1_TOP)/MAC_INTERFACE/register.o
#openair_rf-objs += $(OPENAIR1_TOP)/MAC_INTERFACE/init.o
openair_rf-objs += $(MAC_XFACE_OBJS)
# Sched
openair_rf-objs += $(OPENAIR1_TOP)/SCHED/sched_lte.o
#openair_rf-objs += $(OPENAIR1_TOP)/SCHED/sched_dlsch.o
# Init
openair_rf-objs += $(OPENAIR1_TOP)/PHY/INIT/init_top.o
# Tools
openair_rf-objs += $(OPENAIR1_TOP)/PHY/TOOLS/memory_routines.o
openair_rf-objs += $(OPENAIR1_TOP)/PHY/TOOLS/fft.o
openair_rf-objs += $(OPENAIR1_TOP)/SIMULATION/TOOLS/taus.o
#include files for MODEM
ifeq ($(OPENAIR1),1)
openair_rf-objs += $(SCHED_OBJS)
openair_rf-objs += $(PHY_OBJS)
endif
#include files for OPENAIR2
ifeq ($(OPENAIR2),1)
openair_rf-objs += $(L2_OBJS)
#openair_rf-objs += $(ASN1_MSG_OBJS)
endif
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#ifndef OPENAIR_DEVICE_H
#define OPENAIR_DEVICE_H
#define XILINX_VENDOR 0x10ee
#define XILINX_ID 0x0007
#define GRLIB_VENDOR 0x16e3
#define GRLIB_ID 0x0210
#define openair_MAJOR 127
//#define openair_writeb(val,port) pci_config_writel(); //{writeb((ucchar)(val),(ulong)(port)); mb();}
//#define openair_writew(val,port) //{writew((ushort)(val),(ulong)(port)); mb();}
#define openair_writel(dev,offset,val) pci_write_config_dword(dev,(int)offset,(unsigned int)val)//{writel((uclong)(val),(ulong)(port)); mb();}
#define openair_readl(dev,offset,val) pci_read_config_dword(dev,(int)offset,(unsigned int*)val)//{writel((uclong)(val),(ulong)(port)); mb();}
//#define openair_readb(port) readb(port)
//#define openair_readw(port) readw(port)
//#define openair_readl(port) readl(port)
#define openair_IOC_MAGIC 'm'
#define openair_TEST_FPGA _IOR(openair_IOC_MAGIC,1,int)
#define openair_START_1ARY_CLUSTERHEAD _IOR(openair_IOC_MAGIC,2,int)
#define openair_START_2ARY_CLUSTERHEAD _IOR(openair_IOC_MAGIC,3,int)
#define openair_START_NODE _IOR(openair_IOC_MAGIC,4,int)
#define openair_STOP _IOR(openair_IOC_MAGIC,5,int)
#define openair_GET_BUFFER _IOR(openair_IOC_MAGIC,6,int)
#define openair_GET_CONFIG _IOR(openair_IOC_MAGIC,7,int)
#define openair_GET_VARS _IOR(openair_IOC_MAGIC,8,int)
#define openair_SET_TX_GAIN _IOR(openair_IOC_MAGIC,9,int)
#define openair_SET_RX_GAIN _IOR(openair_IOC_MAGIC,10,int)
#define openair_SET_LO_FREQ _IOR(openair_IOC_MAGIC,11,int)
#define openair_START_FS4_TEST _IOR(openair_IOC_MAGIC,12,int)
#define openair_START_OFDM_TEST _IOR(openair_IOC_MAGIC,13,int)
#define openair_START_QAM16_TEST _IOR(openair_IOC_MAGIC,14,int)
#define openair_START_QPSK_TEST _IOR(openair_IOC_MAGIC,15,int)
#define openair_START_IQ_IMPULSES_TEST _IOR(openair_IOC_MAGIC,16,int)
#define openair_START_REAL_FS4_WITH_DC_TEST _IOR(openair_IOC_MAGIC,17,int)
#define openair_DUMP_CONFIG _IOR(openair_IOC_MAGIC,18,int)
#define openair_RX_RF_MODE _IOR(openair_IOC_MAGIC,19,int)
#define openair_SET_TCXO_DAC _IOR(openair_IOC_MAGIC,20,int)
#define openair_GET_PHASE_ESTIMATE _IOR(openair_IOC_MAGIC,21,int)
#define openair_DO_SYNCH _IOR(openair_IOC_MAGIC,22,int)
#define openair_GET_SIGNALS _IOR(openair_IOC_MAGIC,23,int)
#define openair_SET_FFT_SCALE _IOR(openair_IOC_MAGIC,24,int)
#define openair_FFT_TEST _IOR(openair_IOC_MAGIC,25,int)
#define openair_START_CHANSOUNDER _IOR(openair_IOC_MAGIC,26,int)
#define openair_SET_CALIBRATED_RX_GAIN _IOR(openair_IOC_MAGIC,27,int)
#define openair_START_TX_SIG _IOR(openair_IOC_MAGIC,28,int)
/* 5 new ioctls for control of new RF prototype chain (K. Khalfallah, March 2007) */
/* Non posted ioctls (generate an Irq to Leon processor) */
#define openair_NEWRF_ADF4108_WRITE_REG _IOR(openair_IOC_MAGIC,29,int)
#define openair_NEWRF_ADF4108_INIT _IOR(openair_IOC_MAGIC,30,int)
#define openair_NEWRF_LFSW190410_WRITE_KHZ _IOR(openair_IOC_MAGIC,31,int)
#define openair_NEWRF_RF_SWITCH_CTRL _IOR(openair_IOC_MAGIC,32,int)
#define openair_NEWRF_SETTX_SWITCH_GAIN _IOR(openair_IOC_MAGIC,33,int)
#define openair_NEWRF_SETRX_SWITCH_GAIN _IOR(openair_IOC_MAGIC,34,int)
/* Posted ioctls (DO NOT generate an Irq to Leon processor - so its firmware
* should intentionally read back their parameter-values for the corresponding
* action to complete). */
#define openair_NEWRF_ADF4108_WRITE_REG_POSTED _IOR(openair_IOC_MAGIC,35,int)
#define openair_NEWRF_LFSW190410_WRITE_KHZ_POSTED _IOR(openair_IOC_MAGIC,36,int)
#define openair_NEWRF_RF_SWITCH_CTRL_POSTED _IOR(openair_IOC_MAGIC,37,int)
#define openair_NEWRF_SETTX_SWITCH_GAIN_POSTED _IOR(openair_IOC_MAGIC,38,int)
#define openair_NEWRF_SETRX_SWITCH_GAIN_POSTED _IOR(openair_IOC_MAGIC,39,int)
#define openair_UPDATE_FIRMWARE _IOR(openair_IOC_MAGIC,40,int)
// fkalten 25.9.07 this should enable the recording in multiuser mode
#define openair_START_EMOS_NODEB _IOR(openair_IOC_MAGIC,41,int)
#define openair_config_topology _IOR(openair_IOC_MAGIC,42,int)
#define openair_stop_emulation _IOR(openair_IOC_MAGIC,43,int)
// fkalten 11.4.08 set the timing advance
#define openair_SET_TIMING_ADVANCE _IOR(openair_IOC_MAGIC,44,int)
// rknopp 27.08.08 for AgileRF tests
#define openair_START_TX_SIG_NO_OFFSET _IOR(openair_IOC_MAGIC,45,int)
// fkalten+ghozzi 6.4.09 for cognitive operation
#define openair_START_1ARY_CLUSTERHEAD_COGNITIVE _IOR(openair_IOC_MAGIC,46,int)
//fkalten 22.4.09
#define openair_SET_RX_MODE _IOR(openair_IOC_MAGIC,47,int)
// fkalten 9.12.09
#define openair_SET_FREQ_OFFSET _IOR(openair_IOC_MAGIC,48,int)
#define openair_GET_BIGPHYSTOP _IOR(openair_IOC_MAGIC,49,int)
#define openair_SET_UE_DL_MCS _IOR(openair_IOC_MAGIC,50,int)
#define openair_SET_UE_UL_MCS _IOR(openair_IOC_MAGIC,51,int)
#define openair_SET_UE_UL_NB_RB _IOR(openair_IOC_MAGIC,52,int)
#define openair_SET_DLSCH_RATE_ADAPTATION _IOR(openair_IOC_MAGIC,53,int)
#define openair_SET_DLSCH_TRANSMISSION_MODE _IOR(openair_IOC_MAGIC,54,int)
#define openair_SET_ULSCH_ALLOCATION_MODE _IOR(openair_IOC_MAGIC,55,int)
#define openair_SET_RRC_CONN_SETUP _IOR(openair_IOC_MAGIC,56,int)
#define openair_SET_COOPERATION_FLAG _IOR(openair_IOC_MAGIC,57,int)
#define openair_SET_RX_OFFSET _IOR(openair_IOC_MAGIC,58,int)
#define openair_START_LXRT _IOR(openair_IOC_MAGIC,59,int)
#define openair_GET_PCI_INTERFACE _IOR(openair_IOC_MAGIC,60,int)
#define openair_MAXNR 60
#define uclong unsigned int
#define ucshort unsigned short
#define ucchar unsigned char
#define MMAP_SIZE
/* ---------------------------------------------------------------------- */
#define TEST_FAILURE_ADC_MEM -1000
#define TEST_FAILURE_DAC_MEM -1001
#define TEST_FAILURE_DMA -1002
/* Behold: Added directly in (and only in!) R. Knopp's account
(K. Khalfallah, May 10th, 2007) */
#define GRPCI_IOCONFIG_CTRL0 0x60
#define GRPCI_IOCONFIG_CTRL1 0x64
#define GRPCI_IOCONFIG_CTRL2 0x68
#define GRPCI_IOCONFIG_CTRL3 0x6c
#define NO_INFINITE_ACK_LOOP (~0)
/* Update firmware commands */
#define UPDATE_FIRMWARE_TRANSFER_BLOCK 0x1
#define UPDATE_FIRMWARE_CLEAR_BSS 0x2
#define UPDATE_FIRMWARE_START_EXECUTION 0x3
#define UPDATE_FIRMWARE_FORCE_REBOOT 0x4
#define UPDATE_FIRMWARE_TEST_GOK 0x5
#endif /* OPENAIR_DEVICE_H */
#ifndef USER_MODE
#define __NO_VERSION__
//#include "rt_compat.h"
#endif
#include "cbmimo1_device.h"
#include "defs.h"
#include "extern.h"
#include "cbmimo1_pci.h"
#include "SCHED/defs.h"
#include "SCHED/extern.h"
#include "from_grlib_softconfig.h"
#include "from_grlib_softregs.h"
/*
int openair_get_adac_cnt(void) {
#ifndef NOCARD_TEST
// return openair_readl(bar[0]+REG_BAR+ADAC_CNT);
#else
return(0);
#endif
}
*/
int openair_dma(unsigned char card_id,unsigned int cmd) {
#ifndef NOCARD_TEST
int i;
int res;
unsigned int val;
if (vid != XILINX_VENDOR) {
openair_readl(pdev[card_id],FROM_GRLIB_CFG_GRPCI_EUR_CTRL_OFFSET,&res);
// printk("[openair][DMA] cmd %d\n",cmd);
if ((res & FROM_GRLIB_IRQ_FROM_PCI) != 0) {
printk("[openair][DMA] Error: cmd %x, Leon IRQ active\n", cmd);
return -1;
}
//printk("[openair][DMA] cmd %x on card %d\n",cmd,card_id);
//openair_writel(cmd,bar[0]+REG_BAR+DMA_CMD); // arms DMA
openair_writel(pdev[card_id], FROM_GRLIB_CFG_GRPCI_EUR_CTRL_OFFSET, ((cmd & FROM_GRLIB_IRQ_FROM_PCI_MASK) | FROM_GRLIB_IRQ_FROM_PCI));
// openair_writel(PCI_INTR_VAL,bar[0]+REG_BAR+PCI_INTR_OFF); // trigger interrupt
// openair_writel(PCI_INTR_VAL,PCI_INTR_OFF);
// printk("[openair][DMA] cmd %d done \n",cmd);
return 0;
}
else { // ExpressMIMO
// printk("Sending command to ExpressMIMO : %x\n",cmd);
//write cmd to be executed by
iowrite32(cmd,(bar[0]+0x04));
// printk("Readback of control1 %x\n",ioread32(bar[0]+0x4));
val = ioread32(bar[0]);
// set interrupt bit to trigger LEON interrupt
iowrite32(val|0x1,bar[0]);
// printk("Readback of control0 %x\n",ioread32(bar[0]));
}
#endif //NOCARD_TEST
}
This diff is collapsed.
#ifndef USER_MODE
#define __NO_VERSION__
//#include "rt_compat.h"
#endif
#include "cbmimo1_device.h"
#include "defs.h"
#include "extern.h"
#include "cbmimo1_pci.h"
#include "SCHED/defs.h"
#include "SCHED/extern.h"
#include "PHY/defs.h"
#include "PHY/extern.h"
#include "from_grlib_softconfig.h"
#include "from_grlib_softregs.h"
#ifdef IFFT_FPGA
void openair_generate_fs4(unsigned char IQ_imb) {
int i,j;
for (i=0;i<120;i++) {
for (j=0; j<300; j++) {
((mod_sym_t*)TX_DMA_BUFFER[0][0])[300*i+j] = 0;
((mod_sym_t*)TX_DMA_BUFFER[0][1])[300*i+j] = 0;
}
((mod_sym_t*)TX_DMA_BUFFER[0][0])[300*i+127] = 148; // corresponds to 2^14 in mod_table
((mod_sym_t*)TX_DMA_BUFFER[0][1])[300*i+127] = 148; // corresponds to 2^14 in mod_table
}
}
#else
void openair_generate_fs4(unsigned char IQ_imb) {
int i,j;
#ifndef BIT8_TXMUX
unsigned int pQ = 0x7fff-IQ_imb,mQ=0x8001+IQ_imb;
#else
unsigned char pQ = 0x7f-IQ_imb,mQ=0x81+IQ_imb;
#endif
for (i=0;i<FRAME_LENGTH_COMPLEX_SAMPLES_NO_PREFIX;i+=4) {
#ifdef BIT8_TXMUX
((unsigned int *)TX_DMA_BUFFER[0][0])[i] = (0x007f<<16) | (0x007f);
((unsigned int *)TX_DMA_BUFFER[0][0])[i+1] = (pQ<<24) | (pQ<<8);
((unsigned int *)TX_DMA_BUFFER[0][0])[i+2] = (0x0081<<16) | (0x0081);
((unsigned int *)TX_DMA_BUFFER[0][0])[i+3] = (mQ<<24) | (mQ<<8);
#else
((unsigned int *)TX_DMA_BUFFER[0][0])[i] = 0x7fff;
((unsigned int *)TX_DMA_BUFFER[0][0])[i+1] = (pQ<<16);
((unsigned int *)TX_DMA_BUFFER[0][0])[i+2] = 0x8001;
((unsigned int *)TX_DMA_BUFFER[0][0])[i+3] = mQ<<16;
#endif
}
}
#endif
#ifndef USER_MODE
#define __NO_VERSION__
//#include "rt_compat.h"
#endif
#include "defs.h"
#include "extern.h"
#include "cbmimo1_pci.h"
#include "SCHED/defs.h"
#include "SCHED/extern.h"
#include "PHY/defs.h"
#include "PHY/extern.h"
#ifndef OPENAIR_LTE
#include "PHY/TRANSPORT/defs.h"
#endif
#include "from_grlib_softconfig.h"
#include "from_grlib_softregs.h"
void openair_generate_ofdm() {
unsigned char dummy_mac_pdu[1024];
#ifndef OPENAIR_LTE
phy_generate_chbch(0,0,NB_ANTENNAS_TX,dummy_mac_pdu);
#endif
}
#ifndef USER_MODE
#define __NO_VERSION__
//#include "rt_compat.h"
#endif
#include "defs.h"
#include "extern.h"
#include "cbmimo1_pci.h"
#include "SCHED/defs.h"
#include "SCHED/extern.h"
#include "from_grlib_softconfig.h"
#include "from_grlib_softregs.h"
void openair_get_frame(unsigned char card_id) {
openair_dma(card_id,FROM_GRLIB_IRQ_FROM_PCI_IS_ACQ_GET_FRAME);
}
#ifndef USER_MODE
#define __NO_VERSION__
//#include "rt_compat.h"
#endif
#include "cbmimo1_device.h"
#include "defs.h"
#include "extern.h"
#include "cbmimo1_pci.h"
#include "SCHED/defs.h"
#include "SCHED/extern.h"
#include "from_grlib_softconfig.h"
#include "from_grlib_softregs.h"
#ifdef RTAI_ENABLED
#include "PHY/defs.h"
#include "PHY/extern.h"
#endif //RTAI_ENABLED
/*
#ifdef RTAI_ENABLED
//------------------------------------------------------------------------------
int create_rt_fifo(int rt_fifoP, int sizeP) {
//------------------------------------------------------------------------------
rtf_destroy(rt_fifoP);
switch (rtf_create(rt_fifoP, sizeP)) {
case -ENODEV:
printk("[WCDMA][ERROR] create_rt_fifo() %d fifo is greater than or equal to RTF_NO\n", rt_fifoP);
return -ENODEV;
break;
case -EBUSY:
printk("[WCDMA][ERROR] create_rt_fifo() %d fifo is already in use. Choose a different ID\n", rt_fifoP);
return -EBUSY;
break;
case -ENOMEM:
printk("[WCDMA][ERROR] create_rt_fifo() %d bytes could not be allocated for the RT-FIFO %d\n", sizeP, rt_fifoP);
return -ENOMEM;
break;
case 0:
printk("[WCDMA] RT-FIFO %d CREATED\n", rt_fifoP);
rtf_flush(rt_fifoP);
return rt_fifoP; // not necessary, but...
break;
default:
printk("[WCDMA] create_rt_fifo() returned ???\n");
return -1;
}
}
#endif //RTAI_ENABLED
*/
//------------------------------------------------------------------------------
int setup_regs(unsigned char card_id, LTE_DL_FRAME_PARMS *frame_parms) {
//------------------------------------------------------------------------------
int i;
#ifdef RTAI_ENABLED
#ifndef NOCARD_TEST
if (vid != XILINX_VENDOR) {
for (i=0;i<NB_ANTENNAS_RX;i++) {
pci_interface[card_id]->adc_head[i] = (unsigned int)virt_to_phys((volatile void*)RX_DMA_BUFFER[card_id][i]);
}
for (i=0;i<NB_ANTENNAS_TX;i++){
pci_interface[card_id]->dac_head[i] = (unsigned int)virt_to_phys((volatile void*)TX_DMA_BUFFER[card_id][i]);
}
#ifndef FW2011
pci_interface[card_id]->ofdm_symbols_per_frame = NUMBER_OF_SYMBOLS_PER_FRAME;
//printk("[openair][INIT] NUMBER_OF_SYMBOLS_PER_FRAME = %d\n",pci_interface[card_id]->ofdm_symbols_per_frame);
pci_interface[card_id]->log2_ofdm_symbol_size = LOG2_NUMBER_OF_OFDM_CARRIERS;
pci_interface[card_id]->cyclic_prefix_length = CYCLIC_PREFIX_LENGTH;
//printk("[openair][INIT] CYCLIC_PREFIX_LENGTH = %d\n",card_id,pci_interface[card_id]->cyclic_prefix_length);
#endif
pci_interface[card_id]->samples_per_frame = FRAME_LENGTH_COMPLEX_SAMPLES;
printk("[openair][INIT] samples_per_frame = %d\n",pci_interface[card_id]->samples_per_frame);
#ifndef FW2011
pci_interface[card_id]->tx_rx_switch_point = openair_daq_vars.tx_rx_switch_point;
#else
pci_interface[card_id]->tdd_config = frame_parms->tdd_config;
#endif
pci_interface[card_id]->timing_advance = openair_daq_vars.timing_advance;
pci_interface[card_id]->dual_tx = frame_parms->dual_tx;
pci_interface[card_id]->tdd = frame_parms->frame_type;
pci_interface[card_id]->node_id = frame_parms->node_id;
printk("[openair][INIT] node_id %d, dual_tx %d, tdd %d, tdd_config %d\n",frame_parms->node_id, frame_parms->dual_tx, frame_parms->frame_type, frame_parms->tdd_config );
pci_interface[card_id]->freq_info = openair_daq_vars.freq_info;
//printk("[openair][INIT] freq0 = %d, freq1 = %d\n",(pci_interface[card_id]->freq_info>>1)&3,(pci_interface[card_id]->freq_info>>3)&3);
pci_interface[card_id]->rx_rf_mode = openair_daq_vars.rx_rf_mode;
pci_interface[card_id]->rx_gain_val = openair_daq_vars.rx_gain_val;
pci_interface[card_id]->tcxo_dac = openair_daq_vars.tcxo_dac;
pci_interface[card_id]->mast_flag = (card_id==0)? 1 : 0;
}
else {
exmimo_pci_interface->framing.eNB_flag = (frame_parms->node_id==0) ? 1 : 0;
exmimo_pci_interface->framing.tdd = frame_parms->frame_type;
exmimo_pci_interface->framing.tdd_config = frame_parms->tdd_config;
printk("exmimo_pci_interface->frameing.eNB_flag = %d\n",exmimo_pci_interface->framing.eNB_flag);
for (i=0;i<NB_ANTENNAS_RX;i++) {
exmimo_pci_interface->rf.adc_head[i] = (unsigned int)virt_to_phys((volatile void*)RX_DMA_BUFFER[card_id][i]);
printk("exmimo_pci_interface->rf.adc_head[%d] = %x\n",i,exmimo_pci_interface->rf.adc_head[i]);
}
for (i=0;i<NB_ANTENNAS_TX;i++){
exmimo_pci_interface->rf.dac_head[i] = (unsigned int)virt_to_phys((volatile void*)TX_DMA_BUFFER[card_id][i]);
}
printk("Freq %d,%d,%d,%d, Gain %d,%d,%d,%d, RFmode %d, RXDC %d, RF_local %d, rf_vcocal %d\n",
frame_parms->carrier_freq[0],frame_parms->carrier_freq[1],frame_parms->carrier_freq[2],frame_parms->carrier_freq[3],
frame_parms->rxgain[0],frame_parms->rxgain[1],frame_parms->rxgain[2],frame_parms->rxgain[3],
frame_parms->rfmode[0],frame_parms->rflocal[0],
frame_parms->rxdc[0],frame_parms->rfvcolocal[0]);
exmimo_pci_interface->rf.rf_freq_rx0 = frame_parms->carrier_freq[0];
exmimo_pci_interface->rf.rf_freq_tx0 = frame_parms->carrier_freqtx[0];
exmimo_pci_interface->rf.rx_gain00 = frame_parms->rxgain[0];
exmimo_pci_interface->rf.tx_gain00 = frame_parms->txgain[0];
exmimo_pci_interface->rf.rf_freq_rx1 = frame_parms->carrier_freq[1];
exmimo_pci_interface->rf.rf_freq_tx1 = frame_parms->carrier_freqtx[1];
exmimo_pci_interface->rf.rx_gain10 = frame_parms->rxgain[1];
exmimo_pci_interface->rf.tx_gain10 = frame_parms->txgain[1];
exmimo_pci_interface->rf.rf_freq_rx2 = frame_parms->carrier_freq[2];
exmimo_pci_interface->rf.rf_freq_tx2 = frame_parms->carrier_freqtx[2];
exmimo_pci_interface->rf.rx_gain20 = frame_parms->rxgain[2];
exmimo_pci_interface->rf.tx_gain20 = frame_parms->txgain[2];
exmimo_pci_interface->rf.rf_freq_rx3 = frame_parms->carrier_freq[3];
exmimo_pci_interface->rf.rf_freq_tx3 = frame_parms->carrier_freqtx[3];
exmimo_pci_interface->rf.rx_gain30 = frame_parms->rxgain[3];
exmimo_pci_interface->rf.tx_gain30 = frame_parms->txgain[3];
exmimo_pci_interface->rf.rf_mode0 = frame_parms->rfmode[0];
exmimo_pci_interface->rf.rf_local0 = frame_parms->rflocal[0];
exmimo_pci_interface->rf.rf_rxdc0 = frame_parms->rxdc[0];
exmimo_pci_interface->rf.rf_vcocal0 = frame_parms->rfvcolocal[0];
exmimo_pci_interface->rf.rf_mode1 = frame_parms->rfmode[1];
exmimo_pci_interface->rf.rf_local1 = frame_parms->rflocal[1];
exmimo_pci_interface->rf.rf_rxdc1 = frame_parms->rxdc[1];
exmimo_pci_interface->rf.rf_vcocal1 = frame_parms->rfvcolocal[1];
exmimo_pci_interface->rf.rf_mode2 = frame_parms->rfmode[2];
exmimo_pci_interface->rf.rf_local2 = frame_parms->rflocal[2];
exmimo_pci_interface->rf.rf_rxdc2 = frame_parms->rxdc[2];
exmimo_pci_interface->rf.rf_vcocal2 = frame_parms->rfvcolocal[2];
exmimo_pci_interface->rf.rf_mode3 = frame_parms->rfmode[3];
exmimo_pci_interface->rf.rf_local3 = frame_parms->rflocal[3];
exmimo_pci_interface->rf.rf_rxdc3 = frame_parms->rxdc[3];
exmimo_pci_interface->rf.rf_vcocal3 = frame_parms->rfvcolocal[3];
}
#endif // RTAI_ENABLED
// printk("[openair][INIT] : Returning\n");
return(0);
#else //NOCARD_TEST
return(0);
#endif //NOCARD_TEST
}
#ifndef OPENAIR_PCI_H
#define OPENAIR_PCI_H
#include "PHY/types.h"
/* This file is intended for prototypes & declarations to be SHARED with underlying hardware. */
#define PRIMARY_CH 0
#define SECONDARY_CH 1
#define NODE 2
#define UNCALIBRATED 0
#define CALIBRATED 1
#ifndef FW2011
typedef struct {
int adc_head[2]; /// PCI addresses of ADC buffers in PC memory (Read by LEON during init)
int dac_head[2]; /// PCI addresses of DAC buffers in PC memory (Read by LEON during init)
int ofdm_symbols_per_frame; /// Length of frame in OFDM Symbols (Read by LEON during init)
int log2_ofdm_symbol_size; /// Length of OFDM symbols (log2!)
int cyclic_prefix_length; /// Length of cyclic prefix
int samples_per_frame; /// Length of frame in samples
int rx_prefix_mode; /// Receiver processing mode (0 no prefix removal, 1 prefix removal)
int tx_rx_switch_point; /// TX/RX switch position (Read by LEON during init)
int timing_advance; /// timing advance for UE
int dual_tx; /// 1 for dual-antenna TX, 0 for single-antenna TX
int tdd; /// 1 for TDD mode, 0 for FDD mode
int node_id; /// Node type (Read by LEON during init)
int freq_info; /// Frequency info (Read by LEON during init)
int frame_offset; /// Frame offset (Read by LEON during init and on resynch procedure)
int adac_cnt; /// ADAC Interrupt counter (Written by LEON once per frame)
int rx_gain_cval; /// RX gain calibrated val (Read by LEON during init and every frame)
int rx_gain_val; /// RX gain val (Read by LEON during init and every frame)
int tx_gain00; /// TX GAIN 00 (Read by LEON during init)
int tx_gain01; /// TX GAIN 01
int tx_gain10; /// TX GAIN 10
int tx_gain11; /// TX GAIN 11
int tcxo_dac; /// TCXO tuning voltage (Read by LEON during init)
int rx_rf_mode; /// RX RF mode (Read by LEON during init)
int freq_offset; /// Freq offset for compensation //20 bits for frequency (7.68e6/pow2(20)), 1 bit for direction
int nb_rb;
int first_rb;
int mast_flag;
int dac_dma_error_cnt; /// PCI DMA error counter (Written by LEON)
int adc_dma_error_cnt; /// PCI DMA error counter (Written by LEON)
// cmd_t pci_cmd; /// CMD register
unsigned int ADF4108_Func0;
unsigned int ADF4108_Ref_Cnt;
unsigned int ADF4108_N_Cnt;
unsigned int LFSW190410_CharCmd;
unsigned int LFSW190410_KHZ_0;
unsigned int LFSW190410_KHZ_1;
unsigned int RFswitches_onoff;
unsigned int RFswitches_mask;
unsigned int settx_raw_word;
unsigned int setrx_raw_word;
unsigned int nb_posted_rfctl_ADF4108;
unsigned int nb_posted_rfctl_LFSW;
unsigned int nb_posted_rfctl_RFSW;
unsigned int nb_posted_rfctl_SETTX;
unsigned int nb_posted_rfctl_SETRX;
} PCI_interface_t;
#else
typedef struct {
int adc_head[2]; /// PCI addresses of ADC buffers in PC memory (Read by LEON during init)
int dac_head[2]; /// PCI addresses of DAC buffers in PC memory (Read by LEON during init)
int samples_per_frame; /// Length of frame in samples
int timing_advance; /// timing advance for UE
int dual_tx; /// 1 for dual-antenna TX, 0 for single-antenna TX
int tdd; /// 1 for TDD mode, 0 for FDD mode
int tdd_config;
int node_id; /// Node type (Read by LEON during init)
int freq_info; /// Frequency info (Read by LEON during init)
int frame_offset; /// Frame offset (Read by LEON during init and on resynch procedure)
int adac_cnt; /// ADAC Interrupt counter (Written by LEON once per frame)
int rx_gain_cval; /// RX gain calibrated val (Read by LEON during init and every frame)
int rx_gain_val; /// RX gain val (Read by LEON during init and every frame)
int tx_gain00; /// TX GAIN 00 (Read by LEON during init)
int tx_gain01; /// TX GAIN 01
int tx_gain10; /// TX GAIN 10
int tx_gain11; /// TX GAIN 11
int tcxo_dac; /// TCXO tuning voltage (Read by LEON during init)
int rx_rf_mode; /// RX RF mode (Read by LEON during init)
int freq_offset; /// Freq offset for compensation //20 bits for frequency (7.68e6/pow2(20)), 1 bit for direction
int nb_rb;
int first_rb;
int mast_flag;
int dac_dma_error_cnt; /// PCI DMA error counter (Written by LEON)
int adc_dma_error_cnt; /// PCI DMA error counter (Written by LEON)
// cmd_t pci_cmd; /// CMD register
unsigned int ADF4108_Func0;
unsigned int ADF4108_Ref_Cnt;
unsigned int ADF4108_N_Cnt;
unsigned int LFSW190410_CharCmd;
unsigned int LFSW190410_KHZ_0;
unsigned int LFSW190410_KHZ_1;
unsigned int RFswitches_onoff;
unsigned int RFswitches_mask;
unsigned int settx_raw_word;
unsigned int setrx_raw_word;
unsigned int nb_posted_rfctl_ADF4108;
unsigned int nb_posted_rfctl_LFSW;
unsigned int nb_posted_rfctl_RFSW;
unsigned int nb_posted_rfctl_SETTX;
unsigned int nb_posted_rfctl_SETRX;
} PCI_interface_t;
#endif
#include "exmimo_fw.h"
typedef struct {
unsigned int global_top_dma_ahb_addr;
unsigned int one_dma_nbwords;
unsigned int dma_pci_addr;
unsigned int dma_ahb_addr;
unsigned int dma_busy;
unsigned int dma_direction;
} exmimo_pcidma_t;
typedef struct {
uint32_t mbox;
uint32_t adc_head[4]; // PCI addresses of ADC buffers in PC memory (Read by LEON during init)
uint32_t dac_head[4]; // PCI addresses of DAC buffers in PC memory (Read by LEON during init)
uint32_t rf_freq_rx0;
uint32_t rf_freq_rx1;
uint32_t rf_freq_rx2;
uint32_t rf_freq_rx3;
uint32_t rf_freq_tx0;
uint32_t rf_freq_tx1;
uint32_t rf_freq_tx2;
uint32_t rf_freq_tx3;
// Lime0 TX VGA1
uint32_t tx_gain00;
// Lime0 TX VGA2
uint32_t tx_gain01;
uint32_t tx_gain10;
uint32_t tx_gain11;
uint32_t tx_gain20;
uint32_t tx_gain21;
uint32_t tx_gain30;
uint32_t tx_gain31;
// Lime0 RX VGA1
uint32_t rx_gain00;
// Lime0 RX VGA2
uint32_t rx_gain01;
uint32_t rx_gain10;
uint32_t rx_gain11;
uint32_t rx_gain20;
uint32_t rx_gain21;
uint32_t rx_gain30;
uint32_t rx_gain31;
//LIME RF modes
// 21 | 20:19 | 18:16 |15:14 | 13:12|11:8 | 7 |6:3 |2 |1 |0 |
// TXBYP | RXBYP | RF/BB |LNAMode| LNA |RXLPF|RXLPFen|TXLPF|TXLPFen|TXen|RXen|
uint32_t rf_mode0;
uint32_t rf_mode1;
uint32_t rf_mode2;
uint32_t rf_mode3;
// LIME LO Calibration Constants
// | RXLOQ | RXLOI | TXLOQ | TXLOI |
// | 23:18 | 17:12 | 11:6 | 5:0 |
uint32_t rf_local0;
uint32_t rf_local1;
uint32_t rf_local2;
uint32_t rf_local3;
// LIME RX DC OFFSET
// | RXDCQ | RXDCI |
// | 15:8 | 7:0 |
uint32_t rf_rxdc0;
uint32_t rf_rxdc1;
uint32_t rf_rxdc2;
uint32_t rf_rxdc3;
// LIME VCO Calibration Constants
// | RXVCOCAP | TXVCOCAP |
// | 11:6 | 5:0 |
uint32_t rf_vcocal0;
uint32_t rf_vcocal1;
uint32_t rf_vcocal2;
uint32_t rf_vcocal3;
// LIME calibration parameters
} exmimo_rf_t;
#define RXEN 1
#define TXEN 2
#define TXLPFENMASK 4
#define TXLPFEN 4
#define TXLPFMASK (15<<3)
#define TXLPF14 0
#define TXLPF10 (1<<3)
#define TXLPF7 (2<<3)
#define TXLPF6 (3<<3)
#define TXLPF5 (4<<3)
#define TXLPF4375 (5<<3)
#define TXLPF35 (6<<3)
#define TXLPF3 (7<<3)
#define TXLPF275 (8<<3)
#define TXLPF25 (9<<3)
#define TXLPF192 (10<<3)
#define TXLPF15 (11<<3)
#define TXLPF1375 (12<<3)
#define TXLPF125 (13<<3)
#define TXLPF0875 (14<<3)
#define TXLPF075 (15<<3)
#define RXLPFENMASK (1<<7)
#define RXLPFEN 128
#define RXLPFMASK (15<<8)
#define RXLPF14 0
#define RXLPF10 (1<<8)
#define RXLPF7 (2<<8)
#define RXLPF6 (3<<8)
#define RXLPF5 (4<<8)
#define RXLPF4375 (5<<8)
#define RXLPF35 (6<<8)
#define RXLPF3 (7<<8)
#define RXLPF275 (8<<8)
#define RXLPF25 (9<<8)
#define RXLPF192 (10<<8)
#define RXLPF15 (11<<8)
#define RXLPF1375 (12<<8)
#define RXLPF125 (13<<8)
#define RXLPF0875 (14<<8)
#define RXLPF075 (15<<8)
#define LNAMASK (3<<12)
#define LNADIS 0
#define LNA1ON (1<<12)
#define LNA2ON (2<<12)
#define LNA3ON (3<<12)
#define LNAGAINMASK (3<<14)
#define LNAByp (1<<14)
#define LNAMed (2<<14)
#define LNAMax (3<<14)
#define RFBBMASK (7<<16)
#define RFBBNORM 0
#define RFBBRXLPF (1<<16)
#define RFBBRXVGA (2<<16)
#define RFBBOUTPUT (3<<16)
#define RFBBLNA1 (4<<16)
#define RFBBLNA2 (5<<16)
#define RFBBLNA3 (6<<16)
#define RXLPFMODEMASK (3<<19)
#define RXLPFNORM 0
#define RXLPFBYP (1<<19)
#define RXLPFBPY2 (3<<19)
#define TXLPFMODEMASK (1<<21)
#define TXLPFNORM 0
#define TXLPFBYP (1<<21)
#define RXOUTSW (1<<22)
#define DMAMODE_TRXMASK (3<<23)
#define DMAMODE_RX (1<<23)
#define DMAMODE_TX (2<<23)
// register values and masks for rf_local
#define TXLOIMASK 63
#define TXLOQMASK (63<<6)
#define RXLOIMASK (63<<12)
#define RXLOQMASK (63<<18)
typedef struct {
uint32_t tdd;
uint32_t tdd_config;
uint32_t eNB_flag;
} exmimo_framing_t;
typedef struct {
// uint32_t mbox[4];
exmimo_rf_t rf;
exmimo_framing_t framing;
} exmimo_pci_interface_t;
//#define PENDING_POSTED_RFCTL_LFSW 0x00000001
//#define PENDING_POSTED_RFCTL_ADF4108 0x00000002
//#define PENDING_POSTED_RFCTL_SETTX 0x00000003
//#define PENDING_POSTED_RFCTL_SETRX 0x00000004
//#define PENDING_POSTED_RFCTL_RFSW 0x00000005
#endif /* OPENAIR_PCI_H */
#ifndef USER_MODE
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/proc_fs.h>
#endif //USER_MODE
#include "PHY/defs.h"
#include "PHY/extern.h"
#include "ARCH/CBMIMO1/DEVICE_DRIVER/extern.h"
#include "MAC_INTERFACE/extern.h"
#include "SCHED/extern.h"
#ifndef USER_MODE
static struct proc_dir_entry *proc_openair1_root;
#endif
#ifndef USER_MODE
static int openair1_state_read(char *buffer, char **my_buffer, off_t off, int length) {
int len = 0;
switch (openair_daq_vars.mode) {
case openair_NOT_SYNCHED:
len += sprintf(&buffer[len], "NOT IN SYNCH\n");
break;
#ifdef OPENAIR_LTE
case openair_SYNCHED:
len += sprintf(&buffer[len], "SYNCHED\n");
break;
#else
case openair_SYNCHED_TO_CHSCH:
len += sprintf(&buffer[len], "SYNCHED TO CH %d\n",openair_daq_vars.synch_source);
break;
case openair_SYNCHED_TO_MRSCH:
len += sprintf(&buffer[len], "SYNCHED TO MR\n");
break;
#endif
case openair_SCHED_EXIT:
len += sprintf(&buffer[len], "EXITED\n");
break;
}
}
#endif //USER_MODE
#ifndef USER_MODE
static int chbch_stats_read(char *buffer, char **my_buffer, off_t off, int length)
#else
int chbch_stats_read(char *buffer, char **my_buffer, off_t off, int length)
#endif
{
int len = 0,i,fg,eNB;
/*
* Get the current time and format it.
*/
#ifdef OPENAIR1
if (mac_xface->is_cluster_head == 0) {
if (PHY_vars_UE_g)
len += dump_ue_stats(PHY_vars_UE_g[0],buffer,len);
} // is_clusterhead
else {
if (PHY_vars_eNB_g)
len += dump_eNB_stats(PHY_vars_eNB_g[0],buffer,len);
}
#endif
return len;
}
/*
* Initialize the module and add the /proc file.
*/
#ifndef USER_MODE
int add_openair1_stats(void)
{
msg("Creating openair1 proc entry\n");
proc_openair1_root = proc_mkdir("openair1",0);
// create_proc_info_entry("bch_stats", S_IFREG | S_IRUGO, proc_openair1_root, chbch_stats_read);
// create_proc_info_entry("openair1_state", S_IFREG | S_IRUGO, proc_openair1_root, openair1_state_read);
create_proc_read_entry("bch_stats", S_IFREG | S_IRUGO, proc_openair1_root, (read_proc_t*)&chbch_stats_read,NULL);
create_proc_read_entry("openair1_state", S_IFREG | S_IRUGO, proc_openair1_root, (read_proc_t*)&openair1_state_read,NULL);
return 0;
}
/*
* Unregister the file when the module is closed.
*/
void remove_openair_stats(void)
{
if (proc_openair1_root) {
printk("[OPENAIR][CLEANUP] Removing openair proc entry\n");
remove_proc_entry("bch_stats", proc_openair1_root);
remove_proc_entry("openair1_state", proc_openair1_root);
remove_proc_entry("openair1",NULL);
}
}
#endif
#include "defs.h"
#include "extern.h"
#include "cbmimo1_device.h"
#include "cbmimo1_pci.h"
#include "PHY/defs.h"
#include "PHY/extern.h"
#include "SCHED/defs.h"
#include "SCHED/extern.h"
void openair_set_rx_rf_mode(unsigned char card_id,unsigned int arg) {
#ifndef NOCARD_TEST
printk("[openair][RF_CNTL] Setting RX_RF MODE on card %d to %d\n",card_id,arg);
openair_daq_vars.rx_rf_mode = arg;
if (pci_interface[card_id])
pci_interface[card_id]->rx_rf_mode = arg;
else
printk("[openair][RF_CNTL] rx_rf_mode not configured\n");
// openair_dma(SET_RX_RF_MODE);
#endif
}
void openair_set_tcxo_dac(unsigned char card_id,unsigned int arg) {
#ifndef NOCARD_TEST
printk("[openair][RF_CNTL] Setting TCXO_DAC to %d\n",arg);
openair_daq_vars.tcxo_dac = arg;
if (pci_interface[card_id])
pci_interface[card_id]->tcxo_dac = openair_daq_vars.tcxo_dac;
else
printk("[openair][RF_CNTL] TCXO_DAC not configured\n");
// openair_writel(arg,bar[0]+REG_BAR+0x4);
// PA Gain control line is connected to TCXO tuning frequency input
// openair_dma(SET_PA_GAIN);
#endif
}
void openair_set_tx_gain_openair(unsigned char card_id,unsigned char txgain00,unsigned char txgain10,unsigned char txgain01, unsigned char txgain11) {
#ifndef NOCARD_TEST
printk("[openair][RF_CNTL] Setting TX gains to %d,%d,%d,%d\n",txgain00,txgain10,txgain01,txgain11);
if (pci_interface[card_id]) {
pci_interface[card_id]->tx_gain00 = (unsigned int)txgain00;
pci_interface[card_id]->tx_gain01 = (unsigned int)txgain01;
pci_interface[card_id]->tx_gain10 = (unsigned int)txgain10;
pci_interface[card_id]->tx_gain11 = (unsigned int)txgain11;
}
else
printk("[openair][RF_CNTL] TX gains not configured\n");
// openair_writel((unsigned int)txgain00,bar[0]+REG_BAR+0x4);
// openair_writel((unsigned int)txgain10,bar[0]+REG_BAR+0x8);
// openair_writel((unsigned int)txgain01,bar[0]+REG_BAR+0xc);
// openair_writel((unsigned int)txgain11,bar[0]+REG_BAR+0x10);
// openair_dma(SET_TX_GAIN);
#endif
}
void openair_set_rx_gain_openair(unsigned char card_id,unsigned char rxgain00,unsigned char rxgain01,unsigned char rxgain10,unsigned char rxgain11) {
#ifndef NOCARD_TEST
unsigned int rxgain;
// Concatenate the 4 gain values into one 32-bit register (flip byte endian)
rxgain = rxgain00 | (rxgain01 << 8) | (rxgain10 << 16) | (rxgain11 << 24);
printk("[openair][RF_CNTL] Setting RX gains to %d,%d,%d,%d -> %x\n",rxgain00,rxgain01,rxgain10,rxgain11,rxgain);
// Store the result in shared PCI memory so that the FPGA can detect and read the new value
openair_daq_vars.rx_gain_val = rxgain;
if (pci_interface[card_id]) {
pci_interface[card_id]->rx_gain_val = openair_daq_vars.rx_gain_val;
pci_interface[card_id]->rx_gain_cval = 0;
}
else
printk("[openair][RF_CNTL] rxgainreg not configured\n");
#endif
}
void openair_set_rx_gain_cal_openair(unsigned char card_id,unsigned int gain_dB) {
#ifndef NOCARD_TEST
//printk("[openair][RF_CNTL] Setting RX gains to %d dB \n",gain_dB);
// Store the result in shared PCI memory so that the FPGA can detect and read the new value
if (pci_interface[card_id]) {
pci_interface[card_id]->rx_gain_cval = gain_dB;
pci_interface[card_id]->rx_gain_val = 0;
}
else
printk("[openair][RF_CNTL] rxgainreg not configured\n");
#endif
}
void openair_set_lo_freq_openair(unsigned char card_id,char freq0,char freq1) {
#ifndef NOCARD_TEST
printk("[openair][RF_CNTL] Setting LO frequencies to %d,%d\n",freq0,freq1);
// openair_writel(freq0,bar[0]+0x4);
// openair_writel(freq1,bar[0]+0x8);
// openair_dma(SET_LO_FREQ);
openair_daq_vars.freq_info = 1 + (freq0<<1) + (freq1<<4);
if (pci_interface[card_id])
pci_interface[card_id]->freq_info = openair_daq_vars.freq_info;
else
printk("[openair][RF_CNTL] frequency not configures\n");
#endif
}
int openair_set_freq_offset(unsigned char card_id,int freq_offset) {
unsigned int val;
if (pci_interface[card_id]) {
if (abs(freq_offset) > 7680000) {
printk("[openair][RF_CNTL] Frequency offset must be smaller than 7.68e6!\n");
return(-1);
} else {
val = (((unsigned int) abs(freq_offset))<<8)/1875; //abs(freq_offset)*pow2(20)/7.68e6
if (freq_offset < 0)
val ^= (1<<20); // sign bit to position 20
// bit21 = 0 negative freq offset at TX, positive freq offset at RX
// bit21 = 1 positive freq offset at TX, negative freq offset at RX
pci_interface[card_id]->freq_offset = val;
// printk("[openair][RF_CNTL] Setting frequency offset to %d Hz (%x)\n",freq_offset,val);
// printk("[openair][RF_CNTL] WARNING: Setting frequency disabled!!!\n",freq_offset,val);
return(0);
}
}
else {
printk("[openair][RF_CNTL] pci_interface not initialized\n");
return(-1);
}
}
#ifndef USER_MODE
#define __NO_VERSION__
//#include "rt_compat.h"
#ifdef RTAI_ENABLED
#include <rtai.h>
#include <rtai_posix.h>
#include <rtai_fifos.h>
#endif
#include <asm/io.h>
#include <asm/bitops.h>
#include <asm/uaccess.h>
#include <asm/segment.h>
#include <asm/page.h>
#include <asm/delay.h>
#include <linux/init.h>
#include <linux/module.h>
//#include <linux/malloc.h>
#endif
#include "openair_device.h"
#include "openair_device_extern.h"
int test_FPGA_regs(void ) {
#ifndef NOCARD_TEST
int readback;
printk("[openair][TEST_FPGA_REGS] : writing %x to ADC0_HEAD\n",0x12345678);
openair_writel(0x12345678,(bar[0] + REG_BAR + ADC0_HEAD));
readback = openair_readl((bar[0] + REG_BAR + ADC0_HEAD));
printk("[openair][TEST_FPGA_REGS] : readback %x\n",readback);
#endif NOCARD_TEST
return(0);
}
#ifndef __CBMIMO1_DEFS_H__
#define __CBMIMO1_DEFS_H__
#ifndef USER_MODE
#define __NO_VERSION__
//#include "rt_compat.h"
#include <asm/io.h>
#include <asm/bitops.h>
#include <asm/uaccess.h>
#include <asm/segment.h>
#include <asm/page.h>
#include <asm/delay.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/mm.h>
#include <linux/mman.h>
#include <linux/slab.h>
//#include <linux/config.h>
#include <linux/version.h>
#include <linux/kernel.h>
#include <linux/fs.h>
#include <linux/errno.h>
#ifdef KERNEL2_6
//#include <linux/config.h>
#include <linux/slab.h>
#endif
#ifdef KERNEL2_4
#include <linux/malloc.h>
#include <linux/wrapper.h>
#endif
#ifdef RTAI_ENABLED
#include <asm/rtai.h>
#include <rtai.h>
#include <rtai_posix.h>
#include <rtai_fifos.h>
#include <rtai_math.h>
#include <rtai_sem.h>
#endif //RTAI_ENABLED
#ifdef BIGPHYSAREA
#include <linux/bigphysarea.h>
#endif
#include "PHY/impl_defs_lte.h"
#include "cbmimo1_device.h"
#include "from_grlib_softconfig.h"
#include "from_grlib_softregs.h"
#include "linux/moduleparam.h"
/*------------------------------------------------*/
/* Prototypes */
/*------------------------------------------------*/
int openair_device_open (struct inode *inode,struct file *filp);
int openair_device_release (struct inode *inode,struct file *filp);
int openair_device_mmap (struct file *filp, struct vm_area_struct *vma);
int openair_device_ioctl (struct inode *inode,struct file *filp, unsigned int cmd, unsigned long arg);
void openair_generate_ofdm(void);
void openair_generate_fs4(unsigned char);
void openair_get_frame(unsigned char card_id);
int openair_dma(unsigned char card_id, unsigned int cmd);
int setup_regs(unsigned char card_id, LTE_DL_FRAME_PARMS *frame_parms);
void exmimo_firmware_init(void);
void dump_config(void);
int add_chbch_stats(void);
void remove_chbch_stats(void);
void remove_openair_stats(void);
int add_openair1_stats(void);
int fifo_printf(const char *fmt,...);
void fifo_printf_clean_up(void);
void fifo_printf_init(void);
void pci_printk_fifo_init(void);
void pci_printk_fifo_clean_up (void);
#endif
void openair_set_rx_rf_mode(unsigned char card_id,unsigned int arg);
void openair_set_tx_gain_openair(unsigned char card_id,unsigned char txgain00,unsigned char txgain10,unsigned char txgain01, unsigned char txgain11);
void openair_set_rx_gain_openair(unsigned char card_id,unsigned char rxgain00,unsigned char rxgain10,unsigned char rxgain01,unsigned char rxgain11);
void openair_set_lo_freq_openair(unsigned char card_id,char freq0,char freq1);
void openair_set_rx_gain_cal_openair(unsigned char card_id,unsigned int gain_dB);
int openair_set_freq_offset(unsigned char card_id,int freq_offset);
void openair_set_tcxo_dac(unsigned char card_id,unsigned int);
#endif
sudo modprobe rtai_sem
sudo modprobe rtai_msg
sudo modprobe rtai_fifos
rmmod openair_rf && sleep 1 ; insmod openair_rf_softmodem.ko
#include "ARCH/COMMON/defs.h"
#include "extern.h"
#include "defs.h"
#define PCI_FIFO_NO 60
#define PCI_FIFO_MAX_STRING_SIZE 500
#define PCI_FIFO_PRINTF_SIZE 1024
void pci_printk_fifo_init() {
printk ("[OPENAIR1] PCI_PRINTK_FIFO INIT\n");
rtf_create (PCI_FIFO_NO, PCI_FIFO_PRINTF_SIZE);
}
void
pci_printk_fifo_clean_up (void)
{
//-----------------------------------------------------------------------------
rtf_destroy (PCI_FIFO_NO);
}
void exmimo_firmware_init() {
size_t size=0;
// increase exmimo_pci_interface_bot to multiple of 128 bytes
size = sizeof(exmimo_pci_interface_bot);
size = size >> 7;
size++;
size = size << 7;
exmimo_pci_bot = (exmimo_pci_interface_bot *)bigphys_malloc(size);
printk("Intializing EXMIMO firmware support (exmimo_pci_bot at %p)\n",exmimo_pci_bot);
exmimo_pci_bot->firmware_block_ptr = virt_to_phys((unsigned int*)bigphys_malloc(262144));
printk("firmware_code_block_ptr : %x\n",exmimo_pci_bot->firmware_block_ptr);
exmimo_pci_bot->printk_buffer_ptr = virt_to_phys((unsigned int*)bigphys_malloc(4096));
printk("printk_buffer_ptr : %x\n",exmimo_pci_bot->printk_buffer_ptr);
exmimo_pci_interface = (exmimo_pci_interface_t *)bigphys_malloc(sizeof(exmimo_pci_interface_t)+64*4/*overhead to allow DMA transfers of 64 DW*/);
exmimo_pci_bot->pci_interface_ptr = virt_to_phys((unsigned int*)exmimo_pci_interface);
printk("pci_interface_ptr : %x\n",exmimo_pci_bot->pci_interface_ptr);
pci_printk_fifo_init();
iowrite32((u32)(virt_to_phys(exmimo_pci_bot)),(bar[0]+0x1c));
iowrite32(0,(bar[0]+0x20));
openair_dma(0,EXMIMO_PCIE_INIT);
}
void pci_fifo_printk() {
char *buffer = (char *)phys_to_virt(exmimo_pci_bot->printk_buffer_ptr);
unsigned int len = ((unsigned int *)buffer)[0];
unsigned int off=0,i;
unsigned char *dword;
unsigned char tmp;
printk("In pci_fifo_printk : buffer %p, len %d\n",buffer,len);
if ((len&3)>0)
off=1;
for (i=0;i<(off+(len>>2));i++) {
dword = &((unsigned char *)buffer)[(1+i)<<2];
tmp = dword[3];
dword[3] = dword[0];
dword[0] = tmp;
tmp = dword[2];
dword[2] = dword[1];
dword[1] = tmp;
}
rtf_put(PCI_FIFO_NO,
&buffer[4],len);
}
#ifndef EXMIMO_FW_H
#define EXMIMO_FW_H
typedef struct {
unsigned int firmware_block_ptr;
unsigned int printk_buffer_ptr;
unsigned int pci_interface_ptr;
} exmimo_pci_interface_bot;
#define EXMIMO_NOP 0x9999
#define EXMIMO_PCIE_INIT 0x0000
#define EXMIMO_FW_INIT 0x0001
#define EXMIMO_CLEAR_BSS 0x0002
#define EXMIMO_START_EXEC 0x0003
#define EXMIMO_REBOOT 0x0004
#define EXMIMO_CONFIG 0x0005
#define EXMIMO_GET_FRAME 0x0006
#define EXMIMO_START_RT_ACQUISITION 0x0007
#define EXMIMO_STOP 0x0008
#define SLOT_INTERRUPT 0x1111
#define PCI_PRINTK 0x2222
#define GET_FRAME_DONE 0x3333
void pci_fifo_printk(void);
#endif
#ifndef __CBMIMO1_EXTERN_H__
#define __CBMIMO1_EXTERN_H__
#ifndef USER_MODE
#define __NO_VERSION__
#include <linux/init.h>
#include <linux/module.h>
#include <linux/pci.h>
#ifdef KERNEL2_6
//#include <linux/config.h>
#include <linux/slab.h>
#endif
//#include "pci_commands.h"
#include "defs.h"
extern struct pci_dev *pdev[4];
extern void __iomem *bar[4];
extern char card,master_id;
extern int major;
extern unsigned short eedata[];
extern unsigned int openair_irq;
extern u32 openair_irq_enabled;
//extern dma_addr_t dummy_dma_ptr;
extern unsigned int pci_buffer[4][2*NB_ANTENNAS_RX];
extern unsigned int RX_DMA_BUFFER[4][NB_ANTENNAS_RX];
extern unsigned int TX_DMA_BUFFER[4][NB_ANTENNAS_TX];
extern unsigned int mbox;
extern unsigned int vid,did;
//extern unsigned short NODE_ID[1];
#endif
#include "cbmimo1_pci.h"
extern PCI_interface_t *pci_interface[4];
extern char number_of_cards;
extern exmimo_pci_interface_bot *exmimo_pci_bot;
extern exmimo_pci_interface_t *exmimo_pci_interface;
#ifdef RTAI_ENABLED
extern s32 *inst_cnt_ptr;
extern SEM *oai_semaphore;
extern RT_TASK *lxrt_task;
#endif
#endif
#include "rtai_fifos.h"
# define FIFO_PRINTF_MAX_STRING_SIZE 500
# define FIFO_PRINTF_NO 63
# define FIFO_PRINTF_SIZE 65536
static unsigned char fifo_print_buffer[FIFO_PRINTF_MAX_STRING_SIZE];
void
fifo_printf_init (void)
{
//-----------------------------------------------------------------------------
printk ("[OPENAIR1] TRACE INIT\n");
rtf_create (FIFO_PRINTF_NO, FIFO_PRINTF_SIZE);
}
//-----------------------------------------------------------------------------
void
fifo_printf_clean_up (void)
{
//-----------------------------------------------------------------------------
rtf_destroy (FIFO_PRINTF_NO);
}
//-----------------------------------------------------------------------------
int
fifo_printf (const char *fmt, ...)
{
//-----------------------------------------------------------------------------
int i;
va_list args;
va_start (args, fmt);
i = vsprintf (fifo_print_buffer, fmt, args);
va_end (args);
/* perhaps we should discard old data instead */
if (i > FIFO_PRINTF_MAX_STRING_SIZE) {
rt_printk ("[OPENAIR] FIFO_PRINTF WROTE OUTSIDE ITS MEMORY BOUNDARY : ERRORS WILL OCCUR\n");
}
if (i <= 0) {
return 0;
}
rtf_put (FIFO_PRINTF_NO, fifo_print_buffer, i);
return i;
}
/* Automatically generated based on softconfig.h from Grlib . Don't edit. */
/* Tue Mar 11 18:31:32 CET 2008 */
#ifndef FROM_GRLIB_SOFT_CONFIG_H
#define SOFT_CONFIG_H
/* Sparc features */
#define FROM_GRLIB_CFG_NWIN 8
/* Clock */
#define FROM_GRLIB_CFG_INCLK_FREQ_HZ 26000000
#define FROM_GRLIB_CFG_CLKMUL 2
#define FROM_GRLIB_CFG_CLKDIV 1
#define FROM_GRLIB_CFG_MAINCLK_FREQ_HZ 52000000
#define FROM_GRLIB_CFG_MAINCLK_PERIOD_PS 19230
/* AMBA config */
#define FROM_GRLIB_CFG_AHBIO 0xFFF00000
#define FROM_GRLIB_CFG_AHBRODDR 0x00000000
#define FROM_GRLIB_CFG_AHBROM_MAXSZ 1
#define FROM_GRLIB_CFG_APBADDR 0x80000000
#define FROM_GRLIB_CFG_ACTUAL_HIGHEST_HINDEX 9
/* General Purpose I/O */
#define FROM_GRLIB_CFG_GRGPIO_PADDR 0x80000b00
#define FROM_GRLIB_CFG_GRGPIO_OUTPUT 0x80000b04
#define FROM_GRLIB_CFG_GRGPIO_DIRECTION 0x80000b08
#define FROM_GRLIB_CFG_GRGPIO_IRQ_MASK 0x80000b0c
#define FROM_GRLIB_CFG_GRGPIO_IRQ_POLARITY 0x80000b10
#define FROM_GRLIB_CFG_GRGPIO_IRQ_EDGE 0x80000b14
/* Instruction cache local RAM */
#define FROM_GRLIB_CFG_ILRAMEN
#define FROM_GRLIB_CFG_ILRAMADDR 0x8e000000
#define FROM_GRLIB_CFG_ILRAMADDR_TOP 0x8e008000
#define FROM_GRLIB_CFG_ILRAMSZ 32
/* Data cache local RAM */
#define FROM_GRLIB_CFG_DLRAMEN
#define FROM_GRLIB_CFG_DLRAMADDR 0x8f000000
#define FROM_GRLIB_CFG_DLRAMADDR_TOP 0x8f008000
#define FROM_GRLIB_CFG_DLRAMSZ 32
/* AHB RAM */
#define FROM_GRLIB_CFG_AHBRAMEN
#define FROM_GRLIB_CFG_AHBRADDR 0x00000000
#define FROM_GRLIB_CFG_AHBRADDR_TOP 0x00001000
#define FROM_GRLIB_CFG_AHBRSZ 4
/* SDRAM */
#define FROM_GRLIB_CFG_SDCTRL
#define FROM_GRLIB_CFG_SDRAM_ADDR 0x60000000
#define FROM_GRLIB_CFG_SDRAM_TOP 0x62000000
#define FROM_GRLIB_CFG_SDRAMSZ 32
#define FROM_GRLIB_CFG_SDRAM_IO 0xFFF00100
/* Scaler and timers */
#define FROM_GRLIB_CFG_SCALER_VALUE 0x80000300
#define FROM_GRLIB_CFG_SCALER_RELOAD 0x80000304
#define FROM_GRLIB_CFG_SCALER_CONFIG 0x80000308
#define FROM_GRLIB_CFG_TIMER1_COUNTER 0x80000310
#define FROM_GRLIB_CFG_TIMER1_RELOAD 0x80000314
#define FROM_GRLIB_CFG_TIMER1_CONTROL 0x80000318
#define FROM_GRLIB_CFG_GPT_IRQ 8
#define ONE_TICK_PER_MICROS 51
/* Interrupt Requests */
#define FROM_GRLIB_CFG_IRQ_LEVEL 0x80000200
#define FROM_GRLIB_CFG_IRQ_PENDING 0x80000204
#define FROM_GRLIB_CFG_IRQ_CLEAR 0x8000020c
#define FROM_GRLIB_CFG_IRQ_CPU0_MASK 0x80000240
#define FROM_GRLIB_CFG_IRQ_CPU0_FORCE 0x80000208
/* PCI interface */
#define FROM_GRLIB_CFG_PCI 3
#define FROM_GRLIB_CFG_PCIVID 0x16E3
#define FROM_GRLIB_CFG_PCIDID 0x0210
#define FROM_GRLIB_CFG_PCI_HADDR 0xE0000000
#define FROM_GRLIB_CFG_GRPCI_CONFIG_STATUS 0x80000400
#define FROM_GRLIB_CFG_GRPCI_BAR0 0x80000404
#define FROM_GRLIB_CFG_GRPCI_PAGE0 0x80000408
#define FROM_GRLIB_CFG_GRPCI_BAR1 0x8000040c
#define FROM_GRLIB_CFG_GRPCI_PAGE1 0x80000410
#define FROM_GRLIB_CFG_GRPCI_IOMAP 0x80000414
#define FROM_GRLIB_CFG_GRPCI_STATUS_COMMAND 0x80000418
/* added by Eurecom */
/* These definitions are for Leon3 firmware */
#define FROM_GRLIB_CFG_GRPCI_EUR_CTRL 0x80000420
#define FROM_GRLIB_CFG_GRPCI_EUR_EXPPAGE0 0x80000428
#define FROM_GRLIB_CFG_GRPCI_EUR_SHARED0OFF 0x80000430
#define FROM_GRLIB_CFG_GRPCI_EUR_SHARED0SIZE 0x80000434
#define FROM_GRLIB_CFG_GRPCI_EUR_CTRL0 0x80000440
#define FROM_GRLIB_CFG_GRPCI_EUR_CTRL1 0x80000444
#define FROM_GRLIB_CFG_GRPCI_EUR_CTRL2 0x80000448
#define FROM_GRLIB_CFG_GRPCI_EUR_CTRL3 0x8000044c
/* These ones are for Host PC software */
#define FROM_GRLIB_CFG_GRPCI_PCI_CONFIG_FREE 0x40
#define FROM_GRLIB_CFG_GRPCI_EUR_CTRL0_OFFSET (FROM_GRLIB_CFG_GRPCI_EUR_CTRL0 - FROM_GRLIB_CFG_GRPCI_EUR_CTRL + FROM_GRLIB_CFG_GRPCI_PCI_CONFIG_FREE)
#define FROM_GRLIB_CFG_GRPCI_EUR_CTRL1_OFFSET (FROM_GRLIB_CFG_GRPCI_EUR_CTRL1 - FROM_GRLIB_CFG_GRPCI_EUR_CTRL + FROM_GRLIB_CFG_GRPCI_PCI_CONFIG_FREE)
#define FROM_GRLIB_CFG_GRPCI_EUR_CTRL2_OFFSET (FROM_GRLIB_CFG_GRPCI_EUR_CTRL2 - FROM_GRLIB_CFG_GRPCI_EUR_CTRL + FROM_GRLIB_CFG_GRPCI_PCI_CONFIG_FREE)
#define FROM_GRLIB_CFG_GRPCI_EUR_CTRL3_OFFSET (FROM_GRLIB_CFG_GRPCI_EUR_CTRL3 - FROM_GRLIB_CFG_GRPCI_EUR_CTRL + FROM_GRLIB_CFG_GRPCI_PCI_CONFIG_FREE)
#define FROM_GRLIB_CFG_GRPCI_EUR_CTRL_OFFSET (FROM_GRLIB_CFG_GRPCI_EUR_CTRL - FROM_GRLIB_CFG_GRPCI_EUR_CTRL + FROM_GRLIB_CFG_GRPCI_PCI_CONFIG_FREE)
#define FROM_GRLIB_CFG_PCI_IRQ 5
/* PCI DMA controller */
#define FROM_GRLIB_CFG_PCIDMA_CTRL 0x80000500
#define FROM_GRLIB_CFG_PCIDMA_AHB_ADDR 0x80000504
#define FROM_GRLIB_CFG_PCIDMA_PCI_ADDR 0x80000508
#define FROM_GRLIB_CFG_PCIDMA_NB_WORDS 0x8000050c
#define FROM_GRLIB_CFG_PCIDMA_IRQ 4
/* Cardbus MIMO 1 Features */
#define FROM_GRLIB_CFG_CMIMO1_ENABLE
/* Address mapping of RF chain control Register file */
#define FROM_GRLIB_CFG_CMIMO1_WDNS_RFCTL0 0xFFF20000
#define FROM_GRLIB_CFG_CMIMO1_WDNS_RFCTL1 0xFFF20004
#define FROM_GRLIB_CFG_CMIMO1_IDROMEL_RFCTL 0xFFF20008
/* Address mapping of ADAC control Register file */
#define FROM_GRLIB_CFG_CMIMO1_ADAC_CONFIG 0xFFF20020
#define FROM_GRLIB_CFG_CMIMO1_FRAME_LENGTH 0xFFF20024
#define FROM_GRLIB_CFG_CMIMO1_FRAME_START 0xFFF20028
#define FROM_GRLIB_CFG_CMIMO1_SWITCH_OFFSET 0xFFF2002c
#define FROM_GRLIB_CFG_CMIMO1_ADAC_INTR_COUNTER 0xFFF20030
/* Address mapping of Widens SPI control/config Register file */
#define FROM_GRLIB_CFG_CMIMO1_WDNS_SPI_DATA0 0xFFF20040
#define FROM_GRLIB_CFG_CMIMO1_WDNS_SPI_DATA1 0xFFF20044
#define FROM_GRLIB_CFG_CMIMO1_WDNS_SPI_DATA2 0xFFF20048
#define FROM_GRLIB_CFG_CMIMO1_WDNS_SPI_DATA3 0xFFF2004c
#define FROM_GRLIB_CFG_CMIMO1_WDNS_SPI_DATA4 0xFFF20050
#define FROM_GRLIB_CFG_CMIMO1_WDNS_SPI_DATA5 0xFFF20054
#define FROM_GRLIB_CFG_CMIMO1_WDNS_SPI_DATA6 0xFFF20058
#define FROM_GRLIB_CFG_CMIMO1_WDNS_SPI_DATA7 0xFFF2005c
#define FROM_GRLIB_CFG_CMIMO1_WDNS_SPI_ENABLES 0xFFF20060
#define FROM_GRLIB_CFG_CMIMO1_WDNS_SPI_SIZES 0xFFF20064
#define FROM_GRLIB_CFG_CMIMO1_WDNS_SPI_ACTIVE 0xFFF20068
/* Address mapping of Idromel SPI control/config Register file */
#define FROM_GRLIB_CFG_CMIMO1_IDROMEL_SPI_ADF14108_FUNC 0xFFF20080
#define FROM_GRLIB_CFG_CMIMO1_IDROMEL_SPI_ADF14108_NCNT 0xFFF20084
#define FROM_GRLIB_CFG_CMIMO1_IDROMEL_SPI_ADF14108_RCNT 0xFFF20088
#define FROM_GRLIB_CFG_CMIMO1_IDROMEL_SPI_LFSW_CMD 0xFFF20090
#define FROM_GRLIB_CFG_CMIMO1_IDROMEL_SPI_LFSW_KHZ_0 0xFFF20094
#define FROM_GRLIB_CFG_CMIMO1_IDROMEL_SPI_LFSW_KHZ_1 0xFFF20098
#define FROM_GRLIB_CFG_CMIMO1_IDROMEL_SPI_SETTX 0xFFF200A0
#define FROM_GRLIB_CFG_CMIMO1_IDROMEL_SPI_SETRX 0xFFF200A4
#define FROM_GRLIB_CFG_CMIMO1_IDROMEL_SPI_CTRL 0xFFF200B0
/* Address mapping of ADAC ram banks */
#define FROM_GRLIB_CFG_CMIMO1_ADC0 0xC0000000
#define FROM_GRLIB_CFG_CMIMO1_ADC0_TOP 0xC0000FFF
#define FROM_GRLIB_CFG_CMIMO1_ADC0_SZKB 4
#define FROM_GRLIB_CFG_CMIMO1_ADC1 0xC0010000
#define FROM_GRLIB_CFG_CMIMO1_ADC1_TOP 0xC0010FFF
#define FROM_GRLIB_CFG_CMIMO1_ADC1_SZKB 4
#define FROM_GRLIB_CFG_CMIMO1_DAC0 0xC0020000
#define FROM_GRLIB_CFG_CMIMO1_DAC0_TOP 0xC00207FF
#define FROM_GRLIB_CFG_CMIMO1_DAC0_SZKB 2
#define FROM_GRLIB_CFG_CMIMO1_DAC1 0xC0030000
#define FROM_GRLIB_CFG_CMIMO1_DAC1_TOP 0xC00307FF
#define FROM_GRLIB_CFG_CMIMO1_DAC1_SZKB 2
#define FROM_GRLIB_CFG_CMIMO1_IRQ 6
#endif /* FROM_GRLIB_SOFT_CONFIG_H */
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#!/bin/bash
#
# $Id: gdbline,v 1.1 2004/08/02 16:27:55 corbet Exp $
#
# gdbline module image
#
# Outputs an add-symbol-file line suitable for pasting into gdb to examine
# a loaded module.
#
cd /sys/module/$1/sections
echo -n add-symbol-file $2 `/bin/cat .text`
for section in .[a-z]* *; do
if [ $section != ".text" ]; then
echo " \\"
echo -n " -s" $section `/bin/cat $section`
fi
done
echo
#ifndef __CBMIMO1_VARS_H__
#define __CBMIMO1_VARS_H__
#ifndef USER_MODE
#define __NO_VERSION__
#include <linux/init.h>
#include <linux/module.h>
#include <linux/pci.h>
#ifdef KERNEL2_6
//#include <linux/config.h>
#include <linux/slab.h>
#endif
#include "defs.h"
unsigned int openair_irq;
u32 openair_irq_enabled=0;
struct pci_dev *pdev[4];
void __iomem *bar[4];
resource_size_t mmio_start,mmio_length;
unsigned int mmio_flags;
unsigned int vid,did;
char card,master_id;
int major;
//dma_addr_t dummy_dma_ptr;
unsigned int pci_buffer[4][2*NB_ANTENNAS_RX];
unsigned int mbox;
//unsigned short NODE_ID[1];
//EXPORT_SYMBOL(NODE_ID);
#endif
#include "cbmimo1_pci.h"
PCI_interface_t *pci_interface[4];
char number_of_cards;
exmimo_pci_interface_bot *exmimo_pci_bot;
exmimo_pci_interface_t *exmimo_pci_interface;
#ifdef RTAI_ENABLED
s32 *inst_cnt_ptr = NULL;
SEM *oai_semaphore = NULL;
RT_TASK *lxrt_task;
#endif
#endif
#include "SCHED/defs.h"
#include "SCHED/extern.h"
#include "ARCH/CBMIMO1/DEVICE_DRIVER/defs.h"
#include "ARCH/CBMIMO1/DEVICE_DRIVER/extern.h"
#ifdef PLATON
#include "daq.h"
#include "daq_vars_extern.h"
#endif PLATON
void openair_set_tx_gain(int ant_index,int gain_dB) {
#ifdef PLATON
writegain (TX_PA_GAIN,
inv_tx_gain_table[ant_index][gain_dB + 120 + 200],
ant_index);
rt_busy_sleep ((DAQ_PCI_WRITE_DELAY_NS));
writegain (TX_MED_GAIN,
inv_tx_gain_table[ant_index][gain_dB + 120 + 100],
ant_index);
rt_busy_sleep ((DAQ_PCI_WRITE_DELAY_NS));
if (mac_xface->frame% 100 == 0)
msg("[OPENAIR][RF][TX_GAIN] ant %d: PA->%d,MED->%d\n",ant_index,inv_tx_gain_table[ant_index][gain_dB + 120 + 200],inv_tx_gain_table[ant_index][gain_dB + 120 + 100]);
#endif
}
void openair_set_rx_gain(int ant_index,int gain_dB) {
#ifdef PLATON
writegain (RX_IF_GAIN,
inv_rx_gain_table[ant_index][gain_dB],
ant_index);
rt_busy_sleep ((DAQ_PCI_WRITE_DELAY_NS));
#endif
}
void openair_set_rx_gain_cal_openair(unsigned int gain_dB) {
#ifndef NOCARD_TEST
#ifndef PLATON
// printk("[openair][RF_CNTL] Setting RX gains to %d dB \n",gain_dB);
// Store the result in shared PCI memory so that the FPGA can detect and read the new value
if (pci_interface) {
pci_interface->rx_gain_cval = gain_dB;
}
else
printk("[openair][RF_CNTL] rxgainreg not configured\n");
#endif //PLATON
#endif
}
#ifndef USER_MODE
EXPORT_SYMBOL(openair_set_tx_gain);
EXPORT_SYMBOL(openair_set_rx_gain);
EXPORT_SYMBOL(openair_set_rx_gain_cal_openair);
#endif USER_MODE
#include "defs.h"
#include "linux/kernel.h"
#include "linux/module.h"
#ifdef BIGPHYSAREA
#ifdef ARCH_64
char *bigphys_ptr,*bigphys_current;
#else //ARCH_64
unsigned int bigphys_ptr,bigphys_current;
#endif //ARCH_64
extern int exit_openair;
// return pointer to memory in big physical area aligned to 16 bytes
void *bigphys_malloc(n) {
//printk("[BIGPHYSAREA] Calling bigphys_malloc\n");
int n2 = n + ((16-(n%16))%16);
bigphys_current += n2;
if (bigphys_current > bigphys_ptr + (BIGPHYS_NUMPAGES*4096)) {
printk("[BIGPHYS][FATAL] Memory overload!!!!! Exiting.\n");
exit_openair = 1;
}
#ifdef ARCH_64
//printk("[BIGPHYSAREA] Allocated Memory %d\n",bigphys_current-bigphys_ptr);
return ((void *)(bigphys_current - (char *)n2));
#else //ARCH_64
//printk("[BIGPHYSAREA] Allocated Memory %d\n",bigphys_current-bigphys_ptr);
return ((void *)(bigphys_current - n2));
#endif //ARCH_64
}
EXPORT_SYMBOL(bigphys_malloc);
#endif
//#define BIGPHYS_NUMPAGES 8192
#define BIGPHYS_NUMPAGES 32768
// one page is 4096 bytes
void *bigphys_malloc(int);
void reserve_mem(unsigned long buffer,unsigned long size);
#include <asm/io.h>
#include <asm/bitops.h>
#include <asm/uaccess.h>
#include <asm/segment.h>
#include <asm/page.h>
#include <asm/delay.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/mm.h>
#include <linux/mman.h>
#include <linux/slab.h>
//#include <linux/config.h>
#include <linux/version.h>
#include <linux/kernel.h>
#include <linux/fs.h>
#include <linux/errno.h>
#ifdef KERNEL2_6
//#include <linux/config.h>
#include <linux/slab.h>
#endif
// Function to set reserved bit on pages to be mapped to user-space by mmap
void reserve_mem(unsigned long buffer,unsigned long size) {
unsigned long virt_addr;
// printk("[openair][DEVICE] Reserving %p, size %d bytes\n",buffer,size);
for (virt_addr=(unsigned long)buffer;
virt_addr<(unsigned long)buffer+size;
virt_addr+=PAGE_SIZE)
{
/* reserve all pages to make them remapable */
SetPageReserved(virt_to_page(virt_addr));
}
}
TOP_DIR = ../..
INST = $(ECOS_INSTALL)/ecos_install
OPENAIR0_SIM = $(OPENAIR0_DIR)/express-mimo/simulator/baseband/C
ifdef ECOS
CC=/opt/sparc-elf-3.4.4/bin/sparc-elf-gcc
else
CC=gcc
endif
CFLAGS=-g -Wall -DNODE_RG -DUSER_MODE -DEXPRESSMIMO_TARGET -DNB_ANTENNAS_RX=2 -DNB_ANTENNAS_TXRX=2 -DNB_ANTENNAS_TX=2 -DMAX_MODULES=1 -DPHY_CONTEXT=1 -DFILE_OUTPUT
LDFLAGS= -lm -lfftw3
INCLUDE=-I$(OPENAIR0_DIR) -I$(OPENAIR1_DIR) -I/usr/include -I/usr/lib/gcc/i486-linux-gnu/4.1.3/include
ifdef ECOS
CFLAGS+=-msoft-float -ffunction-sections -fdata-sections
LDFLAGS+=-nostartfiles -nostdlib -Wl,--gc-sections -Wl,--Map -Wl,openair1.map -L$(INST)/lib -Ttarget.ld
INCLUDE+=-I$(INST)/include
DEPS=$(INST)/lib/libtarget.a $(INST)/lib/target.ld $(INST)/lib/vectors.o
endif
ifdef DEBUGPHY
CFLAGS += -DDEBUG_PHY
endif
ifdef DUALSTREAM
CFLAGS += -DDUALSTREAM
endif
# PHY Initialization routines
PHY_OBJS =$(TOP_DIR)/PHY/INIT/init.o
# PHY TOOLS routines
# PHY_OBJS +=$(TOP_DIR)/PHY/TOOLS/fft.o $(TOP_DIR)/PHY/TOOLS/cmult_vv.o $(TOP_DIR)/PHY/TOOLS/cmult_sv.o $(TOP_DIR)/PHY/TOOLS/cmult_vvh.o $(TOP_DIR)/PHY/TOOLS/cmult_mm.o $(TOP_DIR)/PHY/TOOLS/cadd_sv.o $(TOP_DIR)/PHY/TOOLS/cadd_vv.o
PHY_OBJS += $(OPENAIR0_SIM)/framing/framing.o $(OPENAIR0_SIM)/front_end_processor/fep.o $(OPENAIR0_SIM)/front_end_processor/fep_api.o $(OPENAIR0_SIM)/channel_decoder/3gpp_intlv.o $(OPENAIR0_SIM)/channel_decoder/lte_intlv.o $(OPENAIR0_SIM)/channel_decoder/3gpp_encoder.o $(OPENAIR0_SIM)/channel_decoder/decoder.o $(OPENAIR0_SIM)/channel_decoder/decoder_api.o
# PHY ESTIMATION routines
PHY_OBJS += $(TOP_DIR)/PHY/ESTIMATION/synch_time.o
#PHY_OBJS += $(TOP_DIR)/PHY/ESTIMATION/channel_estimation.o $(TOP_DIR)/PHY/ESTIMATION/adjust_sync.o $(TOP_DIR)/PHY/ESTIMATION/adjust_sync2.o $(TOP_DIR)/PHY/ESTIMATION/calc_timing_offset.o
# PHY MODULATION routines
PHY_OBJS +=$(TOP_DIR)/PHY/MODULATION/ofdm_mod.o
# PHY Transport routines
PHY_OBJS += $(TOP_DIR)/PHY/TRANSPORT/chsch.o $(TOP_DIR)/PHY/TRANSPORT/chbch.o $(TOP_DIR)/PHY/TRANSPORT/sch.o $(TOP_DIR)/PHY/TRANSPORT/sach.o $(TOP_DIR)/PHY/TRANSPORT/mrbch.o
# PHY Coding routines
PHY_OBJS+=$(TOP_DIR)/PHY/CODING/ccoding_byte.o $(TOP_DIR)/PHY/CODING/crc_byte.o $(TOP_DIR)/PHY/CODING/viterbi.o $(TOP_DIR)/PHY/CODING/rate_matching.o
# Utility routines
PHY_OBJS +=$(TOP_DIR)/PHY/TOOLS/dB_routines.o $(TOP_DIR)/PHY/TOOLS/file_output.o $(TOP_DIR)/PHY/TOOLS/memory_routines.o $(TOP_DIR)/PHY/TOOLS/signal_energy.o $(TOP_DIR)/PHY/TOOLS/sqrt.o $(TOP_DIR)/PHY/TOOLS/log2_approx.o
# CONFIG routines
PHY_OBJS +=$(TOP_DIR)/PHY/CONFIG/openair_configure.o $(TOP_DIR)/PHY/CONFIG/openair_readconfigfile.o
PHY_OBJS += openair1.o
OBJ = $(PHY_OBJS)
all: $(OBJ) openair1
$(OBJ) : %.o : %.c
$(CC) -c $(CFLAGS) -Wall -I$(TOP_DIR) $(INCLUDE) -o $@ $<
openair1: $(DEPS) $(OBJ) openair1.o
$(CC) $(INCLUDE) -I$(TOP_DIR) $(CFLAGS) $(LDFLAGS) -o openair1 $(PHY_OBJS)
clean:
rm -f openair1
rm -f $(PHY_OBJS)
rm -f *.o
rm -f $(TOP_DIR)/PHY/INIT/*.o
rm -f $(TOP_DIR)/PHY/TOOLS/*.o
rm -f $(TOP_DIR)/PHY/MODULATION/*.o
rm -f $(TOP_DIR)/PHY/CODING/*.o
rm -f $(TOP_DIR)/PHY/TRANSPORT/*.o
rm -f $(TOP_DIR)/PHY/ESTIMATION/*.o
rm -f $(TOP_DIR)/PHY/CONFIG/*.o
rm -f $(TOP_DIR)/SIMULATION/TOOLS/*.o
#include "PHY/types.h"
#include "PHY/defs.h"
#include "PHY/vars.h"
#include "PHY/CONFIG/vars.h"
#include "MAC_INTERFACE/vars.h"
main() {
char chbch_tx_power;
int chbch_size,i,ii,j;
int nb_antennas_tx=1;
unsigned int sync_pos;
char fname[40],vname[40];
unsigned char *chbch_pdu_tx[2],*chbch_pdu_rx[2];
int ret[2];
int tx_energy;
PHY_vars = malloc(sizeof(PHY_VARS));
PHY_config = malloc(sizeof(PHY_CONFIG));
mac_xface = malloc(sizeof(MAC_xface));
if((config = fopen("config.cfg","r")) == NULL) // this can be configured
{
printf("[OPENAIR][SIM][CHBCH] The openair configuration file <config.cfg> could not be found!");
exit(0);
}
if ((scenario= fopen("scenario.scn","r")) ==NULL)
{
printf("[OPENAIR][SIM][CHBCH] The openair scenario file <scenario.scn> could not be found!");
exit(0);
}
printf("[OPENAIR][SIM][CHBCH] Opened configuration files\n");
reconfigure_MACPHY(scenario);
dump_config();
mac_xface->is_cluster_head = 1;
phy_init(nb_antennas_tx);
printf("[OPENAIR][SIM][CHBCH] Initialized PHY variables\n");
PHY_vars->rx_vars[0].rx_total_gain_dB=120;
chbch_size = (NUMBER_OF_CARRIERS_PER_GROUP*(NUMBER_OF_CHBCH_SYMBOLS)*16)>>3;
//printf("[OPENAIR][SIM][CHBCH] chbch_size = %d\n",chbch_size);
chbch_pdu_tx[0] = malloc(chbch_size);
chbch_pdu_tx[1] = malloc(chbch_size);
for (i=0;i<chbch_size-4;i++) {
chbch_pdu_tx[0][i] = i;
chbch_pdu_tx[1][i] = chbch_size-i;
}
mac_xface->frame = 0;
//clear the tx buffer
for (j=0;j<nb_antennas_tx;j++)
Zero_Buffer(PHY_vars->tx_vars[j].TX_DMA_BUFFER,FRAME_LENGTH_SAMPLES*2);
chbch_tx_power = phy_generate_chbch(1,
1,
nb_antennas_tx,
chbch_pdu_tx[0]);
tx_energy=0;
for (j=0;j<nb_antennas_tx;j++) {
tx_energy += signal_energy(&PHY_vars->tx_vars[j].TX_DMA_BUFFER[SAMPLE_OFFSET_CHBCH_NO_PREFIX],
(NUMBER_OF_CHBCH_SYMBOLS)*OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES_NO_PREFIX);
}
#ifdef DEBUG_PHY
for (ii=0; ii<nb_antennas_tx; ii++) {
sprintf(fname,"txsig%d.m",ii);
sprintf(vname,"txs%d",ii);
write_output(fname,vname,
(s16 *)&PHY_vars->tx_vars[ii].TX_DMA_BUFFER[0],
TX_RX_SWITCH_SYMBOL*OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES,
1,
1);
}
#endif //DEBUG_PHY
printf("[OPENAIR][SIM][CHBCH] Starting RX\n");
mac_xface->is_cluster_head = 0;
phy_synch_time((short*) PHY_vars->rx_vars[0].RX_DMA_BUFFER,
&sync_pos,
TX_RX_SWITCH_SYMBOL*OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES,
768,
CHSCH,
1);
msg("[OPENAIR][SIM][CHBCH] sync_pos = %d\n",sync_pos);
return(tx_energy);
}
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/DLC_arch.png/1.1/Fri Apr 7 20:01:57 2006//Trhodos_stack
/Diapositive6.JPG/1.1/Fri Apr 7 20:01:57 2006//Trhodos_stack
/Framing.png/1.1/Fri Apr 7 20:01:57 2006//Trhodos_stack
/Framing.vsd/1.1/Fri Apr 7 20:01:57 2006//Trhodos_stack
/MAC Services.vsd/1.1/Fri Apr 7 20:01:57 2006//Trhodos_stack
/MAC_Measurements.png/1.1/Fri Apr 7 20:01:57 2006//Trhodos_stack
/MAC_Measurements.vsd/1.1/Fri Apr 7 20:01:57 2006//Trhodos_stack
/MAC_Services.eps/1.1/Fri Apr 7 20:01:57 2006//Trhodos_stack
/MAC_Services.vsd/1.1/Fri Apr 7 20:01:57 2006//Trhodos_stack
/MAC_Services2.eps/1.1/Fri Apr 7 20:01:57 2006//Trhodos_stack
/MAC_Services2.png/1.1/Fri Apr 7 20:01:57 2006//Trhodos_stack
/MAC_Services2.vsd/1.1/Fri Apr 7 20:01:57 2006//Trhodos_stack
/MAC_arch.eps/1.1/Fri Apr 7 20:01:57 2006//Trhodos_stack
/MAC_architecture.JPG/1.1/Fri Apr 7 20:01:57 2006//Trhodos_stack
/OFDM Transmitter.png/1.1/Fri Apr 7 20:01:57 2006//Trhodos_stack
/OFDM Transmitter.vsd/1.1/Fri Apr 7 20:01:57 2006//Trhodos_stack
/PHY_arch.eps/1.1/Fri Apr 7 20:01:57 2006//Trhodos_stack
/PHY_arch.png/1.1/Fri Apr 7 20:01:57 2006//Trhodos_stack
/PHY_arch.vsd/1.1/Fri Apr 7 20:01:57 2006//Trhodos_stack
/QAM modulation.png/1.1/Fri Apr 7 20:01:58 2006//Trhodos_stack
/QAM modulation.vsd/1.1/Fri Apr 7 20:01:58 2006//Trhodos_stack
/QAMmodulation.png/1.1/Fri Apr 7 20:01:58 2006//Trhodos_stack
/Transmission.pdf/1.1/Fri Mar 21 14:08:35 2008//Trhodos_stack
/Transmission.png/1.1/Tue May 30 08:34:31 2006//Trhodos_stack
/Transmission.ps/1.1/Tue May 30 08:34:31 2006//Trhodos_stack
/channel server.png/1.1/Fri Apr 7 20:01:58 2006//Trhodos_stack
/channel server.vsd/1.1/Fri Apr 7 20:01:58 2006//Trhodos_stack
/convolutional.png/1.1/Fri Mar 21 14:08:35 2008//Trhodos_stack
/convolutional.vsd/1.1/Fri Apr 7 20:01:58 2006//Trhodos_stack
/irs_dcf.jpg/1.1/Fri Apr 7 20:01:58 2006//Trhodos_stack
/irs_pcf.jpg/1.1/Fri Apr 7 20:01:58 2006//Trhodos_stack
/mac_channels.png/1.1/Fri Apr 7 20:01:58 2006//Trhodos_stack
/mac_w3g4f_mac_channels.vsd/1.1/Fri Apr 7 20:01:58 2006//Trhodos_stack
/mac_wbs.jpg/1.1/Fri Apr 7 20:01:58 2006//Trhodos_stack
/macphynet.eps/1.1/Fri Apr 7 20:01:58 2006//Trhodos_stack
/macphynet.png/1.1/Fri Apr 7 20:01:58 2006//Trhodos_stack
/scrambler.png/1.1/Fri Apr 7 20:01:58 2006//Trhodos_stack
/scrambler.vsd/1.1/Fri Apr 7 20:01:58 2006//Trhodos_stack
/w3g4f_framing.png/1.1/Fri Apr 7 20:01:58 2006//Trhodos_stack
/w3g4f_framing.vsd/1.1/Fri Apr 7 20:01:58 2006//Trhodos_stack
/widens_mac_channels.vsd/1.1/Fri Apr 7 20:01:58 2006//Trhodos_stack
/mac_w3g4f_mac_channels.pdf/1.3.4.1/Sat Mar 29 21:10:06 2008//Trhodos_stack
/mac_w3g4f_mac_channels.png/1.2.4.1/Sat Mar 29 21:11:16 2008//Trhodos_stack
/cellular_topology_small.png/1.1.2.1/Sat Mar 29 08:47:30 2008//Trhodos_stack
/mesh_topology_small.png/1.1.2.1/Sat Mar 29 08:36:54 2008//Trhodos_stack
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knopp@cvsexp.eurecom.fr:/home/cvs
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