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canghaiwuhen
OpenXG-RAN
Commits
0deb5d29
Commit
0deb5d29
authored
4 years ago
by
Robert Schmidt
Browse files
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Plain Diff
Use special dlsim preprocessor
parent
b389e43e
develop
1
256_QAM_demod
NR-PHY-MAC-IF-multi-UE
NR_10MHz
NR_DL_sched_fixes
NR_FAPI_beamindex_SSB_RO
NR_FR2_RA
NR_FR2_RRC_SSB
NR_MAC_Multi_Rach_GlobalEdge
NR_MAC_TCI_UCI_GlobalEdge
NR_PUCCH_MultiUE
NR_SA_NGAP_RRC_wk42
NR_SA_itti_sim_wk48
NR_SRB_Config
NR_UE_enable_parallelization
NR_UE_stability_fixes
NR_UL_scheduler
NR_UL_scheduler_rebased
NR_mac_uci_functions_rework
NR_scheduling_request
bch-fixes-bitmap
benetel_phase_rotation
bugfix-nr-ldpc-post-processing
bugfix-nr-ldpc-size-typo
bugfix-nr-pdcp-sn-size
bugfix-nr-rate-matching-assertion
ci-deploy-docker-compose
ci-ul-iperf-from-trf-container
cleanup_softmodem_main
constant_power
develop-oriecpriupdates
develop-sib1
dlsch_parallel
fix-itti-segv
fix_do_ra_data
fix_pdsch_low_prb
flexran-repair-mme-mgmt
fujitsu_lte_contribution
harq-hotfix
hotfix-minor-remove-nr-rlc-cppcheck-error
hotfix-nr-rlc-tick
integration_2020_wk45_2
integration_2020_wk46
integration_2020_wk46_2
integration_2020_wk47
integration_2020_wk48
integration_2020_wk48_2
integration_2020_wk49
integration_2020_wk50
integration_2020_wk50_1
inter-RRU-final
ldpc_short_codeword_fixes
lte_uplink_improvement
mac-fixes-wk45_2
mosaic5g-oai-ran
mosaic5g-oai-sim
nfapi_nr_develop
ngap-wf-1120
ngap-wf-1120-srb
ngap-wf-1120-srb-gtp
ngap-wf-1120-srb-gtp-hs
ngap-wf-1120-srb-gtp-hs1
ngap-wf-1120-srb-gtp-hs2
ngap-wf-1203-yunsdr
ngap_lfq_1120
ngap_merge
nrUE
nrUE-hs
nrUE-upper-layer
nr_bsr
nr_dl_dmrs_type2
nr_dl_pf
nr_dl_ul_ptrs
nr_fdd_if_fix
nr_prach_fr2
nr_ue_tti_cleanup
oai-sim
oc-docker-october-improvements
openxg/develop
ptrs_rrc_config
pusch-mthread-scaling-fix
remove_nos1_hack_pdcp
remove_x2_gnb_hardcoding
repair-TA
rh_ci_fix_autoterminate
rh_ci_fr1_update
rh_fr1_newjenkins
rh_fr1_update
rh_gnb_compile_fix
rh_wk50_debug
rlc-v2-bugfix-status-reporting
rlc-v2-tick
rrc-enb-phy-testmode
s1_subnormal
yihongzheng_srb
Changes
1
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1 changed file
with
55 additions
and
17 deletions
+55
-17
openair1/SIMULATION/NR_PHY/dlsim.c
openair1/SIMULATION/NR_PHY/dlsim.c
+55
-17
No files found.
openair1/SIMULATION/NR_PHY/dlsim.c
View file @
0deb5d29
...
@@ -150,6 +150,42 @@ int is_x2ap_enabled(void)
...
@@ -150,6 +150,42 @@ int is_x2ap_enabled(void)
openair0_config_t
openair0_cfg
[
MAX_CARDS
];
openair0_config_t
openair0_cfg
[
MAX_CARDS
];
/* specific dlsim DL preprocessor: uses rbStart/rbSize/mcs from command line of
dlsim, does not search for CCE/PUCCH occasion but simply sets to 0 */
int
g_mcsIndex
=
-
1
,
g_rbStart
=
-
1
,
g_rbSize
=
-
1
;
void
nr_dlsim_preprocessor
(
module_id_t
module_id
,
frame_t
frame
,
sub_frame_t
slot
,
int
num_slots_per_tdd
)
{
NR_UE_info_t
*
UE_info
=
&
RC
.
nrmac
[
module_id
]
->
UE_info
;
AssertFatal
(
UE_info
->
num_UEs
==
1
,
"can have only a single UE
\n
"
);
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE_info
->
UE_sched_ctrl
[
0
];
/* manually set free CCE to 0 */
const
int
target_ss
=
NR_SearchSpace__searchSpaceType_PR_ue_Specific
;
sched_ctrl
->
search_space
=
get_searchspace
(
sched_ctrl
->
active_bwp
,
target_ss
);
uint8_t
nr_of_candidates
;
find_aggregation_candidates
(
&
sched_ctrl
->
aggregation_level
,
&
nr_of_candidates
,
sched_ctrl
->
search_space
);
sched_ctrl
->
coreset
=
get_coreset
(
sched_ctrl
->
active_bwp
,
sched_ctrl
->
search_space
,
1
/* dedicated */
);
sched_ctrl
->
cce_index
=
0
;
/* set "any" value for PUCCH (simulator evaluates PDSCH only) */
sched_ctrl
->
pucch_sched_idx
=
0
;
sched_ctrl
->
pucch_occ_idx
=
0
;
sched_ctrl
->
rbStart
=
g_rbStart
;
sched_ctrl
->
rbSize
=
g_rbSize
;
sched_ctrl
->
mcs
=
g_mcsIndex
;
sched_ctrl
->
time_domain_allocation
=
2
;
sched_ctrl
->
mcsTableIdx
=
0
;
AssertFatal
(
sched_ctrl
->
rbStart
>=
0
,
"invalid rbStart %d
\n
"
,
sched_ctrl
->
rbStart
);
AssertFatal
(
sched_ctrl
->
rbSize
>
0
,
"invalid rbSize %d
\n
"
,
sched_ctrl
->
rbSize
);
AssertFatal
(
sched_ctrl
->
mcs
>=
0
,
"invalid sched_ctrl->mcs %d
\n
"
,
sched_ctrl
->
mcs
);
sched_ctrl
->
numDmrsCdmGrpsNoData
=
1
;
}
int
main
(
int
argc
,
char
**
argv
)
int
main
(
int
argc
,
char
**
argv
)
...
@@ -197,8 +233,6 @@ int main(int argc, char **argv)
...
@@ -197,8 +233,6 @@ int main(int argc, char **argv)
//double pbch_sinr;
//double pbch_sinr;
//int pbch_tx_ant;
//int pbch_tx_ant;
int
N_RB_DL
=
106
,
mu
=
1
;
int
N_RB_DL
=
106
,
mu
=
1
;
nfapi_nr_dl_tti_pdsch_pdu_rel15_t
dlsch_config
;
NR_sched_pucch
pucch_sched
;
//unsigned char frame_type = 0;
//unsigned char frame_type = 0;
...
@@ -227,7 +261,6 @@ int main(int argc, char **argv)
...
@@ -227,7 +261,6 @@ int main(int argc, char **argv)
randominit
(
0
);
randominit
(
0
);
int
mcsIndex_set
=
0
,
rbStart_set
=
0
,
rbSize_set
=
0
;
int
print_perf
=
0
;
int
print_perf
=
0
;
FILE
*
scg_fd
=
NULL
;
FILE
*
scg_fd
=
NULL
;
...
@@ -393,18 +426,15 @@ int main(int argc, char **argv)
...
@@ -393,18 +426,15 @@ int main(int argc, char **argv)
case
'a'
:
case
'a'
:
dlsch_config
.
rbStart
=
atoi
(
optarg
);
g_rbStart
=
atoi
(
optarg
);
rbStart_set
=
1
;
break
;
break
;
case
'b'
:
case
'b'
:
dlsch_config
.
rbSize
=
atoi
(
optarg
);
g_rbSize
=
atoi
(
optarg
);
rbSize_set
=
1
;
break
;
break
;
case
'e'
:
case
'e'
:
dlsch_config
.
mcsIndex
[
0
]
=
atoi
(
optarg
);
g_mcsIndex
=
atoi
(
optarg
);
mcsIndex_set
=
1
;
break
;
break
;
case
'm'
:
case
'm'
:
...
@@ -483,6 +513,7 @@ int main(int argc, char **argv)
...
@@ -483,6 +513,7 @@ int main(int argc, char **argv)
RC
.
nb_nr_mac_CC
[
i
]
=
1
;
RC
.
nb_nr_mac_CC
[
i
]
=
1
;
mac_top_init_gNB
();
mac_top_init_gNB
();
gNB_mac
=
RC
.
nrmac
[
0
];
gNB_mac
=
RC
.
nrmac
[
0
];
gNB_mac
->
pre_processor_dl
=
nr_dlsim_preprocessor
;
gNB_RRC_INST
rrc
;
gNB_RRC_INST
rrc
;
memset
((
void
*
)
&
rrc
,
0
,
sizeof
(
rrc
));
memset
((
void
*
)
&
rrc
,
0
,
sizeof
(
rrc
));
...
@@ -560,6 +591,12 @@ int main(int argc, char **argv)
...
@@ -560,6 +591,12 @@ int main(int argc, char **argv)
// nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,Nid_cell,SSB_positions);
// nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,Nid_cell,SSB_positions);
// call MAC to configure common parameters
// call MAC to configure common parameters
/* rrc_mac_config_req_gNB() has created one user, so set the scheduling
* parameters from command line in global variables that will be picked up by
* scheduling preprocessor */
if
(
g_mcsIndex
<
0
)
g_mcsIndex
=
9
;
if
(
g_rbStart
<
0
)
g_rbStart
=
0
;
if
(
g_rbSize
<
0
)
g_rbSize
=
N_RB_DL
-
g_rbStart
;
double
fs
,
bw
;
double
fs
,
bw
;
...
@@ -687,11 +724,6 @@ int main(int argc, char **argv)
...
@@ -687,11 +724,6 @@ int main(int argc, char **argv)
AssertFatal
(
input_fd
==
NULL
,
"Not ready for input signal file
\n
"
);
AssertFatal
(
input_fd
==
NULL
,
"Not ready for input signal file
\n
"
);
gNB
->
pbch_configured
=
1
;
gNB
->
pbch_configured
=
1
;
gNB
->
ssb_pdu
.
ssb_pdu_rel15
.
bchPayload
=
0x001234
;
gNB
->
ssb_pdu
.
ssb_pdu_rel15
.
bchPayload
=
0x001234
;
if
(
mcsIndex_set
==
0
)
dlsch_config
.
mcsIndex
[
0
]
=
9
;
if
(
rbStart_set
==
0
)
dlsch_config
.
rbStart
=
0
;
if
(
rbSize_set
==
0
)
dlsch_config
.
rbSize
=
N_RB_DL
-
dlsch_config
.
rbStart
;
//Configure UE
//Configure UE
rrc
.
carrier
.
MIB
=
(
uint8_t
*
)
malloc
(
4
);
rrc
.
carrier
.
MIB
=
(
uint8_t
*
)
malloc
(
4
);
...
@@ -788,8 +820,14 @@ int main(int argc, char **argv)
...
@@ -788,8 +820,14 @@ int main(int argc, char **argv)
for
(
int
i
=
0
;
i
<
MAX_NUM_CORESET
;
i
++
)
for
(
int
i
=
0
;
i
<
MAX_NUM_CORESET
;
i
++
)
gNB_mac
->
UE_info
.
num_pdcch_cand
[
0
][
i
]
=
0
;
gNB_mac
->
UE_info
.
num_pdcch_cand
[
0
][
i
]
=
0
;
if
(
css_flag
==
0
)
nr_schedule_uss_dlsch_phytest
(
0
,
frame
,
slot
,
&
pucch_sched
,
&
dlsch_config
);
if
(
css_flag
==
0
)
{
else
nr_schedule_css_dlsch_phytest
(
0
,
frame
,
slot
);
const
uint8_t
slots_per_frame
[
5
]
=
{
10
,
20
,
40
,
80
,
160
};
const
NR_TDD_UL_DL_Pattern_t
*
tdd_pattern
=
&
scc
->
tdd_UL_DL_ConfigurationCommon
->
pattern1
;
const
int
num_slots_per_tdd
=
slots_per_frame
[
*
scc
->
ssbSubcarrierSpacing
]
>>
(
7
-
tdd_pattern
->
dl_UL_TransmissionPeriodicity
);
nr_schedule_ue_spec
(
0
,
frame
,
slot
,
num_slots_per_tdd
);
}
else
{
nr_schedule_css_dlsch_phytest
(
0
,
frame
,
slot
);
}
Sched_INFO
.
module_id
=
0
;
Sched_INFO
.
module_id
=
0
;
Sched_INFO
.
CC_id
=
0
;
Sched_INFO
.
CC_id
=
0
;
Sched_INFO
.
frame
=
frame
;
Sched_INFO
.
frame
=
frame
;
...
@@ -986,7 +1024,7 @@ int main(int argc, char **argv)
...
@@ -986,7 +1024,7 @@ int main(int argc, char **argv)
if
(
print_perf
==
1
)
{
if
(
print_perf
==
1
)
{
printf
(
"
\n
gNB TX function statistics (per %d us slot, NPRB %d, mcs %d, TBS %d, Kr %d (Zc %d))
\n
"
,
printf
(
"
\n
gNB TX function statistics (per %d us slot, NPRB %d, mcs %d, TBS %d, Kr %d (Zc %d))
\n
"
,
1000
>>*
scc
->
ssbSubcarrierSpacing
,
dlsch_config
.
rbSize
,
dlsch_config
.
mcsIndex
[
0
]
,
1000
>>*
scc
->
ssbSubcarrierSpacing
,
g_rbSize
,
g_mcsIndex
,
gNB
->
dlsch
[
0
][
0
]
->
harq_processes
[
0
]
->
pdsch_pdu
.
pdsch_pdu_rel15
.
TBSize
[
0
]
<<
3
,
gNB
->
dlsch
[
0
][
0
]
->
harq_processes
[
0
]
->
pdsch_pdu
.
pdsch_pdu_rel15
.
TBSize
[
0
]
<<
3
,
gNB
->
dlsch
[
0
][
0
]
->
harq_processes
[
0
]
->
K
,
gNB
->
dlsch
[
0
][
0
]
->
harq_processes
[
0
]
->
K
,
gNB
->
dlsch
[
0
][
0
]
->
harq_processes
[
0
]
->
K
/
((
gNB
->
dlsch
[
0
][
0
]
->
harq_processes
[
0
]
->
pdsch_pdu
.
pdsch_pdu_rel15
.
TBSize
[
0
]
<<
3
)
>
3824
?
22
:
10
));
gNB
->
dlsch
[
0
][
0
]
->
harq_processes
[
0
]
->
K
/
((
gNB
->
dlsch
[
0
][
0
]
->
harq_processes
[
0
]
->
pdsch_pdu
.
pdsch_pdu_rel15
.
TBSize
[
0
]
<<
3
)
>
3824
?
22
:
10
));
...
...
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