Commit 31541601 authored by Florian Kaltenberger's avatar Florian Kaltenberger

fixes for tdd (N_TA_offset was not initialized) + some other code cleanup

tested with both EXMIMO and USRP. performance better than in master branch.
parent 426e6cd7
develop 1 128-ues 207-feature-ued-platform-support 256_QAM_demod 2cw_fairRRscd 340-fix-beamforming-for-multiple-antenna 375-syrtem-sdr-platform 383-ulsch-scheduler-optimization 387-fraunhofer-iis-transmission-mode-4 401-bug-related-to-nr-pucch-format-2-generator 408-reworked 408-ue-main-threads 445-LDPC-implementation-on-GPU 459-pusch-based-ta-updates 464-ru_beamforming_in_gpu 464-ru_beamforming_in_gpu-CPUsubfunction 472-add-pusch-dmrs-modes 481-ldpc-decoder-on-gpu 5g_fapi_scf LTE-sidelink LTE_TRX_on_single_port NCTU_CS_ISIP NCTU_CS_ISIP_CPU NCTU_CS_ISIP_GPU NCTU_OpinConnect_LDPC NR-PHY-MAC-IF-multi-UE NR_10MHz NR_CSI_reporting NR_DCI_01 NR_DL_sched_fixes NR_DL_scheduler NR_FAPI_beamindex_SSB_RO NR_FR2_RA NR_FR2_RRC_SSB NR_MAC_CE_GlobalEdge NR_MAC_Multi_Rach_GlobalEdge NR_MAC_SSB_RO_GlobalEdge NR_MAC_SSB_RO_UE_IDCC NR_MAC_SSB_RO_merge NR_MAC_TCI_UCI_GlobalEdge NR_NGAP NR_PDCP_noS1 NR_PUCCH_MultiUE NR_RA_updates NR_RRCConfiguragion_FR2 NR_RRCConfiguration NR_RRCConfiguration_FR2 NR_RRCConfiguration_S1U NR_RRCConfiguration_merge_develop NR_RRCConfiguration_sync_source NR_RRCConfiguration_trx_thread NR_RRC_CP_bugfix NR_RRC_PDCP NR_RRC_PRACH_procedures NR_RRC_PRACH_procedures_todevelop NR_RRC_PUSCH NR_RRC_TA NR_RRC_X2AP_AMBR_Change_Global_edge NR_RRC_X2AP_RemoveHardcodings_GlobalEdge NR_RRC_config_simplified NR_RRC_harq NR_RRC_harq_b NR_RRC_harq_hacks NR_RRC_harq_newdcipdu NR_SA_NGAP_RRC NR_SA_NGAP_RRC_wk42 NR_SA_itti_sim_wk48 NR_SCHED NR_SRB_Config NR_TRX_on_single_port NR_TRX_on_single_port2 NR_UE_MAC_scheduler NR_UE_RA_fixes NR_UE_UL_DCI_improvements NR_UE_enable_parallelization NR_UE_stability_fixes NR_UL_FAPI_programming NR_UL_scheduler NR_UL_scheduler_rebased NR_UL_scheduling NR_beamforming_test NR_gNB_SCF_Indication NR_ipaccess_testing NR_mac_uci_functions_rework NR_msg2_phytest NR_scheduling_CSIRS NR_scheduling_request NR_test_S1U_RRC_PRACH_procedures NR_ue_dlsch_dmrs_cdm New-Merge-sidelink-develop OpInConnect_ISIP PUSCH_TA_update PerfumeOldTdd RA_CI_test RRC-measurements-merge2develop UE_DL_DCI_hotfix UpdateRANRemoteUEReport add_iris_hw addoptions_nr_USRPdevice bch-fixes-bitmap benetel_5g_prach_fix benetel_phase_rotation benetel_phase_rotation_old block_mmse_receiver_with_whitenning bugfix-find-uci bugfix-minor-remove-wrong-log bugfix-nr-bands bugfix-nr-ldpc-post-processing bugfix-nr-ldpc-size-typo bugfix-nr-pdcp-sn-size bugfix-nr-rate-matching-assertion bugfix-pdcch_order cce_indexing_fix cce_indexing_fix2 ci-deploy-docker-compose ci-rd-july-improvements ci-ul-iperf-from-trf-container ci-yacine clean-5G-scope-round2 cleanup_softmodem_main constant_power debug_branch_init_sync develop-FeMBMS develop-aarch64build develop-ci develop-ci-fju develop-large-scale-emulations develop-m2ap develop-multi-RRUs develop-nb-iot develop-nb-iot-RRC develop-nb-iot-merge develop-nb-iot-merge-w-conflicts develop-nb-iot-ntust develop-nr develop-nr-adding-2018-09-asn1 develop-nr-fr2 develop-nr-fr2-rework develop-nr_cppcheck develop-oriecpriupdates develop-sib1 develop-sidekiq develop-vco3 develop_ci develop_inria_ci_deployment develop_inria_ci_deployment_gp develop_inria_ci_deployment_gp_b4merge develop_integration_2019_w44 develop_integration_2020_w15 develop_integration_2020_w19 develop_integration_w08 develop_jenkins_replay dfts_alternatives dlsch-all-dlslots dlsch_encode_mthread dlsch_parallel dlsim-autotests documentation docupdate_tools dongzhanyi-zte-0001 dongzhanyi-zte-develop dongzhanyi-zte-develop2 dreibh/apt-auth-fix dreibh/device-load-fix dreibh/device-load-fix-develop-branch dreibh/doxygen-fix dual-connectivity dummy edrx enhancement-149-iqtxshift extend_sharedlibusage extend_sharedlibusage2 fapi_for_dmrs_and_ptrs feat-mac-sock feature-21-TM7 feature-230-tm3_scheduler feature-247-tm89 feature-247-tm89-fixes feature-247-tm89-rebased feature-278-physical-layer-GPU-version feature-309-phy_procedures_eNB_TX_split_to_multi_threading feature-368-channel-simulator feature-4g-sched feature-68-enb-agent feature-flexran-cm-s1ap feature-nr-4g-nfapi-modifications feature-pdcp-task feature-send-rrc-message-for-wireshark-logging feature-support-clang-format feature/make-s1-mme-port-configurable feature/make-s1-mme-port-configurable-with-astyle-fixes feature_tm3 fembms-enb-ue finalize-oaicn-integration firas fix-ci-tun fix-clock-source fix-dirty-ue-same-machine fix-itti fix-itti-segv fix-l2-sim fix-limeSDR-compile fix-segfault-flexran-isolated fix-softmodem-restart fix-warnings fix_do_ra_data fix_pdsch_low_prb fix_rfsim_mimo fix_rrc_x2_ticking fixes-mac-sched-nfapi fixes-mac-sched-tun fixes-tun flexran-apps flexran-improvements flexran-repair-mme-mgmt flexran-report-split fr2-hw-test fujitsu_lte_contribution fujitsu_lte_contribution-128 gNB-nrUE-USRP gNB_mwc18_integration generate_push_ptrs harq-hotfix hotfix-minor-remove-nr-rlc-cppcheck-error hotfix-nr-rlc-tick hotfix-ocp-executable hotfix-ue-musim-compilation hotfix_usrp_lib improve_build_nr_lte_merge improve_nr_modulation improve_ue_stability initial-nfapi-PNF-fixes integration-develop-nr-2019w45 integration_2020_wk40 integration_2020_wk41 integration_2020_wk42_2 integration_2020_wk45 integration_2020_wk45_2 integration_2020_wk46 integration_2020_wk46_2 integration_2020_wk47 integration_2020_wk48 integration_2020_wk48_2 integration_2020_wk49 integration_2020_wk50 integration_2020_wk50_1 inter-RRU inter-RRU-final inter-RRU-nr inter-RRU-oairu inter-rru-UE interoperability-test isip-turbo-decoder-dynamic isip-turbo-decoder-parallel isip_nr issue271_simulator issue392-simplify-s1-nos1step2_01 issue416_nfapicleanup issue_345_l2_fapi_simulator l2-fixes large_scale_simulations ldpc-dec-layering ldpc-decoder-codegen ldpc-decoder-codegen2 ldpc-decoder-improvements ldpc-offload ldpc_short_codeword_fixes load_gnb lte-m-ue_type lte_uplink_improvement mac-fixes-wk45_2 mac-monitoring main_python master mbms-fix-develop-nr merging-2019-w51-to-develop-nr mex_mmse_receiver mobipass-hack modify_fairRRscd_parallel mosaic5g-oai-ran mosaic5g-oai-sim mu_allocate multi-L1 multi-RRUs new_nos1 new_pdcp new_rlc new_rlc_2020 new_rlc_in_mbms nfapi-L2-emulator nfapi-bugfix nfapi_improvement nfapi_nr_develop ngap-dlul ngap-support ngap-w48-merge2 ngap-wf ngap-wf-1120 ngap-wf-1120-srb ngap-wf-1120-srb-gtp ngap-wf-1120-srb-gtp-hs ngap-wf-1120-srb-gtp-hs1 ngap-wf-1120-srb-gtp-hs2 ngap-wf-1203-yunsdr ngap-wf-liuyu ngap_lfq_1120 ngap_merge noCore nr-coreset-bug-fix nr-dlsch-multi-thread nr-dlsch-thread nr-dual-connectivity nr-interdigital-test nr-ip-uplink-noS1 nr-mac-pdu-wireshark nr-mac-remove-ue-list nr-multiple-ssb nr-pdcp nr-pdsch-extraction-bugfix nr-physim-update nr-rlc-am-bugfix-w44 nr-rlc-bugfix-w44 nr-ssb-measurements nr-timing-measurement nr-timing-measurement-merge nr-ue-buffer-status nr-ue-slot-based nr-uldci nrUE nrUE-hs nrUE-upper-layer nr_beamforming nr_bsr nr_ci_dlsim nr_csi_newbranch nr_dci_procedures nr_demo_wsa2019 nr_dl_dmrs_type2 nr_dl_pf nr_dl_pf2 nr_dl_ul_ptrs nr_dlsch_parallel_measurements nr_dlsim_plot nr_fapi_for_push_tmp nr_fdd_if_fix nr_fix_easycppcheck nr_flexible_NRBDL nr_improve_build_procedures nr_increase_tp nr_mib_vsa_test nr_pdcch_testing nr_pdcch_updates nr_pdsch_integration nr_polar_decoder_improvement nr_prach nr_prach_fr2 nr_pucch nr_pucch2 nr_segmentation_fixes nr_sim_fix nr_tdd_configuration nr_ue_msg3 nr_ue_tti_cleanup nr_vcd nrue-multi-thread nrue_msg2_reception nsa-ue nsa_remove_band_hardcodings oai-sim oai-ubuntu-docker oai-ubuntu-docker-for-lmssdr oai_ue_mwc18_integration oairu oc-docker-october-improvements ocp_simulator openxg/develop pdcp-benchmark pdsch-ch-est polar8 preprocessor_refactor-2 ptrs_rrc_config pucch2ab pucchsim-multiue pusch-mthread-scaling-fix ra-dl-ul rau_rru_reciprocity_measurements recode_itti_from_scratch reduce_memory_footprint release_v1_2_0_candidate remove-ci-workaround remove_nos1_hack_pdcp remove_x2_gnb_hardcoding repair-TA revert-f5c94279 revert-itti revert_memcpy rh_ci_fix_autoterminate rh_ci_fr1_update rh_ci_oc rh_ci_py rh_ci_rfsim_ra rh_doc_update_3 rh_fr1_newjenkins rh_fr1_update rh_gnb_compile_fix rh_wk50_debug rhel77-build rlc-v2-bugfix-status-reporting rlc-v2-tick rlc_v2_coverity_fixes rrc-enb-phy-testmode rru-txwrite-modification ru-parallel-beamforming ru_rau_enhancement ru_rau_enhancement-external-timing runel runel-reverse-test s1_subnormal s1ap-bugfix-rab_setup schedule-si-fix signal-delay small-bugfixes-w40 smallcleanup softmodem_cleanup split73 tcri test-x310-perf testing_2symb_pdcch testing_with_external_txdata thread-pool tm7-iris tools_5Gadapt tp-ota-test trx_thread_param trx_write_thread ue-csi ue-fixes-ota ue-updates-runel-test ue_adjust_gain ue_dlsch-multi-threading ue_dlsch_decoding_ldpc_offload ue_nfapi_mch ues_test_tmp uhd_priority_set_cleanup ul_dl_dci_same_slot ul_harq ulsch_decode_mthread ulsim_changes update-to-2019-march-june-release usrp_fix_adc_shift_and_pps_sync usrp_gpio_test workaround-rebased workaround-restart-not-working x2-endc-processing x2-ho x2-ka-test x2_neighbor_6cells x2_tdd yihongzheng_srb zzs
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......@@ -134,8 +134,8 @@ time_stats_t softmodem_stats_mt; // main thread
time_stats_t softmodem_stats_hw; // hw acquisition
time_stats_t softmodem_stats_rxtx_sf; // total tx time
time_stats_t softmodem_stats_rx_sf; // total rx time
int32_t **rxdata;
int32_t **txdata;
//int32_t **rxdata;
//int32_t **txdata;
uint8_t seqno; //sequence number
......@@ -302,12 +302,13 @@ void do_OFDM_mod_rt(int subframe,PHY_VARS_eNB *phy_vars_eNB) {
6,
phy_vars_eNB->frame_parms.nb_prefix_samples,
CYCLIC_PREFIX);
PHY_ofdm_mod(&phy_vars_eNB->common_vars.txdataF[0][aa][slot_offset_F+slot_sizeF],
dummy_tx_b+(phy_vars_eNB->frame_parms.samples_per_tti>>1),
phy_vars_eNB->frame_parms.ofdm_symbol_size,
6,
phy_vars_eNB->frame_parms.nb_prefix_samples,
CYCLIC_PREFIX);
if (subframe_select(&phy_vars_eNB->frame_parms,subframe) == SF_DL)
PHY_ofdm_mod(&phy_vars_eNB->common_vars.txdataF[0][aa][slot_offset_F+slot_sizeF],
dummy_tx_b+(phy_vars_eNB->frame_parms.samples_per_tti>>1),
phy_vars_eNB->frame_parms.ofdm_symbol_size,
6,
phy_vars_eNB->frame_parms.nb_prefix_samples,
CYCLIC_PREFIX);
} else {
normal_prefix_mod(&phy_vars_eNB->common_vars.txdataF[0][aa][slot_offset_F],
dummy_tx_b,
......@@ -385,7 +386,7 @@ void do_OFDM_mod_rt(int subframe,PHY_VARS_eNB *phy_vars_eNB) {
// turn on tx switch N_TA_offset before
//LOG_D(HW,"subframe %d, time to switch to tx (N_TA_offset %d, slot_offset %d) \n",subframe,phy_vars_eNB->N_TA_offset,slot_offset);
for (i=0; i<phy_vars_eNB->N_TA_offset; i++) {
tx_offset = (int)slot_offset+time_offset[aa]+i-phy_vars_eNB->N_TA_offset/2;
tx_offset = (int)slot_offset+time_offset[aa]+i-phy_vars_eNB->N_TA_offset;
if (tx_offset<0)
tx_offset += LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*phy_vars_eNB->frame_parms.samples_per_tti;
......@@ -468,8 +469,16 @@ void proc_tx_full(PHY_VARS_eNB *eNB,
// if TX fronthaul go ahead
if (eNB->tx_fh) eNB->tx_fh(eNB,proc);
/*
if (proc->frame_tx>1000) {
write_output("/tmp/txsig0.m","txs0", &eNB->common_vars.txdata[eNB->Mod_id][0][0], eNB->frame_parms.samples_per_tti*10,1,1);
write_output("/tmp/txsigF0.m","txsF0", &eNB->common_vars.txdataF[eNB->Mod_id][0][0],eNB->frame_parms.symbols_per_tti*eNB->frame_parms.ofdm_symbol_size*10,1,1);
write_output("/tmp/txsig1.m","txs1", &eNB->common_vars.txdata[eNB->Mod_id][1][0], eNB->frame_parms.samples_per_tti*10,1,1);
write_output("/tmp/txsigF1.m","txsF1", &eNB->common_vars.txdataF[eNB->Mod_id][1][0],eNB->frame_parms.symbols_per_tti*eNB->frame_parms.ofdm_symbol_size*10,1,1);
//if (transmission_mode == 7) write_output("/tmp/txsigF5.m","txsF5", &eNB->common_vars.txdataF[eNB->Mod_id][5][0],eNB->frame_parms.symbols_per_tti*eNB->frame_parms.ofdm_symbol_size*10,1,1);
exit_fun("");
}
*/
}
void proc_tx_rru_if4p5(PHY_VARS_eNB *eNB,
......@@ -539,7 +548,8 @@ int wait_CCs(eNB_rxtx_proc_t *proc) {
static inline int rxtx(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, char *thread_name) {
start_meas(&softmodem_stats_rxtx_sf);
// ****************************************
// ****************************************
// Common RX procedures subframe n
phy_procedures_eNB_common_RX(eNB);
......@@ -1477,7 +1487,7 @@ int setup_eNB_buffers(PHY_VARS_eNB **phy_vars_eNB, openair0_config_t *openair0_c
int i, CC_id;
int j;
uint16_t N_TA_offset = 0;
//uint16_t N_TA_offset = 0;
LTE_DL_FRAME_PARMS *frame_parms;
......@@ -1490,6 +1500,7 @@ int setup_eNB_buffers(PHY_VARS_eNB **phy_vars_eNB, openair0_config_t *openair0_c
return(-1);
}
/*
if (frame_parms->frame_type == TDD) {
if (frame_parms->N_RB_DL == 100)
N_TA_offset = 624;
......@@ -1498,7 +1509,7 @@ int setup_eNB_buffers(PHY_VARS_eNB **phy_vars_eNB, openair0_config_t *openair0_c
else if (frame_parms->N_RB_DL == 25)
N_TA_offset = 624/4;
}
*/
if (openair0_cfg[CC_id].mmapped_dma == 1) {
......@@ -1508,11 +1519,8 @@ int setup_eNB_buffers(PHY_VARS_eNB **phy_vars_eNB, openair0_config_t *openair0_c
printf("Mapping eNB CC_id %d, rx_ant %d\n",CC_id,i);
free(phy_vars_eNB[CC_id]->common_vars.rxdata[0][i]);
phy_vars_eNB[CC_id]->common_vars.rxdata[0][i] = openair0_cfg[CC_id].rxbase[i];
printf("rxdata[%d] @ %p\n",i,phy_vars_eNB[CC_id]->common_vars.rxdata[0][i]);
for (j=0; j<16; j++) {
printf("rxbuffer %d: %x\n",j,phy_vars_eNB[CC_id]->common_vars.rxdata[0][i][j]);
phy_vars_eNB[CC_id]->common_vars.rxdata[0][i][j] = 16-j;
......@@ -1533,15 +1541,15 @@ int setup_eNB_buffers(PHY_VARS_eNB **phy_vars_eNB, openair0_config_t *openair0_c
}
}
else { // not memory-mapped DMA
//nothing to do, everything already allocated in lte_init
/*
rxdata = (int32_t**)malloc16(frame_parms->nb_antennas_rx*sizeof(int32_t*));
txdata = (int32_t**)malloc16(frame_parms->nb_antennas_tx*sizeof(int32_t*));
for (i=0; i<frame_parms->nb_antennas_rx; i++) {
free(phy_vars_eNB[CC_id]->common_vars.rxdata[0][i]);
rxdata[i] = (int32_t*)(32 + malloc16(32+frame_parms->samples_per_tti*10*sizeof(int32_t))); // FIXME broken memory allocation
phy_vars_eNB[CC_id]->common_vars.rxdata[0][i] = rxdata[i]-N_TA_offset; // N_TA offset for TDD FIXME! N_TA_offset > 16 => access of unallocated memory
phy_vars_eNB[CC_id]->common_vars.rxdata[0][i] = rxdata[i]; //-N_TA_offset; // N_TA offset for TDD FIXME! N_TA_offset > 16 => access of unallocated memory
memset(rxdata[i], 0, frame_parms->samples_per_tti*10*sizeof(int32_t));
printf("rxdata[%d] @ %p (%p) (N_TA_OFFSET %d)\n", i, phy_vars_eNB[CC_id]->common_vars.rxdata[0][i],rxdata[i],N_TA_offset);
}
......@@ -1553,6 +1561,7 @@ int setup_eNB_buffers(PHY_VARS_eNB **phy_vars_eNB, openair0_config_t *openair0_c
memset(txdata[i],0, frame_parms->samples_per_tti*10*sizeof(int32_t));
printf("txdata[%d] @ %p\n", i, phy_vars_eNB[CC_id]->common_vars.txdata[0][i]);
}
*/
}
}
......
......@@ -1583,7 +1583,18 @@ int main( int argc, char **argv )
UE[CC_id]->rx_total_gain_dB = (int)rx_gain[CC_id][0] + rx_gain_off;
UE[CC_id]->tx_power_max_dBm = tx_max_power[CC_id];
UE[CC_id]->N_TA_offset = 0;
if (frame_parms[CC_id]->frame_type==FDD) {
UE[CC_id]->N_TA_offset = 0;
}
else {
if (frame_parms[CC_id]->N_RB_DL == 100)
UE[CC_id]->N_TA_offset = 624;
else if (frame_parms[CC_id]->N_RB_DL == 50)
UE[CC_id]->N_TA_offset = 624/2;
else if (frame_parms[CC_id]->N_RB_DL == 25)
UE[CC_id]->N_TA_offset = 624/4;
}
}
......@@ -1623,8 +1634,17 @@ int main( int argc, char **argv )
PHY_vars_eNB_g[0][CC_id]->rx_total_gain_dB = (int)rx_gain[CC_id][0];
PHY_vars_eNB_g[0][CC_id]->N_TA_offset = 0;
if (frame_parms[CC_id]->frame_type==FDD) {
PHY_vars_eNB_g[0][CC_id]->N_TA_offset = 0;
}
else {
if (frame_parms[CC_id]->N_RB_DL == 100)
PHY_vars_eNB_g[0][CC_id]->N_TA_offset = 624;
else if (frame_parms[CC_id]->N_RB_DL == 50)
PHY_vars_eNB_g[0][CC_id]->N_TA_offset = 624/2;
else if (frame_parms[CC_id]->N_RB_DL == 25)
PHY_vars_eNB_g[0][CC_id]->N_TA_offset = 624/4;
}
}
......
......@@ -98,8 +98,8 @@ extern uint32_t downlink_frequency[MAX_NUM_CCs][4];
extern int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
extern int oai_exit;
extern int32_t **rxdata;
extern int32_t **txdata;
int32_t **rxdata;
int32_t **txdata;
//extern unsigned int tx_forward_nsamps;
//extern int tx_delay;
......@@ -1628,14 +1628,14 @@ int setup_ue_buffers(PHY_VARS_UE **phy_vars_ue, openair0_config_t *openair0_cfg)
}
/*
if (frame_parms->frame_type == TDD) {
if (frame_parms->frame_type == TDD) {
if (frame_parms->N_RB_DL == 100)
N_TA_offset = 624;
else if (frame_parms->N_RB_DL == 50)
N_TA_offset = 624/2;
else if (frame_parms->N_RB_DL == 25)
N_TA_offset = 624/4;
}
N_TA_offset = 624;
else if (frame_parms->N_RB_DL == 50)
N_TA_offset = 624/2;
else if (frame_parms->N_RB_DL == 25)
N_TA_offset = 624/4;
}
*/
// replace RX signal buffers with mmaped HW versions
......@@ -1645,9 +1645,9 @@ int setup_ue_buffers(PHY_VARS_UE **phy_vars_ue, openair0_config_t *openair0_cfg)
for (i=0; i<frame_parms->nb_antennas_rx; i++) {
printf( "Mapping UE CC_id %d, rx_ant %d, freq %u on card %d, chain %d\n", CC_id, i, downlink_frequency[CC_id][i], rf_map->card, rf_map->chain+i );
free( phy_vars_ue[CC_id]->common_vars.rxdata[i] );
rxdata[i] = (int32_t*)malloc16_clear( 307200*sizeof(int32_t) );
phy_vars_ue[CC_id]->common_vars.rxdata[i] = rxdata[i]; // what about the "-N_TA_offset" ? // N_TA offset for TDD
printf("rxdata[%d] : %p\n",i,rxdata[i]);
rxdata[i] = (int32_t*)malloc16_clear( 307200*sizeof(int32_t) );
phy_vars_ue[CC_id]->common_vars.rxdata[i] = rxdata[i]; // what about the "-N_TA_offset" ? // N_TA offset for TDD
printf("rxdata[%d] : %p\n",i,rxdata[i]);
}
for (i=0; i<frame_parms->nb_antennas_tx; i++) {
......
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